KR910008268Y1 - Recording state monitoring circuit - Google Patents

Abstract

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Description

Recording state checking circuit of video tape recorder

1 is a block diagram of a recording state checking circuit of a video tape recorder according to the present invention.

2 is a detailed circuit diagram of FIG.

3 is a waveform diagram of each part of FIG. 2.

* Explanation of symbols for main parts of the drawings

COM ₁ , COM ₁₀ , COM ₁₁ , COM ₂₀ , COM ₂₁ : Comparator

OP ₁ , OP ₂ : Op amp OR ₁ , OR ₂ : Oagate

Q ₁ -Q ₃ : Transistor LED ₁ -LED ₃ : Light Emitting Diode

NAND ₁ : NAND Gate IN ₁ : Inverter

AND: AND gate 3: Sync signal detection unit

4: RF signal display unit 11, 21: peak value detection unit

12, 22: comparison unit 13, 23, 30: gate circuit unit

14: Y signal display unit 24: C signal display unit

CM: Channel Mute Signal

The present invention relates to a video tape recorder (VTR), and more particularly, to a recording state of a video tape recorder for stopping an operation of a video tape recorder by alarming an abnormal state of a video input signal and an abnormal state of a video signal recorded on a tape during recording. It is about a check circuit.

Conventional video tape recorders do not have a function to identify the abnormality of the input video signal, and there is no method of checking and controlling the recording function of the video tape recorder set at the time of recording. There was a problem that can not determine.

Therefore, in view of the above situation, the present invention checks the status of a video input signal and the state of a video signal recorded on a recorder tape to prevent a problem caused by a recording state after recording in advance. The purpose is to provide an inspection circuit.

The present invention for achieving the above object is to detect the synchronization signal of the input mixed video signal to display the state of the input signal state display means, and to display the abnormal state of the frequency-modulated luminance signal of the video signal during recording Luminance signal state display means, color signal state display means for displaying an abnormal state of the low-frequency converted color signal of the video signal during recording, and control means for controlling the operating state of the system by logically combining the output of these means. It is characterized by.

According to the present invention, the video signal state display means integrates a synchronous signal and compares the integrated signal with a reference voltage to generate a predetermined output, and operates by a signal output from the synchronous signal detector to operate the first signal. The first display unit includes a comparator, and the first display unit includes a visual or audio display device that can easily notify a user when an abnormality occurs in an image signal. It is desirable to.

In addition, the luminance signal state display means outputs a predetermined output by comparing the luminance signal peak value detection section for detecting the peak value of the frequency-modulated luminance signal with the maximum and minimum reference voltage levels of the luminance signal recorded on the tape. It includes a first comparison and logic combination to generate a. The first comparison and logic combination section is preferably composed of at least two comparators and an oragate for logically combining the signals output from the plurality of resistors and comparators for setting the maximum and minimum reference voltage levels, respectively.

The color signal state display means generates a predetermined output by comparing a color signal peak value detection section for detecting the peak value of the low-pass converted color signal with the maximum and minimum reference voltage levels of the color signal recorded on the tape. A second comparison and logic combination.

The second comparison and logic combination section is also preferably composed of the same circuit elements as the first comparison and logic combination section.

The luminance signal state display means and the color signal state display means each include a second display portion and a third display portion for displaying a second signal and a third signal indicating an abnormal state of the luminance signal and the color signal. And the third display unit is also composed of an electronic device for providing a visual or audio display or simultaneously providing a visual and audio display.

According to the present invention, it is preferable that the control means include a gate circuit for stopping the system when an abnormal state occurs by logically combining the above-described first, second and third signals.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram of a recording state checking circuit of a video tape recorder according to the present invention. As shown in FIG. 1, the image signal state display means according to the present invention includes a sync signal detector 3 for detecting a sync signal RF separated by a tuner 1 and a simultaneous signal separator 2. And an RF signal display unit 4 for displaying whether an input video signal is abnormal.

Means for displaying the state of the frequency-modulated luminance signal include: a recording amplifier 10 for amplifying the luminance signal Y during recording, a peak value detector 11 for detecting the peak value of the amplified luminance signal, and a detected luminance signal. The comparison unit 12 generating a predetermined signal by comparing the peak value of the video signal to the maximum and minimum reference voltage levels recorded on the tape, the gate circuit unit 13 for logically combining the compared signals, and the logically combined luminance. And a Y signal display section 14 for displaying a signal state.

Further, the means for displaying the state of the low-converted color signal C includes: a recording amplifier 20 for amplifying the low-converted color signal during recording, a peak value detector 21 for detecting the peak value of the amplified color signal; A comparison unit 22 for generating a predetermined signal by comparing the detected peak value of the color signal with the maximum and minimum reference voltage levels of the video signal recorded on the tape, and a gate circuit unit 23 for logically combining the compared signals; And a C signal display section 24 for displaying the state of the logically combined color signal.

On the other hand, the control means according to the present invention is a gate circuit for stopping the system when an abnormal state occurs in the synchronously separated mixed video signal (RF), the frequency-modulated luminance signal (Y) and the low-frequency conversion color signal (C) 30 and a relay 31.

In the drawing, reference numeral 32 denotes a mixer for mixing the color signal Y and the luminance signal C during recording, and 33 denotes an amplifier for amplifying the mixed composite signal and applying it to the video head.

2 is a detailed circuit diagram of FIG. The synchronizing signal detector 3 for detecting the simultaneous signal separated by the synchronizing signal separator 2 (FIG. 1) has a resistor R ₁ and a capacitor C ₁ integrating the synchronizing signal, Reference voltage ) To set the resistance (R ₂₎ and the constant-voltage zener diode (ZD ₁₎ and the synchronization signal and the reference voltage ( ) And a comparator COM ₁ for generating a predetermined output.

RF signal display unit 4 to display the status of the output generated by the comparator (COM ₁₎ is a bias resistor (R _3), (R ₄₎ and a light emitting diode for generating a turn-on when the rays of the transistor (Q ₁₎ (LED ₁ ) And a bias resistor (R ₅ ).

Then, the luminance signal peak value detector 11 for detecting the peak value of the luminance signal Y amplified by the amplifier 10 sets the amplifier OP ₁ which is the voltage follower and the output level of the amplifier OP ₁ constant. It is composed of a diode (D ₁ ) and a capacitor (C ₂ ) to keep it.

The comparator 12 is a maximum reference level of the range levels where the linearity of the video signal recorded on the tape is good at the time of recording. ) And minimum reference level definition ( A comparator for outputting a predetermined signal by comparing the resistors R ₆ -R ₈ for setting the peak value of the detected luminance signal with the maximum and minimum reference levels set by the resistors R ₆ -R ₈ . COM ₁₀ ), (COM ₁₁ ). Where the maximum reference level ( ) And the minimum reference level ( ) Is as follows.

The gate circuit 13 which logically combines the signals output from the comparators COM ₁₀ and COM ₁₁ is composed of an ora gate OR ₁ .

The Y signal display unit 14, which displays the state of the luminance signal generated at the OR gate OR _1, is turned on when the bias resistors R ₉ and R ₁₀ , the transistors Q ₂ and Q ₂ are turned on. It consists of a light emitting diode (LED ₂ ) for generating light rays and a bias resistor (R ₁₁ ).

Further, the color signal a peak value detector 21 for detecting the peak value of the color signal (C) and amplified by the amplifier 20 is a voltage follower of the amplifier (OP ₂₎ and a constant output level of the amplifier (OP ₂₎ It is composed of a diode (D ₁₀ ) and a capacitor (C ₂₀ ) to keep it.

The comparator 22 is the maximum reference level of the level range where the linearity of the color signals recorded on the tape is good during recording. ) And the minimum reference level ( A comparator for outputting a predetermined signal by comparing the resistors R _{16 to} R ₁₈ for setting the peaks of the detected color signals with the maximum and minimum reference levels set by the resistors R _{16 to} R ₁₈ . COM ₂₀ ), (COM ₂₁ ), where the maximum reference level ( ) And the minimum reference level ( Is defined as follows. In other words

The gate circuit unit 23 for logically combining the signals output from the comparators COM ₂₀ and COM ₂₁ is composed of an ora gate OR ₂ .

The C signal display unit 24 which displays the state of the color signal generated by the OR gate OR ₂ is turned on when the bias resistors R ₁₉ and R ₂₀ , the transistors Q ₃ and Q ₃ are turned on. It consists of a light emitting diode (LED ₃ ) and a bias resistor (R ₂₁ ) for generating a light beam.

Then, the light-emitting diode (LED ₁ -LED ₃₎ and of which one can operate even when a gate for stopping the system circuit 30 includes a NAND gate (NAND _1), and an output channel muting signal of the NAND gate (NAND ₁₎ ( in CM) a logic aND gate for combining (aND ₁₎ and an inverter (iN ₁₎ bar, the aND gate (aND ₁₎ is when to move the channel from the RF signal input status channel muting signal (CM) consisting of This is to prevent the system from being controlled.

The operation of the present invention configured as described above will be described.

First, when an RF signal is applied, these mixed video signals are synchronously separated through the tuner 1 and the synchronous separation signal 2 (see FIG. 1), and this synchronously separated signal (Figure 3a) is a resistor (R). ₁ ) is integrated by the capacitor C ₁ (see waveform in FIG. 3b) and input to the inverting terminal of the comparator COM ₁ . At this time, the integral waveform is determined by the time constant by the resistor R ₁ and the capacitor C ₁ .

At this time, the comparator COM ₁ receives the synchronization signal inputted to the inverting terminal thereof, and the reference voltage set by the resistor R ₂ and the constant voltage zener diode ZD ₁ . The reference voltage is compared with the synchronization signal (assuming an abnormal state is displayed when the reference voltage level is lower). That is, the synchronization signal is a reference voltage ( Less than), the comparator COM ₁ outputs a "high" signal, and the sync signal If larger than), the comparator COM ₁ outputs a "low" signal (see FIGS. 3b and 3c).

If the output of the comparator COM ₁ is "high" (i.e., there is an error in the synchronous separation signal), the "high" signal is transmitted through the bias resistors R ₃ and R ₄ . applied to the base of Q ₁₎ is thereby turning on the transistor (Q _1). When transistor Q ₁ is driven, the point ( ) Voltage level becomes "low" so that the light emitting diode (LED ₁ ) operates to generate light, and at the same time, _one side terminal (ⓐ) of the NAND gate (NAND ₁ ) has a low state signal among waveforms such as 3g. Is approved.

On the other hand, when the output of the comparator COM ₁ is "low" (that is, there is no abnormality in the synchronous separation signal), the transistor Q ₁ is not turned on so that the light emitting diode LED ₁ is not operated and the NAND The high signal is applied to the lower terminal ⓐ of the gate NAND ₁ (see also 3g).

If the lower terminal (ⓐ) of the NAND gate (NAND ₁₎ is applied a low level signal, the NAND gate (NAND ₁₎ is to generate a signal of a high state regardless of the status of the signal applied to its other terminal (ⓑ, ⓒ) It is applied to the lower input terminal of the AND gate AND ₁ . At this time, the AND gate AND ₁ logically combines the channel mute signal with the high signal output from the NAND gate NAND ₁ , and since the channel mute signal is not normally output, the output of the AND gate AND ₁ is high. It enters the state and operates the relay (R _Y ). Thus, the signal passing through the relay Ry controls the system (ie, disables the VTR set).

In addition, the frequency-modulated luminance signal (see FIG. 3d) during the recording is amplified by the recording amplifier 10 and then fixed by the amplifier OP ₁ , the diode D ₁ , and the capacitor C ₂ , which are voltage followers. The output converted to the level (Fig. 3e) is obtained, where diode D ₁ serves to prevent the peak level from changing during discharge after the signal output from amplifier OP ₁ is charged to capacitor C ₂ . Do it. The waveform of FIG. 3E is simultaneously input to the non-inverting terminal of the comparator COM ₁₀ and the inverting terminal of the comparator COM ₁₁ .

At this time, the reference voltage of the comparator (COM ₁₀ ) ) Is the maximum reference level among the luminance levels where the linearity of the video signal recorded on the tape is good at the time of recording. ) It is shown as the above-described formula (I), the reference voltage of the comparator (COM ₁₁₎ ( Is the minimum reference level among the range levels where the video signal has the most linearity (see Equation (II)). Where the reference voltage ( ) Is the frequency modulation current level input to the video head (not shown) during video signal recording, for example, in the case of VHS, the modulation frequency is 3.4MHZ-4.4MHZ.

If the output of the peak detector 11 (Fig. 3e) is larger than the maximum allowable level or less than the minimum allowable level of the tape recording signal (i.e., the V, V, or reference voltage shown in Fig. 3e) Greater than) or the reference voltage ( ), The output of the comparator COM ₁₀ is "high" while the output of the comparator COM ₁₁ is "low" and is input to the oragate OR ₁ . The OR gate OR ₁ then logically combines these signals to generate a high state signal (see also 3f) and applies them to the base of the transistor Q ₂ via the bias resistors R ₉ and R ₁₀ . do.

At this time, transistor Q ₂ is turned on and the point ( As the voltage level of the light source becomes "low", the light emitting diode (LED ₂ ) is activated to generate light. When the light emitting diode (LED ₂ ) is operating, The low signal is applied to the ⓑ input terminal of the NAND gate NAND ₁ .

On the other hand, when the output of the OR gate OR ₁ is in the "low" state (i.e., if there is no abnormality in the frequency-modulated luminance signal-㉯ section of FIG. 3E), the transistor Q ₂ is not driven and accordingly The light emitting diode LED ₂ also becomes inoperative, and a high signal is applied to the input terminal ⓑ of the NAND gate NAND ₁ .

As in the case of the RF signal, a signal of a high state regardless of the signal state of an input terminal (ⓐ, ⓒ) when the low signal to the input terminal (ⓑ) of the NAND gate (NAND ₁₎ is a NAND gate (NAND ₁₎ The subsequent operation is performed as described above.

Then, during recording, the low-converted color signal C is amplified by the recording amplifier 20 and detected by a peak detector 21 similar to the peak detector 11 to a certain level, and then the comparator COM ₂₀ , ( COM ₂₁ ). At this time, the reference voltage of each of the comparator (COM ₂₀ ), (COM ₂₁ ) ), ( Indicates the maximum reference level and the minimum reference level, respectively, among the color levels with the most linearity of the video signal recorded on the tape during recording. However, the operation of the circuit with respect to the color signal is the same as that of the luminance signal and thus will be omitted.

As a result, when an abnormality occurs in the signals RF, Y, and C in the circuit shown in FIG. ₂ , the collector terminals of the respective transistors Q ₁ , Q ₂ , and Q _{3 go} low, and each abnormality occurs. The light emitting diodes LED ₁ , LED ₂ , and LED ₃ display the state, and the "low signal" indicating such an abnormal state is logically combined by the NAND gate NAND ₂ .

When an abnormality occurs in any one of the signals RF, Y, and C, the NAND gate NAND ₂ logically combines the waveforms of 3g, 3h, and 3i, and is equal to 3j through its output terminal. Generate a waveform. That is, when an abnormality occurs, an output in a high state is generated and applied to the lower input terminal of the AND gate AND ₁ . At this time, when the system is controlled by the channel mute signal CM when the channel moves while the RF signal is input, it is difficult to input the channel mute signal (FIG. 3k) to the AND gate AND ₁ to prevent this.

Therefore, when the abnormal state is displayed by the light emitting diode, the high signal (FIG. 3j) output from the NAND gate NAND ₁ is combined in the AND gate AND ₁ together with the channel mute signal CM to generate a high state signal ( 3l degrees). The high signal drives the relay R _Y to stop the system during abnormal signal recording.

As described above, the present invention visually displays this to the user when an abnormality occurs in the RF signal input during recording and the frequency-modulated video signal (Y / C). It has the feature to solve the problem according to the state.

Although the present invention has been described with reference to the accompanying drawings, the present invention is not limited thereto and there may be some changes and modifications within the scope of the following claims.

For example, the display device for visually notifying the user of an abnormal state may be replaced by a buzzer for providing an audible alarm, or a display lamp and a buzzer may be simultaneously provided to provide a visual and audio effect.

Claims (5)

Video signal state display means for detecting an synchronous signal of an input mixed video signal and displaying an abnormal state of the input signal, luminance signal state display means for displaying an abnormal state of a frequency-modulated luminance signal of the video signal during recording, and recording Recording state of a video tape recorder comprising color signal state display means for displaying an abnormal state of a low-frequency converted color signal of a video signal and control means for controlling the operating state of the system by logically combining the output of the means Check circuit. The video signal state display means according to claim 1, wherein the video signal state display means integrates the sync signal separated by the sync signal separator 2 among the broadcast signals tuned by the tuner 1, and compares the integrated signal with a reference voltage. A video signal comprising a synchronous signal detector (3) for generating a predetermined output and an RF signal display (4) for operating a signal output from the synchronous signal detector (3) to generate a first signal. Recording status checking circuit of tape recorder. 2. The luminance signal state display means according to claim 1, wherein the luminance signal state display means records a peak value of the luminance signal peak value detecting portion 11 for detecting the peak value of the luminance signal frequency-modulated and amplified by the amplifier 10 on the tape. The two comparators 12 and the gate circuit section 13 for generating a predetermined output in comparison with the maximum and minimum reference voltage levels of the luminance signal, and the signals output from the comparator 12 and the gate circuit section 13. And a luminance signal display section (14) for generating a second signal by operating by means of recording. 2. The color signal state display means according to claim 1, wherein the color signal state display means includes a color signal peak value detector 21 for detecting a peak value of the color signal low-converted by the amplifier 20, and a color for recording the peak value of the detected color signal on a tape. Operated by two comparators 22 and gate circuit section 23 generating a predetermined output compared to the maximum and minimum reference voltage levels of the signal, and signals output from the comparator 22 and gate circuit section 23. And a color signal display section (24) for generating a third signal. The video tape according to claim 1, wherein said control means comprises a gate circuit section (30) for stopping the system when an abnormal state occurs by logically combining the first signal, the second signal, and the third signal. Record status check circuit of the recorder.