KR910005119U - Square pulse generation I²L circuit - Google Patents

Square pulse generation I²L circuit

Info

Publication number
KR910005119U
KR910005119U KR2019890012313U KR890012313U KR910005119U KR 910005119 U KR910005119 U KR 910005119U KR 2019890012313 U KR2019890012313 U KR 2019890012313U KR 890012313 U KR890012313 U KR 890012313U KR 910005119 U KR910005119 U KR 910005119U
Authority
KR
South Korea
Prior art keywords
circuit
pulse generation
square pulse
square
generation
Prior art date
Application number
KR2019890012313U
Other languages
Korean (ko)
Other versions
KR940004187Y1 (en
Inventor
김용민
Original Assignee
금성일렉트론주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 금성일렉트론주식회사 filed Critical 금성일렉트론주식회사
Priority to KR2019890012313U priority Critical patent/KR940004187Y1/en
Publication of KR910005119U publication Critical patent/KR910005119U/en
Application granted granted Critical
Publication of KR940004187Y1 publication Critical patent/KR940004187Y1/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/091—Integrated injection logic or merged transistor logic
KR2019890012313U 1989-08-23 1989-08-23 Square pulse generating i2l circuit KR940004187Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019890012313U KR940004187Y1 (en) 1989-08-23 1989-08-23 Square pulse generating i2l circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019890012313U KR940004187Y1 (en) 1989-08-23 1989-08-23 Square pulse generating i2l circuit

Publications (2)

Publication Number Publication Date
KR910005119U true KR910005119U (en) 1991-03-20
KR940004187Y1 KR940004187Y1 (en) 1994-06-22

Family

ID=19289355

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019890012313U KR940004187Y1 (en) 1989-08-23 1989-08-23 Square pulse generating i2l circuit

Country Status (1)

Country Link
KR (1) KR940004187Y1 (en)

Also Published As

Publication number Publication date
KR940004187Y1 (en) 1994-06-22

Similar Documents

Publication Publication Date Title
DE69031940D1 (en) Reset pulse circuits
DE69033309D1 (en) Clock generation circuit
DE69029424D1 (en) Immediately acting power limiting circuit
DE69029592T2 (en) Pulse generator
KR900019094U (en) Pulse generator
BR8903223A (en) PULSE GENERATOR
DE68927255T2 (en) Pulse generator circuit
KR900003407U (en) Pulse generator
DE69030990D1 (en) Delay generator
DE69330730D1 (en) Waveform generation circuit
DE68928145T2 (en) TTL-ECL level conversion circuit
KR900013776U (en) ID-TV double scan circuit
KR910001728U (en) Square wave generation circuit
KR910005119U (en) Square pulse generation I²L circuit
KR920015845U (en) Pulse generation circuit
KR910013268U (en) Pseudo-control pulse generation circuit
FR2648943B1 (en) SAMPLE-LOCKER CIRCUIT
KR890001688U (en) Pulse generation circuit
KR910021179U (en) Pulse generation circuit
KR880001440U (en) Pulse generation circuit
KR880013899U (en) Pulse generation circuit
KR920003156U (en) Programmable pulse generation circuit
KR930016692U (en) Pulse generation circuit
KR920022288U (en) Pulse generation circuit
KR900010712A (en) Phase-variable vertical fixed pulse generation circuit

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 20040331

Year of fee payment: 11

EXPY Expiration of term