KR910002255A - How to display actual channel when receiving VS tuning - Google Patents

How to display actual channel when receiving VS tuning Download PDF

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Publication number
KR910002255A
KR910002255A KR1019890008960A KR890008960A KR910002255A KR 910002255 A KR910002255 A KR 910002255A KR 1019890008960 A KR1019890008960 A KR 1019890008960A KR 890008960 A KR890008960 A KR 890008960A KR 910002255 A KR910002255 A KR 910002255A
Authority
KR
South Korea
Prior art keywords
tuning
receiving
data
actual channel
display
Prior art date
Application number
KR1019890008960A
Other languages
Korean (ko)
Other versions
KR950009212B1 (en
Inventor
조현기
Original Assignee
강진구
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 강진구, 삼성전자 주식회사 filed Critical 강진구
Priority to KR1019890008960A priority Critical patent/KR950009212B1/en
Publication of KR910002255A publication Critical patent/KR910002255A/en
Application granted granted Critical
Publication of KR950009212B1 publication Critical patent/KR950009212B1/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/50—Tuning indicators; Automatic tuning control

Abstract

내용 없음No content

Description

VS 튜닝 수신시 실제 채널 디스플레이 방법How to display the actual channel when receiving VS tuning

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명의 회로도.1 is a circuit diagram of the present invention.

제2도는 본 발명에 따른 회로의 흐름도.2 is a flow diagram of a circuit according to the invention.

Claims (1)

비디오 카세트 레코더의 튜닝수신시 실제 채널 디스플레이 방법에 있어서, 현재 모드가 프리셋트 모드이면 밴드를 셀렉트하는 제1과정과, 상기 제1과정 수행후 프리셋트 모드중에서 서어치중인가를 체크하여 서어치중이면 PWM데이터값 및 튜닝 전압값을 변화하는 제2과정과, 상기 제2과정 수행후 비디오 신호로부터 싱크 신호가 있으면, PWM데이터는 록되고 이 최종 록 데이터와 롬메모리 데이터를 비교한 후 해당 채널을 디스플레이하는 제3과정으로 이루어짐을 특징으로 하는 VS튜닝수신시 실제 채널 디스플레이 방법.In the method of displaying the actual channel during the tuning reception of the video cassette recorder, the first process of selecting a band when the current mode is the preset mode, and the PWM when the search is performed in the preset mode after performing the first process. If there is a sync signal from the video signal after performing the second process and the second process of changing the data value and the tuning voltage value, the PWM data is locked and compared with the last lock data and the ROM memory data to display the corresponding channel. Real channel display method when receiving the VS tuning, characterized in that the third process. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019890008960A 1989-06-28 1989-06-28 Channel display method in vs tunning receiver KR950009212B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019890008960A KR950009212B1 (en) 1989-06-28 1989-06-28 Channel display method in vs tunning receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890008960A KR950009212B1 (en) 1989-06-28 1989-06-28 Channel display method in vs tunning receiver

Publications (2)

Publication Number Publication Date
KR910002255A true KR910002255A (en) 1991-01-31
KR950009212B1 KR950009212B1 (en) 1995-08-16

Family

ID=19287517

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890008960A KR950009212B1 (en) 1989-06-28 1989-06-28 Channel display method in vs tunning receiver

Country Status (1)

Country Link
KR (1) KR950009212B1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100219152B1 (en) * 1996-08-20 1999-09-01 윤종용 Automatic tuning system in voltage synthesize for improving channel memory
KR100453335B1 (en) * 2002-07-22 2004-10-15 주식회사 하이콘엔지니어링 Bracket for connecting prestressed concrete beam, prestressed concrete bridge using thereof and method for connecting prestressed concrete beam using thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100219152B1 (en) * 1996-08-20 1999-09-01 윤종용 Automatic tuning system in voltage synthesize for improving channel memory
KR100453335B1 (en) * 2002-07-22 2004-10-15 주식회사 하이콘엔지니어링 Bracket for connecting prestressed concrete beam, prestressed concrete bridge using thereof and method for connecting prestressed concrete beam using thereof

Also Published As

Publication number Publication date
KR950009212B1 (en) 1995-08-16

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