KR900019431U - Multilevel reference voltage circuit - Google Patents

Multilevel reference voltage circuit

Info

Publication number
KR900019431U
KR900019431U KR2019890005411U KR890005411U KR900019431U KR 900019431 U KR900019431 U KR 900019431U KR 2019890005411 U KR2019890005411 U KR 2019890005411U KR 890005411 U KR890005411 U KR 890005411U KR 900019431 U KR900019431 U KR 900019431U
Authority
KR
South Korea
Prior art keywords
reference voltage
voltage circuit
multilevel reference
multilevel
circuit
Prior art date
Application number
KR2019890005411U
Other languages
Korean (ko)
Other versions
KR940006603Y1 (en
Inventor
백우현
Original Assignee
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 금성일렉트론 주식회사 filed Critical 금성일렉트론 주식회사
Priority to KR2019890005411U priority Critical patent/KR940006603Y1/en
Publication of KR900019431U publication Critical patent/KR900019431U/en
Application granted granted Critical
Publication of KR940006603Y1 publication Critical patent/KR940006603Y1/en

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
KR2019890005411U 1989-04-28 1989-04-28 Multi-level circuit KR940006603Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019890005411U KR940006603Y1 (en) 1989-04-28 1989-04-28 Multi-level circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019890005411U KR940006603Y1 (en) 1989-04-28 1989-04-28 Multi-level circuit

Publications (2)

Publication Number Publication Date
KR900019431U true KR900019431U (en) 1990-11-09
KR940006603Y1 KR940006603Y1 (en) 1994-09-26

Family

ID=19285595

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019890005411U KR940006603Y1 (en) 1989-04-28 1989-04-28 Multi-level circuit

Country Status (1)

Country Link
KR (1) KR940006603Y1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100267765B1 (en) * 1997-03-17 2000-12-01 김영환 bias compensating circuit
KR100585221B1 (en) * 2004-12-15 2006-06-01 삼성전자주식회사 Receiver and transceiver for multi-level current mode signaling

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100267765B1 (en) * 1997-03-17 2000-12-01 김영환 bias compensating circuit
KR100585221B1 (en) * 2004-12-15 2006-06-01 삼성전자주식회사 Receiver and transceiver for multi-level current mode signaling

Also Published As

Publication number Publication date
KR940006603Y1 (en) 1994-09-26

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