KR900007739B1 - Recording test apparatus of vcr - Google Patents

Abstract

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Description

V-Ral Green Test System

1 is a block diagram of a recording test system of the present invention V-real.

2 is a detailed circuit diagram of FIG.

* Explanation of symbols for main parts of the drawings

1: Signal Generator 2: Switch

3,6: low pass circuit 4: signal processing unit

5, 8: buffer 7: comparison circuit

9: noise filter

The present invention relates to a test apparatus for testing a recording state of a V-Cal, and more particularly, to a recording test apparatus for a V-Cal constituted of a self-test apparatus inside the V-Cal.

In the prior art, there was no special test apparatus for checking the recording state, and if necessary, it is possible to confirm the recording by reproducing the signal on the video tape.

If you make a reservation recording or other recording, you can check whether the recording function of V'al to be used normally can be performed normally.

Occasionally, you may have recorded an important program without these checks, but there was a problem with the recording function. In this case, if you want to check, you should record and play back the broadcast signal, or if you do not receive the broadcast signal, you will need to record and play back another V-Cal as the signal source.

Therefore, the general consumer rarely performs such a check, or when the general consumer has a separate signal source and takes time.

The present invention allows for self-recording at any time by incorporating a signal generator for generating a horizontal synchronous frequency signal and a vertical synchronous frequency signal of a television. Invented to test whether or not, the present invention will be described in detail below with reference to the accompanying drawings.

1 is a schematic diagram of the recording test system of the present invention, and FIG. 2 is a detailed circuit diagram of FIG. 1, and as shown therein, a signal of a normal TV vertical synchronization frequency and a horizontal synchronization frequency, that is, a composite video signal. Transistor Q1, Q1, resistors R1-R6, and write test switch SW1 for switching the composite video signal output from the signal generator 1 in recording mode. And a low pass circuit (3) for removing high frequency components from the composite video signal (YC) output from the switch unit (2), smoothing them, and converting them to a proper level. A signal processor (4) for separating the composite video signal (YC) output from the switch unit (2) into a luminance signal and a chromaticity signal, and recording the resultant on a tape through the recording head (RHD); Video signal YC reproduced from the head PHD A buffer (5) comprising a transistor (Q3), a resistor (R7-R9), a coil (L1), and a capacitor (C1) for receiving and buffering the signal from the signal processor (4), and the regeneration output from the buffer (5). In order to convert the video signal into a smooth and proper level, the low pass circuit 6 composed of the capacitors C2-C4 and the coil L2 is compared with the output signals of the low pass circuits 3 and 6 to record the recording state. And a comparison circuit 7 for controlling the switch unit 2 and on / off according to the output signal of the non-intersection 7 to control the power supply of the power supply terminal Vcc. Q5, a buffer 8 of resistors R10-R12, and a coil L3 and a capacitor C5 (C6) for controlling the buffer 5 by removing noise from the output signal of the buffer 8; In the figure, reference numeral OUT denotes an output terminal of the comparison circuit 7, RF denotes a resistance of the comparison circuit 7, and REC denotes a record terminal.

Here, the record terminal REC supplies the high potential only in the recording mode, and the power supply terminal Vcc supplies the power only in the recording test mode.

If described in detail the effects of the present invention configured as described above.

First, when the user wants to record on the video cassette tape, when the user presses the record button, the record terminal REC outputs a high potential and is applied to the base of the transistor Q2 through the resistor R5 of the switch unit 2. The transistor Q2 is turned on and a low potential is applied to the base of the transistor Q1 to turn on. Therefore, the vertical synchronization frequency and horizontal synchronization frequency signals of the television generated by the signal generator 1, that is, the composite video signal YC, pass through the turned-on transistor Q1 and the resistor R3 and then to the low pass circuit 3. When applied, the low pass circuit 3 removes high frequency components from the composite video signal YC output from the switch section 2, smoothes them, and smoothes the non-inverting terminals of the comparator CP1 configured in the comparison circuit 7 at an appropriate level. Is applied to (+). At this time, since the inverting terminal (-) of the comparator CP1 is in the current recording mode, there is no playback video signal RIC, and thus the low potential is applied. Therefore, the comparator CP1 outputs a high potential signal by comparing the composite video signal YC applied to the non-inverting terminal (+) and the playback video signal RIC applied to the inverting terminal (-). The above signal is applied through the resistor R6 of the switch unit 2 and then applied to the base of the transistor Q2 to continuously turn on the transistor Q1. Accordingly, the transistor Q1 is continuously turned on to signal The composite video signal YC of the generator 1 is applied to the signal processor 4 through the transistor Q1 and the resistor R3.

On the other hand, the signal processor 4 separates the chromaticity signal and the luminance signal from the input composite video signal YC, and then records them on the tape through the recording head RHD. Then, when the composite video signal YC is recorded on the tape for a certain time, the user stops recording and plays back the recorded signal to test the recorded state. At this time, when the user turns on the recording test switch SW1, the record terminal REC is turned off so that the transistor Q2 is turned off and at the same time, the transistor Q1 is turned off, so the composite video generated by the signal generator 1 is generated. The signal YC is removed from the low pass circuit 3 through the write test switch SW1, and the high frequency component is smoothed and applied to the non-inverting terminal + of the comparator CP1 at an appropriate level. On the other hand, since the output of the comparator CP1 does not yet have the playback video signal PYC, it outputs a high potential to turn on the transistor Q4 of the buffer 8 and to turn off the transistor Q5. . Therefore, the power of the power supply terminal Vcc is applied to the collector of the transistor Q3 configured in the buffer 5 after the noise is removed from the noise filter 9 composed of the capacitors C5, C6 and the coil L3. The reproduced video signal PYC output from the playhead PHD is signal-processed by the signal processor 4 and applied to the base of the transistor Q3 configured in the buffer 5 to turn on the transistor Q3. Let's go. Therefore, the reproduction video signal PYC is removed from the high frequency component through the resistor R9 and the low pass circuit 6, smoothed, and applied to the inverting terminal (-) of the comparator CP1 at an appropriate level so that the comparator CP1 Compares the appropriate level of the composite video signal YC output from the low pass circuit 3 with the appropriate level of the reproduced video signal PYC output from the low pass circuit 6, and compares the level of the recording signal with the level of the reproduction signal. If this substantially coincides, the difference signal, i.e., the zero potential low potential, is output to turn off the transistor Q4 of the buffer 8 and turn on the transistor Q5. Accordingly, since the power supply of the power supply terminal vcc is bypassed to the transistor Q5, a low potential is applied to the noise filter 9, and a low potential is also applied to the collector of the transistor Q3, so that the transistor Q3 is turned off.

In addition, a zero level, that is, a low potential, is output to the output terminal OUT of the comparison circuit 7, and this potential is turned on or off to inform the user that there is no abnormality in the recording state or as a stop mode control signal. Can be used.

At this time, if no recording is made or for some other reason, the output of the comparator CP will be kept at high potential during playback. At this time, there is a problem with the recording function.

As described above, the present invention can be used as a signal source by embedding a signal generator inside the V-CAL, and can be recorded and played back without any equipment, and at the same time, it can automatically detect and check for abnormalities by comparing itself. It is very convenient and is convenient for consumers. Especially PAL VSR has a signal generator inside, so it will be very efficient to use it.

Claims (1)

In the recording mode of V-CAL, a recording test apparatus for checking the recording state by comparing the recorded signal with the recorded signal while recording and playing the composite video signal output from the signal generator 1 through the signal processing unit 4, A switch unit 2 for switching the composite video signal YC of the signal generator 1, a low pass circuit 3 for smoothly converting the output signal of the switch unit 2 to an appropriate level, and the switch A signal processing section 4 for signal processing the output signal of the section 2 and then recording on a tape via a normal recording head RHD, and a playback video signal output from the signal processing section 4 in the recording test mode. A buffer 5 for receiving and buffering the low pass circuit 6 for smoothing the output signal of the buffer 5 to a proper level and an output level of the low pass circuit 3, 6 In addition to determining the recording state, the switch unit (2) And a control circuit (7) for controlling and a buffer (8) for controlling the buffer (5) which is turned on / off according to the output level of the comparison circuit (7).

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