KR900004853Y1 - Over input detection circuit of audio device - Google Patents

Over input detection circuit of audio device Download PDF

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KR900004853Y1
KR900004853Y1 KR2019860017670U KR860017670U KR900004853Y1 KR 900004853 Y1 KR900004853 Y1 KR 900004853Y1 KR 2019860017670 U KR2019860017670 U KR 2019860017670U KR 860017670 U KR860017670 U KR 860017670U KR 900004853 Y1 KR900004853 Y1 KR 900004853Y1
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amplifier
input
resistors
input terminal
terminals
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KR880010420U (en
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장성철
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삼성전자 주식회사
한형수
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B15/00—Driving, starting or stopping record carriers of filamentary or web form; Driving both such record carriers and heads; Guiding such record carriers or containers therefor; Control thereof; Control of operating function
    • G11B15/02—Control of operating function, e.g. switching from recording to reproducing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B27/00—Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
    • G11B27/10—Indexing; Addressing; Timing or synchronising; Measuring tape travel
    • G11B27/34—Indicating arrangements 

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Abstract

내용 없음.No content.

Description

오디오 기기의 과입력 검출회로Over input detection circuit of audio equipment

첨부도면은 본 고안의 실시회로도.The accompanying drawings are embodiments of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

2,2' : 버퍼부 3,4' : 가변이득 버퍼부2,2 ': buffer section 3,4': variable gain buffer section

4,4' : 정류부 OP1-OP6: OP앰프4,4 ': Rectifier OP 1 -OP 6 : OP amplifier

VR1-VR4: 가변저항 R1-R14: 저항VR 1 -VR 4 : Variable resistor R 1 -R 14 : Resistance

C1-C8: 콘덴서 D1-D3: 다이오드C 1 -C 8 : Capacitor D 1 -D 3 : Diode

OR : 오어게이트 TR : 트랜지스터OR: Orgate TR: Transistor

LD : 발광다이오드LD: light emitting diode

본 고안은 오디오(audio)기기에 있어서, 각종 신호입력원(Signal input source)의 입력전압에 대한 과입력 여부를 검출하여 이를 표시해 주도록 한 과입력 검출회로에 대한 것이다.The present invention relates to an over-input detection circuit that detects and displays an over-input for an input voltage of various signal input sources in an audio device.

종래의 오디오 기기에서는 이와같이 외부로부터 입력되는 신호원의 과부하여부를 검출하여 입력레벨을 조절할 수 있는 회로구성이 없었기 때문에 기기를 최적의 상태에서 동작시킬 수가 없었으며, 간혹 과입력상태가 지속됨에 따라 기기의 내부회로가 열화되거나 손상되는 폐단이 있었다.In the conventional audio device, since there was no circuit configuration to adjust the input level by detecting the overload of a signal source input from the outside, the device could not be operated in an optimal state. The internal circuit of the circuit was deteriorated or damaged.

본 고안의 목적은 이와같은 폐단을 해결하기 위하여, 외부의 신호입력원의 과입력상태를 검출하여 이를 표시해줌으로써 입력레벨을 적정상태로 조정해줄 수 있어 특히 고정밀도가 요구되는 오디오 기기에 있어서 최적의 회로상태에서 기기가 작동되도록 할 수 있음은 물론 기기의 내부회로를 보호할 수 있도록 안출한 것으로서 이하 본 고안의 구성, 작용 및 효과를 첨부도면에 의해 상세히 설명한다.The object of the present invention is to solve the above-mentioned problem, by detecting and displaying the over-input state of the external signal input source to adjust the input level to an appropriate state, which is particularly suitable for audio equipment requiring high precision. The device can be operated in a circuit state as well as to protect the internal circuit of the device as described below will be described in detail the configuration, operation and effect of the present invention by the accompanying drawings.

통상의 좌,우 채널신호입력단자(1)(1')를 각 입력레벨조정용 가변저항(VR1)(VR2)을 통해 커플링콘덴서(C1),(C2), 저항(R1-R3),(R4-R6) 및 OP앰프(OP1),(OP2)로 각각 구성된 버퍼부(2)(2')에 차례로 연결하고, 상기의 OP앰프(OP1)(OP2)의 출력단을 통상의 음성신호처리회로(SPC)의 좌,우 채널단자(L)(R)에 각각 연결함과 동시에 각 커플링콘덴서(C3),(C4)를 통해 저항(R7),(R8), 이득조정용 가변저항(VR3),(VR4) 및 OP앰프(OP3)(OP4)로 각각 구성된 가변이득 버퍼부(3)(3')에 차례로 연결하며, 상기의 OP앰프(OP3)의 출력단을 각 커플링콘덴서(C5),(C6)를 통해 다이오드(D1),(D2), 콘덴서(C7),(C8) 및 저항(R11),(R12)으로 각각 구성된 정류부(4)(4')를 통해 OP앰프(OP5)(OP6)의 각 반전입력단(-)에 각각 연결하고, 각각의 비반전입력단(+)을 공급시킨 상태에서 저항(B14)을 통해 B+전원에 연결하는 한편 다이오드(D3)를 통해 접지시키며, 상기의 OP앰프(OP5)(OP6)의 출력단을 오어게이트(OR)의 양측입력단에 각각 연결하고, 이 오어게이트(OR)의 출력단을 과입력상태 표시용 발광다이오드(LD)구동용 트랜지스터(TR)의 베이스에 연결한 것으로서, 미설명부호중 R9,R10,R13은 저항이다.The common left and right channel signal input terminals (1) and (1 ') are connected to the coupling capacitor (C 1 ), (C 2 ), and resistor (R 1 ) through the variable resistor (VR 1 ) (VR 2 ) for each input level adjustment. -R 3 ), (R 4 -R 6 ) and OP amplifiers (OP 1 ), (OP 2 ) respectively connected in turn to the buffer unit (2) (2 '), the OP amplifier (OP 1 ) ( OP 2 ) is connected to the left and right channel terminals L and R of the ordinary voice signal processing circuit SPC, respectively, and at the same time, resistors C 3 and C 4 are connected to the resistors through the coupling capacitors C 3 and C 4 . R 7 ), (R 8 ), variable gain buffers (VR 3 ), (VR 4 ) and OP amplifier (OP 3 ) (OP 4 ), respectively, which are connected in turn to the variable gain buffer unit (3) (3 '). The output terminals of the OP amplifier OP 3 are connected to the diodes D 1 , D 2 , capacitors C 7 , and C 8 through the coupling capacitors C 5 and C 6 . It is connected to each inverting input terminal (-) of the OP amplifier OP 5 (OP 6 ) through the rectifiers 4 and 4 'respectively composed of resistors R 11 and R 12 , and each non-inverting input terminal. resistance (B 14) in a state of supplying the (+) Through B + which is connected to the power hand sikimyeo ground via a diode (D 3), respectively connected to the above output terminal of the OP amplifier (OP 5) (OP 6) on both sides of the input terminal of the OR gate (OR), and the OR gate ( OR) is connected to the base of the light emitting diode (LD) driving transistor (TR) for displaying the over-input state, and R 9 , R 10 , and R 13 in the reference numerals are resistors.

이와같이 구성된 본 고안의 회로동작상태는 다음과 같다.The circuit operation state of the present invention configured as described above is as follows.

좌,우 채널신호입력단자(1)(1')를 통해 입력된 오디오 신호는 각 가변저항(VR1)(VR2)에 의해 그 신호레벨이 조정된 상태에서 버퍼부(2)(2')내의 커플링콘덴서(C1)(C2)에 의해 DC 성분이 제거된 상태에서 저항(R3)(R6)을 통해 OP앰프(OP1)(OP2)의 각 비반전입력단(+)에 인가된다.The audio signal inputted through the left and right channel signal input terminals 1 and 1 'is buffered by the variable resistors VR 1 and VR 2 in the state where the signal level is adjusted. Each non-inverting input terminal (+1) of the OP amplifier (OP 1 ) (OP 2 ) through the resistor (R 3 ) (R 6 ) with the DC component removed by the coupling capacitor (C 1 ) (C 2 ) in the Is applied.

여기서 저항(R1)(R2) 또는 저항(R4)(45)은 각 OP앰프(OP1)(OP2)의 증폭도를 결정하여, 이 OP앰프(OP1)(OP2)의 출력은 음성신호처리신호(SPC)의 L좌,우 채널신호로서 입력되어 처리된다. 이때 각 OP앰프(OP1)(OP2)의 출력의 일부는 또한 커플링콘덴서(C3)(C4)를 통해 가변이득 버퍼부(3)(3')내의 OP앰프(OP3)(OP4)의 각 비반전입력단(+)에 인가되는데, 여기서 저항(R7)과 가변저항(VR3), 저항(R8)과 가변저항(VR4)은 각 OP앰프(OP3)(OP4)의 증폭도를 결정하게 되며, 각 가변저항(VR3)(VR4)을 조정하여 각종 세트에 적용할 수 있도록 OP앰프(OP3)(OP4)의 이득을 가변시키게 된다.Here, resistors R 1 (R 2 ) or resistors R 4 (4 5 ) determine the amplification degree of each of the OP amplifiers OP 1 (OP 2 ) to determine the amplification degree of the OP amplifiers OP 1 (OP 2 ). The output is input and processed as L left and right channel signals of the audio signal processing signal SPC. At this time, a part of the output of each OP amplifier OP 1 (OP 2 ) is also passed through the coupling capacitor C 3 (C 4 ) to the OP amplifier OP 3 in the variable gain buffer unit 3, 3 ′ ( It is applied to each non-inverting input terminal (+) of OP 4 ), where resistor R 7 and variable resistor VR 3 , resistor R 8 and variable resistor VR 4 are each OP amplifier OP 3 ( The amplification degree of OP 4 ) is determined, and the gains of the OP amplifiers OP 3 and OP 4 are varied so that the variable resistors VR 3 and VR 4 can be adjusted and applied to various sets.

이들 OP앰프(OP3)(OP4)의 출력은 다시 커플링콘덴서(C5)(C6)에서 DC 성분이 제거된 후 정류부(4)(4')내의 다이오드(D1)(D2)에 의해 반파정류되고 콘덴서(C7)(C8) 및 저항(R11)(R12)에 의해 평활된 DC 성분으로 변환된 상태에서 OP앰프(OP5)(OP6)의 각 반전입력단(-)으로 입력된다.The outputs of these OP amplifiers OP 3 and OP 4 are again diodes D 1 and D 2 in the rectifier 4 and 4 'after the DC component is removed from the coupling capacitor C 5 and C 6 . Each inverting input terminal of the OP amplifier OP 5 OP 6 with half-wave rectified by C 1 ) and converted into a DC component smoothed by a capacitor C 7 C 8 and a resistor R 11 R 12 . It is entered as (-).

한편, OP앰프(OP5)(OP6)의 각 비반전입력단(+)에는 저항(R14)을 거쳐 인가되는 B+전원에 의해 도통되는 다이오드(D3)에 의해 일정레벨의 다이오드전압이 걸리게 되는데, 이에 의해 각 OP앰프(OP5)(OP6)는 비교기로서 동작하게 된다.On the other hand, each non-inverting input terminal (+) of the OP amplifier (OP 5 ) (OP 6 ) is a diode voltage of a constant level by the diode (D 3 ) is conducted by the B + power applied through the resistor (R 14 ). This causes each op amp OP 5 OP 6 to act as a comparator.

즉, 현재 입력되는 오디오신호가 반파정류된 DC 전압이 인가되는, 각 OP앰프(OP5)(OP6)의 반전입력단(+)의 단자전압이 그 비반전단자(+)에 인가되는 기준전압보다 높게되면 각 OP앰프(OP5)(OP6)의 출력은 '하이'레벨되는데, 이렇게 OP앰프(OP5) 또는 OP앰프(OP6)의 출력이 '하이'레벨로 되면 각 좌,우 채널신호입력단자(1)(1')로부터 입력되는 신호원전압이 기준전압보다 높은 과입력상태 즉 과부하상태라는 뜻이 된다.That is, the reference voltage to which the terminal voltage of the inverting input terminal (+) of each of the OP amplifiers (OP 5 ) and (OP 6 ) to which the DC voltage obtained by half-wave rectification of the currently input audio signal is applied is applied to the non-inverting terminal (+) If it is higher, the output of each OP amp (OP 5 ) (OP 6 ) is 'high' level. When the output of the OP amp (OP 5 ) or OP amp (OP 6 ) becomes 'high' level, the left and right This means that the signal source voltage input from the channel signal input terminal 1 (1 ') is an over-input state, that is, an overload state, which is higher than the reference voltage.

이와같은 OP앰프(OP5)(OP6)의 출력은 오어게이트(OR)의 양측입력단으로 입력되는데, 각 OP앰프(OP5)(OP6)중에서 어느 하나라도 그 출력이 '하이'레벨로 되면 오어게이트(OR)의 출력도 '하이'레벨이 되며, 이에의해 트랜지스터(TR)가 도통되고 발광다이오드(LD)가 점등되어 현재 입력신호원전압이 과부하상태임을 표시해 주게된다.The outputs of the OP amplifiers OP 5 and OP 6 are input to both input terminals of the OR gate OR, and any one of the OP amplifiers OP 5 and OP 6 has a high level. When the output of the OR gate is also at the high level, the transistor TR is turned on and the light emitting diode LD is turned on to indicate that the current input signal source voltage is overloaded.

따라서, 좌측 채널신호나 우측 채널신호중 어느 한축의 채널신호라도 과입력된 상태로 되면 발광다이오드(LD)가 점등되는 것으로서, 이때 각 가변저항(VR1)(VR2)을 적당히 가변시켜 음성신호처리회로(SPC)로 입력되는 좌우 채널신호의 입력레벨을 적정상태로 유지시켜주면 된다. 즉 좌우 채널신호의 적정한 입력레벨상태는 각 OP앰프(OP5)(OP6)의 출력이 모두 '로우'레벨로 되어 발광다이오드(LD)가 소송된 상태이다.Therefore, when the channel signal of either axis of the left channel signal or the right channel signal is over-input, the light emitting diode LD is turned on. At this time, the variable resistors VR 1 and VR 2 are appropriately varied to process the audio signal. The input level of the left and right channel signals input to the circuit SPC may be maintained in an appropriate state. That is, in the proper input level state of the left and right channel signals, the outputs of the respective OP amplifiers OP 5 and OP 6 are all at the 'low' level, so that the light emitting diode LD is sued.

또한 본 고안에서는 비교기로 사용된 각 OP앰프(OP5)(OP6)의 기준전압을 다이오드(D3)전압으로 설정하였으나 이것은 원하는 기준입력레벨에 따라 가변설정이 가능하여 분압저항 등의 다른 소자로의 대체도 가능하다.In addition, in the present invention, the reference voltage of each OP amplifier OP 5 (OP 6 ) used as a comparator is set to the diode D 3 voltage, but this can be changed according to the desired reference input level so that other devices such as voltage divider resistors can be used. Substitution is also possible.

이상과 같이 본 고안은 오디오기기에 있어서 좌,우 채널의 신호입력원의 과입력상태를 검출하여 시각적으로 표시해줌으로써 과입력상태여부를 판단할 수 있음은 물론, 이에따라 입력레벨을 적정상태로 조정해줄 수 있어 내부회로를 보호하고 기기를 최적의 회로상태에서 작동시킬 수 있는 유용한 고안이다.As described above, the present invention detects the over-input status of the signal input source of the left and right channels in the audio device and visually displays the over-input status, and accordingly, adjusts the input level to an appropriate state. It is a useful design to protect the internal circuit and to operate the device in the optimal circuit condition.

Claims (1)

통상의 좌,우 채널신호입력단자(1)(1')를 각 입력레벨조정용 가변저항(VR1)(VR2)을 통해 커플링콘덴서(C1),(C2), 저항(R1-R3),(R4-R6) 및 OP앰프(OP1),(OP2)로 각각 구성된 버퍼부(2)(2')에 차례로 연결하고, 상기의 OP앰프(OP1)(OP2)의 출력단을 통상의 음성신호처리회로(SPC)의 좌,우 채널단자(L)(R)에 각각 연결함과 동시에 각 커플링콘덴서(C3),(C4)를 통해 저항(R7),(R8), 이득조정용 가변저항(VR3),(VR4) 및 OP앰프(OP3)(OP4)로 각각 구성된 가변이득 버퍼부(3)(3')에 차례로 연결하며, 상기의 OP앰프(OP3)의 출력단을 각 커플링콘덴서(C5),(C6)를 통해 다이오드(D1),(D2), 콘덴서(C7),(C8) 및 저항(R11),(R12)으로 각각 구성된 정류부(4)(4')를 통해 OP앰프(OP5)(OP6)의 각 반전입력단(-)에 각각 연결하고, 각각의 비반전입력단(+)을 공급시킨 상태에서 저항(R14)을 통해 B+전원에 연결하는 한편 다이오드(D3)를 통해 접지시키며, 상기의 OP앰프(OP5)(OP6)의 출력단을 오어게이트(OR)의 양측입력단에 각각 연결하고, 이 오어게이트(OR)의 출력단을 과입력상태 표시용 발광다이오드(LD)구동용 트랜지스터(TR)의 베이스에 연결함을 특징으로 하는 오디오 기기의 과입력 검출회로.The common left and right channel signal input terminals (1) and (1 ') are connected to the coupling capacitor (C 1 ), (C 2 ), and resistor (R 1 ) through the variable resistor (VR 1 ) (VR 2 ) for each input level adjustment. -R 3 ), (R 4 -R 6 ) and OP amplifiers (OP 1 ), (OP 2 ) respectively connected in turn to the buffer unit (2) (2 '), the OP amplifier (OP 1 ) ( OP 2 ) is connected to the left and right channel terminals L and R of the ordinary voice signal processing circuit SPC, respectively, and at the same time, resistors C 3 and C 4 are connected to the resistors through the coupling capacitors C 3 and C 4 . R 7 ), (R 8 ), variable gain buffers (VR 3 ), (VR 4 ) and OP amplifier (OP 3 ) (OP 4 ), respectively, which are connected in turn to the variable gain buffer unit (3) (3 '). The output terminals of the OP amplifier OP 3 are connected to the diodes D 1 , D 2 , capacitors C 7 , and C 8 through the coupling capacitors C 5 and C 6 . It is connected to each inverting input terminal (-) of the OP amplifier OP 5 (OP 6 ) through the rectifiers 4 and 4 'respectively composed of resistors R 11 and R 12 , and each non-inverting input terminal. resistance in the state that supply the (+) (R 14) Through B + which is connected to the power hand sikimyeo ground via a diode (D 3), respectively connected to the above output terminal of the OP amplifier (OP 5) (OP 6) on both sides of the input terminal of the OR gate (OR), and the OR gate ( OR) output terminal is connected to the base of the light emitting diode (LD) driving transistor (TR) for over-input status display.
KR2019860017670U 1986-11-12 1986-11-12 Over input detection circuit of audio device KR900004853Y1 (en)

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KR2019860017670U KR900004853Y1 (en) 1986-11-12 1986-11-12 Over input detection circuit of audio device

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Application Number Priority Date Filing Date Title
KR2019860017670U KR900004853Y1 (en) 1986-11-12 1986-11-12 Over input detection circuit of audio device

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KR880010420U KR880010420U (en) 1988-07-27
KR900004853Y1 true KR900004853Y1 (en) 1990-05-31

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