KR900000854Y1 - Built in modem circuit for personal computer - Google Patents

Abstract

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Description

Built-in modem circuit for personal computer

1 is a circuit diagram according to the present invention.

* Explanation of symbols for main parts of the drawings

10: connection part 20: buffer

30: decoder 40: programmable transfer interface circuit

50: first memory 60: microcomputer unit

70: latch 80: second memory

90: transmitting modem unit 100: receiving modem unit

110: control signal generator 120: data access arrangement

The present invention relates to a modem. In particular, the present invention relates to a built-in modem circuit for a personal computer that is easily mounted in an expansion slot in a personal computer system to enable high-speed data communication.

In general, as the popularity of personal computers (hereinafter, referred to as "PC") has increased, the desire to transmit data created via a PC to a remote place has been rapidly increased. It is well known that equipment such as a modem must be used to transmit data to and from a personal computer by using an air line.

Conventionally, the modem has been developed as an external type that is attached to the outside of the PC, but with the development of a one chip modem chip, it is gradually developed into a built-in form that is to be installed inside by using a self-controlled slot. However, no system was developed to satisfy the communication standard, and the data transmission speed for transmitting data was also limited to the low speed.

Accordingly, an object of the present invention is to provide an intelligent modem circuit capable of high speed communication, which can satisfy the Bell standard and the CClTT standard in a built-in type in an option slot suitable for a PC.

Another object of the present invention is to provide a circuit that can expand the port of the microcomputer to access the internal memory of the modem chip by loading the program in the microcomputer to the external extended memory.

The present invention for carrying out the above object is a built-in modem circuit of a personal computer, comprising: a connection portion capable of connecting a modem in a built-in type to an expansion slot of the personal computer. A buffer connected to the connection unit for buffering data transmitted and received between the modem and the personal computer, and a decoder for decoding a signal output from the connection unit to generate a control signal; And a programmable transmission interface circuit capable of transceiving data with the personal computer connection unit in an asynchronous manner and converting data in series and in parallel. The built-in value of customer's telephone and CCITT or bell operation mode is built-in, so that data can be automatically accessed at the same time of system power-on and perform the function without special command according to initial startup. Accessing the first memory, which is a device, and the program data for performing the telephone number data and the modem function from the first memory, perform modem functions, control the flow of transmitted / received data, and generate control signals to prevent collisions during data transmission and reception. Modem function to store the data to perform the modem when writing to the location specified by the output addressing signal of the micom unit, the latch for latching the data output from the micom unit, and stored as setting data A second memory having a storage function so that the data can be read at all times; A transmission modem that has a function of modulating data at 300 and 2400 bps transmission speeds according to the specification, and whose transmission speed is determined by a signal designated as a transmitter during transmission. And a demodulation method adapted to the 300 and 2400 bps transmission rates, the transmission rate being determined according to a signal received by the handshaking from the other party upon reception, and demodulating the received data at the corresponding transmission rates. A control signal is generated to generate a control signal during transmission and reception of data in accordance with a corresponding function in the reception modem unit, the latch, the second memory, the transmission modem unit, and the reception modem unit which descrambles and reduces the original data. And the data transmission / reception of the transmission / reception modem module to digital or analog And it is characterized in that the sample-hold end, and equalization data transmission and conversion section, to be connected to the far end modem via the telephone antenna configuration from a modem to a data access arrangement capable of performing a start function for transmission and reception of.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1 is a circuit diagram according to the present invention. The connection unit 10 is connected to the address and data bus and the control line and the data bus 12 is connected to the connection unit 10 so that the modem can be mounted in the expansion slot of the personal computer. A buffer 20 for buffering data to be transmitted and received in accordance with a function of the controller and the address signal A4-A7 output from the connection unit 10 are received directly or through NAND gates NA1 and NA2. Decode the signal according to the logic of the programmable array logic (PAL) by the signal AEN to enable the gate enable end of the buffer 20 ( Decoder 30 which generates an input signal of < RTI ID = 0.0 > and < / RTI > a control signal of the chip selector CS, and is connected to receive an address signal from the connection unit 10 via an address bus 11 and a data bus with the buffer 20. And a programmable transmission interface (UART) circuit 40 connected to 13 to transmit and receive data by asynchronous RS-232C method, but convert the data in parallel and in parallel according to the transmission rate. The enable transmission interface circuit 40 is capable of performing the above function if the i8251A of Indel Corporation, a US semiconductor company. The first memory 50, which is a data storage device that has a built-in telephone number and a value of a CCITT or an operation mode of the bell, and the system can access the data at the same time as the default and perform a function without a special command at the initial startup. The first memory 50 is an EEPROM of KM 93C06 developed by Samsung Electronics Co., Ltd. in Korea.

It is connected to the first memory 50 and the data bus 51 and reads a program for performing phone number data and a function of a modem from the first memory 50 under control to perform a corresponding function, and to transmit and receive data. Latches the data output from the microcomputer unit 60 connected to the data bus 61 of the microcomputer 60 to generate a control signal and to prevent a collision during data transmission and reception. The latch 70 and the data for performing the modem function are latched by the latch 70 and stored as fixed data in a place designated by the address signal output from the microcomputer 60 to perform the modem function. The microcomputer unit 60 as a transmitter when transmitting to the second memory 80 having a storage function to always read the data, and a modem chip that provides 300 and 2400bps transmission speeds. The desired transmission rate is determined according to the mode transfer rate designation data by changing the mode of the internal register that designates the transmission rate from, and after modulating the transmission data to the modulation scheme, only the band determined according to the designated transmission rate is specified. The transmission speed is changed by the mode change of the value of the register that determines the transmission speed by handshaking with the other modem when receiving the transmission modem unit 90 and the function of providing 300 and 2400bps transmission speeds through the modem. Demodulate according to the received transmission rate according to the transmission, descrambles and restores the original data, and receives the occasional modem unit 100, the latch 70, the second memory 80, the transmission modem unit 90, the reception modem Control signal for generating a control signal by receiving an address signal from the microcomputer 60 to prevent data collision during data transmission and reception according to the function performed in the unit 100 A generation unit 110 and a transmission / reception data conversion unit 150 for converting the transmission / reception modem unit 90 and 100 input / output data into digital or analogue, and performing sample and hold and equalization (Equ11zer) for transmission and reception of the data; It is connected to the other modem through the telephone aerial (Tip, Ring) and consists of a data access arrangement (DAA) 130 that can perform a start function when transmitting and receiving data in the modem.

The transmit / receive modem unit 90, 100 is sufficient as ER 5010, ER 5311 of RockWelI Co., Ltd., a foreign semiconductor manufacturer, and the transmission data conversion unit 150 is R10464 of Rockwell, USA. It becomes possible.

Therefore, a specific embodiment of the present invention will be described in detail based on the above-described configuration. At the same time, the stored data is loaded from the first memory 50 into the micom unit 60 by default while the system is turned on. It is loaded with various signals (flags), monitoring and telephone numbers according to activation, and setting data values for transmission rate determination (300 or 2400bps) conforming to the CCITT or Bel1 standard.

In the transmission mode, each address data in the personal computer and the data of the data buses D0-D7 and the address signals A3-A7 and control signals AEN of the data bus through the connection portion 10 connected to the control bus Decoded by the decoder 30 to enable the gate enable end of the buffer 20 ( ) And the chip selector stage CS of the programmable transfer interface circuit 40 to enable the chip. At this time, the data on the data bus D0-D7 output from the connection section 10 is input from the buffer 20 to the buffering mow programmable transmission interface circuit 40. The address signal is connected to the address bus A0-A7 long. It is input to the programmable transmission interface circuit 40 through the internal register mode conversion to transfer and control the transfer mode according to data transmission.

In this case, the transmission data through the buffer 20 is serially converted by the programmable transmission interface circuit 40 and input to the microcomputer 60 to be processed by the program transmitted from the second memory 80.

In this case, the second memory 80 and the latch 70 are enabled by the control of the latch enable stage LE and the chip enable signal stage CS generated by the gear signal generator 10, and thus the microcomputer unit 60. The program data of the second memory 80 is read and transferred to the microcomputer 60 by the address signal output from the latch 70.

The microcomputer unit 60 inputs data for determining a transmission rate of 300 or 2400 bps among the transmitted program data to the transmission modem unit 90 to determine the transmission rate by mode conversion of the value of the internal register. In order to prevent a collision of transmission data output from the microcomputer 60 according to the transmission rate determination, the control signal generator 110 is controlled by the transmission timing. To this end, the control signal generator 60 is a chip selector terminal of the transmission modem unit 90 ( Enable the chip by applying the control signal. In other words. According to the transmission rate determination data designated by the microcomputer 60, the transmission data is transmitted by the transmission modem 90 in accordance with the determination of the transmission speed of 300 or 2400bps in the modem of the internal register of the transmission modem 90. Filtered according to the scrambled scrambled output. Here, FSK modulation is performed at 300bps and QAM modulation is performed at 2400bps. The modulated signal is converted into an analog signal by the transceiving data conversion unit 150 and transmitted to the counterpart modem through the aerial line Tlp Rmg of the data access arrangement 120.

In reception mode, a transmission speed is used to receive data from the other party's modem by a signal input by CClTT or handshaking according to the BELL rule with the other party's modem, which is received through a TIP ring of the data access arrangement 120. To determine. It is possible to receive data at 300 or 2400bps by converting the mode value of the internal reception data transmission determination register of the reception modem unit 100 from the speed determination input data generated during handshaking through the transmission / reception data conversion unit 150. Do it. Also at this time, the FSK modulation method at 300bps and the QAM modulation at 2400bps are taken. As described above, when the reception transmission rate is determined and data is received by the transmission / reception data conversion unit 150 through the DAA 120, the transmission and reception data conversion unit 150 is sampled and held and equalized and converted into a digital signal. .

The digital signal is descrambled and demodulated in the reception modem unit 100 and then input to the microcomputer unit 60. The chip selector terminal generated in the control signal generator 110 when input to the microcomputer unit 60 ( Receiving modem unit 100 is enabled by the control signal applied to) and is input through the data bus 61 of the microcomputer unit 60.

The data input to the microcomputer 60 is processed according to the reception of the modem data, input into the programmable transmission interface circuit 40, and converted into parallel data. The data converted by the programmable transmission interface circuit 40 is then converted into the parallel data. It is buffered in the buffer 20 and received by the terminal through the connection portion 10 of the slot on the personal computer side.

In addition, the 3-state buffer ST1 is used to transfer data between the programmable transmission interface circuit 40 and the connection unit 10, and when the state of the output terminal Out1 is 'low', the 3-state buffer 40 The interrupt signal generated at the interrupt terminal lNT of the programmable transmission interface circuit 40 is enabled to be buffered to control the input / output request terminal lRQ of the connection unit 10 to control input / output of mutual data.

And each part of FIG. 1 of this invention does not have a separate power supply because each connection part 10 is allocated to one slot of a personal computer. Power is supplied to each part of FIG. 1 from the power supply line through the connection part 10. Normally, the city of power supply is omitted because it is obvious to those skilled in the art.

The transmission and reception modem unit 90, 100 stores the program internally for modulation and demodulation in FSK at 300bps and in QAM modulation at 2400bps. At the time of transmission, the data specified by the microcomputer 60 transmits the data in the mode determination that matches the transmission speed by the transmission speed determination control signal of the transmission modem unit 90. At the time of reception, the transmission speed of the data received by the other party's modem and the handshaking by CCITT or Bel1 is determined by the mode setting of the reception modem unit 100 so that the received data can be demodulated according to the transmission speed. have.

As mentioned above, as the spread of personal computers expands, it can be sold as a PC option (Optlon), and it can be used at high speeds from 300bps to 2400bps at low speed, and can be used in accordance with the BeI1 and CCITT standards. The advantage of using memory is that there is no need to mask programs in the microcomputer.

Claims (1)

In the built-in modem circuit of a personal computer having a connection unit 10 and a data access arrangement 130, the connection unit 10 is connected by a data bus 12 to the connection unit 10 so as to be transmitted and received in accordance with the performance of the modem and the personal computer. A buffer 20 for buffering data and an address signal A4-A7 signal output from the connection unit 10 are received through the NAND gates NA1 and NA2 and an address enable signal ( ) And the address A3 are directly received and decoded according to the PAL logic to input the input signal and the chip selector of the gate enable stage G of the buffer 20. A decoder 30 for generating a control signal. It is connected to receive an address signal from the connection portion 10 via the address bus 11 and transmits data by the RS-232C method in an asynchronous manner through the data bus 13 with the buffer 20 at a transmission rate. Programmable transmission interface circuit (40) to convert and transmit in parallel and parallel to match. The first memory, which is a data storage device that has built-in telephone numbers and values of CCITT or BELL rules, can automatically access data at system startup and perform functions without special commands during initial startup. 50) and. It is connected to the first memory 50 and the data bus 51 and reads the telephone number data and the program for performing the functions of the modem from the first memory 50 to perform a corresponding function and to control the flow of transmission and reception data. And a latch for latching data output from the microcomputer unit 60 connected to the microcomputer unit 60 and the data bus 61 of the microcomputer unit 60 to generate a control signal to prevent a collision during data transmission and reception. 70 and the data for performing the modem function are latched by the latch 70 and stored as fixed data in a place designated by the address signal output from the microcomputer 60, and the data is always stored when the modem function is performed. Transmission speed from the microcomputer 60 as a transmitter when transmitting to a second memory 80 having a storage function for reading and a modem chip providing 300 and 2400 bps transmission speeds. The desired transmission rate is determined according to the modem transmission rate designation data by changing a mode of an internal register that designates the data. After modulating the transmission data to the modulation scheme, only the band determined according to the designated transmission rate is transmitted. Modem of the register that determines the transmission rate by handshaking with the other modem when receiving with a modem that provides the transmission modem unit 90 and a function of providing a transmission speed of 300 and 2400bps to meet the transmission rate. Demodulating according to the reception transmission rate, descrambles and restores original data to receive the reception modem unit 100, the latch 70, the second memory 80, the transmission modem unit 90, and the reception modem unit ( Control signal generation to generate a control signal by receiving the address signal from the microcomputer 60 to prevent data collision during data transmission and reception according to the function performed in 100) Transmitting / receiving data conversion unit 150 connected to the unit 110 and the data access arrangement 130 to convert the input / output data through the transmission / reception modem unit 90.100 into digital or analogue to sample and hold and equalize the data. A built-in modem circuit for a personal computer, characterized by comprising: