KR890011354U - 16-bit parallel output generation circuit - Google Patents

16-bit parallel output generation circuit

Info

Publication number
KR890011354U
KR890011354U KR2019870019259U KR870019259U KR890011354U KR 890011354 U KR890011354 U KR 890011354U KR 2019870019259 U KR2019870019259 U KR 2019870019259U KR 870019259 U KR870019259 U KR 870019259U KR 890011354 U KR890011354 U KR 890011354U
Authority
KR
South Korea
Prior art keywords
generation circuit
bit parallel
parallel output
output generation
bit
Prior art date
Application number
KR2019870019259U
Other languages
Korean (ko)
Other versions
KR900003620Y1 (en
Inventor
문태준
Original Assignee
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자 주식회사 filed Critical 삼성전자 주식회사
Priority to KR2019870019259U priority Critical patent/KR900003620Y1/en
Publication of KR890011354U publication Critical patent/KR890011354U/en
Application granted granted Critical
Publication of KR900003620Y1 publication Critical patent/KR900003620Y1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/28—Enhancement of operational speed, e.g. by using several microcontrol devices operating in parallel

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Static Random-Access Memory (AREA)
KR2019870019259U 1987-11-07 1987-11-07 Paralell output generating for 16 bits KR900003620Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019870019259U KR900003620Y1 (en) 1987-11-07 1987-11-07 Paralell output generating for 16 bits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019870019259U KR900003620Y1 (en) 1987-11-07 1987-11-07 Paralell output generating for 16 bits

Publications (2)

Publication Number Publication Date
KR890011354U true KR890011354U (en) 1989-07-13
KR900003620Y1 KR900003620Y1 (en) 1990-04-30

Family

ID=19269254

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019870019259U KR900003620Y1 (en) 1987-11-07 1987-11-07 Paralell output generating for 16 bits

Country Status (1)

Country Link
KR (1) KR900003620Y1 (en)

Also Published As

Publication number Publication date
KR900003620Y1 (en) 1990-04-30

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Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 19970327

Year of fee payment: 8

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