KR890005750A - Semiconductor memory - Google Patents

Semiconductor memory Download PDF

Info

Publication number
KR890005750A
KR890005750A KR1019870010665A KR870010665A KR890005750A KR 890005750 A KR890005750 A KR 890005750A KR 1019870010665 A KR1019870010665 A KR 1019870010665A KR 870010665 A KR870010665 A KR 870010665A KR 890005750 A KR890005750 A KR 890005750A
Authority
KR
South Korea
Prior art keywords
semiconductor memory
prom cell
channel type
memory device
mos transistor
Prior art date
Application number
KR1019870010665A
Other languages
Korean (ko)
Other versions
KR900003209B1 (en
Inventor
유키히로 사에키
도시마사 나카무리
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 아오이 죠이치, 가부시키가이샤 도시바 filed Critical 아오이 죠이치
Publication of KR890005750A publication Critical patent/KR890005750A/en
Application granted granted Critical
Publication of KR900003209B1 publication Critical patent/KR900003209B1/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards

Landscapes

  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

내용 없음No content

Description

반도체 기억장치Semiconductor memory

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제 1 도는 본 발명의 일실시예에 따른 반도체 기억장치를 설명하기 위한 1메모리셀에 대응하는 회로구성도.1 is a circuit diagram corresponding to one memory cell for explaining a semiconductor memory device according to one embodiment of the present invention;

제 2 도는 제 1도에 도시된 반도체 기억장치의 기입동작특성을 나타낸 도면.FIG. 2 is a diagram showing writing operation characteristics of the semiconductor memory device shown in FIG.

제 3 도는 PROM셀의 구조를 나타낸 도면.3 is a diagram showing the structure of a PROM cell.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

10 : PROM 11 : P형 실리콘기판10: PROM 11: P-type silicon substrate

12 : 소오스 13 : 드레인12: source 13: drain

14 : 절연막 15 : 플로우팅게이트14 insulating film 15 floating gate

16 : 콘트롤게이트 17 : 소오스전극16: control gate 17: source electrode

18 : 드레인전극 19 : 반전층18 drain electrode 19 inversion layer

Q11,Q12: P채널형 MOS트랜지스터Q 11 , Q 12 : P-channel MOS transistor

Claims (3)

전기적으로 프로그램해 넣을 수 있는 제 1 채널형의 PROM셀과; 소오스, 드레인사이의 전류통로가 상기 PROM셀에 직렬접속되어 기입시에 상기 PROM셀의 동작점을 결정하는 제 2 채널형의 MOS트랜지스터를 구비한 것을 특징으로 하는 반도체 기억장치.A PROM cell of a first channel type that can be electrically programmed; And a second channel type MOS transistor for connecting the current path between the source and the drain in series to determine the operating point of the PROM cell at the time of writing. 제 1 항에 있어서, PROM셀이 N채널형이고, MOS트랜지스터가 P채널형인 것을 특징으로 하는 반도체 기억장치.The semiconductor memory device according to claim 1, wherein the PROM cell is an N-channel type and the MOS transistor is a P-channel type. 제 1 항에 있어서, PROM셀이 플로우팅게이트형 PROM셀인 것을 특징으로 하는 반도체 기억장치.The semiconductor memory device according to claim 1, wherein the PROM cell is a floating gate type PROM cell. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019870010665A 1986-09-30 1987-09-25 Semiconductor memory device KR900003209B1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP231721 1986-09-30
JP61-231721 1986-09-30
JP61231721A JPS6386195A (en) 1986-09-30 1986-09-30 Semiconductor memory device

Publications (2)

Publication Number Publication Date
KR890005750A true KR890005750A (en) 1989-05-16
KR900003209B1 KR900003209B1 (en) 1990-05-10

Family

ID=16927980

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870010665A KR900003209B1 (en) 1986-09-30 1987-09-25 Semiconductor memory device

Country Status (2)

Country Link
JP (1) JPS6386195A (en)
KR (1) KR900003209B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5229963A (en) * 1988-09-21 1993-07-20 Kabushiki Kaisha Toshiba Semiconductor nonvolatile memory device for controlling the potentials on bit lines

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61115296A (en) * 1984-11-09 1986-06-02 Nec Corp Programming circuit for non-volatile semiconductor storate device

Also Published As

Publication number Publication date
JPS6386195A (en) 1988-04-16
KR900003209B1 (en) 1990-05-10

Similar Documents

Publication Publication Date Title
KR880002181A (en) Semiconductor memory
KR870011621A (en) Semiconductor memory
KR850004879A (en) Semiconductor memory
KR860000659A (en) M0S Static RAM
KR930001438A (en) Static semiconductor memory device
KR940020424A (en) Static semiconductor memory
KR830006822A (en) Semiconductor integrated circuit device
JPS5493981A (en) Semiconductor device
KR900002558A (en) Output circuit
EP0646289B1 (en) Semiconductor devices with a double gate
KR910020911A (en) Semiconductor memory device
KR900017193A (en) Static memory
KR910005448A (en) Semiconductor integrated circuit
KR870007570A (en) Persistent Memory Cells and Their Circuits
KR890017769A (en) Semiconductor device and manufacturing method
KR880004589A (en) Complementary Integrated Circuit Arrangement with Substrate Bias Voltage Generator
KR910010707A (en) Reference voltage generator
KR840000988A (en) Insulated Gate Field Effect Transistor
KR910014942A (en) Output circuit
KR920006986A (en) Nonvolatile Semiconductor Memory
KR890005750A (en) Semiconductor memory
KR880009448A (en) Semiconductor integrated circuit device
KR870700181A (en) High Reliability Complement Logic Circuit
KR940010081A (en) Semiconductor memory device
KR910003815A (en) Nonvolatile Semiconductor Memory Device

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20070430

Year of fee payment: 18

EXPY Expiration of term