KR890004530Y1 - Circuit of electric current gain of transistor - Google Patents

Circuit of electric current gain of transistor Download PDF

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KR890004530Y1
KR890004530Y1 KR2019860003598U KR860003598U KR890004530Y1 KR 890004530 Y1 KR890004530 Y1 KR 890004530Y1 KR 2019860003598 U KR2019860003598 U KR 2019860003598U KR 860003598 U KR860003598 U KR 860003598U KR 890004530 Y1 KR890004530 Y1 KR 890004530Y1
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current gain
transistor
amplifier
printed circuit
current
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KR2019860003598U
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KR870015237U (en
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감도영
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삼성전자 주식회사
한형수
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
    • G01R31/2601Apparatus or methods therefor

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  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

내용 없음.No content.

Description

트랜지스터의 전류이득률 측정회로Current Gain Ratio Measurement Circuit of Transistor

제1도는 본 고안의 회로도이다.1 is a circuit diagram of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 중앙처리장치 2 : 기억장치1: CPU 2: Memory

3 : 디코더 4 : 스위칭구동회로3: decoder 4: switching drive circuit

5 : 인쇄회로기판 6 : 전류이득검출부5: printed circuit board 6: current gain detection unit

7 : 전류이득레벨조정부 8 : 차동증폭부7: current gain level adjusting unit 8: differential amplifier

9 : 아날로그/디지털변환기 OP1-OP4-OP : 앰프9: Analog / Digital Converter OP 1 -OP 4 -OP: Amplifier

ZD : 제너다이오드 SW : 스위칭회로ZD: Zener Diode SW: Switching Circuit

본 고안은 인쇄회기판(PCB : Printed Circuit Board)상에 삽입된 트랜지스터의 전류이득률을 측정하는 전자회로에 관한 것이다.The present invention relates to an electronic circuit for measuring the current gain rate of a transistor inserted on a printed circuit board (PCB).

일반적으로 부품이 삽입된 인쇄회로기판이 정해진 기능을 수행하는지를 확인하기 위해서는 인쇄회로기판상에 삽입된 부품의 값이 설계된 정격치로 삽입되어 설계규격의 범위내에서 동작하고 있는지를 검사한 다음에 완성품으로 조립을 해야지만 제품의 불량품을 배제할 수가 있다. 그러나 인쇄회로기판상에 삽입된 부품의 정격을 측정하는 종래의 PCB레스터는 수동소자인 저항이나 코일, 콘덴서등의 정격치만을 측정할 수 있을뿐 능동소자인 트랜지스터등의 정격치(예를들면 이득률)는 측정할수가 없어서 인쇄회로기판상에 삽입된 부품중에서 트랜지스터가 정격에 대해 불량일때 이를 검출해내지 못하여 트랜지스터의 불량으로 인한 제품의 불량이 발생되었다.In general, in order to check whether the printed circuit board to which the part is inserted performs a predetermined function, the value of the inserted part on the printed circuit board is inserted at the designed rated value and inspected whether it is operating within the range of the design specification. It is necessary to assemble, but it can exclude defective products. However, the conventional PCB raster which measures the rating of the component inserted on the printed circuit board can only measure the rated value of the passive element such as resistance, coil, capacitor, etc., but also the rated value of transistor such as the active element (eg gain ratio). Since it is impossible to measure the defects in the components inserted on the printed circuit board when the transistors are inferior to the ratings, the product defects are caused by the defects of the transistors.

본 고안은 위와같은 실정에 비추어 안출된 것으로, 트랜지스터의 불량으로 인한 제품의 불량을 배제할 수 있게 인쇄회로기판상에 삽입된 트랜지스터의 전류이득률을 측정하도록 된 트랜지스터의 전류이득률측정회로를 제공하고자 함에 그 목적이 있다.The present invention has been made in view of the above situation, and provides a current gain ratio measuring circuit of a transistor which measures a current gain ratio of a transistor inserted on a printed circuit board so as to exclude a product defect caused by a defective transistor. The purpose is to.

이하 본 고안의 구성 및 작용, 효과를 예시도면에 의거하여 상세히 설명하면 다음과 같다.Hereinafter, the configuration, operation, and effects of the present invention will be described in detail with reference to the accompanying drawings.

본 고안은 중앙처리장치(1)와 기억장치(2), 디코더(3) 및 스위칭구동회로(4)를 구비하여 인쇄회로기판(5)을 측정하도록 된 PCB테스터에 있어서, 제너다이오드(ZD)와 OP앰프(OP1) 및 저항(R1-R5)으로 구성되어 상기 인쇄회로기판(5)에 삽입된 트랜지스터(Q1)의 베이스전류(Ib)로 전류이득을 검출하는 전류이득검출부(6)와, OP앰프(OP2)(OP3)와 저항(R6-R10)및 스위칭회로(SW)로 구성되어 상기 전류이득검출부(6)에서 검출된 신호의 레벨을 조정하는 전류 이득레벨조저부(7), OP앰프(OP4)와 저항(R11-R13)및 가변저항(VR1)으로 구성되어 레벨조정된 저류이득을 차동증폭하는 차동증폭부(8)및 차동증폭부(8)의 출력신호를 디지탈신호로 변환시켜 상기 기억장치(2)에 공급하는 아날로그/디지탈변환기(9)를 구비하여 구성된 구조로 되어 있다.The present invention provides a Zener diode (ZD) in a PCB tester having a central processing unit (1), a storage unit (2), a decoder (3), and a switching drive circuit (4) to measure a printed circuit board (5). And a current gain detector configured to include an OP amplifier OP 1 and resistors R 1 -R 5 to detect current gain with a base current Ib of the transistor Q 1 inserted into the printed circuit board 5. 6) and an OP amplifier OP 2 (OP 3 ), resistors R 6 -R 10 , and a switching circuit SW to adjust the current gain to adjust the level of the signal detected by the current gain detector 6. Level amplification section 7, OP amplifier OP 4 and resistors R 11- R 13 and variable resistors VR 1 for differential amplification of differentially regulated storage gain (8) and differential amplification The analog / digital converter 9 which converts the output signal of the section 8 into a digital signal and supplies it to the storage device 2 is configured.

미설명부호 SW1는 전원스위치, S1-S3은 스위칭회로(SW)내의 스위치, IC는 시험대상 트랜지스터의 콜렉터 전류를 나타낸다.Reference numeral SW 1 is a power switch, S 1 -S 3 is a switch in the switching circuit (SW), IC is a collector current of the transistor under test.

제1도는 상기와같은 구조로 되어있는 본 고안의 구체적인 회로 결속도를 나타내는 것으로, 부품이 삽입된 인쇄회로기판(5)의 정격치등을 측정하기 위해서는 우선 중앙처리장치(1)의 제어에 의해 기억장치(2)로 부터 데이타가 출력되어 디코더(3)와 스위칭구동회로(4)를 통하여 인쇄회로기판(5)에 PCB테스터의 각 측전단자를 각각 접속시킨다. 이에따라 PCB테스터의 각측정단자를 통하여 입력된 신호를 가지고 중앙처리장치(1)에서 분석하여 부품이 정격치인가 오삽입되었는가등을 판단하게 되는 것이다.FIG. 1 shows the specific circuit defect of the present invention having the above structure. In order to measure the rated value and the like of the printed circuit board 5 having the component inserted therein, the storage device is controlled by the central processing unit 1. Data is output from (2) to connect each side terminal of the PCB tester to the printed circuit board 5 through the decoder 3 and the switching driver circuit 4, respectively. Accordingly, the signal input through each measuring terminal of the PCB tester is analyzed by the central processing unit 1 to determine whether the component is rated or incorrectly inserted.

여기서 인쇄회로기판(5)에 삽입된 능동소자인 트랜지스터(Q1)의 전류이득률을 측정하고 자 할 경우 중앙처리장치(1)에서는 디코더(3)와 스위칭구동회로(4)를 통하여 인쇄회로기판(5)에 삽입된 트랜지스터(Q1)의 콜렉터와 베이스, 에미터를 PCB테스터의 각 측정단자와 연결되도록 하여 예시도면과 같이 결속되게 한다.In this case, when the current gain ratio of the transistor Q 1 , which is an active element inserted into the printed circuit board 5, is to be measured, the central processing unit 1 uses the decoder 3 and the switching driving circuit 4 to print the printed circuit. The collector, the base, and the emitter of the transistor Q 1 inserted into the substrate 5 are connected to each measurement terminal of the PCB tester, thereby binding them as illustrated.

그러면 전류이득검출부(6)는 트랜지스터(Q1)를 포함한 폐회로가 형성되게 되는데, 전류 이득률을 측정하기 위하여 전원스위치(SW1)를 온시키면 전원Vcc가 회로에 공급되고, 이는 제너다이오드(ZD)에 의해 정전위로 되어 저항(R2-4)과 OP앰프(OP1)에 각각 공급된다. 이때 OP앰프(OP1)의 반전단자(-)에는 저항(R2)(R3)의 분압에 의해 일정전압이 공급되고, OP앰프(OP1)의 출력을 저항(R5)과 트랜지스터(Q1)를 통해 궤환시켜 비반전단자(+)에 공급되도록 구성함에 따라 OP앰프의 특성에 으해 OP앰프(OP1)의 비반전단자(+)에는 반전단자(-)와 같은 전위를 갖게 된다.Then, the current gain detector 6 has a closed circuit including the transistor Q 1. When the power switch SW 1 is turned on to measure the current gain ratio, the power supply Vcc is supplied to the circuit, which is a zener diode ZD. The potential is set by the power supply to the resistors R 2 -4 and OP amplifiers OP 1 , respectively. The OP amplifier inverting input terminal of the (OP 1) (-), the resistance (R 2) (R 3) and the constant voltage is supplied by the partial pressure of, OP amp resistance to the output of the (OP 1) (R 5) and transistor ( As it is configured to be fed back through Q 1 ) to be supplied to the non-inverting terminal (+), the non-inverting terminal (+) of the OP amplifier (OP 1 ) has the same potential as the inverting terminal (-) due to the characteristics of the OP amplifier. .

따라서 저항(R4)에 걸리는 전위는 일정하게 되며 이에 따라 콜레터전류(Ic)도 일정하게 된다.Therefore, the potential applied to the resistor R 4 becomes constant, and accordingly, the collet current Ic becomes constant.

일반적으로 전류이득률은 트랜지스터의 베이스전류에 대한 콜렉터 전류의 이득을 일컫는것으로 전류이득률을 β, 베이스전류를 IB, 콜렉터전류는Ic라고 하면In general, the current gain is the gain of the collector current over the base current of the transistor. If the current gain is β, the base current is IB, and the collector current is Ic,

β= β =

가 되어 전류 이득률 β값이 일정하다할 때 베이스 전류와 콜렉터전류가 비례하는 것을 알 수 있다. 따라서 콜레터전류(Ic)를 일정하게 유지시키면 베이스전류(Ib)를 측정하므로써 전류이득률을 측정할 수 있게 된다.When the current gain β is constant, the base current and the collector current are proportional to each other. Therefore, if the collator current Ic is kept constant, the current gain rate can be measured by measuring the base current Ib.

본 고안에서는 OP앰프(OP1)와 저항(R4)을 통하여 트랜지스터(Q1)의 콜렉터전류(Ic)를 일정하게 유지시킨 다음 베이스전류(Ib)의 변화를 저항(R5)을 통한 전위차로 검출하게 하였다. 즉 저항(R5)양단에 나타나는 전위차는In the present invention, the collector current Ic of the transistor Q 1 is kept constant through the OP amplifier OP 1 and the resistor R 4 , and then the change in the base current Ib is applied to the potential difference through the resistor R 5 . Detection. In other words, the potential difference across the resistor (R 5 )

V(35)=R2×IbV ( 35 ) = R 2 × Ib

=R5× = R 5 ×

로 되어 콜렉전류(Ic)에다 저항(R5)의 값을 곱하고 이를 전류이득률(β)로 나눈 값이 된다.The collector current Ic is multiplied by the value of the resistor R 5 and divided by the current gain β.

이와같이 검출된 신호를 전류이득 레벨조정부(7)에서 레벨조정하게 되는데, OP앰프(OP2)(OP3)에서 각각의 검출신호를 증폭하고, 중앙처리장치(1)에서 스위칭구동회로(4)를 통해 스위칭회로(SW)중의 한 스위치를 접속시키면 예를들어스위치(S1)를 접속시켰을때 직렬접속된 저항(R6)(R8)(R7)의 양단에는 전류이득검출부(6)의 검출신호가 증폭되고 레벨조정되어 차동증폭부(8)로 출력된다.The signal detected in this way is level-controlled by the current gain level adjusting unit 7, which amplifies respective detection signals in the OP amplifiers OP 2 and OP 3 , and in the central processing unit 1 switches the switching circuit 4. When one of the switches of the switching circuit SW is connected through, for example, when the switch S 1 is connected, the current gain detection unit 6 is connected to both ends of the resistors R 6 , R 8 , and R 7 connected in series. Detection signal is amplified and level adjusted and output to the differential amplifier 8.

자동증폭부(8)에서는 저항(R5)양단에 걸리는 전위차만큼을 증폭하여 아날로그/디지탈변환기(9)로 검출신호를 공급한다.The automatic amplifier 8 amplifies by the potential difference across the resistor R 5 and supplies the detection signal to the analog / digital converter 9.

이에따라 전류이득 검출부(6)에서 검출된 전류이득이 디지탈신호로 되므로써 중앙처리장치(1)에서는 트랜지스터(Q1)의 전류이득률이 얼마인지를 계산한 다음 설계규격에 맞는지를 판단하게 된다.Accordingly, since the current gain detected by the current gain detection unit 6 becomes a digital signal, the central processing unit 1 calculates the current gain rate of the transistor Q 1 and then determines whether it meets the design specification.

전류 이득검출부(6)에서 검출된 신호가 아주 크거나 작을때는 레벨조정부(7)의 스위치뢰로(SW)접속점을 변화시켜 그 레벨을 조정할수도 있다.When the signal detected by the current gain detection unit 6 is very large or small, the level may be adjusted by changing the switch rod SW point of the level adjusting unit 7.

이와같이 하여 중앙처리장치(1)에서 규정된 부품임이 판단되면 다른 트랜지스터를 측정하도록 디코더(3)와 스위칭구동회로(4)에 신호를 공급하여 PCB테스터의 측정단자 접속점을 변화시킨다.In this way, when it is determined that the component is specified in the central processing unit 1, a signal is supplied to the decoder 3 and the switching drive circuit 4 to measure another transistor to change the connection point of the measurement terminal of the PCB tester.

이런과정에서 트랜지스터의 이득률이 규정치가 아닐때는 이를 외부에 알려 불량요인을 제거하게 하므로써 제품의 생산성과 품질을 향상시킬수 있게 되는 것이다.In this process, when the gain ratio of the transistor is not a prescribed value, it is notified to the outside to remove the defects, thereby improving the productivity and quality of the product.

상기한 바와같이 본고안은 인쇄회로기판상에 삽입된 트랜지스터의 전류이득률을 측정하여 정격의 트랜지스터가 삽입되었는지를 알게 하므로써 제품의 생산성과 품질을 향상시킬수 있는 장점이 있다.As described above, the present invention measures the current gain of the transistor inserted on the printed circuit board to know whether the rated transistor is inserted, thereby improving the productivity and quality of the product.

Claims (1)

중앙처리장치(1)와 기억장치(2), 디코더(3) 및 스위칭구동회로(4)를 구비하여 인쇄회로기판(5)를 측정하도록 된PCB테스터에 있어서, 제너다이오드(ZD)와 OP앰프(OP1)및 저항(R1-R5)으로 구성되어 상기 인쇄회로기판(5)에 삽입된 트랜지스터(Q1)의 베이스전류(Ib)로전류이득을 검출하는 전류이득검출부(6)와, OP앰프(OP2)(OP3)와 저항(R1-R5)및 스위치회로(SW)로 구성되어 상기 전류이득검출부(6)에서 검출된 신호의 레벨을 조정하는 전류이득 레벨 조정부(7), OP앰프(OP4)와 저항(R11-R12)및 가변저항(VR1)으로 구성되어 레벨조정된 전류이득을 차동증폭하는 차동증폭부(8)및, 차동증폭부(8)의 출력신호를 디지탈신호로 변환시켜 상기 기억장치(2)에 공급하는 아날로그/디지탈변환기(9)를 구비하여 인쇄회로기판(5)에 삽입된 트랜지스터의 전류이득률을 측정하도록 된 것을 특징으로 하는 트랜지스터의 전류이득률 측정회로.In a PCB tester having a central processing unit (1), a storage unit (2), a decoder (3), and a switching drive circuit (4) to measure a printed circuit board (5), a Zener diode (ZD) and an OP amplifier A current gain detector 6 configured of OP 1 and resistors R 1 -R 5 to detect current gain with a base current Ib of the transistor Q 1 inserted into the printed circuit board 5; And a current gain level adjuster configured of an OP amplifier OP 2 (OP 3 ), resistors R 1 -R 5 , and a switch circuit SW to adjust the level of the signal detected by the current gain detector 6. 7) a differential amplifier (8) and a differential amplifier (8), which are composed of an OP amplifier (OP 4 ), resistors (R 11 -R 12 ) and variable resistors (VR 1 ) for differentially amplifying the level adjusted current gain. The analog / digital converter (9) converts the output signal of the digital signal into a digital signal and supplies it to the storage device (2) to measure the current gain of the transistor inserted into the printed circuit board (5). Current gain rate measuring circuit of the transistor, characterized in that a.
KR2019860003598U 1986-03-25 1986-03-25 Circuit of electric current gain of transistor KR890004530Y1 (en)

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KR890004530Y1 true KR890004530Y1 (en) 1989-07-08

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KR100446390B1 (en) * 1997-12-22 2004-12-03 비오이 하이디스 테크놀로지 주식회사 Operation check circuit of transistor in liquid crystal display device, especially including voltage measurement unit and current measurement unit and analog multiplier and comparison unit

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