KR890003955B1 - Automatic forcusing system of video camera - Google Patents

Abstract

The circuit determines the peak contrast value substracted from the peak value of the predetermined area and the peak value of the previous image data for automatic focusing. The selector (11) manuplated by the indicator (24) sets the region of the video signal (Y) obtained from the video camera. The comparator (17) gets its inputs from the delayed circuit (16) and the non-delayed peak detector (15), which is fed by the adder (14) summing up the peak value of the selected region and the obtained video signal value, and drives the direction of the morto (M) via the switching circuit (19).

Description

Automatic focusing circuit of video camera

1 is a block diagram of a video camera for explaining the present invention.

2 is a block diagram showing the configuration of the controller in FIG.

3 is a detailed circuit diagram showing an embodiment of the controller shown in FIG.

4 is a waveform diagram of a Y signal obtained by the present invention.

5 is an exemplary diagram showing a region selected for focusing in the present invention.

6 is a waveform diagram for explaining the general operation of the Schmitt trigger circuit.

7 is a waveform diagram for explaining the operation of the Schmitt trigger circuit in the present invention.

* Explanation of symbols for main parts of the drawings

1: Focusing lens unit 2: Zoom lens unit

3: Image imaging lens unit 4: Image sensor

5: controller 6: room lens

7: image signal processor 10: buffer

11: selector 12: peak value detector

13 inverter 14 adder

15: peak value detector 16: delay circuit

17: comparison circuit 18: Schmitt trigger circuit

19: switching unit 20: gate

21: Mode Switch 22: Comparator

23: switching unit 24: indicator

31: synchronous separator 32: oscillator

33, 34: comparator 35, 36: counter

37: ROM 38: Adder

39: inverter 40: comparative amplifier

41: flip-flop 42: motor drive unit

Q ₁ , Q ₂ : Transistor ZD ₁ , ZD ₂ : Zener Diode

R ₁ to R ₇ : Resistor C: Capacitor

N ₁ : NANDGATE OR ₁ : ORGATE

M: Focusing Motor

The present invention relates to an automatic focus adjustment method of a video camera that detects a focal state of a video camera using only a video signal and automatically adjusts it without using an optical element. As conventional automatic focusing methods, there have been various methods as already known, but they use optical elements such as infrared emitters, infrared detectors, beam splitters, and the like. Of course, there was a problem of cost increase, which is very complicated, and there is a problem such that auto focusing is not performed when the target object is dark or an object outside a window or an object across a wire mesh is photographed.

In view of the foregoing, the present invention provides a method capable of realizing autofocusing by detecting only a video signal without using an existing optical element, which will be described in detail with reference to the accompanying drawings.

In general, as shown in FIG. 1, a video camera includes a zoom lens 6 including a focusing lens unit 1, a zoom lens unit 2, and an image forming lens unit 3, so that light from a subject When it is sent out, it is connected by the zoom lens 6 to form an image sensor 4.

When the subject is imaged on the image sensor 4 as described above, the image signal processor 7 generates a video signal by scanning an image of the subject formed on the image sensor 4, and generates a video signal. It is either input or recorded or input to the monitor to reproduce the image.

According to the present invention, as shown in FIG. 1, the focusing lens unit 1 is input so that the contrast of the video signal is maximized by inputting the video signal output from the image signal processing unit 7 to the controller 5. By controlling the driving of the focusing motor M to be driven, the focus of the video camera is automatically adjusted. The controller 5 will be described in detail as follows.

As shown in FIG. 2, the configuration of the controller 5 includes a buffer 10 for inputting a Y signal of a video camera, that is, a signal representing the brightness of an image, and a Y input through the buffer 10. A selector 11 which selects an area to be focused on the signal, and detects a peak value of the contrast signal measured in the area selected by the selector 11; An adder 14 for adding the output signal of the inverter and the output signal of the inverter 12 which inverts the contrast signal measured by the selector 11, and a peak value for detecting the peak value from the output signal of the adder 14; A delay circuit 16 for temporarily storing the peak value of the detector 15, the signal output from the peak value detector 15, that is, the contrast signal initially read, and the contrast stored in the delay circuit 16. The comparison circuit unit 17 which determines the driving direction of the motor M by comparing the peak value of the streak signal with the peak value of the contrast signal output from the peak value detector 15 after the focusing lens unit 1 is driven. And a Schmitt trigger circuit 18 for stabilizing a driving direction of the motor by forming a dead band in accordance with the output signal of the comparison circuit unit 17, and a motor according to the output signal of the Schmitt trigger circuit 18. The switching section 41 for switching the driving direction of M) is connected and connected, and at the output terminal of the peak value detector 15, the contrast value of the assumed appropriate state of the Y signal is set to the reference potential V _REF . A comparator 22 for applying a signal to the switching unit 23 by comparing the input reference value with the contrast value detected by the peak detector 15 and the selector 11 by a signal of the switching unit 23. Contrast at) A mode switch for connecting and indicating an indicator 24 for specifying an address of a ROM 37 for selecting and converting a measurement area, and a mode switch for selecting a mode for automatic or manual operation on one side of the switching unit 19. According to the selection operation of 21, the gate 20 for outputting an automatic or manual operation signal is connected and connected.

3 is a detailed circuit diagram showing an embodiment of the controller configured as described above, wherein the selector 11 transmits an Y signal input through the buffer 10 to a subsequent circuit. (Q ₁ ), a synchronous separator 31 for separating the horizontal synchronous frequency signal H _f and the vertical synchronous frequency signal V _f from the synchronous signal in the Y signal input as described above, and the synchronous separator ( 31 is reset by the horizontal and vertical synchronization frequency signals H _f and V _f separated from each other, and the vertical synchronization frequency signal V _f and the oscillation frequency signals from the oscillator 32 are counted, respectively. Counters 35 and 36 applied to one side of the comparators 33 and 34, and vertical and horizontal synchronizing signals V _s , H _s and counters 35 specified and output from the ROM 37. ) And compare the count outputs from (36), and apply the compared output signal to the NAND gate (N ₁ ). Is a connection between the comparators 33 and 34 and a transistor Q _{2 which} is in the conducting or blocking state by the output of the NAND gate N ₁ and controls the output of the emitter follower transistor Q ₁ . In addition, the comparison circuit section 17 includes an inverter 39 for inverting the value of the previous contrast signal stored in the delay circuit 16, and a signal and a motor M output from the inverter 39. After the focusing lens unit 1 is driven by driving, an adder 38 for adding and outputting the peak value of the contrast signal output from the peak value detector 15 is connected. 18, the output signal of the comparison circuit section 17 is connected to the inverting (+) input terminal of the comparison amplifier 40 connected to the non-inverting (-) input terminal through the resistor R ₄ . R _5, connected to feedback pieu through R _6), and also the comparison authentication It is constructed by connecting a zener diode _{(ZD 1), (ZD 2} ) on the output side of the exchanger (40).

Referring to the effects of the present invention configured as described above are as follows.

After the power is initially applied, when the signal source 21 shown in FIG. 3 is turned on to wash the auto focusing state, the gate signal 20 outputs a high clock signal. as the OR gate (OR ₁₎ of the applied to one side input terminals, the OR so applied to the gate (OR ₁₎ output clock input terminal (CK) of the high state signal is flip-flop 41 of the present on the flip-flop 41 outputs a clock signal in a high state to be applied to the motor driver 42.

Therefore, since the motor driver 42 outputs the driving signal of the focusing motor M according to the clock signal of the high state, the focusing motor M is driven.

When the mocusing motor M is driven in this way, the zoom lens 6 of the video camera shown in FIG. 1 is driven and adjusted so that the image sensor 4 displays an image of the subject after the zoom lens 6 is adjusted. Since the image is formed, the image signal processing unit 7 outputs a video signal for the image of the subject formed in the image sensor 4.

When the video signal is output from the image signal processing unit 7 of the video camera as described above, the Y signal of the video signal, that is, the contrast signal representing the brightness of the image, is input to the controller shown in FIG. 3 through the buffer 10. Therefore, the selector 11 selects only a portion to be focused on the above Y signal and measures contrast within the range. In general, when shooting with a video camera, the subject to be shot is displayed. Since the image is taken in the state of being positioned at the center of the region (which is referred to as the initial selection region in the present invention), the contrast within this range is first measured in the initial state where power is applied.

That is, when power is first applied, ROM (37) has a vertical and horizontal synchronizing signals (V _s) for the initial selection that specifies the central portion of the screen as shown in FIG. 5 configured the selector (11), ( H _s ) is output and applied to the other input terminal of the comparators 33 and 34.

At the same time, the counters 35 and 36 are separated from the synchronous separator 31 which separates and outputs the horizontal and vertical synchronous frequency signals H _f and V _f from the synchronous frequency signals in the above Y signal. After being reset by the horizontal and vertical frequency signals H _f and V _f of the counter 35, the counter 35 counts the vertical sync frequency signal V _f from the sync separator 31 to determine the comparator 33. It is applied to one input terminal, and the counter 36 counts the oscillation frequency signal from the oscillator 32 and applies it to one side of the comparator 34, so that the comparators 33 and 34 are separated from the ROM 37. When the synchronous signal and the count output signals from the counters 35 and 36 match, the high signal is output.

Thus by Once the high state signal output to the output side of the comparator 33, 34, a NAND gate as applied to a high state signal on either side input terminal of the NAND gate (N ₁₎ (N ₁₎ is in the low state, since thereby to output the signal is in a conductive state to block the output of the transistor (Q ₁₎ and blocks the transistor (Q ₂₎ which, the Y signal is applied through a buffer 10, as described above, the emitter follower transistor ( Q ₁ ) is applied to the peak detector 12 and the inverter 13 through the base, the emitter, and the capacitor C.

That is, when the mode switch 21 is set to auto focus mode in the initial state of applying power, the selector 11 passes only the Y signal in the initial selection area set at the center of the screen as shown in FIG. It is to be applied to the peak detector 12 and the inverter (13).

At this time, if the Y signal in the initial selection area applied through the selector 11 is applied in the form of a signal as shown as an example in Fig. 4A, the Y signal is applied to the peak value detector 12 The peak value thereof is detected as shown in ⓑ of FIG. 4, and is inverted and outputted as shown in? Of FIG. 4 through the inverter 13.

As such, the peak value detection signal detected through the peak value detector 12 and the Y signal inverted through the inverter 13 are applied to the adder 14 to be added to the Y signal added as shown in ⓓ of FIG. Since the peak value detector 15 is applied to the peak value detector 15, the peak value detector 15 detects and outputs a peak value from the added Y signal output from the adder 14, wherein the output peak value is soon detected in the initial selection area. One contrast value (hereinafter, abbreviated as C ₁ ).

The detected contrast value signal C ₁ is applied to the delay circuit 16 to be delayed until the next new contrast signal is applied, and to the adder 38 of the comparison circuit section 17, so that the adder 38 ) Adds and outputs the current contrast value signal C ₁ detected by the peak value detector 15 and the previous signal applied through the inverter 39 after being delayed by the delay circuit 16.

However, at this time, the signal applied to the adder 17 through the inverter 39 should be input to the delay circuit 16 before the contrast value signal C ₁ detected in the initial state, as described above, Since the state before the state is a power-off state and becomes "0", the output of the adder 38 in the initial state is output as it is and the above-mentioned contrast value signal C ₁ is applied to the Schmitt trigger circuit 18. At this time, if the output signal level of the adder 38, which is input to the input terminal of the Schmitt trigger circuit 18, is negative, the contrast value signal detected by the peak value detector 15 is weak. Indicates a too bad state, and if the state is positive, the contrast value signal detected by the peak value detector 15 is a strong state, and the contrast is too strong. If the state is 0, the automatic focus adjustment is performed. Since the state is consistent with the reference contrast value V _REF (which will be described later) set to the most appropriate value, the video camera focus is automatically adjusted.

Here, the Schmitt trigger circuit is in a stable state, and outputs a high level signal among the first to six as shown in Fig common its operation, the level of the V _L state while the rebeol of an input signal greater than V _H when And a stable state by outputting a low signal from the state where the level of the input signal is below V _{L to} the level of the V _H state. Is added to the Schmitt trigger circuit 18 (i.e., in the initial state, the level of the contrast value signal C ₁ is equal to the C ₁ portion of the waveform shown in FIG. 7 (a), for example). If the state is not good, i.e., in a negative state, the Schmitt trigger circuit 18 sets the zener set voltage (-V) set by the zener diodes ZD ₁ and ZD ₂ connected to the output side thereof. _Z ) Outputs a low state signal.

In this manner, the flip-flop 41 (flip-flop 41 is driven by the low-clock clock pulse through the OR gate OR ₁ of the switching unit 19) of the low-state signal shown on the output side of the Schmitt trigger circuit 18. As the output thereof is applied to the clock input terminal CK, the flip-flop 41 outputs a low state signal to drive the focusing motor M. Since the focusing motor M driving signal is applied to the rotor driver 42, the focusing motor M is driven in the reverse direction to adjust the zoom lens 6.

At the same time, the contrast value signal C ₁ output from the peak value detector 15 changes the contrast value of the most suitable state of the Y signal to the reference potential V _REF at the time of autofocus adjustment, thereby non-inverting (+ ) Is applied to the inverting (-) input terminal of the comparator 22 applied to the input terminal and compared with the reference potential V _REF set above.

At this time, the contrast value signal from the peak value detector 15 applied to the inverting (-) input terminal of the comparator 22 is lower or higher than the reference potential V _REF applied to the non-inverting (+) input terminal. When the state is reached, the comparator 22 outputs a high or low signal to the switching unit 23. At this time, since the switching unit 23 generates a clock pulse according to the signal from the comparator 23 and applies it to the indicator 24, the indicator 24 is applied to the ROM 37 configured in the selector 11. The address signal specifying the selection area is applied. Then the ROM (37) outputs the horizontal and vertical synchronizing signals (V _s), (V _s) that specify the selection of one second as shown in FIG. 5 by specifying the address signal from the one indicator (24) It is applied to the other input pins of the comparators 33 and 34, and at the same time, the counters 35 and 36 are newly applied after the focus time motor M is driven and the zoom lens 6 is adjusted. After being reset by the horizontal and vertical frequency signals H _f and V _f separated from the signal, respectively, the counter 35 counts the vertical synchronization frequency signal V _f from 31 during synchronization separation. The counter 36 is applied to one input terminal of the comparator 33, and the counter 36 counts the oscillation frequency signal from the oscillator 32 and applies the signal to one side of the comparator 34. Is a high state signal when the synchronization signal from the ROM 37 and the count output signal from the counters 35 and 36 match. To the output so as applied to both sides of the input terminals of the NAND gate, a NAND gate (N ₁₎ is a transistor that is to output the signal of the low state is a conductive state to block the output of the transient material requester (Q ₁₎ (Q ₁₎ By cutting off, after the focusing motor M is driven and the zoom lens 6 is adjusted, the Y signal for the newly set second selection region is transferred to the base of the emitter follower transistor Q ₂ , the emitter and the condenser ( It is applied to the peak value detector 12 and the inverter 13 through C).

That is, in the initial state where power is applied, the zoom lens 6 is adjusted by driving the focusing motor M according to the contrast value signal detected from the Y signal in the initial region, and the contrast value signal In comparison, when the level is different, the second selection area stored in the ROM 37 is designated. Therefore, the selector 11 passes only the Y signal in the second selection area, so that the peak value detector 12 and the inverter ( 13).

In this way, when the Y signal in the second selection region is applied to the peak value detector 12 and the inverter 13, the peak value is detected in the peak value detector 12 as described above, and is inverted in the inverter 13. is because the peak value, that is, the contrast value signal (where the contrast value of the signal C ₂ la abbreviated as a) has been detected is output from the peak value detector 15 after being added by the adder 14, the contrast value signal (C ₂ Is applied to the delay circuit 16 and is delayed and is applied to the inverting (-) input terminal of the comparator circuit 17 and the comparator 22 at the same time.

Therefore, the adder 38 of the comparison circuit section 17 has a previous signal delayed by the delay circuit 16, that is, a signal whose contrast value signal C ₁ is inverted through the inverter 39 and the current contrast value signal C _2. ) Is added to the Schmitt trigger circuit 18.

At this time, if the relationship between the signal C ₁ in the initial selection region housed in the adder 38 and the contrast value signal C ₂ in the second selection region is C ₁ > C _{2, the} current contrast state is the same as before. Since the state becomes worse than the contrast state, the adder 38 outputs the increased signal in the negative state, and when C ₁ <C _{2, the} current contrast state becomes better than the previous contrast state. 38 outputs a signal of an increased level in a positive (+) state, and is applied to the Schmitt trigger circuit 18.

Therefore, at this time, the signal applied to the Schmitt trigger circuit 18 is adjusted in the initial state as shown in Fig. 7 (a). The contrast value signal C ₂ in the second selection area is caused by the zoom lens 6. If the state becomes better than the contrast value C ₁ in the initial selection area, the Schmitt trigger circuit 18 outputs a high state signal and applies the OR gate OR ₁ to the clock input terminal of the flip-flop 41. The signal of the high state is applied to the CK, but the flip-flop 41 operates to invert its output when the clock signal of the low state is applied to the clock input terminal CK. 41 maintains an output signal in a low state and applies it to the motor driver 43.

Thus, the focusing motor M is maintained in the reverse direction. At this time, when the contrast value circuit C ₂ appearing at the output terminal of the peak value detector 15 is applied to the comparator 22 and compared, and the state becomes almost equal to the reference potential V _REF already set, the ROM 37 Since no new selection area is specified, the Y signal after the zoom lens 6 is adjusted by the contrast value signal C ₂ detected in the second selection area is picked up through the selector 11. ) And the inverter 13. However, even when the ROM 37 does not select and designate another region, the Y signal applied to the peak value detector 12 and the inverter 13 also has the peak value detector 12 and the second selected region. Since it becomes the same as the Y signal applied to the inverter 13, the contrast value signal C ₃ output from the peak value detector 15 is also the same as the contrast value signal C ₂ detected in the second selection region. Done.

Therefore, the adder 38 is a signal to which the output of the delay circuit 16 delayed by the contrast value signal C ₂ detected in the second selection region is applied through the inverter 39 and the current contrast value signal C. _{As 3} ) is added, its output becomes " 0 &quot;, so that the focus of the video camera is properly adjusted.

Therefore, at this time, the output of the Schmitt trigger circuit 18 is stabilized while maintaining a high state, so that the focusing motor M is no longer driven but stopped.

Therefore, the focus of the video camera is automatically adjusted by such an operation.

As described above, the present invention operates by auto focusing by maximizing contrast by detecting only a video signal without using an optical element, thereby simplifying the structure of a video camera. Of course, it provides the effect that can reduce the cost of the product.

Claims (1)

A buffer 10 for inputting the Y signal of the video camera, that is, a signal representing the brightness of the image, and an area to be focused on the Y signal input through the buffer 10 are selected, and the contrast in the area is measured. The selector 11 and the output signal from the peak value detector 12 detecting the peak value of the contrast signal measured in the region selected by the selector 11 and the contrast signal measured by the selector 11. An adder 14 for adding the output signal of the inverter 12 to be inverted, a peak value detector 15 for detecting a peak value to the output signal of the adder 14, and an output from the peak value detector 15; A delay circuit 16 for temporarily storing the peak value of the first signal, i.e., the first contrast signal, and the peak value of the contrast signal stored in the delay circuit 16 and the focusing lens unit 1 are obtained. And a dead band according to the output signal of the comparison circuit section 17 and the comparison circuit section 17 for determining the driving direction of the motor M by comparing the peak values of the contrast signals output from the peak value detection section 15. And the Schmitt trigger circuit 18 for stabilizing the driving direction of the motor and the switching unit 19 for switching the driving direction of the motor M in accordance with the output signal of the Schmitt trigger circuit. In the output terminal of the peak value detector 15, the switching unit compares the reference value inputted by setting the contrast value of the assumed proper state of the Y signal to the reference potential V _REF and the contrast value detected by the peak detector 15. The comparator 22 for applying a signal to the 23 and the address of the ROM 37 for selecting and converting the contrast measurement area in the selector 11 according to the signal of the switching unit 23. A designated indicator 24 is connected and connected, and at one side of the switching unit 19, a gate for outputting an automatic or manual operation signal according to a selection operation of a mode switch 21 for selecting a mode for automatic or manual operation ( 20) is connected and configured to maximize the contrast value obtained by adding the peak detection value and the inverted Y signal of the selected Y signal to perform auto focusing.

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