KR890001473U - Real-time clock and SRAM malfunction prevention circuit - Google Patents
Real-time clock and SRAM malfunction prevention circuitInfo
- Publication number
- KR890001473U KR890001473U KR2019870008938U KR870008938U KR890001473U KR 890001473 U KR890001473 U KR 890001473U KR 2019870008938 U KR2019870008938 U KR 2019870008938U KR 870008938 U KR870008938 U KR 870008938U KR 890001473 U KR890001473 U KR 890001473U
- Authority
- KR
- South Korea
- Prior art keywords
- sram
- real
- time clock
- prevention circuit
- malfunction prevention
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/20—Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/24—Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Electric Clocks (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019870008938U KR900000087Y1 (en) | 1987-06-03 | 1987-06-03 | Circuit which prevents errors in movement of real time clock and sram |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019870008938U KR900000087Y1 (en) | 1987-06-03 | 1987-06-03 | Circuit which prevents errors in movement of real time clock and sram |
Publications (2)
Publication Number | Publication Date |
---|---|
KR890001473U true KR890001473U (en) | 1989-03-18 |
KR900000087Y1 KR900000087Y1 (en) | 1990-01-30 |
Family
ID=19263775
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR2019870008938U KR900000087Y1 (en) | 1987-06-03 | 1987-06-03 | Circuit which prevents errors in movement of real time clock and sram |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR900000087Y1 (en) |
-
1987
- 1987-06-03 KR KR2019870008938U patent/KR900000087Y1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR900000087Y1 (en) | 1990-01-30 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
REGI | Registration of establishment | ||
LAPS | Lapse due to unpaid annual fee |