KR880013093U - Dynamic ram control circuit - Google Patents

Dynamic ram control circuit

Info

Publication number
KR880013093U
KR880013093U KR2019860021225U KR860021225U KR880013093U KR 880013093 U KR880013093 U KR 880013093U KR 2019860021225 U KR2019860021225 U KR 2019860021225U KR 860021225 U KR860021225 U KR 860021225U KR 880013093 U KR880013093 U KR 880013093U
Authority
KR
South Korea
Prior art keywords
control circuit
dynamic ram
ram control
dynamic
circuit
Prior art date
Application number
KR2019860021225U
Other languages
Korean (ko)
Other versions
KR910005756Y1 (en
Inventor
김종오
Original Assignee
주식회사 금성사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 금성사 filed Critical 주식회사 금성사
Priority to KR2019860021225U priority Critical patent/KR910005756Y1/en
Publication of KR880013093U publication Critical patent/KR880013093U/en
Application granted granted Critical
Publication of KR910005756Y1 publication Critical patent/KR910005756Y1/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40611External triggering or timing of internal or partially internal refresh operations, e.g. auto-refresh or CAS-before-RAS triggered refresh

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
KR2019860021225U 1986-12-26 1986-12-26 Dynamic ram controll circuit KR910005756Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019860021225U KR910005756Y1 (en) 1986-12-26 1986-12-26 Dynamic ram controll circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019860021225U KR910005756Y1 (en) 1986-12-26 1986-12-26 Dynamic ram controll circuit

Publications (2)

Publication Number Publication Date
KR880013093U true KR880013093U (en) 1988-08-29
KR910005756Y1 KR910005756Y1 (en) 1991-08-02

Family

ID=19258347

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019860021225U KR910005756Y1 (en) 1986-12-26 1986-12-26 Dynamic ram controll circuit

Country Status (1)

Country Link
KR (1) KR910005756Y1 (en)

Also Published As

Publication number Publication date
KR910005756Y1 (en) 1991-08-02

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Legal Events

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Payment date: 19941227

Year of fee payment: 5

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