KR870000630B1 - Pulse width modulated voltage converter - Google Patents

Abstract

The PWM power amplifier has a pair of input terminals for connection to a direct voltage, a pair of output terminals for connection to a load and a transformer with four windings. The windings on the DC side are eadh connected by their end points to bidirectional switch pairs and similarly the windings on the load side are connected to bidirectional switch pairs. The amplifier also includes a pulse width modulator arranged to steer the switches in response to an error signal derived from the amplifier's output voltage and a desired voltage with this arrangement energy transport takes place in two directions during each clock pulse input.

Description

Pulse Width Modulated Voltage Converter

1 is a block and circuit diagram showing the basic features of a voltage converter according to the present invention.

2A-2D are equivalent circuit diagrams of a first degree converter (power section) during a different switching sequence.

3 is a timeline illustrating the operating mode of the converter of FIG.

4 is a timeline diagram of the current through the two transformer windings of FIG.

5 is a characteristic diagram of a pulse width modulator included in the converter of FIG.

6 is a block diagram embodying the present invention converter.

FIG. 7 is a timeline illustrating the function of the converter of FIG. 6 in more detail.

8 is an application circuit diagram of a converter according to FIG.

An object of the present invention is to provide a voltage converter which converts a direct current (DC) voltage into an alternating current (AC) voltage and has a smaller size and lower power consumption than a conventional converter.

This pulse width modulated voltage converter has been invented for use as a call signal generator for a telephone exchange, and its function is to convert a direct current voltage into a low frequency sinusoidal alternating voltage. The converter is mainly composed of a ferrite core transformer having an ear switch (Pf, Pr) on the primary side (battery side) and an ear switch (S ₁ , S ₂ ) on the secondary side (load side), where a ferrite core ) Means that the transformer core is ferrite. Since these switches are controlled by control pulses generated by a pulse width modulator (PM) with a variable pulse generation rate, these switches are switched on and off with a current that is extremely high (15KHz) than the sine wave alternating frequency (50Hz), and the current flowing between the battery and the load side It is the outline of the invention that the instantaneous challenge and power failure can be obtained.

The present invention mainly relates to a low frequency sine and alternating voltage and a low pulse width modulated voltage converter that generates a converter output voltage with a larger peak value than the supply voltage.

The converter of the present invention can be used, for example, as a signal generator of a telephone switching center, but can also be used as a supply voltage source of a telephone network between a telephone subscriber and an switching center. The subscriber stage of the telephone switching center usually has a call generator, which is wired in common to all subscribers connected to the switching center. The feature rings the subscriber before the call connects.

For this function, the signal generator generates sinusoidal AC voltage which can be directly connected to or connected to the battery voltage (battery offset) of the telephone network in various ways according to different subscriber market demands. The calling voltage amplitude and frequency vary from 80V to 120V frequencies of 17, 25 and 50Hz, depending on the agreement of the subscriber market. At normal calls, the power required for this device is about 25VA.

An example of the prior art is US Pat. No. 4,056,689. The patent specifically describes a network of circuits with a current supply circuit that supplies current per channel regardless of the length of the channel. The telephone network has a call generator that generates a call signal when the subscriber calls the switching center and a voltage source that supplies direct current to the telephone line when the subscriber picks up the handset.

U.S. Patent No. 4,174,467 shows in more detail a call signal generator for use in a telephony network. This generator has a power stage in which the switch switch conduction is configured in pairs in the audio signal path between the switching center and the writer. These switches are controlled to a switching frequency extremely high (15KHz) above the ringing signal frequency (50Hz) for the purpose of reducing disturbing overtones in the ringing signal.

The problem in the construction of the call signal generator and supply voltage source in the telephony network is to provide the required voltage and current at the first power consumption possible. Conventionally known solutions, such as rotors or class C vibrators used as call generators, generally have the disadvantage of being too heavy and bulky.

The solution to this drawback is, among other things, to miniaturize the heaviest and bulkiest lowpass filters and transformers in the call signal generator. However, because the power components of the linear output stage generate too much heat, these power components should not be placed adjacently, even if they are small in size.

The voltage converter of the present invention has a transformer, the battery side and the load side of which are connected to a switching element, that is, a transistor. In this way, the switch devices are controlled so that the DC voltage coming into the battery side is converted into a sine wave output voltage and current. That is, the output consists of four parts with different characteristics and can be loaded on inductive resistance as well as general resistance.

Thus, the frequency of the control signal for the switching device is selected extremely high compared to the frequency (eg, frequency spectrum) of the required output voltage so that the transformer and its output filter can be made small. The four partial characteristics of the converter power stage allow the transient excess energy of the output filter to be fed back to the DC voltage source, resulting in power savings.

More specifically, the converter is a switching device such that the transfer of power is in two directions during the clock pulse interval. Power transfer occurs differently depending on signal polarity, resulting in four different modes of operation.

Specifically, when the converter is in operation, the switching devices operate in pairs, one on the battery side and the other on the load side. Because of this switching, one switching represents one operation and there are four different combinations.

The operation switches are opened and closed at a constant switching frequency controlled by a clock signal. The pulse transfer-stop relationship sent to the actuation switch is controlled by a pulse width modulator, which is alternately controlled by the error voltage from the amplifier output voltage and the reference voltage. Thus, power transfer between the battery and the load side always occurs within the conversion. Each clock interval of the supplied clock signal is separated in two intervals by pulse width modulation while power transfer occurs in each direction. The output and input filters included in the converter serve to equalize pulsing (average formation), so the energy flow, ie, the difference between the energy from the battery and the load and supplied to them, does not change with the clock frequency. The analog signals to be amplified in this way are regenerated in a pulse width modulated intermediate form at the power stage of the amplifier.

The present invention will be described in detail with reference to the accompanying drawings.

The basic features of the voltage converter of the present invention can be clearly seen in FIG. Referring to FIG. 1, the storage battery B, which sends an appropriate DC voltage, is connected to the input filter IF. The output of the filter IF is connected to two ends of the first winding L ₁ of the transformer T. The input filter IF serves to eliminate the disadvantage that occurs when the supply voltage source of the converter does not have a sufficiently low impedance at the switching frequency. This filter will equalize the pulse currents generated by the converter so that other components (connected to battery B) are not disturbed and the converter supply voltage is not affected by this pulsed current.

The transformer T is a conventional device in which a ferrite core is inserted, and two windings L ₁ and L ₂ on one axis (so-called primary side) and two windings L on the other side (below the secondary side). ₃ , L ₄ ) are wound. The winding L ₁ through the first switch P _f is connected to the end of the filter output as described above, and the winding L ₂ through the second switch P _r has one end described above. Connected to the output.

In the same way, the half L ₃ of the second winding has one end connected to the output filter UF via a third switch S ₁ and another drawback directly to the input described above. The half L ₄ of the fourth winding connects one end to the input of the output filter UF via the fourth switch S ₂ , and another disadvantage is directly connected to the above-described input. The switches can be controlled with the outputs P _f , P _r , S ₁ , S _{2 of} the pulse width modulator PM, which will be described in detail below.

The switches P _f , P _r , S ₁ and S ₂ may be bipolar transistors, MOS type or bipolar field effect transistors (FETs), depending on the application. The switch P _r may also consist only of a diode and no control pulses from the modulator PM are used. The halves of the primary and secondary windings (L _1- L ₄ ) can specify the direction in which the windings are wound as point marks in FIG. 1, and the winding ratios (L _1- L ₃ and L _2- L ₄ ) are determined by the output filter ( It can be selected in a suitable manner according to the required output voltage of the load voltage U _L obtained from UF). In the use of the call signal generator, the block L symbolizes a so-called call bus, i.e., a load called a two-wire line to which a plurality of switches (call signal contacts) are attached.

Through one of these lines, a call signal generator is connected to the telephone to carry the call signal. The telephone is connected to the switching center via another line (voice signal) and the call signal generator is blocked. Both terminals of the output filter UF are connected to the input of the feedback network N separately from the load L.

The output voltage U _L is attenuated to an appropriate level in this network to match the logic circuit to which it is connected. Since the output voltage U _L is relative (U _L ) is not related to any reference voltage), the output voltage U _L is determined as a potential difference with respect to the reference voltage (ground). Thus, the output voltage Uc of the network N of FIG. 1 is grounded.

A comparator, usually composed of an OP-AMP, is connected to the output of the feedback network N and one input to the input signal source of the converter. In the case of installing the call signal generator of FIG. 1, the input signal source is a fundamental wave frequency oscillator RO for generating a sinusoidal reference signal having a frequency equal to that of the output voltage U _L of the filter UF.

The output voltage U _c of the network N compares the reference voltage U _rcf to obtain an error voltage across the output of the comparator JF. This output is connected to a pulse width modulator (PM) and the control signals through the two pairs of outputs (P _f , P _r and S ₁ , S ₂ ), respectively, switches P _f , P _r and S ₁ , S ₂ . Send. As the magnitude of the error voltage U _F in the pulse width modulator PM, the pulse transmission-stop relationship (pulse rate) of the square wave control signals across the outputs P _f , P _r and S ₁ , S ₂ is determined. Therefore, these pulse rates can vary from 0 to 100% depending on the error voltage, and are determined by the clock signal frequency f ₀ . However, the frequency remains constant.

Pulse width modulators with these characteristics can be used by those skilled in the art using items such as operational amplifiers, shift registers, flip-flop circuits, and logic circuit components such as AND / OR gates. Therefore, the detailed structure of this pulse modulation converter will not be treated here.

In the above description, each clock interval 1 / f ₀ is divided into two intervals separately from extreme posistions of the modulator by pulse width modulation. During the first interval, energy is transferred between the load side and the battery shaft by one of the four modes of operation described below. During the second interval, there is no energy transfer. The role of the input and output filters is to equalize this pulsing (shaping the average value), so the energy flow in the load and battery occurs almost identical to the clock frequency f ₀ . In this way, the analog signal to be amplified is regenerated in a pulse width modulated intermediate.

Now with respect to the function of the transducer, the switches P2a-D2, which represent the equivalent circuits for the different switching sequences, and for the given loads, i.e. for the given inductive loads connected to the output filter UF, respectively, switch (P). _Based on the control voltage pulses transmitted to _f , P _r and S ₁ , S ₂ ) and the pulse time diagrams of the output voltage U _O , the reference voltage Uref and the error voltage Uf. I'll explain. The characteristics of the pulse width modulator are shown in FIG. This figure shows the pulse transmission (M) of the control pulse transmitted to the switches P _f , P _r and S ₁ , S ₂ with the function of controlling the error voltage.

When the reference voltage is U _ref > U _c and both sides (U _ref and U _r ) are positive, the error voltage U _F is U _E > U _F0 (but in the case of t = t ₀ in Fig. 5). ). When U _ref <U _c and both voltages are positive, -U _F0 <U _f <0 (t ₁ <t <t ₂ ). When U _ref <U _c > U _O and both sides (U _ref and U _c ) are negative, U _F <-U _F0 , and U _ref > U _rff > U _c and both sides are negative _Becomes 0 <U _f <U _F0 . Assuming that the reference and load voltages are equal to zero at time t _O , U _F is zero.

When U _ref increases from 0 to U _FO for a short time, there is a deviation to adjust and the transducer follows the first mode of operation that lasts to t ₁ . Depending on the load, the error signal U _F becomes larger than the U _FO as shown in FIG. 3. During the time t ₀ -t ₁ , the pulse length modulation of the pulses transmitted to the switches P _f and S ₁ takes place and there is no signal transmission to the switches P _r and S ₂ (see FIG. 5).

Thus, the equivalent circuit diagram of FIG. 2 is obtained.

The switching sequence for time t ₀ -t ₁ is when P _f is closed, S ₁ is open or vice versa so that the switches operate in reverse phase. Referring to FIG. 3, when the reference voltage continues to be smaller than U _c at time t ₁ , the voltage U _ref drops to U _ref = U _o , and the error voltage U _F rapidly drops to 0 first and then to a negative value. Becomes Therefore, in FIG. 5, the modulation characteristic curve when 0 <U _F <U _F0 drops rapidly and pulse width modulation of the control pulses P _r and S ₂ is performed at this time.

3, the load voltage drops to zero at time t ₂ . Also, the load voltage should be negative and the deviation to be adjusted should have a larger negative value. Therefore, the voltage U _F = -U _F0 (U _F = + U _F0 when t = t ₀ ). At this time, the third operation method is started. During t ₁ -t ₂ , the equivalent circuit diagram of FIG. 2b is obtained.

At time t ₂ , U _c and U _r both become negative voltages and the error voltage U _F decreases to a larger negative voltage. (State after reference time t ₀ ) As shown in FIG. 5, the switches P _f and S ₂ are operated in reverse phase at this time, while the switches P _r and S ₁ do not operate during this time. In this way, the equivalent circuit diagram of FIG. 2C is obtained.

At time t ₃ , the piezoelectric U _r has a negative value less than U _c so that the error voltage U _F becomes a positive voltage. Thus, U _F is rapidly increased from -U _FO to 0, after which the load piezoelectric surpasses to 0 during time t ₃ -t ₄ . During this time, the switches P _r and S ₁ operate in opposite phases and the pulse width modulation takes place as part of 0 <U _F <U _FO of the modulation characteristic curve of FIG. The power portion of the converter will now be described with reference to FIGS. 2A-2D. 2a-d is a simplified diagram of the power portion where the input filter is omitted for simplicity and the output filter is included in block L. FIG. For a period of time it differs depending on the reference voltage and the currents I _b and I _O In addition, a current I _b and I _O is a type lamp varies in accordance with the clock pulse frequency f _O (FIG. 4) or trapezoidal pulses.

Time t ₁ -t ₂ (second degree)

During this time, the switches P _f and S ₁ are operated as in FIG. When P _f is closed, current I _b flows into the winding L _{1 in} the direction indicated and magnetizes the transformer so that magnetic energy is stored (see Figure 4) until the triangular pulse current reaches I _a . The switch P _f is closed during the time of.

When the switch P _f is open, the switch S ₁ is closed and the energy stored in the transformer sends a current I ₀ flowing to the winding L ₃ (see FIG. 4). The current flows through the output filter and charges the capacitor in it. The switch P _f is turned on (S ₁ is open), and then the sequence in which the switch S ₁ is turned on (P _f is open) is repeated. Positive current flows and is continuously charged in the output filter, and a positive voltage is generated across the filter due to the charge charged from t ₀ to t ₁ .

Time t ₁ -t ₂ (Fig. 2b)

During this time the switches P _r and S ₂ are activated while the switches P _f and S ₁ are not operated. Magnetizing the transformer is achieved by the current I ₀ flowing through the winding L ₄ in the output filter when switch S ₂ is conducting (switch P _r is open), and the discharge of energy stored in the transformer When (P _r ) is closed (S ₂ is open), the current I _b flowing in the winding L ₂ is sent back to the battery B. Negative current is obtained through the output filter (load) and positive piezoelectric.

Time t ₁ -t ₂ (Fig. 2c)

During this time the switches P _f and S ₂ are operated while the switches P _f and S ₁ are not operated. The current I _b flows along the winding L ₁ from the battery B. At this time, close the switches (P _f) (S ₂ is open) also see stores magnetic energy in the transformer) state during the time t ₀ -t _1).

When the switch P _f is opened and S ₂ is closed, the current I ₀ will flow in the direction opposite to the direction by FIG. 1a but in the direction in which the winding L ₄ is wound. So for the time t ₁ -t _{3 we} get a negative piezoelectric (U ₀ ) and a negative current (I ₀ ).

Time t ₃ -t ₄ (FIG. 2d)

During this time, the switches P _r and S ₁ are operated and the switches P _f and S ₂ are not operated. The magnetization of the transformer is the energy stored in the transformer and generated by the current (I ₀ ) flowing from the load side through the winding (L ₃ ) when the switch (S ₁ ) is conducting (P _r is open). When the switch P _r is closed (S ₁ is open), the current I ₀ flows to the battery B and is discharged. Positive and negative voltages are obtained at the load (L). Thus, energy transfer occurs from the load to the battery shaft. Apply the time diagram according to FIG. 3 to a given load as described above.

At no load, the times t ₁ and t ₃ are located in the middle of the times t ₆ -t ₂ and t ₂ -t ₄ , respectively, and are replaced by t ₂ and t ₄ when the inductive load increases. In addition, when the switches P _f , S ₁ and P _r , S ₂ are driven in phase, there are cases where a so-called flyback converter is obtained. On the other hand, since the switches P _f , S ₁ and P _r , S ₂ may be driven in phase, the converter forms a forward converter in this case. The converter of this type has the same shape as that shown in FIG. 1 except that the winding directions of the transformer windings L ₁ -L ₄ are reversed.

The converter output filter UF demodulates the pulse width modulated output signal by attenuating and raising the tone of the switching frequency. In a flyback converter, a filter (UF) connects the capacitor appropriately across the output or in the form of a Pi-Link with low input impedance to the switching frequency. In the case of a forward converter (in-phase switching), the filter (UF) is a lowpass filter made of LC-coupling, which has a low input impedance to the switching frequency.

The basic characteristics of the transducer of the present invention will be described in more detail with reference to Article 6. A battery B having a suitable DC voltage is connected to the input filter IF. The output of the filter IF is connected across the first winding L ₁ of the transformer T. The input filter IF serves to eliminate the disadvantages that occur when the supply voltage source of the converter does not have a low impedance sufficient for the switching frequency. The filter smoothes the pulsed flow that occurs in the transducer, so it is another device (connected to the side cell (B)). It is not disturbed and the supply voltage of the converter is not greatly affected by this pulsed current.

Transformer T is a conventional device in which a ferrite core is inserted, and two windings L ₁ and L _{2 are} connected to the battery side and two windings L ₃ and L ₄ are connected to the load side. The winding L ₁ is connected to one end of the filter output as described above through the first set of switches P _fa and P _rb and the second winding L ₂ is the second set of switches P _fb and P _ra . One end is connected and the other end is directly connected to the input of the output filter (UF). One end at half L ₄ of the fourth winding is connected to the input of the output filter UF via the fourth switch pair S _1b , S _2a and the other end directly to the input of the output filter U _F. The switches can be controlled or controlled by pulses coming from the output terminals P _f , P _r , S ₁ and S ₂ of the pulse width modulator PM. Each switch (P _fa , P _rz , P _rb and S _1a , S _1b , S _2a , S _2b ) is a MOS type field effect transistor (FET) or a bipolar field effect transistor (FET) and a bipolar transistor, depending on the application. Produce it.

The halves of the windings (L _1- L ₄ ) have their winding directions as point plots in FIG. 1 and the winding ratios L _1- L ₃ , L _2- L ₄ are the load voltages obtained from the output filter (UF). U _L ) is selected at an appropriate ratio according to the required output voltage level. Block (L) is an abbreviation of a subscriber network, that is, a load consisting of telephones connected in a call network.

The output of the output filter UF is connected to the input of the feedback network N, which consists of a very simple conductor connection separate from the load. The output of the network N may be connected to one of the inputs of the comparator JF to become an operational amplifier. The fundamental frequency oscillator RO is connected to the other input of the comparator JF. The output of the feedback circuit N sends a reference signal or an input signal, and the signal is a signal to be amplified through the amplifier output, that is, the filter UF. Cautions for use are that the oscillator RO is omitted and the signal U _r is a low frequency audio signal to be amplified by the amplifier.

The input voltage U _r and the output voltage U _c of the network N are compared to obtain an error voltage U _f as the output of the comparator JF. This output is connected to the pulse width modulator PM and thus sends control signals through eight output terminals P _fa , P _ra , P _fb , P _rb , S _1a , S _1b and S _2a , S _2b .

These signals cause the switching pairs P _ra , P _fb , P _rb , P _fa , S _1a , S _2b and S _2a , S _1b to work as shown in the time diagram of FIG. . The magnitude of the error voltage is the pulse rate of the square wave signals transmitted through the output terminals P _fa , P _ra , P _fb and S _1a , S _2a , S _1b and S _2b in the pulse width modulator PM. Decide The use of the control signals transmitted through the output terminals P _fa and P _fb can be seen with reference to FIG. 8.

The pulse rate of the control signal can vary from 0 to 100%. However, the frequency of the control signal is kept constant and is determined by the frequency f _{O of the} clock scene. Now, the amplifier will be described in detail. The amplifier is composed of two switching parts a and b with two switches in each direction. As a result, the transformer T is magnetized in different directions so that the intermediate iron core (ferriteite core) can be effectively used (the coupling method of the amplifier used at this time is called a push-pull connection method).

If the switching parts a and b are connected in the opposite directions to the switches _Pra and P _fb , the same effect as the transformer in which eight windings are wound instead of the four windings shown in FIG. 6 can be obtained. Since this transformer effect is used in the transformer T, the low impedance circuit can be connected to the battery side at the switching frequency f _O and the high impedance circuit can be connected to the load side. This is achieved with the amplifier of FIG. 1 by the capacitive input of the input filter 1F and the inductive input of the output filter UF. The adjustment of the amplifier and its operation will be described in more detail with reference to the timeline diagram shown in FIG.

At time t ₀ , switch P _fa is activated and is _energized for time t ₀ -t '. During the clock pulse period (t ₀ -t ₁₎ of the next half hour (t'-t _1), the switch (P _fa) is opened and the switch (P _ra) is conductive. During this time, the switch S _{la on the} load side is turned on and the switch S _2a is opened.

The remaining switches on both the battery and the load side are open for a time t ₀ -t ₁ . The first switching part (a part) of the amplifier is operated for two phases 1 and 2 (time, t ₀ -t ₁ ). For half a period of time t ₁ -t ₂ , switch P _fb is activated to conduct for time t ₁ -t 'and switch P _fb is conducting for time t'-t ₂ . . In addition, the switch S _1b continues to be turned on for a time t ₁ -t ₂ . The remaining switches are open. If the current I ₀ flowing through the output filter UF is a positive current (as shown in FIG. 1), it occurs as follows during each clock period.

During the clock pulse period, i.e., the difference between the two phases (1 and 2), the "a part" is operated and during the phase (1) the output filter is charged and the phase (as shown in the characteristic curve of the current I ₀ ). This characteristic curve shows that the distortion is exaggerated to clearly show the charge and discharge of the current (I ₀ ). Pulse width modulation controls the correlation between the phases 1 and 2, i.e. the energy transfer between the input and output filters IF, UF.

The next clock pulse period (difference between phases 3 and 4) "b" performs the same function, although the transformer T is magnetized in the opposite direction to maintain sustained equilibrium.

When the current I ₀ flowing through the output filter UF is negative, the sequence during the clock pulse period is as follows.

During the one period of the current I ₀ flowing through the output filter UF, the a and b switching portions are operated for half a period of each clock pulse period and t ₀ -t ₁ = t ₁ -t ₂ =... … … Since it is 1 / 2f ₀ , when the clock pulse frequency is doubled, both operation and stop can be performed at the same time.

During the difference between phases 1 and 3, the positive current I ₀ increases and decreases during phases 2 and 4. If the pulse width modulation is made more during the difference between phases 2 and 4, during the phases 1 and 3, the output current I ₀ will eventually change sign. This phenomenon occurs during the difference between phases 2 and 4. The pulse width modulator PM sends a control pulse to the switches P _fa and S _2a (just before time t ₀ ′ in FIG. 7), where I _{0 changes} from (+) to (−). Accordingly, the output current I ₀ flows out of one input terminal of the output filter, flows through the switched switch S _2a and the transformer winding L ₄ , and then enters the output filter UF again. During the first half of the clock pulse period (t ₀ '-t ₁ '), the switches P _rb , P _fb and S _2b operate and during the next half period t ₁ '-t ₂ ', the switches P _ra , P _fa and S _2a ) are activated.

Simultaneous operation and continuous flow of current is thus ensured, and if phase 2 (or 4) is interrupted, output current I ₀ = 0, at which time phase 12 (or phase 14 as in FIG. 7) takes over immediately. And continue until the end of phase 2 (or 4).

As described above, the pulse width modulator PM is controlled as follows. That is, if the switch P _rb conduction, the switch P _fa conducts from phase 1l to phase l, the switch P _ra conduction, and the switch P _f conducts from phase 13 to phase 3, the output current I ₀ is previously negative. This is a positive current past zero (not shown in Figure 7).

The application circuit for the current portion of FIG. 6 is shown in FIG.

Here, the detailed feedback circuit is omitted as shown in FIG. 6 to simplify the entire circuit. The capacitor C ₀ forms the input filter IF, and the coil 1 and the capacitor C form the output filter UF. Both switches (P _ra, P _rb) is replaced with a diode (D _a and D _b). Switch (P _fa and P _fb) is controlled by a transistor (T _a and T _b), and so these are the output terminals (P _ra and _rb P) of the pulse width modulator (PM).

The control pulses from these two output terminals can be seen in FIG. On the load side, both switches S _2a and S _{2b are} formed of diode bridges D ₁₁ -D ₁ and transistors T ₁ , and both switches S _2a and S _1b are formed of diode bridges D ₂₁ -D ₂₄ and It is formed of a transistor T ₂ .

Transistor T ₁ is controlled by the output pulse of OR circuit EK1, and two input terminals of EK1 are connected to pulse output terminals S _1a and S _2b of pulse width modulator PM. In the same way, the transistor T ₂ is controlled by pulses from the OR circuit EK2, and the two input terminals of EK2 are connected to the control pulse output terminals S _2a and S _1b of the pulse width modulator PM.

Thus, the timeline of FIG. 7 can be applied to the amplifier of FIG. However, the _timeline of the output terminals P _fa and P _fb is not used. Switches (P, and P _{ra rb)} diode (D _a and D _b) corresponding to operate in the same way as the time interval, the switch (P _ra and _rb P) which conduction is opened.

During the first part of the half period t _0- t ₁ of the clock pulse according to FIG. 7 (phase 1), transistor T _a is turned on (since switch P _fa is turned on) and transistor T ₁ is also turned on. do. Therefore, current flows from the negative electrode of the battery.

By the action of the transformer, the magnetized transformer sends a current in which the current flowing along the winding L ₃ , diode D ₁₁ , transistor T ₁ and diode D ₁₄ is charged to coil L.

During the remainder of time t ₀ -t ₁ (phase 2), transistor T _a is open (T _{b is} also open) so that the current from the battery passes through its diode (D _a ) from its cathode (-). It flows along L ₁ ) and enters the positive (-) of the battery. Accordingly, the coil 1 is discharged so that current flows through the diode D ₁₂ , the transistor T _b , the diode D ₁₃ , and the winding L ₃ .

During phase (3), transistor T _b is conducted so that current flows through winding L ₁ and transistor T _b at battery positive electrode (+) and enters battery negative electrode (−).

Transformer T ₁ is magnetized to send current through winding L ₄ , which flows through diode D ₂₁ , transistor T ₂ (conducting at this point) and then charges coil L. In principle, during the phase 2 phase, the same phenomenon occurs during the phase 4 phase.

In other words, both transistors (T _a and T _b) are opened and also the transistor (T ₂₎ of the coil (L) is a diode (D _22, D ₂₃₎ and winding (L ₄₎ a current (I _O) through since the conduction And the current on the battery side flows from the battery negative electrode (-) to its positive electrode (+) through the diode (D _b ) and the winding (L ₂ ).

In order to simplify the structure of the pulse width modulator PM, the modulator may send a control signal to the switch Pfa (corresponding to transistor T _a in FIG. 8) during the time interval (t1-t2, t3-t4, etc.). However, at this time, the switch P _fa is opened so that no current flows.

Because of this phenomenon there is an advantage that the sign of the output current I ₀ transforming phenomenon if the sign of I ₀ transforming the transistors T _a (corresponding to the switches P _fa) takes place when this is opened and the discharge coil (L) (stage I ₀ = 0 Switch P _fa is conducting). The control pulses already sent during phase 4 may be ready for conduction in phase 14. That is, before I ₀ becomes zero. In a simpler way, the transistor T _b (corresponding to the switch P _fb ) is turned on in phase 3 due to the control pulse sent to transistor T _b during phase 13 (when I ₀ <0). Ready to become

The control pulses in these two cases are indicated by dashed lines in FIG.

Claims (8)

It has the purpose of converting DC voltage into alternating voltage which is changed into a sign function of low frequency, and the magnitude of voltage is not limited to the DC voltage level. (L ₁ , L ₂ , L ₃ , L ₄ ) has a wound converter T, and the first and second control switches P _f and P _r are the battery shafts (primary shafts) of the converter. Connected to the terminals of the windings L ₁ , L ₂ , and the third and fourth control switches S ₁ , S ₂ are connected to the terminals of the winding U _ref , the load side (secondary side) of the converter, The pulse width modulator corresponding to the error signal U _L extracted by comparing the output voltage U _F with a reference voltage U _ref , which is a desired AC voltage, switches the switches P _f , P _r , S ₁ , and S ₂ . Arranged for control, i.e., during the first time interval (t ₀ -t ₁ ) by control pulses of a frequency f ₀ higher than the frequency of the output voltage. The first switch (P _f ) and the third switch (S ₁ ) to be controlled are conducted and opened according to the pulse rate, which can vary according to the magnitude of the error signal, and the second time interval (t ₁ -t ₂ ). While the second switch (P _r ) and the fourth switch (S ₂ ) is the third time interval (t ₂ -t ₃ ), the first switch (P _f ) and the fourth switch (S ₂ ) is the fourth time interval ( t ₂ -t ₃ ) wherein the first switch (P _f ) and the third switch (P _r ) are conducted and opened in the manner described above. The method according to claim 1, wherein during each time interval (t ₁ -t _2, etc.), both switches P _f , S _1, etc. are controlled in phase, i.e., one is conducting or vice versa when another is opened. Pulse width modulation converter characterized in that the control. 2. The method according to claim 1, wherein during each time interval (t ₁ -t _2, etc.), both switches (P _f , S _1, etc.) are controlled in phase, i.e. both are simultaneously connected or open at the same time. Pulse width modulator characterized by. The method of claim 1, wherein the first and second switches P _fa , _Pra and the third and fourth switches P _fb and P _{rb are} connected to each other in parallel with each other so that the first and second switches P _fa and _{Pra are} connected to each other in parallel to each other. The first and second switches S _1a and S _2a and the third and fourth switches S _1b and S _2b are connected to each other in a reverse direction, and are connected to the load side in parallel and are connected to each other using a pulse width modulator PM. The third and fourth switches P _1b and P _2b on the battery side are controlled to repeat the conduction and open states according to a constant pulse transmission rate corresponding to the error voltage U _F during the time interval t _{1 to} t ₂ . And controlling the third and fourth switches S _1b and S _2b on the load side during the second time interval t ₁ -t ₂ . The clock signal of the constant frequency f ₀ is provided to the pulse width modulator PM, and the first and second time intervals t ₀ -t ₁ , t ₁ -t ₂ and the next time interval are generated. A converter whose features (t ₂ -t _3, etc.) account for half of each clock pulse period. 5. The method according to claim 4, wherein the first switch P _fa on the axial ground side is controlled to be conductive for at least a part of the second time interval, wherein the output signal U _L is positive. converter. 5. The method according to claim 4, wherein the third switch P _{fb on} the load side is controlled to be conductive during at least a portion of the second time interval t ₁ '-t ₂ ', wherein the output signal is negative. Converter with features. 5. The battery cell side first and third switches P _fa and P _fb comprise diodes D ₃ and D _b, respectively, and the battery side second and fourth switches _Pra and P _rb. ) Includes transistors T _a and T _b, respectively, so that control pulses for the above-mentioned first and third switches on the battery side cannot be used, and the first and third switches S _1a and S on the load side. _{In addition to 2b} ), the second and fourth switches S _2a and S _1b each include a diode bridge D ₁₁ -D ₁₄ and D ₂₁ -D ₂₄ , each of which has a diagonally connected transistor T ₁ and T. ₂ ) the control electrodes of the transistors at the output of the OR circuits EK1 and EK2 forming a logic sum circuit between the control pulses for each of the first and second and third and fourth switches on the load side, respectively. A transducer, characterized in that connected.

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