KR860000309Y1 - Boosting circuit - Google Patents
Boosting circuit Download PDFInfo
- Publication number
- KR860000309Y1 KR860000309Y1 KR2019830010770U KR830010770U KR860000309Y1 KR 860000309 Y1 KR860000309 Y1 KR 860000309Y1 KR 2019830010770 U KR2019830010770 U KR 2019830010770U KR 830010770 U KR830010770 U KR 830010770U KR 860000309 Y1 KR860000309 Y1 KR 860000309Y1
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- South Korea
- Prior art keywords
- transistor
- resistor
- voltage
- capacitor
- pulse signal
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/1552—Boost converters exploiting the leakage inductance of a transformer or of an alternator as boost inductor
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- Power Engineering (AREA)
- Electronic Switches (AREA)
Abstract
내용 없음.No content.
Description
제1도는 본 고안의 회로도.1 is a circuit diagram of the present invention.
제2도 a, b, c, d는 본 고안의 회로 각 부분신호의 파형도2, a, b, c, and d are waveform diagrams of the partial signals of the circuit of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
Q1∼Q3: 트랜지스터 C1,C2: 콘덴서Q 1 to Q 3 : transistors C 1 and C 2 : capacitors
R1∼R5: 저항 RL: 부하R 1 to R 5 : Resistance R L : Load
D1: 다이오드 IN : 펄스신호 입력단자D 1 : Diode IN: Pulse Signal Input Terminal
+ B : 전원+ B: power
본 고안은 휴대용 전기 전자제품의 펄스신호 출력회로의 전원전압에 적합한 전원전압 부스팅(Boosting)회로의 구성에 관한 것이다.The present invention relates to a configuration of a power supply voltage boosting circuit suitable for a power supply voltage of a pulse signal output circuit of a portable electric and electronic product.
종래에 휴대용 전기전자 제품들의 전원은 전지를 사용하였는데, 펄스신호 출력회로의 전원전압을 공급하기 위하여 여러개의 전지를 사용해야 했으므로 전자가 차지하는 부피가 크고 무게가 무거워서 휴대하기에 불편한 문제점이 있었다.Conventionally, the power source of the portable electric and electronic products used a battery, it was inconvenient to carry because the bulky and heavy weight occupied by the electron because a plurality of batteries must be used to supply the power voltage of the pulse signal output circuit.
본 고안은 이와같은 점을 감안하여 휴대용 전기 전자제품이 사용되는 전지의 수를 줄이고도 높은 전압의 발생이 가능한 전원공급 회로로서 펄스신호에 따라서 온(0N), 오프(OFF) 되는 트랜지스터와 콘덴서로 된 전원전압 부스팅 회로에서 2배로 승압된 전지전압을 부하에 공급할 수 있도록 한 것이다.In view of the above, the present invention is a power supply circuit capable of generating a high voltage even when the number of batteries for portable electric and electronic products is used is reduced, and transistors and capacitors are turned on (0N) and off (OFF) according to a pulse signal. In this case, the battery voltage boosted by twice the power supply voltage boosting circuit can be supplied to the load.
따라서 사용되는 전지의 수를 반으로 줄일수 있게되어 제품을 소형 경량화 하였으므로 휴대하기가 좋고, 특히 펄스신호와 같이 찌그러짐이 크게 문제되지 않는 회로의 전원전압에 적합한 것이다.Therefore, it is possible to reduce the number of batteries used in half, so that the product is compact and lightweight, it is easy to carry, and particularly suitable for the power supply voltage of the circuit which does not have a big problem such as a pulse signal.
본 고안의 구성은 제1도와 같이 트랜지스터(Q1)의 에미터는 저항(R1)을 지나 다이오드(D1)와 전원(+B)에 연결된 동시에 콘덴서(C1)를 통해 접지되고 콜렉터는 콘덴서(C2)와 저항(R4)에 베이스는 저항(R2)과 트랜지스터(Q2)의 콜렉터에 각각 연결되며, 트랜지스터(Q2)의 베이스는 펄스신호 입력단자(IN)에 접속된 동시에 저항(R5)을 지나 트랜지스터(Q3)의 베이스에 접속되고, 에미터는 저항(R3)을 통해 접지되며 트랜지스터(Q3)의 콜렉터는 부하(RL)를 지나 다이오드(D1)와 콘덴서(C2)에 연결되고, 에미터는접지하여서 된것이다.According to the configuration of the present invention, the emitter of the transistor Q 1 is connected to the diode D 1 and the power supply (+ B) through the resistor R 1 and grounded through the capacitor C 1 as shown in FIG. The base of (C 2 ) and resistor (R 4 ) are connected to the collector of resistor (R 2 ) and transistor (Q 2 ) respectively, and the base of transistor (Q 2 ) is connected to pulse signal input terminal (IN) Passed through resistor R 5 to the base of transistor Q 3 , the emitter is grounded through resistor R 3 and the collector of transistor Q 3 crosses the load R L and passes through diode D 1 . It is connected to the capacitor (C 2 ) and the emitter is grounded.
본 고안의 작용효과는 별첨 제1,2도와 같이 펄스신호 입력단자(IN)에 제2도 a와 같은 주기의 펄스신호를 입력시키면 펄스신호가 입력되지 않는 시간(T2,T4) 동안은 콘덴서(C1,C2)가 전원(+B) 전압으로 충전되고, 펄스신호가 입력되는 시간(T1,T3,T5) 동안은 콘덴서(C1,C2)가 방전하여 부하(RL)에 +2B배의 전원을 공급하게 된다.The effect of the present invention is that when the pulse signal of the period shown in FIG. 2 is input to the pulse signal input terminal IN as shown in the first and second appendixes, the pulse signal is not inputted during the time (T 2 , T 4 ). The capacitors C 1 and C 2 are charged to the power supply (+ B) voltage, and the capacitors C 1 and C 2 discharge during the time T 1 , T 3 and T 5 when the pulse signal is input. R L ) supplies + 2B times power.
이를 더욱 상세히 설명하면, 제2도 a와같이 시간(T2)동안은 제1도의 펄스신호 입력단자(IN)에 아무신호도 가해지기 않으므로 트랜지스터(Q2)는 OFF 되어 트랜지스터(Q1)에는 바이어스가 걸리지 않으므로 트랜지스터(Q1)가 OFF 되어 있게되면, 또한 트랜지스터(Q3)도 OFF 되어 있게 된다.More specifically, as shown in FIG. 2 , since no signal is applied to the pulse signal input terminal IN of FIG. 1 during the time T 2 , the transistor Q 2 is turned off to the transistor Q 1 . Since the bias is not applied, when the transistor Q 1 is turned off, the transistor Q 3 is also turned off.
따라서 콘덴서(C1)는 저항(R2)을 통해 저항(R1)×콘덴서(C2)의 시정수로 제2도 b와같이 전원(+B) 전압으로 충전되고, 또한 콘덴서(C2)는 저항(R4)을 통해 저항(R4)×콘덴서(C2)의 시정수로 제2도 c와 같이 전원(+B) 전압으로 충전된다.Therefore, the capacitor (C 1) is charged to the power source (+ B) voltage as shown in b in the time constant second diagram of a resistance (R 1) × capacitor (C 2) via a resistor (R 2), also the capacitor (C 2 ) is charged with power (B +) voltage as shown in FIG. 2 c by the time constant of the resistance (R 4) × capacitor (c 2) via a resistor (R 4).
이와같은 상태에서 다음시간(T3)에 제2도 a와 같이 펄스신호가 입력되면 트랜지스터(Q2)가 ON되어 트랜지스터(Q1)에 바이어스가 걸리므로 트랜지스터(Q1)가 ON 되고, 또한 트랜지스터(Q3)도 ON 된다.In this state, when the pulse signal is input as shown in FIG. 2 a at the next time T 3 , the transistor Q 2 is turned on and the transistor Q 1 is biased so that the transistor Q 1 is turned on. Transistor Q 3 is also turned on.
따라서 콘덴서(C1)에 충전되었던 전압은 트랜지스터(Q1)를 통해 저항(R4)으로 방전하게 되어 저항(R4)의 양단에는 전원(+B) 전압이 걸리게 되고, 이 전압은 콘덴서(C2)에 충전되었던 전원(+B) 전압에 더해져서 제2도 d와 같이 +2B배의 전압이 부하(RL)에 가해지게 되는 것이다.Therefore, the voltage charged in the capacitor (C 1 ) is discharged to the resistor (R 4 ) through the transistor (Q 1 ) so that the power (+ B) voltage is applied to both ends of the resistor (R 4 ), this voltage is a capacitor ( In addition to the power (+ B) voltage that was charged in the C 2 ), + 2B times the voltage is applied to the load (R L ), as shown in FIG.
즉, 부하(RL)에 +2B배의 전압이 공급되므로 사용되는 전지의 수를 반으로 줄일수 있는 것이다.That is, the voltage of + 2B times is supplied to the load R L so that the number of batteries used can be reduced by half.
그리고 다이오드(D1)는 시간(T3) 동안에 부하(RL) 양단에 공급되는 +2B배의 전원전압이 전원(+B)쪽으로 흐르게 되는것을 막는 역할을 하게 된다.The diode D 1 serves to prevent the + 2B times the supply voltage supplied across the load R L from flowing to the power supply + B during the time T 3 .
이와같이 본 고안은 낮은 전지전압으로서도 2배에 가까운 전원전압을 발생시켜서 고출력을 얻을수 있고, 전지의 갯수를 반으로 줄일수 있게 된 것이다.In this way, the present invention can generate high power by generating power voltage nearly twice as low as the battery voltage, and can reduce the number of batteries in half.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019830010770U KR860000309Y1 (en) | 1983-12-17 | 1983-12-17 | Boosting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019830010770U KR860000309Y1 (en) | 1983-12-17 | 1983-12-17 | Boosting circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR850005481U KR850005481U (en) | 1985-08-10 |
| KR860000309Y1 true KR860000309Y1 (en) | 1986-03-13 |
Family
ID=70160518
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019830010770U KR860000309Y1 (en) | 1983-12-17 | 1983-12-17 | Boosting circuit |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR860000309Y1 (en) |
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1983
- 1983-12-17 KR KR2019830010770U patent/KR860000309Y1/en not_active IP Right Cessation
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| Publication number | Publication date |
|---|---|
| KR850005481U (en) | 1985-08-10 |
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