KR840006110A - 디지탈(digital) 입력회로 - Google Patents
디지탈(digital) 입력회로 Download PDFInfo
- Publication number
- KR840006110A KR840006110A KR1019830002735A KR830002735A KR840006110A KR 840006110 A KR840006110 A KR 840006110A KR 1019830002735 A KR1019830002735 A KR 1019830002735A KR 830002735 A KR830002735 A KR 830002735A KR 840006110 A KR840006110 A KR 840006110A
- Authority
- KR
- South Korea
- Prior art keywords
- digital input
- input circuit
- output
- gate element
- circuit
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M11/00—Coding in connection with keyboards or like devices, i.e. coding of the position of operated keys
- H03M11/22—Static coding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/002—Switching arrangements with several input- or output terminals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
- H03K17/62—Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors
- H03K17/6221—Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors combined with selecting means
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/78—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled
- H03K17/795—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled controlling bipolar transistors
- H03K17/7955—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled controlling bipolar transistors using phototransistors
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Data Mining & Analysis (AREA)
- Databases & Information Systems (AREA)
- Mathematical Physics (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Electronic Switches (AREA)
- Dc Digital Transmission (AREA)
- Programmable Controllers (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 종래의 매트릭스(matrix)방식의 디지탈 입력 회로도.
제2도는 제1도의 동작을 설명하기 위한 타이밍(timing)도.
제3도는 본 발명의 하나의 실시예를 표시하는 회로 접속도.
Claims (1)
- 병렬로 접속된 복수개의 접점과, 이 각접점에 직렬로 접속되고 입력신호에 따라서 동작하는 게이트(gate)소자와, 상기의 접점과 게이트 소자를 포함하는 회로에 접속된 출력소자가 있으며, 상기 접점과 게이트 소자와를 결합시켜서 상기의 접점에 나타나는 ON/OFF 정보를 상기의 출력 소자를 통하여 전달하게 한 디지탈입력 회로에서 교류를 전파 정류한 것을 상기의 접점회로에 공급하고 또 상기의 출력단자의 출력을 상기전파 정류의 맥류에 동기시킨 것을 특징으로 하는 디지탈 입력 회로.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57162604A JPS5951623A (ja) | 1982-09-17 | 1982-09-17 | ディジタル入力回路 |
JP57-162604 | 1982-09-17 | ||
JP162604 | 1984-10-26 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR840006110A true KR840006110A (ko) | 1984-11-21 |
KR870001709B1 KR870001709B1 (ko) | 1987-09-24 |
Family
ID=15757745
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019830002735A KR870001709B1 (ko) | 1982-09-17 | 1983-06-18 | 디지탈(digital) 입력 회로 |
Country Status (3)
Country | Link |
---|---|
US (1) | US4596984A (ko) |
JP (1) | JPS5951623A (ko) |
KR (1) | KR870001709B1 (ko) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3213527A1 (de) * | 1982-04-10 | 1983-10-20 | Heidelberger Druckmaschinen Ag, 6900 Heidelberg | Datenuebertragungssystem |
JPS60167456U (ja) * | 1984-04-11 | 1985-11-07 | 株式会社明電舎 | 入出力制御装置 |
EP0165386B1 (de) * | 1984-04-26 | 1989-11-29 | Heidelberger Druckmaschinen Aktiengesellschaft | Verfahren und Speichersystem zum Speichern von Einstellwerten für Stellvorrichtungen an Druckmaschinen |
US6072402A (en) * | 1992-01-09 | 2000-06-06 | Slc Technologies, Inc. | Secure entry system with radio communications |
US5555421A (en) * | 1993-11-23 | 1996-09-10 | Kistler Instrument Company | Bidirectional interface for interconnecting two devices and the interface having first optical isolator and second optical isolator being powered by first and second device ports |
US10557884B2 (en) | 2017-05-11 | 2020-02-11 | Texas Instruments Incorporated | Wire break detection in digital input receivers |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3818451A (en) * | 1972-03-15 | 1974-06-18 | Motorola Inc | Light-emitting and light-receiving logic array |
US4310754A (en) * | 1976-07-14 | 1982-01-12 | Pitney Bowes Inc. | Communication means with transducer physically spaced from interior wall of secure housing |
CH625072A5 (ko) * | 1978-03-08 | 1981-08-31 | Landis & Gyr Ag | |
JPS5657127A (en) * | 1979-10-15 | 1981-05-19 | Toshiba Corp | Digital input/output circuit |
US4320388A (en) * | 1980-07-15 | 1982-03-16 | Westinghouse Electric Corp. | Two wire optical data communication system |
JPS57168337U (ko) * | 1981-04-17 | 1982-10-23 |
-
1982
- 1982-09-17 JP JP57162604A patent/JPS5951623A/ja active Granted
-
1983
- 1983-06-18 KR KR1019830002735A patent/KR870001709B1/ko not_active IP Right Cessation
- 1983-09-16 US US06/532,971 patent/US4596984A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPS5951623A (ja) | 1984-03-26 |
JPH0430206B2 (ko) | 1992-05-21 |
US4596984A (en) | 1986-06-24 |
KR870001709B1 (ko) | 1987-09-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E601 | Decision to refuse application | ||
J2X1 | Appeal (before the patent court) |
Free format text: APPEAL AGAINST DECISION TO DECLINE REFUSAL |
|
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 19920919 Year of fee payment: 6 |
|
LAPS | Lapse due to unpaid annual fee |