KR830002467A - Image synthesis device - Google Patents

Image synthesis device

Info

Publication number
KR830002467A
KR830002467A KR1019800000147A KR800000147A KR830002467A KR 830002467 A KR830002467 A KR 830002467A KR 1019800000147 A KR1019800000147 A KR 1019800000147A KR 800000147 A KR800000147 A KR 800000147A KR 830002467 A KR830002467 A KR 830002467A
Authority
KR
South Korea
Prior art keywords
blanking
synthesis device
image synthesis
video signal
signal
Prior art date
Application number
KR1019800000147A
Other languages
Korean (ko)
Inventor
도시오 스즈끼
Original Assignee
이와마 가즈오
쏘니 가부시기 가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이와마 가즈오, 쏘니 가부시기 가이샤 filed Critical 이와마 가즈오
Priority to KR1019800000147A priority Critical patent/KR830002467A/en
Publication of KR830002467A publication Critical patent/KR830002467A/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset

Abstract

내용 없음No content

Description

화상합성장치(畵像合成裝置)Image synthesis device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this content is publicly disclosed, the full text is not included.

제1도는 종래의 블랭킹회로의 일례를 나타내는 회로도. 제2도는 본 발명 및 종래의 신호합성의 원리를 나타내는 파형도. 제3도는 본 발명의 실시예를 나타내는 회로도.1 is a circuit diagram showing an example of a conventional blanking circuit. 2 is a waveform diagram showing the principles of the present invention and conventional signal synthesis. 3 is a circuit diagram showing an embodiment of the present invention.

Claims (1)

도면에 표시하고 본문에 상술한 바와 같이 블랭킹신호에 의해 제1의 영상 신호의 소정위치에 소정기간 블랭킹부분을 형성하고, 이 블랭킹부분에 제2의 영상신호를 끼워 넣도록 한 화상합성장치에 있어서, 상기 제1의 영상신호의 페데스탈레벨을 검출해서 이것을 유지하고, 상기 블랭킹신호가 가해졌을 때, 이것에 응해서 상기 블랭킹부분의 블랭킹레벨을 상기 유지되어 있는 페데스탈레벨에 클램프하도록 한 것을 특징으로 하는 화상합성장치.In the image synthesizing apparatus, the blanking part is formed at a predetermined position of the first video signal for a predetermined period by a blanking signal as shown in the figure and as described above in the text, and the second video signal is interposed in the blanking part. , An image characterized by detecting the pedestal level of the first video signal and holding it, and when the blanking signal is applied, clamping the blanking level of the blanking portion to the held pedestal level in response to this. Synthesis device. ※참고사항:최초출원 내용에 의하여 공개하는 것임.※Note: It is disclosed according to the contents of the first application.
KR1019800000147A 1980-01-16 1980-01-16 Image synthesis device KR830002467A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019800000147A KR830002467A (en) 1980-01-16 1980-01-16 Image synthesis device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019800000147A KR830002467A (en) 1980-01-16 1980-01-16 Image synthesis device

Publications (1)

Publication Number Publication Date
KR830002467A true KR830002467A (en) 1983-05-28

Family

ID=69173545

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019800000147A KR830002467A (en) 1980-01-16 1980-01-16 Image synthesis device

Country Status (1)

Country Link
KR (1) KR830002467A (en)

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