KR830002456A - Variable control power equalization circuit - Google Patents

Variable control power equalization circuit Download PDF

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Publication number
KR830002456A
KR830002456A KR1019800000739A KR800000739A KR830002456A KR 830002456 A KR830002456 A KR 830002456A KR 1019800000739 A KR1019800000739 A KR 1019800000739A KR 800000739 A KR800000739 A KR 800000739A KR 830002456 A KR830002456 A KR 830002456A
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KR
South Korea
Prior art keywords
impedance
circuit
variable
equalization circuit
output terminal
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KR1019800000739A
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Korean (ko)
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리 바스킨드 데이비드
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리 바스킨드 데이비드
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Priority to KR1019800000739A priority Critical patent/KR830002456A/en
Publication of KR830002456A publication Critical patent/KR830002456A/en

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Abstract

내용 없음No content

Description

가변 제어전원 균화회로Variable control power equalization circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this content is publicly disclosed, the full text is not included.

제1도는 본 발명의 기본 원리를 나타낸 계통도.1 is a schematic diagram showing the basic principles of the present invention.

제2도는 본 발명의 제1실시의 계통도.2 is a schematic diagram of the first embodiment of the present invention.

제3도는 본 발명에 의거하여 구성된 가변 균화기의 일예의 회로도.3 is a circuit diagram of an example of a variable equalizer constructed in accordance with the present invention.

제4도는 제3도의 회로를 위한 전환식 VS 주파수의 곡선부류.4 is a curve class of switched VS frequency for the circuit of FIG. 3;

제5도는 본 발명의 제1실시예에 따라서 구성된 가변 균화기의 다른 예의 회로도.5 is a circuit diagram of another example of the variable equalizer constructed according to the first embodiment of the present invention.

제6도는 제5도의 회로를 위한 전환식 VS 주파수의 곡선부류.6 is a curve class of switched VS frequency for the circuit of FIG. 5;

Claims (11)

균화된 신호가 공급되도록된 입력단자와 균화된 출력신호가 구동될 출력단자 및 하나의 병렬회로는 제1임피던스를 갖는 신호통로이며 다른 하나는 가변진폭 수정장치와 제2임피던스를 갖는 직렬회로를 갖는 신호 통로인 입력과 출력단자 사이의 회로에 포함된 신호통로에 연결된 상기 병렬회로의 한쌍으로 구성된 신호 진폭특성을 변경하게 하는 가변 균화회로.The input terminal to which the balanced signal is supplied, the output terminal to which the balanced output signal is to be driven, and one parallel circuit are signal paths having a first impedance and the other is a serial circuit having a variable amplitude correction device and a second impedance. Variable equalization circuit to change the signal amplitude characteristics consisting of a pair of parallel circuits connected to the signal path included in the circuit between the input and output terminals that are signal paths. 그 회로의 입력과 출력에 연결되어 있는 신호통로가 접속된 2개의 병렬과의 전환작용을 갖는 회로로 된 청구범위 1에서의 가변 균화회로. 여기서 A는 가변진폭 수정장치의 이득율이며 Z1은 제1임피던스 장치의 임피던스, Z2는 제2임피던스 장치의 임피던스.Two parallel circuits with signal paths connected to the inputs and outputs of the circuit. Variable equalization circuit in claim 1 of the circuit having a switching action of. Where A is the gain ratio of the variable amplitude correction device, Z 1 is the impedance of the first impedance device, and Z 2 is the impedance of the second impedance device. 저항으로 구성된 제1임피던스와 캐퍼시터로 구성된 제2임피던스로 된 청구범위 2에서의 가변 균화회로.Variable equalization circuit in claim 2 consisting of a first impedance composed of a resistor and a second impedance composed of a capacitor. 캐퍼시터로 구성된 제1임피던스와 저항으로 구성된 제2임피던스로 된 청구범위 2에서의 가변균화회로.A variable equalization circuit in claim 2 comprising a first impedance composed of a capacitor and a second impedance composed of a resistor. 버퍼증폭기에 연결된 전위차계로 구성된 그 가변 균화 진폭수정 장치로 되어 있는 청구범위 2에서의 가변균화회로.A variable equalization circuit in claim 2 comprising a variable equalization amplitude correction device comprising a potentiometer connected to a buffer amplifier. 그 회로의 입력단자에 연결된 입력단자를 갖는 o.p 암프와 그 O.P암프의 출력단자와 궤환단자 사이에 연결된 신호통로에 접속된 2개의 병렬회로와의 전환작용을 갖는 회로가 추가된 청구범위 1에서의 가변 균화회로. 그런데 A는 가변진폭 수정장치의 이득이며 Z1은 제1임피던스장치의 임피던스, Z2는 제2임피던스 장치의 임피던스이다.An op amp having an input terminal connected to the input terminal of the circuit, and two parallel circuits connected to a signal path connected between the output terminal and the feedback terminal of the op amp; A variable equalization circuit in claim 1 to which a circuit having a switching action of is added. However, A is the gain of the variable amplitude correction device, Z 1 is the impedance of the first impedance device, and Z 2 is the impedance of the second impedance device. 저항으로 된 제1임피던스와 캐퍼시터로 된 제2임피던스인 청구범위 6에서의 가변 균화회로.Variable equalization circuit in claim 6, which is the first impedance of resistance and the second impedance of capacitor. 캐퍼시터로 된 제1임피던스와 저항으로 된 제2임피던스인 청구범위 6에서의 가변 균화회로.Variable equalization circuit in claim 6, which is the first impedance of a capacitor and the second impedance of a resistor. 버퍼증폭기에 연결된 전위차계로 구성된 가변진폭수정 장치인 청구범위 6에서의 가변 균화회로.Variable equalization circuit in claim 6, which is a variable amplitude correction device composed of a potentiometer connected to a buffer amplifier. 그 회로의 입력단자에 연결된 o.p 암프의 입력단자와 회로의 출력단자에 연결된 o.p 암프의 출력단자 및 그 회로의 한 위치는 출력단자와 o.p 암프의 출력단자 사이의 2개의 병렬신호이며 다른 한 위치는 o.p 암프의 출력단자와 궤환단자 사이의 2개의 병렬신호 통로역할로 접속된 스위치장치를 갖는 o.p 암프를 추가로 포함한 청구범위 1에서의 균화회로.The input terminal of the op amp connected to the input terminal of the circuit and the output terminal of the op amp connected to the output terminal of the circuit and one position of the circuit are two parallel signals between the output terminal and the output terminal of the op amp. An equalization circuit in claim 1 further comprising an op amp having a switch device connected to two parallel signal path roles between the output terminal and the feedback terminal of the op amp. 가변 증폭기로 구성된 가변 진폭 수정장치인 청구범위 10에서의 균화회로.Equalization circuit in claim 10 which is a variable amplitude correction device composed of a variable amplifier. ※참고사항:최초출원 내용에 의하여 공개하는 것임.※Note: It is disclosed according to the contents of the first application.
KR1019800000739A 1980-02-22 1980-02-22 Variable control power equalization circuit KR830002456A (en)

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KR1019800000739A KR830002456A (en) 1980-02-22 1980-02-22 Variable control power equalization circuit

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KR1019800000739A KR830002456A (en) 1980-02-22 1980-02-22 Variable control power equalization circuit

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KR830002456A true KR830002456A (en) 1983-05-28

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100301128B1 (en) * 1999-01-27 2001-09-13 이종학 Preparation of polyvinyl chloride paste resin having good blowing properties

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100301128B1 (en) * 1999-01-27 2001-09-13 이종학 Preparation of polyvinyl chloride paste resin having good blowing properties

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