KR810001732B1 - Channel selection method - Google Patents

Abstract

A television receiver channel selector for selecting one from among a plurality of channel tuning frequencies is characterized: Television or radio receiver-channel selector included variable-capacitance diodes as tuning elements; confrontation voltage of binary frequency is memorized by hadamard transform; After this memory information began to be inverse hadamard transform, the avove voltage is regenerated; and this regenerated voltage is used to tunner-selection voltage or channel indication voltage.

Description

National Defense

FIG. 1 is a diagram showing a fast Adama transform used in the tuning apparatus of the present invention.

2 is a block diagram of a tuning apparatus according to an embodiment of the present invention.

3, 4, 5, 6, and 7 are block diagrams of a tuning device in different embodiments of the present invention.

The present invention relates to a channel selection method that can be used for a television receiver or a radio receiver.

A tuning device comprising a variable capacitance diode as a tuning element, comprising means for obtaining a tuning voltage, comprising a binary counting circuit and a digital-analog converter (D / A converter) driven at its output, A channel selection method has been proposed in which the content is changed by adding a time pulsation, and when the output voltage of the D / A converter becomes a tuning voltage of a broadcast channel, the generation of the time pulse is stopped and the signal is entered into the reception state.

In this system, the digital amount corresponding to the tuning voltage must be stored in the memory circuit corresponding to all the channels, and the memory capacity is large.

In addition, there is a method of storing a digital amount in a storage device capable of recording conversion only for a channel that is actually broadcasted. However, this method requires adjustment of the digital amount to be stored when a receiver is installed. It is disadvantageous in terms of cost and production cost of adding a device that requires adjustment.

On the other hand, when a broadcast wave desired to be received is detected by applying a sweep voltage to the variable capacitance diode to sweep the tuning frequency, a so-called search tuning method is known in which the voltage sweep is stopped to enter a reception state.

This method has advantages in that it is not necessary to preset the tuning voltage for each channel and there is no influence of the local oscillation frequency drift, but it is difficult to identify the channel number.

In particular, this is a problem when the digital display of channel numbers is common, such as a television receiver. In addition, when this method is applied to a radio receiver and the reception frequency is displayed as a guideline of a voltmeter like a conventional dial indication, the line indicating the relationship between the applied voltage of the variable capacitance diode and the reception frequency is not a straight line. Since this curve is different for each radio receiver, if you apply a common dial scale to the radio receiver and move the meter hand on the voltmeter, an error occurs between the actual reception frequency and the display. have.

The present invention aims at compressing a digital conversion amount of a tuning voltage or a channel corresponding to a boundary frequency of a channel to be stored in a television or radio tuning apparatus using a variable capacitance diode (variable reactance element) as a tuning element.

Next, the Example of this invention is described.

First In the first high-speed conversion display Adama al Fig degrees _{(X 1, X 2 ······ X} n) of the information vector represented by [xi], to convert Adama al (Hadamard) matrix [H] _{, (x 1, x 2 ······} x n) vector [xi] If the change, and the amplitude of a small number of xi be very large compared to other xi, xi is the amplitude of the other, the smaller is Adama al In view of the nature of the conversion, a small amplitude xi can be stored in a small memory device, whereby the storage capacity can be reduced.

The energy-invariant nature of the conversion,

By using the property that the amplitude of the minority xi becomes much larger than other xi, accurate information is stored for xi having a large amplitude, and an average representative value for xi having a different amplitude (for example, By storing the average value of the tuner and inverting the information from these information [xi] to [x'i] again by the Adama transform, the original information can be reproduced with a fairly good precision.

The present invention utilizes the feature of this adama transform to store the digitally converted amount of the tuning voltage of each channel in a read-only memory (PROM) capable of compressing information and storing it in a field program. This is to shorten the time required to do so and to reduce the PROM usage. The order of calculation of the adama transform and the fast adama transform is well known. For convenience of explanation, this will be described first.

This equation shows that the column vector [xi] is converted into the Adama matrix (H matrix) arranged in order, and as a result, the column vector [Xi] is obtained. This operation requires 8 ² = 64 additions and subtractions, but in order to reduce the number of times, it can be completed in 24 times by using the fast adamant transform shown in FIG.

Where A, B, C, D, E, F, G, H, O, P, Q, R, S, T, X (0), X (1), X (2), X (3), X (4), X (5), X (6), and X (7) are the same speed recall memory (RAM).

The digital amounts X ₀ , X ₁ , X ₂ , X ₃ , X ₄ , X ₅ , X ₆ and X ₇ are stored in A, B, C, D, E, F, G and H, respectively.

The solid line indicates that the amount stored in the RAM of the higher level number (hereinafter referred to as the symbol indicating RAM) is stored in the RAM of the lower level number. The dotted line indicates that the positive sign stored in the RAM of the higher level number is added as a minus sign and stored in the RAM of the lower level.

In order to explain this operation again clearly, or to indicate that the operation of the fast adamant transform is the same value as the adama transform shown in the above equation, Table 1 is used.

However, the calculation order shall be performed from top to bottom.

TABLE 1

One embodiment of the present invention is shown in FIG.

2, (1) is a high frequency amplifier, (2) is a mixer, (3) is a local oscillator, (4), (5), (6), and (7) is a variable capacitance diode, I use it.

The part which consists of (1)-(7) is called an electronic tuner hereafter.

(8) are programmable read only memories (PROM), (10), (11), (12), and (13) are co-call memory (RAM).

Although RAM and registers are collectively referred to as read and write storage devices (RWNs), RWNs are referred to as RAMs in accordance with examples commonly used hereinafter.

An input register is required between the PROM 8 and the calculator 14. In this figure, it is abbreviate | omitted for simplicity.

In addition, PROM as used in the present invention means a programmable memory device, and a nonvolatile memory device capable of recording conversion is defined including a function as a ROM during the tuning operation.

In the PROM 8 of FIG. 2, the tuning voltages (x0, x2, ..., x15) (shown in Table 2 of the numerical column) corresponding to the broadcast channel are changed using the adama transformation described above. In addition, the number of binary digits required at each address is reduced and stored.

In addition, the above-described eighth order adama transform is extended to sixteenth order.

TABLE 2

When the measured tuning voltages (Table 2) are changed at five electronic tuners, the conversion values shown in Table 3 and their average values are obtained. only,

Therefore, it is necessary to multiply by 1 / N when performing the inverse transformation. However, when the Adama change values in Table 3 are obtained, the respective values are already divided by N = 16.

인 변환을, 변환시와 역변환시의 양쪽에 이용하면 된다.In other words, when a reverse voltage calculation is to be performed to obtain a tuning voltage, only a subtraction and a subtraction are performed to make the calculation as simple as possible. In order to reduce the error at the time of inverse conversion which occurs because the number of digits decreases with water

The phosphorus transform can be used for both transformation and inverse transformation.

In this case, the conversion value is divided by 16, and the lowest four digits are inserted again, and the conversion value is converted to an integer to facilitate the operation.

This is shown in Table 4.

TABLE 3

TABLE 4

Next, FIG. 2 is explained in full detail.

Xi in the case of sequential zero, that is, Xo (hereinafter, the same) is 16 bits in the X (0) address of the PROM (8), and X ₁ , X ₃ , X ₇ , and X ₁₅ are each 12 bits in the X (1), X 3) At X (7), X (15), X ₂ is 8 bits, at X (2), X ₄ , X ₅ , X ₆ , X ₈ , X ₉ , X ₁₀ , X ₁₁ , X ₁₂ , X ₁₃ , X ₁₄ are 4 bits each, X (4), X (5), X (6), X (8), X (9), X (10), X (11), X (12) , X (13) and X (14) are stored.

Where (14) is an arithmetic device, (15) is a ROM for storing address control commands, (16) is a ROM for storing operation control commands, and (17) is a program storage device for controlling ROMs 15 and (16). Denotes an input device to the program storage device 17.

The information stored in the PROM 8 passes through an input register (not shown in the figure) and enters the calculator 14 in accordance with the address control command from the ROM 15. The arithmetic unit 14 performs the arithmetic operation shown in Table 5 according to the arithmetic instruction from (16) and the address control instruction from (15). However, X (0) + X (1) → A means inputting the amounts stored in X (0) and X (1) to the calculator 14, adding them, and storing them in RAM A. The same applies to this.

The result is stored in each address of the RAM 13.

X ₀ ', x ₁ ' ... x ₁₅ 'stored in the RAM 13 is selected in accordance with the address control instruction from (15), and is tuned via the D / A converter 19 to adjust the tuning voltage. Is applied to the electronic tuner.

TABLE 5

The value shown in Table 6 was already obtained by storing the value of Table 4 obtained above in the PROM 8 of FIG. 2 and performing the above calculation.

Although the absolute maximum value of the error is 5 mV, in case of UHF television tuner, the sensitivity of the tuning frequency to the variable capacitance diode applied voltage is about 20 KHz / mV. Therefore, the frequency deviation is not a problem when AFC is performed. Do not.

TABLE 6

If the information shown in Table 2 is stored in the PROM as it is without performing the adama conversion, the storage capacity of 16 x 16 = 256 bits is required in one compartment of 16. According to the apparatus of FIG. As indicated in Table 4, the result is that the data is compressed to 16 + 12 x 4 + 8 + 4 x 10 = 112 bits.

However, it should be divided into 4 bit units.

3 is a second embodiment of the present invention.

Here, the information stored in the PROM 8 of FIG. 2 is divided and stored in the PROM 8 and the ROM 9.

What is stored in the ROM 9 is the average value for each sequence, and what is stored in the PROM 8 is the difference between Xi in Table 4 and the average value.

The difference from the average value calculated in Table 4 is shown in Table 7.

Therefore, in the apparatus of FIG. 3, as can be seen from Table 7, compression can be performed at 12x2 + 8x4 + 4x10 = 96 bits.

TABLE 7

4 is a third embodiment of the present invention.

In this case, as shown in the eighth, only the larger value of the adama conversion value is stored in the PROM 8, and the smaller value is stored in the ROM 9 with an average value for five tuners. .

Other configurations are the same as the configurations indicated by the same symbols in FIG. 2, and the operations are similar to those described using Table 5 with respect to FIG.

In this case, the PROM 8 stores conversion values of 0,1,3,7,150,000 for the Adama transform, and substitutes the average of five tuners for the other conversion values. As indicated, the error is larger than the error shown in Table 6.

However, as described above, since the sensitivity of the tuning frequency to the applied voltage is about 20 KHz, the AFC can be made within the maximum range by setting the induction range of the AFC to ± 1.2 MHz and the curved oscillation drift of the electronic tuner to ± 700 KHz.

It becomes practical when the deviation of the values in Table 3 is smaller.

In the configuration of FIG. 4, X (0) of the PROM 8 is 16 bits, X (1), X (3), X (7) are 12 bits, and X (15) is 8 bits, respectively. Suffice.

However, since the negative signs are determined according to the order, they are not shown in the drawing, but are stored in the ROM. As a result, the information to be stored in the PROM is compressed to 16 + 12 x 3 + 8 = 60 bits.

TABLE 8

TABLE 9

5 is a fourth embodiment of the present invention.

Here, the information stored in the PROM 8 of FIG. 4 is divided and stored in the PROM 8 ₁ and the ROM 8 ₂ .

The storage in the ROM 8 ₂ is an average value in the case of the sequence 0, 1, 3, 7, 5, and the storage in the PROM 8 ₁ is the difference between the value and the average value in Table 4 of the same sequence.

An example of the value is shown in Table 10.

Therefore, the storage capacity of the PROM can be compressed to 12 x 2 + 8 x 3 = 48 bits.

TABLE 10

6 is a fifth embodiment of the present invention.

(1) to (19) indicate the same components as those in FIG. 5, and their linkage operations are the same as in FIG.

However, it is assumed that the tuning voltage shown in Table 2 is the voltage corresponding to the boundary frequency of each channel.

However, the channel boundary frequency is not limited to a narrow boundary frequency by broadcasting frequency allocation, but is a boundary frequency in the sense of including the arrival signal frequency within the boundary.

In this embodiment, the threshold frequency corresponding voltage of the channel to be received is converted and stored in the same manner as described above, and at the time of tuning operation, the inverse conversion and the D / A conversion are performed (19). ), The output voltage from the voltage shift circuit 23 is added to the voltage adder 28, and the high frequency amplifier 1, the mixer 2, and the local voltage are added to the voltage. The search tuning device comprising the oscillator 3, the intermediate frequency amplifier 20, the frequency discriminator 21, the shift control circuit 22, and the voltage shift circuit 23 attempts to search and tune to the broadcast wave. .

(22) is controlled by the program storage device to produce a control output for starting the shift operation of (23) after the threshold frequency corresponding voltage is obtained in (19).

7 is a sixth embodiment of the present invention.

(1) to (18) show the same components as those in FIG. 6, their linkage operations are also the same as in FIG.

However, it is assumed that the tuning voltage shown in Table 3 is the voltage corresponding to the boundary frequency of each channel. This embodiment includes a high frequency amplifier 1, a mixer 2, a local oscillator 3, an intermediate frequency amplifier 20, a frequency discriminator 21, a shift control circuit 22, and a voltage shift circuit 23. ), And identifies the receiving channel number of the search tuning device. When the search tuning device tunes to the arrival radio wave and a rated voltage is generated in the variable capacitance diode 7 of the local oscillator 3, this voltage is A / D to the analog and digital converter (A / D converter) 24. D is changed and applied to the comparator 25. On the other hand, among the threshold frequency correspondence voltages of the channels stored in the RAM 13, they are sequentially transferred to the RAM 26 by the address control command of the ROM 15 output. At that time, it is assumed that the boundary frequency corresponding voltages X '(i) and X' (i + 1) of two adjacent channels are transmitted.

In the comparator 25, the output of the A / D converter 24 compares between Xi (i) and X '(i + 1) or not.

The comparison result enters the program storage unit 17, passes through the ROM 15, controls the transfer of information from the RAM 13 to the RAM 26, and if the output of the A / D converter 24 is X, If it enters between '(i) and X' (i + 1), the transmission is stopped.

The output of the program storage device 17 also controls the operation instruction memory ROM 16 and the counter in the calculator 14 by the output.

The counter is fixed at zero at the same time as the transfer from RAM 13 to RAM 26, and when it is identified that the output of A / D converter 24 is between X '(i) and X' (i + 1), Stop counting.

The content is i, which is displayed as a channel number on the channel number indicator 27.

In addition, although Fig. 1 (1)-(18) of FIG. 7 was set as FIG. 6, it is natural to be able to change to (1)-(18) of FIG. 2-FIG. Examples of channel number indicators include television receiver screens, digital display discharge tubes, light emitting diodes, and the like.

These are digital displays of channel numbers. However, in the seventh embodiment, when the reception frequency is to be analytically displayed like a radio receiver, the frequency is replaced by the frequency instead of the channel number described above. Similar configurations and calculations may be performed.

In this case, the output of the counter in the calculator 14 is D / A-converted and the output is applied to a voltmeter to shake the hand, or the code of the binary (2 ms) of the counter is interpreted and arranged in a line. It is assumed that a means of lighting the lamp is taken.

The variation of the applied voltage and the reception frequency by the variable capacitance diode can be made without affecting the display of the reception frequency by such means. As described above, according to the present invention, first, if the tuning voltage or channel boundary voltage of all channels of a tuning device having a variable capacitance diode as a tuning element is digitized and stored, adjustment of tuning and channel display at the time of receiver installation is performed. This is not necessary, and there is a reduction in adjustment costs and the like, which is useful. However, if the measurement data is stored as it is for a large number of channels, it takes a long time for storage or a material cost such as PROM becomes expensive.

In the present invention, there is a relationship between the relationship between the applied voltages corresponding to the respective channels in the electronic tuner unit and the relationship between the applied voltages for the respective channels between the electronic tuners. Attention was given to applying the adama transform to the digitized applied voltage to compress the storage capacity. Therefore, it is possible to reduce the production cost as a whole by using less of a long memory time and a more expensive one like a PROM, and using a lot of inexpensive and suitable for mass production such as a ROM or a RAM.

Second, as in the embodiment of FIG. 2, the number of bits of each address of the PROM is compressed according to the required number of bits according to the number of bits of the Adama transform, so that the overall storage capacity of the data before conversion is stored as it is in the PROM. This can be reduced.

Third, as in the embodiment of FIG. 3, the average value (representative value) for each sequence is stored in the ROM, and the difference between the conversion value for each electronic tuner and this average value is stored in the PROM, and thus, the embodiment of FIG. Compared to the storage capacity can be compressed more.

Fourth, as in the embodiment of FIG. 4, only the larger value of the adama conversion value is stored in the PROM, and the others are stored in the ROM, so that the storage capacity can be further compressed compared to the embodiments of FIG. 2 and FIG. have.

Furthermore, the applied voltage reproduced by the inverse transformation is in practical error range. Fifth, as in the embodiment of FIG. 5, the larger value of the adama conversion value is stored in the ROM, and only the difference between the conversion value and the average value is stored in the PROM for each electronic tuner. The storage capacity can be further compressed than the embodiment of 4 degrees.

Sixth, in the case of the embodiment of FIG. 6, since the adama transform is applied to the voltage corresponding to the boundary frequency of the channel, for example, when the channel interval is 6 MHz, such as in Japanese-style television broadcasting, the local oscillation frequency of the electronic tuner. Even if the deviation of ± 1 MHz is allowed, the tolerance of the regenerative voltage obtained by the inverse conversion can be taken up to ± 2 MHz, which is advantageous in terms of the tolerance than the embodiments of FIGS.

By applying the reception frequency instead of the channel number of the embodiment shown in Fig. 7, the error problem between the actual reception frequency and the frequency display due to the deviation of the applied voltage and the reception frequency of the electronic tuner can be solved.

In the sixth embodiment, it is possible to discriminate channel numbers in a search tuning device which has been difficult in the past.

Claims (1)

In a television or radio receiver line apparatus having a variable-capacity diode as a tuning element, the digitized voltage corresponding to the frequency of each channel or the boundary frequency between the channels is subjected to adama conversion and storage, and the memory information is inversely converted to the above information. A tuning method characterized by reproducing a digitized voltage and using the regenerated voltage as a tuner tuning voltage or a channel display voltage.

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