KR20240092360A - Method and apparatus for processing semiconductor image - Google Patents

Abstract

A semiconductor image processing method and device are provided. The method identifies input components of a semiconductor pattern of an original input image corresponding to an object of application of a first process for semiconductor production, and transforms a transformation object including at least one of the input components from the original input image. It may include steps of generating an augmented input image and executing a neural model that estimates pattern deformation according to the first process based on the augmented input image.

Description

Semiconductor image processing method and device {METHOD AND APPARATUS FOR PROCESSING SEMICONDUCTOR IMAGE}

The following embodiments relate to a semiconductor image processing method and device.

The semiconductor manufacturing process may include various detailed processes for processing wafers. Additionally, various technologies exist to reduce errors in detailed processes. For example, optical proximity correction (OPC) may be used for the development process, and process proximity correction (PPC) may be used for the etch process. After the neural network is trained based on deep learning, it can perform inference suitable for the purpose by mapping input data and output data in a non-linear relationship to each other. The trained ability to create these mappings can be considered the learning ability of a neural network. Neural networks can be used in a variety of technological fields and can be combined with the semiconductor production process.

According to one embodiment, a semiconductor image processing method includes identifying input components of a semiconductor pattern of an original input image from an original input image corresponding to an application target of a first process for semiconductor production, and at least one of the input components from the original input image. It includes generating an augmented input image by deforming a deformation target including one, and executing a neural model that estimates pattern deformation according to the first process based on the augmented input image.

According to one embodiment, the training method includes input components of the semiconductor pattern of the original input image from the original input image corresponding to the application target of the first process for semiconductor production and the original output image corresponding to the application result of the first process. and identifying output components of the semiconductor pattern of the original output image, determining component pairs based on a matching relationship between the input components and the output components, including at least one of the component pairs from the original input image and the original output image. It includes generating an augmented input image and an augmented output image by removing the object of modification, and training a neural model to predict pattern modification according to the first process based on the augmented input image and the augmented output image.

According to one embodiment, a semiconductor image processing device includes a processor and a memory including instructions executable on the processor, and when the instructions are executed on the processor, the processor generates an original image corresponding to an object of application of the first process for semiconductor production. Identifying input components of a semiconductor pattern of the original input image from the input image, generating an augmented input image by modifying a transformation target including at least one of the input components from the original input image, and performing a first process based on the augmented input image. Run a neural model that estimates pattern deformation.

1 is a diagram illustrating a semiconductor production process.
Figure 2 is a diagram illustrating the difference in development results depending on the presence or absence of correction.
Figure 3 is a diagram illustrating forward simulation and backward correction in a semiconductor production process.
Figure 4 is a diagram illustrating the training process of a neural forward model and a neural backward model according to an embodiment.
Figure 5 is a diagram illustrating a process of augmenting and utilizing a semiconductor image according to an embodiment.
Figure 6 is a diagram illustrating an augmentation process through removal of semantic components, according to an embodiment.
Figure 7 is a diagram illustrating a training process of a neural model using augmented data, according to an embodiment.
Figure 8 is a diagram illustrating an inference process of a neural model using augmented data, according to an embodiment.
9 is a flow chart illustrating a semiconductor image processing method according to an embodiment.
Figure 10 is a flow chart illustrating a neural model training method according to an embodiment.
FIG. 11 is a block diagram illustrating the configuration of a semiconductor image processing device according to an embodiment.
FIG. 12 is a block diagram illustrating the configuration of an electronic device according to an embodiment.

Specific structural or functional descriptions of the embodiments are disclosed for illustrative purposes only and may be changed and implemented in various forms. Accordingly, the actual implementation form is not limited to the specific disclosed embodiments, and the scope of the present specification includes changes, equivalents, or substitutes included in the technical idea described in the embodiments.

Terms such as first or second may be used to describe various components, but these terms should be interpreted only for the purpose of distinguishing one component from another component. For example, a first component may be named a second component, and similarly, the second component may also be named a first component.

When a component is referred to as being “connected” to another component, it should be understood that it may be directly connected or connected to the other component, but that other components may exist in between.

Singular expressions include plural expressions unless the context clearly dictates otherwise. In this specification, terms such as “comprise” or “have” are intended to designate the presence of the described features, numbers, steps, operations, components, parts, or combinations thereof, and are intended to indicate the presence of one or more other features or numbers, It should be understood that this does not exclude in advance the possibility of the presence or addition of steps, operations, components, parts, or combinations thereof.

As used herein, phrases such as “at least one of A or B” and “at least one of A, B, or C” each refer to any one of the items listed together with the corresponding phrase, or all of them. Possible combinations may be included.

Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by a person of ordinary skill in the art. Terms as defined in commonly used dictionaries should be interpreted as having meanings consistent with the meanings they have in the context of the related technology, and unless clearly defined in this specification, should not be interpreted in an idealized or overly formal sense. No.

Hereinafter, embodiments will be described in detail with reference to the attached drawings. In the description with reference to the accompanying drawings, identical components will be assigned the same reference numerals regardless of the reference numerals, and overlapping descriptions thereof will be omitted.

1 is a diagram illustrating a semiconductor production process. Referring to FIG. 1, a semiconductor manufacturing process may include various detailed processes for processing a wafer 111. A wafer may be created in the first stage 110, and photoresist 121 may be applied on the wafer 111 in the second stage 120.

In the third stage 130, light 132 may be irradiated to the photoresist 121 through the mask 131. The exposed area of the photoresist 121 to the light 132 is determined according to the pattern of the mask 131, and as the exposed area of the photoresist 121 is removed by the light 132, the fourth stage 140 A pattern of the mask 131 may be formed on the photoresist 121 as shown. The third stage 130 and the fourth stage 140 may correspond to a development process. The exposed area of the wafer 111 may be determined according to the pattern formed on the photoresist 121, and etching may be performed on the exposed area of the wafer 111 in the fifth stage 150. As the exposed area of the wafer 111 is removed, a pattern of the photoresist 121 may be formed on the wafer 111. The photoresist 121 may be removed in the sixth stage 160. The fifth stage 150 and the sixth stage 160 may correspond to an etch process.

Figure 2 is a diagram illustrating the difference in development results depending on the presence or absence of correction. In the actual semiconductor production process, when the original mask 220 according to the desired pattern 210 is used, the phenomenon result 230 having a large error from the desired pattern 210 due to light diffraction, process error, etc. It may appear. Correction may be made to the circular mask 220 to reduce errors. Existing correction methods for the development process may include optical proximity correction (OPC), and existing correction methods for the etching process may include process proximity correction (PPC).

Figure 2 may correspond to an example of OPC for the development process. A corrected mask 240 may be determined according to OPC, and a development result 250 with a small error may be derived through the corrected mask 240. The existing correction method fragments the initial mask, simulates the process results according to the initial mask, and determines a new mask by referring to the simulation results and correcting the fragments of the initial mask according to a predetermined correction rule. and may include operations that simulate process results according to the new mask. According to the existing correction method, the final pattern can be derived through repetitive movement (displacement) using predetermined correction rules.

Figure 3 is a diagram illustrating forward simulation and backward correction in a semiconductor production process. Referring to FIG. 3, the second pattern image 320 may be determined through forward simulation of the development process for the first pattern image 310, and the etching process for the second pattern image 320 may be determined. The third pattern image 330 can be determined through forward simulation. Forward simulation can use a simulation model that considers various characteristics, conditions, and variables of the semiconductor process. For example, through forward simulation of the first pattern image 310, shape changes that may occur during the development process may be reflected in the first pattern image 310 to determine the second pattern image 320, and the second pattern image 320 may be determined. Through forward simulation of the image 320, shape changes that may occur during the etching process may be reflected in the second pattern image 320 to determine the third pattern image 330.

If an error occurs between the first pattern image 310 corresponding to the desired pattern and the third pattern image 330 corresponding to the result of the etching process, backward correction may be performed to reduce the error. Conventional backward corrections may include PPC for the etch process, and OPC for the development process. Existing correction methods can be performed through predetermined correction rules. The fifth pattern image 350 may be generated according to the PPC for the fourth pattern image 340. The fourth pattern image 340 may correspond to a desired pattern, and the fifth pattern image 350 may correspond to a correction result for deriving a desired pattern according to an etching process. The sixth pattern image 360 may be generated according to the OPC for the fifth pattern image 350. The sixth pattern image 360 may correspond to a correction result for deriving the fifth pattern image 350 according to the development process.

Figure 4 is a diagram illustrating the training process of a neural forward model and a neural backward model according to an embodiment. According to embodiments, a neural model may be used to estimate pattern deformation according to a target process for semiconductor production. The target process may include a development process and/or an etching process. Pattern deformation according to the target process may include deformation due to forward simulation of the target process and deformation due to backward correction of the target process. The neural model may include a neural forward model 410 that performs forward simulation of the target process and a neural backward model 420 that performs backward correction of the target process.

Referring to FIG. 4 , a neural forward model 410 and a neural backward model 420 may be trained based on output pattern images 401 and input pattern images 402. The input pattern images 402 may correspond to the application target of the target process, and the output pattern images 401 may correspond to the application result of the target process.

The neural forward model 410 and the neural backward model 420 may include a neural network. The neural network may include a deep neural network (DNN) including multiple layers. The deep neural network may include at least one of a fully connected network (FCN), a convolutional neural network (CNN), and a recurrent neural network (RNN). For example, at least some of the plurality of layers in the neural network may correspond to CNN, and other parts may correspond to FCN. CNN may be referred to as a convolutional layer, and FCN may be referred to as a fully connected layer.

After the neural network is trained based on deep learning, it can perform inference suitable for the training purpose by mapping input data and output data in a non-linear relationship to each other. Deep learning is a machine learning technique for solving problems such as image or voice recognition from big data sets. Deep learning can be understood as an optimization problem-solving process that finds the point where energy is minimized while training a neural network using prepared training data. Through supervised or unsupervised learning of deep learning, the structure of a neural network or weights corresponding to the model can be obtained, and through these weights, input data and output data can be mapped to each other. You can. If the width and depth of the neural network are large enough, it can have enough capacity to implement arbitrary functions. Optimal performance can be achieved when a neural network learns a sufficiently large amount of training data through an appropriate training process.

Below, the neural network can be expressed as being 'pre-trained', where 'pre' can refer to before the neural network 'starts'. When a neural network 'starts', it can mean that the neural network is ready for inference. For example, 'starting' a neural network may include the neural network being loaded into memory, or input data for inference being input to the neural network after the neural network is loaded into memory.

The neural forward model 410 may be trained in advance to perform forward simulation of the target process. The neural forward model 410 may be trained using the input pattern images 402 and output pattern images 401 to estimate output pattern images 401 from the input pattern images 402 . The neural backward model 420 may be trained in advance to perform backward correction of the target process. The neural backward model 420 may be trained using the input pattern images 402 and output pattern images 401 to estimate the input pattern images 402 from the output pattern images 401.

The estimation accuracy of the neural model may depend on the quality of training data, such as input pattern images 402 and output pattern images 401. Due to the nature of the semiconductor process, a large cost may be required to obtain the output pattern images 401 and the input pattern images 401. Data augmentation techniques can contribute to reducing the cost of acquiring training data. According to embodiments, a data augmentation technique that reduces the training cost of a neural model may be provided. At this time, the performance of the training result may vary depending on the augmentation method. According to embodiments, a neural model may be trained to have high estimation accuracy through an augmentation method suited to the characteristics of the semiconductor pattern image. Additionally, data augmentation techniques according to embodiments can be used to improve the estimation accuracy of the inference operation of the neural model.

FIG. 5 is a diagram exemplarily illustrating a process of augmenting and utilizing a semiconductor image, according to an embodiment. Referring to FIG. 5 , augmented images 520 may be generated according to data augmentation for the original image 510. The original image 510 may represent a semiconductor pattern, and data augmentation may be performed based on each semantic component of the semiconductor pattern. Semantic components can simply be called components. Components can be distinguished based on pixel values. A group of pixels that have non-zero pixel values and are connected to each other can form one component. Pixels belonging to the same component may be connected to each other, and pixels belonging to different components may not be connected to each other.

Augmentation work can be performed on a component basis. A transformation object including at least one of the components may be selected from the components of the original image 510, and transformation may be performed on the transformation object. The transformation may include at least some of removal of the transformation object, scaling of the transformation object, shifting of the transformation object, and rotation of the transformation object. However, the types of transformation are not limited to these. For example, augmented images 520 may be generated by removing different deformation objects. Parts of the original image 510 that are not subject to transformation may be maintained in the augmented images 520.

The original image 510 and the augmented images 520 can be used for training the neural model 531 or inferring the neural model 532. The neural models 531 and 532 may correspond to a neural forward model that estimates pattern deformation according to a forward process or a neural backward model that estimates pattern deformation according to backward correction. The neural model 531 and the neural model 532 may be the same or different from each other. More specifically, after training of the neural model 531 is completed based on the first augmented images resulting from augmentation of the first original image, the neural model 531 is based on the second augmented images resulting from augmentation of the second original image ( 532) inference can be performed. At this time, the neural model 531 and the neural model 532 may be identical to each other. Alternatively, the neural model 532 may be trained in a manner other than data augmentation and may perform an inference operation based on the second augmented images.

When the original image 510 and the augmented images 520 are used for training the neural model 531, the original image 510 and the augmented images 520 may include input pattern images and output pattern images. there is. If the neural model 531 corresponds to a neural forward model, the neural model 531 may be trained to estimate output pattern images from input pattern images. If the neural model 531 corresponds to a neural backward model, the neural model 531 may be trained to estimate input pattern images from output pattern images.

The neural model 531 can be trained through augmented input images and augmented output images according to corresponding augmentation tasks. An augmented input image may be generated through transformation of the transformation object of the input pattern image, and a transformation corresponding to the transformation of the transformation object of the input pattern image may be applied to the output pattern image to generate an augmented output image. Once the result image corresponding to the execution result of the neural model 531 according to the augmented input image is determined, the neural model 531 may be trained to reduce the difference between the result image and the augmented output image.

When the original image 510 and augmented images 520 are used for inference of the neural model 532, the original image 510 and augmented images 520 may correspond to input pattern images or output pattern images. You can. When the neural model 532 corresponds to a neural forward model, the original image 510 and the augmented images 520 may correspond to input pattern images, and the neural model 532 creates an output pattern from the input pattern images. Images can be estimated. When the neural model 532 corresponds to a neural backward model, the original image 510 and the augmented images 520 may correspond to output pattern images, and the neural model 532 receives input from the output pattern images. Pattern images can be estimated.

If the neural model 532 corresponds to a neural forward model, the original image 510 may correspond to an input pattern image. Augmented images 520 may be generated through transformation of the object of transformation of the original image 510. The neural model 532 may be executed with the original image 510 and the augmented images 520, and resultant images corresponding to the execution results may be determined. A pattern corresponding to the result of the forward process can be estimated through a combination of the resulting images. If the neural model 532 corresponds to a neural backward model, the original image 510 may correspond to an output pattern image. When augmented images 520 are generated through an augmentation operation and the neural model 532 is executed with the original image 510 and the augmented images 520, result images corresponding to the execution results may be determined. A pattern corresponding to the result of backward correction can be estimated through a combination of the resulting images. Ensemble weights can be used to combine the resulting images.

Figure 6 is a diagram illustrating an augmentation process through removal of semantic components, according to an embodiment. Referring to FIG. 6 , the original image 620 may be determined according to the imaging process for the design pattern 610. The design pattern 610 may represent a three-dimensional design structure of an input pattern corresponding to an application target of the target process or an output pattern corresponding to the result of applying the target process. The design pattern 610 can express a three-dimensional design structure through detailed polygonal structures. Imaging the design pattern 610 may correspond to the task of rendering structural data about a 3D design into image data.

The original image 620 may include components corresponding to a semiconductor pattern. Components of the original image 620 may be identified through a component identification operation for the original image 620. Component identification work may be performed based on pixel values of pixels of the original image 620. Pixels with pixel values other than 0 may be selected from the original image 620, and pixels connected to each other among the selected pixels may be identified as one component. A label may be assigned to each component depending on its location in the original image 620. Figure 6 shows an example in which labels 1 to 4 are assigned to components. The component with label k can be called the kth component.

Augmented images 631 and 632 may be generated through an augmentation operation on the original image 620. The augmentation operation may include selection of a transformation object and a transformation operation on the transformation object. Each transformation target may include at least one component. For example, the first component may correspond to the first modification target, the second component may correspond to the second modification target, and the third component may correspond to the third modification target. Additionally, the first component and the second component may correspond to the fourth object of transformation, and the third component and the fourth component may correspond to the fifth object of transformation.

The transformation operation may include at least some of removal of the transformation object, scaling of the transformation object, shifting of the transformation object, and rotation of the transformation object. However, the types of transformation work are not limited to these. The same transformation operation may be performed on different transformation objects, different transformation operations may be performed on different transformation objects, or different transformation operations may be performed on the same transformation object. The augmented image 631 may represent the result of an augmentation operation corresponding to the removal of the second modification object, and the augmented image 632 may represent the result of an augmentation operation corresponding to the removal of the third modification object.

Figure 7 is a diagram illustrating a training process of a neural model using augmented data, according to an embodiment. Referring to FIG. 7, augmented input images 712 and 713 may be generated according to augmentation of the original input image 711, and the original input image 711 and/or the augmented input images 712 and 713 may be generated. Based on this, the neural model 700 can be executed. The original input image 711 and the augmented input images 712 and 713 may be sequentially input to the neural model 700, and execution result images 721 to 723 are generated according to the execution of the neural model 700. It can be. The time axis on the left may indicate that training occurs sequentially. When parallel execution of the neural model 700 is supported, execution result images 721, 722, 723) can be generated in parallel.

When the original output image 731 corresponding to the original input image 711 is provided as the original image, augmented output images 732 and 733 may be generated according to augmentation of the original output image 731. The augmentation operation used to generate the augmented input images 712 and 713 may be equally applied to the original output image 731, and as a result, augmented output images 732 and 733 may be generated. For example, the augmented input image 712 can be generated by removing the second input component of the original input image 711, and the augmented input image 712 can be created by removing the third input component of the original input image 711. 713) can be created. As a corresponding augmentation operation, the augmented output image 732 may be generated through removal of the second output component of the original output image 731, and the augmented output image 732 may be generated through removal of the third output component of the original output image 731. (733) can be generated. To distinguish components, components of the input image can be called input components, and components of the output image can be called output components.

The original output image 731 and the augmented output images 732 and 733 can be used as ground truth (GT). The neural model 700 can be trained so that the difference between the execution result and GT becomes smaller. The neural model 700 may be trained to reduce the difference between the execution result image 721 and the original output image 731, and may be trained to reduce the difference between the execution result image 722 and the augmented output image 732. and can be trained so that the difference between the execution result image 723 and the augmented output image 733 becomes smaller.

Multiple training sessions can be performed through data augmentation for one original image set (e.g., original input image 711, original output image 731), and if multiple original image sets are provided, more training can be performed. It can be done. Through this, the difficulty in securing training data due to the acquisition cost of semiconductor images can be greatly resolved.

FIG. 7 may show an example in which the original input image 711 corresponds to the input pattern image and the original output image 731 corresponds to the output pattern image. In this example, the neural model 700 may be trained as a neural forward model. In contrast, the original input image 711 may correspond to the output pattern image and the original output image 731 may correspond to the input pattern image, and in this case, the neural model 700 may be trained as a neural backward model.

Figure 8 is a diagram illustrating an inference process of a neural model using augmented data, according to an embodiment. Referring to FIG. 8, augmented input images 812 and 813 may be generated according to augmentation of the original input image 811, and the original input image 811 and/or the augmented input images 812 and 813 may be generated. Based on this, the neural model 800 can be executed. The original input image 811 and the augmented input images 812 and 813 may be sequentially input to the neural model 800, and execution result images 821 to 823 are generated according to the execution of the neural model 800. It can be. The time axis on the left can indicate that inference is done sequentially. When parallel execution of the neural model 800 is supported, execution result images 821, 822, 823) can be generated in parallel.

The estimated result image 830 may be determined through a combination of the execution result images 821, 822, and 823. The execution result images 821, 822, and 823 may be combined based on a certain weight. According to one embodiment, the neural model 800 may correspond to an ensemble model, and ensemble weights may be used in a combination of the execution result images 821, 822, and 823. Through data augmentation, the accuracy of inference can be improved by utilizing data from various perspectives.

FIG. 7 may show an example in which the neural model 800 corresponds to a neural forward model. In this example, the original input image 811 may correspond to the input pattern image and the estimation result image 830 may correspond to the output pattern image. In contrast, the neural model 800 may correspond to a neural backward model. In this case, the original input image 811 may correspond to the output pattern image and the estimation result image 830 may correspond to the input pattern image.

9 is a flow chart illustrating a semiconductor image processing method according to an embodiment. Referring to FIG. 9, the semiconductor image processing device identifies input components of the semiconductor pattern of the original input image from the original input image corresponding to the subject to which the first process for semiconductor production is applied in step 910, and performs step 920. In step 930, an augmented input image is generated by modifying a deformation target including at least one of the input components, and a neural model is executed to estimate the pattern deformation according to the first process based on the augmented input image in step 930. do.

Step 920 may include generating an augmented input image by removing the deformation target.

The transformation of the transformation object may include at least some of removal of the transformation object, scaling of the transformation object, shifting of the transformation object, and rotation of the transformation object.

Parts of the original input image that are not subject to transformation may be maintained in the augmented input image.

Step 910 may include identifying one group of pixels that have non-zero pixel values and are connected to each other in the original input image as one of the input components.

The semiconductor image processing device may further perform a step of training the neural model according to the execution result of the neural model.

The semiconductor image processing device includes identifying output components of a semiconductor pattern of the original output image from the original output image corresponding to the result of applying the first process, and performing a transformation corresponding to the transformation of the transformation target of the original input image into the original output image. A step of generating an augmented output image by applying it to the output components of can be further performed. Step 930 may include training a neural model according to the difference between the result image corresponding to the execution result of the neural model and the augmented output image.

The semiconductor image processing device includes executing a neural model based on the original input image, and combining the execution result of the neural model based on the original input image and the execution result of the neural model based on the augmented input image to transform the pattern according to the first process. A further step of estimating can be performed.

The first process may include at least one of a developing process and an etching process.

In addition, the descriptions of FIGS. 1 to 8 and 10 to 12 may be applied to the semiconductor image processing method of FIG. 9 .

Figure 10 is a flow chart illustrating a neural model training method according to an embodiment. Referring to FIG. 10, in step 1010, the semiconductor image processing apparatus generates an original input image from an original input image corresponding to an object of application of the first process for semiconductor production and an original output image corresponding to the application result of the first process. Identify the input components of the semiconductor pattern and the output components of the semiconductor pattern of the original output image, determine component pairs based on the matching relationship between the input components and output components in step 1020, and determine the component pairs in step 1030. An augmented input image and an augmented output image are generated by removing a transformation object including at least one of the component pairs from the original input image and the original output image, and a first process is performed based on the augmented input image and the augmented output image in step 1040. Train a neural model that predicts pattern deformation according to .

In addition, the descriptions of FIGS. 1 to 9, 11, and 12 may be applied to the semiconductor image processing method of FIG. 10.

FIG. 11 is a block diagram illustrating the configuration of a semiconductor image processing device according to an embodiment. Referring to FIG. 11 , the semiconductor image processing device 1100 includes a processor 1110 and a memory 1120. The memory 1120 is connected to the processor 1110 and can store instructions executable by the processor 1110, data to be operated by the processor 1110, or data processed by the processor 1110. Memory 1120 may include non-transitory computer-readable media, such as high-speed random access memory and/or non-volatile computer-readable storage media (e.g., one or more disk storage devices, flash memory devices, or other non-volatile solid-state memory devices). It can be included.

The processor 1110 may execute instructions to perform the operations of FIGS. 1 to 10 and 12 . For example, processor 1110

In addition, the descriptions of FIGS. 1 to 10 and 12 may be applied to the semiconductor image processing device 1110.

FIG. 12 is a block diagram illustrating the configuration of an electronic device according to an embodiment. Referring to FIG. 12, the electronic device 1200 includes a processor 1210, a memory 1220, a camera 1230, a storage device 1240, an input device 1250, an output device 1260, and a network interface 1270. may include, and they may communicate with each other through the communication bus 1280. For example, electronic device 1200 may include mobile devices such as mobile phones, smart phones, PDAs, netbooks, tablet computers, laptop computers, etc., wearable devices such as smart watches, smart bands, smart glasses, etc., computing devices such as desktops, servers, etc. , may be implemented as at least part of a vehicle such as home appliances such as televisions, smart televisions, refrigerators, etc., security devices such as door locks, autonomous vehicles, smart vehicles, etc. The electronic device 1200 may structurally and/or functionally include the semiconductor image processing device 1110 of FIG. 11 .

The processor 1210 executes functions and instructions for execution within the electronic device 1200. For example, the processor 1210 may process instructions stored in the memory 1220 or the storage device 1240. The processor 1210 may perform one or more operations described with reference to FIGS. 1 to 11 . Memory 1220 may include a computer-readable storage medium or computer-readable storage device. The memory 1220 may store instructions for execution by the processor 1210 and may store related information while software and/or applications are executed by the electronic device 1200.

Camera 1230 may take photos and/or videos. Storage device 1240 includes a computer-readable storage medium or computer-readable storage device. The storage device 1240 can store a larger amount of information than the memory 1220 and store the information for a long period of time. For example, storage device 1240 may include a magnetic hard disk, optical disk, flash memory, floppy disk, or other forms of non-volatile memory known in the art.

The input device 1250 may receive input from the user through traditional input methods such as a keyboard and mouse, and new input methods such as touch input, voice input, and image input. For example, input device 1250 may include a keyboard, mouse, touch screen, microphone, or any other device capable of detecting input from a user and transmitting the detected input to electronic device 1200. The output device 1260 may provide the output of the electronic device 1200 to the user through visual, auditory, or tactile channels. Output device 1260 may include, for example, a display, touch screen, speaker, vibration generating device, or any other device that can provide output to a user. The network interface 1270 can communicate with external devices through a wired or wireless network.

The embodiments described above may be implemented with hardware components, software components, and/or a combination of hardware components and software components. For example, the devices, methods, and components described in the embodiments may include, for example, a processor, a controller, an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, and a field programmable gate (FPGA). It may be implemented using a general-purpose computer or a special-purpose computer, such as an array, programmable logic unit (PLU), microprocessor, or any other device capable of executing and responding to instructions. The processing device may execute an operating system (OS) and software applications running on the operating system. Additionally, a processing device may access, store, manipulate, process, and generate data in response to the execution of software. For ease of understanding, a single processing device may be described as being used; however, those skilled in the art will understand that a processing device includes multiple processing elements and/or multiple types of processing elements. It can be seen that it may include. For example, a processing device may include multiple processors or one processor and one controller. Additionally, other processing configurations, such as parallel processors, are possible.

Software may include a computer program, code, instructions, or a combination of one or more of these, which may configure a processing unit to operate as desired, or may be processed independently or collectively. You can command the device. Software and/or data may be used on any type of machine, component, physical device, virtual equipment, computer storage medium or device to be interpreted by or to provide instructions or data to a processing device. , or may be permanently or temporarily embodied in a transmitted signal wave. Software may be distributed over networked computer systems and stored or executed in a distributed manner. Software and data may be stored on a computer-readable recording medium.

The method according to the embodiment may be implemented in the form of program instructions that can be executed through various computer means and recorded on a computer-readable medium. A computer-readable medium may store program instructions, data files, data structures, etc., singly or in combination, and the program instructions recorded on the medium may be specially designed and constructed for the embodiment or may be known and available to those skilled in the art of computer software. there is. Examples of computer-readable recording media include magnetic media such as hard disks, floppy disks, and magnetic tapes, optical media such as CD-ROMs and DVDs, and magnetic media such as floptical disks. -Includes optical media (magneto-optical media) and hardware devices specifically configured to store and execute program instructions, such as ROM, RAM, flash memory, etc. Examples of program instructions include machine language code, such as that produced by a compiler, as well as high-level language code that can be executed by a computer using an interpreter, etc.

The hardware devices described above may be configured to operate as one or multiple software modules to perform the operations of the embodiments, and vice versa.

As described above, although the embodiments have been described with limited drawings, those skilled in the art can apply various technical modifications and variations based on this. For example, the described techniques are performed in a different order than the described method, and/or components of the described system, structure, device, circuit, etc. are combined or combined in a different form than the described method, or other components are used. Alternatively, appropriate results may be achieved even if substituted or substituted by an equivalent.

Therefore, other implementations, other embodiments, and equivalents of the claims also fall within the scope of the claims described below.

Claims (20)

Identifying input components of a semiconductor pattern of the original input image from the original input image corresponding to an object to which a first process for semiconductor production is applied;
generating an augmented input image by transforming a transformation target including at least one of the input components from the original input image; and
Executing a neural model to estimate pattern deformation according to the first process based on the augmented input image
A semiconductor image processing method comprising: According to paragraph 1,
The step of generating the augmented input image is
Comprising the step of generating the augmented input image by removing the deformation target,
Semiconductor image processing method. According to paragraph 1,
The transformation of the object of transformation is
Including at least some of removal of the object of transformation, scale of the object of transformation, shift of the object of transformation, and rotation of the object of transformation,
Semiconductor image processing method. According to paragraph 1,
The portion of the original input image that does not correspond to the transformation target is maintained in the augmented input image,
Semiconductor image processing method. According to paragraph 1,
The step of identifying the input components is
Comprising the step of identifying one group of pixels connected to each other with a non-zero pixel value in the original input image as one input component of the input components,
Semiconductor image processing method. According to paragraph 1,
Training the neural model according to the execution results of the neural model
A semiconductor image processing method further comprising: According to clause 6,
The semiconductor image processing method is
identifying output components of a semiconductor pattern of the original output image from the original output image corresponding to a result of applying the first process; and
Generating an augmented output image by applying a transformation corresponding to the transformation of the transformation target of the original input image to the output components of the original output image.
It further includes,
The step of training the neural model is
Comprising the step of training the neural model according to the difference between the result image corresponding to the execution result of the neural model and the augmented output image,
Semiconductor image processing method. According to paragraph 1,
The semiconductor image processing method is
executing the neural model based on the original input image; and
Estimating pattern deformation according to the first process by combining the execution result of the neural model based on the original input image and the execution result of the neural model based on the augmented input image.
A semiconductor image processing method further comprising: According to paragraph 1,
The first process is
Including at least one of a developing process and an etching process,
Semiconductor image processing method. From the original input image corresponding to the subject of application of the first process for semiconductor production and the original output image corresponding to the application result of the first process, the input components of the semiconductor pattern of the original input image and the semiconductor of the original output image identifying output components of the pattern;
determining component pairs based on matching relationships between the input components and the output components;
generating an augmented input image and an augmented output image by removing a transformation target including at least one of the component pairs from the original input image and the original output image; and
Training a neural model to predict pattern deformation according to the first process based on the augmented input image and the augmented output image.
Training method including. A computer program combined with hardware and stored in a computer-readable recording medium to execute the method of any one of claims 1 to 10. processor; and
Memory containing instructions executable by the processor
Including,
When the instructions are executed on the processor, the processor
Identifying input components of the semiconductor pattern of the original input image from the original input image corresponding to the subject of the first process for semiconductor production,
Generating an augmented input image by transforming a transformation target including at least one of the input components from the original input image,
Executing a neural model that estimates pattern deformation according to the first process based on the augmented input image,
Semiconductor image processing device. According to clause 12,
The processor, in order to generate the augmented input image,
Generating the augmented input image by removing the deformation target,
Semiconductor image processing device. According to clause 12,
The transformation of the object of transformation is
Including at least some of removal of the object of transformation, scale of the object of transformation, shift of the object of transformation, and rotation of the object of transformation,
Semiconductor image processing device. According to clause 12,
The portion of the original input image that does not correspond to the transformation target is maintained in the augmented input image,
Semiconductor image processing device. According to clause 12,
The processor, to identify the input components,
Identifying one group of pixels connected to each other with a non-zero pixel value in the original input image as one input component of the input components,
Semiconductor image processing device. According to clause 12,
The processor is
Training the neural model according to the execution results of the neural model,
Semiconductor image processing device. According to clause 17,
The processor is
Identifying output components of a semiconductor pattern of the original output image from the original output image corresponding to a result of applying the first process,
Applying a transformation corresponding to the transformation of the transformation target of the original input image to the output components of the original output image to generate an augmented output image,
Training the neural model according to the difference between the result image corresponding to the execution result of the neural model and the augmented output image,
Semiconductor image processing device. According to clause 12,
The processor is
Executing the neural model based on the original input image,
Estimating pattern deformation according to the first process by combining the execution result of the neural model based on the original input image and the execution result of the neural model based on the augmented input image,
Semiconductor image processing device. According to clause 12,
The first process is
Including at least one of a developing process and an etching process,
Semiconductor image processing device.

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