KR20240043638A - Micro light emitting diode display and method of manufacturing the same - Google Patents

Abstract

A display according to an embodiment of the present disclosure is a micro LED (light emitting diode) display, comprising: a partition forming a pixel area, a micro LED disposed in the pixel area, a light blocking unit defining an open area of the pixel area, It may include a quantum dot color conversion layer formed in the pixel area, and a color filter layer disposed to correspond to the quantum dot color conversion layer. The area of the pixel area may be larger than the open area. A first gap between adjacent pixel areas in a first direction may be narrower than a second gap between pixels adjacent to a second direction perpendicular to the first direction. In addition, various embodiments are possible.

Description

Micro LED display and manufacturing method thereof {MICRO LIGHT EMITTING DIODE DISPLAY AND METHOD OF MANUFACTURING THE SAME}

Embodiments of the present disclosure relate to a micro light emitting diode (micro LED) display and a method of manufacturing the same.

Displays in electronic devices are a core technology of the information and communication era, and are developing to become thinner, lighter, more portable, and have higher performance. For example, micro LED (micro light emitting diode) displays are a next-generation technology and are being actively developed because they have superior performance and durability compared to existing display methods. Micro LED (μLED) displays can display images by arranging multiple pixels in a matrix form.

Micro LED (μLED) displays use micro LEDs (μLEDs) with a size of 100 μm or less, allowing red, green, and blue pixels to self-emit. Micro LED (μLED) displays display images using self-luminous methods, so unlike LCDs (liquid crystal displays), they do not require a back light unit and are therefore highly efficient. By using inorganic materials, OLEDs (organic light emitting diodes) ), it is possible to implement a display with high brightness while ensuring high reliability. In addition, micro LED (μLED) displays have a thinner thickness than LCD and OLED, and have flexible characteristics, so they can be applied to flexible electronic devices.

The contents described above are provided only as background information to help understand the embodiments of the present disclosure. No decision has been made, and no claim has been made, as to whether any of the above may apply as prior art in connection with this disclosure.

When manufacturing a micro LED (μLED) display, multiple micro LEDs (μLED) must be precisely aligned and transferred from a wafer to a display substrate. Because multiple micro LEDs must be transferred quickly and without error, there is a burden of lowering process yield and increasing manufacturing costs. In addition, the materials of blue, green, and red micro LED elements are different, and the PWM (Pulse Width Modulation) control circuit that drives each color of LED elements is complex. , there is a burden of decreased process yield of TFT (thin film transistor) substrates and increased manufacturing costs. In order to improve problems caused by manufacturing micro LED (μLED) displays, blue LED is applied as a single light source, and red (red) LED is used using quantum dots (QD) on the top of the blue LED. Micro LED display that can express red, green, and blue colors by arranging green and blue color converter layers (e.g., QD color conversion layer) is being developed.

Photolithography can be used to manufacture color conversion substrates for micro LED displays. By forming a partition structure that separates pixels and performing an exposure process using a mask, quantum dot (QD) ink in red, green, and blue colors can be sequentially coated on the color conversion substrate. . Through this, color conversion layers of red, green, and blue can be formed on the color conversion substrate. This method of manufacturing a color conversion substrate may increase manufacturing costs due to the large amount of quantum dot (QD) ink consumed during the exposure process.

Inkjet printing can be used to manufacture color conversion substrates for micro LED displays. Inkjet printing is a method of ejecting small volumes of ink droplets through a plurality of arranged nozzles. The ejection of each droplet is controlled in a drop-on-demand manner according to the pattern, resulting in a material utilization rate of virtually 100%. can be obtained. By arranging multiple inkjet heads, large displays can be manufactured quickly. However, it is difficult to achieve high display quality due to high instability due to the intermittent ink ejection method, and excessive maintenance is required to remove defective nozzles, which may reduce the final material usage rate. In addition, maintenance costs for key parts of manufacturing equipment may increase because multiple inkjet heads must be frequently replaced to ensure good pattern quality.

One embodiment of the present disclosure can provide a micro LED display using a blue LED as a single light source and a method of manufacturing the same. The display (e.g., micro LED display) according to an embodiment of the present disclosure uses a blue LED as a single light source, enabling PAM (pulse amplitude modulation) control, so the driving circuit is simple, and the deterioration of all micro LEDs is reduced. The sameness can be advantageous in controlling image quality. Color conversion using quantum dots (QDs) can obtain pure wavelengths, so the range of colors that can be expressed is wide, and manufacturing efficiency can be increased by using blue LEDs with different wavelengths.

One embodiment of the present disclosure can provide a micro LED display that can secure high color conversion efficiency and high reliability by forming a quantum dot color converter pattern using an electro hydrodynamic (EHD) spinning process, and a method of manufacturing the same. .

One embodiment of the present disclosure can provide a micro LED display including a barrier structure of a quantum dot (QD) color conversion layer that is suitable for an EHD spinning process and is easy to manufacture, and a method of manufacturing the same.

One embodiment of the present disclosure can provide a micro LED display including a partition wall structure of a color conversion layer that can guide a stream of quantum dot (QD) ink to the center of a pixel during an EHD spinning process, and a method of manufacturing the same.

One embodiment of the present disclosure can provide a micro LED display in which a metal layer is formed on the partition wall of the color conversion layer to be suitable for the EHD spinning process and a method of manufacturing the same.

The technical challenges sought to be achieved in this document are not limited to the technical challenges mentioned above, and other technical challenges not mentioned can be clearly understood by those skilled in the art in the technical field to which this document belongs from the description below. There will be.

A display according to an embodiment of the present disclosure is a micro LED (light emitting diode) display, comprising: a partition forming a pixel area, a micro LED disposed in the pixel area, a light blocking unit defining an open area of the pixel area, It may include a quantum dot color conversion layer formed in the pixel area, and a color filter layer disposed to correspond to the quantum dot color conversion layer. The area of the pixel area may be larger than the open area. A first gap between adjacent pixel areas in a first direction may be narrower than a second gap between pixels adjacent to a second direction perpendicular to the first direction.

A method of manufacturing a display according to an embodiment of the present disclosure includes forming a partition wall defining a pixel area on a substrate and defining an open area of the pixel area. A light blocking portion is formed, a quantum dot color conversion layer is formed in the pixel area, a color filter layer is formed to correspond to the quantum dot color conversion layer, the area of the pixel area is formed to be wider than the open area, and an area adjacent to the first direction is formed. A first gap between pixel areas may be narrower than a second gap between adjacent pixels in a second direction perpendicular to the first direction.

In the display and its manufacturing method according to an embodiment of the present disclosure, when forming the quantum dot color conversion layer of the display by EHD spinning, the partition wall can be formed so that the quantum dot ink does not substantially remain on the upper surface of the partition wall. Through this, it is possible to ensure smooth bonding of the light source substrate and the quantum dot color conversion substrate.

In the display and its manufacturing method according to an embodiment of the present disclosure, light leakage between adjacent first pixels and second pixels in a first direction (e.g., y-axis direction, vertical direction) can be prevented.

The display and its manufacturing method according to an embodiment of the present disclosure can form a barrier rib such that quantum dot ink is ejected from the center of the pixel so that the quantum dot ink does not substantially remain on the upper surface of the barrier rib. Through this, the quality of the product can be improved by ensuring smooth bonding of the light source substrate and the quantum dot color conversion substrate.

The micro LED display and its manufacturing method according to an embodiment of the present disclosure can reduce the manufacturing cost of the product.

The effects that can be obtained from the present disclosure are not limited to the effects mentioned above, and other effects not mentioned can be clearly understood by those skilled in the art from the description below. will be.

In relation to the description of the drawings, identical or similar reference numerals may be used for identical or similar components.
1 is a block diagram of an electronic device in a network environment according to an embodiment of the present disclosure.
FIG. 2A is a perspective view of the front of an electronic device according to an embodiment of the present disclosure.
FIG. 2B is a perspective view of the rear of an electronic device according to an embodiment of the present disclosure.
FIG. 3A is a diagram illustrating a display panel according to an embodiment of the present disclosure.
FIG. 3B is a cross-sectional view of the display panel shown in FIG. 3A.
FIG. 3C is a diagram showing the arrangement of pixels arranged on a display panel.
Figure 4 is a block diagram of a display module according to an embodiment of the present disclosure.
Figure 5 is a diagram showing a micro LED display according to an embodiment of the present disclosure.
Figures 6 to 8 are diagrams showing a method of manufacturing the micro LED display shown in Figure 5.
Figure 9 is a diagram showing the shape of a partition formed on a quantum dot color conversion substrate according to an embodiment of the present disclosure.
Figure 10 is a diagram showing the shape of a partition formed on a quantum dot color conversion substrate according to an embodiment of the present disclosure.
Figure 11 is a diagram showing the shape of a partition formed on a quantum dot color conversion substrate according to an embodiment of the present disclosure.
Figure 12 is a diagram showing the shape of a partition formed on a quantum dot color conversion substrate according to an embodiment of the present disclosure.
Figure 13a is a diagram showing the shape of a partition formed on a quantum dot color conversion substrate according to an embodiment of the present disclosure.
Figure 13b is a diagram showing the shape of a partition formed on a quantum dot color conversion substrate according to an embodiment of the present disclosure.
FIG. 13C is a diagram showing the shape of a partition formed on a quantum dot color conversion substrate according to an embodiment of the present disclosure.
FIG. 13D is a diagram showing the shape of a partition formed on a quantum dot color conversion substrate according to an embodiment of the present disclosure.
Figure 13e is a diagram showing the shape of a partition formed on a quantum dot color conversion substrate according to an embodiment of the present disclosure.
Figure 13f is a diagram showing the shape of a partition formed on a quantum dot color conversion substrate according to an embodiment of the present disclosure.
Figure 14 is a plan view showing a partition formed on a quantum dot color conversion substrate and a conductive layer formed on the upper part of the partition according to an embodiment of the present disclosure.
FIG. 15 is a cross-sectional view taken along lines A1-A2 and B1-B2 shown in FIG. 14.
Figure 16 is a plan view showing a partition formed on a quantum dot color conversion substrate and a conductive layer formed on the upper part of the partition according to an embodiment of the present disclosure.
FIG. 17 is a cross-sectional view taken along lines A1-A2 and B1-B2 shown in FIG. 16.
Figure 18 is a plan view showing a partition formed on a quantum dot color conversion substrate and a conductive layer formed on the upper part of the partition according to an embodiment of the present disclosure.
Figure 19 is a plan view showing a partition formed on a quantum dot color conversion substrate and a conductive layer formed on the upper part of the partition according to an embodiment of the present disclosure.
FIG. 20 is a cross-sectional view taken along lines A1-A2 and B1-B2 shown in FIG. 19.
Figures 21 and 22 are diagrams showing a method of forming a quantum dot color conversion layer.
It should be noted that throughout the drawings, the same reference numbers are used to depict identical or similar elements, features and structures.

The following description, with reference to the accompanying drawings, is provided to facilitate a comprehensive understanding of various embodiments of the disclosure as defined by the claims and their equivalents. It contains various specific details to aid understanding, but should be regarded as illustrative only. Accordingly, those skilled in the art will recognize that various changes and modifications may be made to the various embodiments described herein without departing from the scope and spirit of the present disclosure. Additionally, for clarity and conciseness, descriptions of well-known functions and configurations may be omitted.

The terms and words used in the following description and claims are not limited to their meanings in the literature, but are merely used by the applicant to enable a clear and consistent understanding of this document. Accordingly, it should be clear to those skilled in the art that the following description of various embodiments of the present document is provided for illustrative purposes only and not to limit the present document as defined by the appended claims and their equivalents.

The singular form should be understood to include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to “a component surface” may include reference to one or more of such surfaces.

FIG. 1 is a block diagram of an electronic device 101 in a network environment 100, according to various embodiments.

Referring to FIG. 1, in the network environment 100, the electronic device 101 communicates with the electronic device 102 through a first network 198 (e.g., a short-range wireless communication network) or a second network 199. It is possible to communicate with the electronic device 104 or the server 108 through (e.g., a long-distance wireless communication network). According to one embodiment, the electronic device 101 may communicate with the electronic device 104 through the server 108. According to one embodiment, the electronic device 101 includes a processor 120, a memory 130, an input module 150, an audio output module 155, a display module 160, an audio module 170, and a sensor module ( 176), interface 177, connection terminal 178, haptic module 179, camera module 180, power management module 188, battery 189, communication module 190, subscriber identification module 196 , or may include an antenna module 197. In some embodiments, at least one of these components (eg, the connection terminal 178) may be omitted or one or more other components may be added to the electronic device 101. In some embodiments, some of these components (e.g., sensor module 176, camera module 180, or antenna module 197) are integrated into one component (e.g., display module 160). It can be.

The processor 120, for example, executes software (e.g., program 140) to operate at least one other component (e.g., hardware or software component) of the electronic device 101 connected to the processor 120. It can be controlled and various data processing or calculations can be performed. According to one embodiment, as at least part of data processing or computation, processor 120 stores commands or data received from another component (e.g., sensor module 176 or communication module 190) in volatile memory 132. The commands or data stored in the volatile memory 132 can be processed, and the resulting data can be stored in the non-volatile memory 134. According to one embodiment, the processor 120 includes the main processor 121 (e.g., a central processing unit or an application processor) or an auxiliary processor 123 that can operate independently or together (e.g., a graphics processing unit, a neural network processing unit ( It may include a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor). For example, if the electronic device 101 includes a main processor 121 and a secondary processor 123, the secondary processor 123 may be set to use lower power than the main processor 121 or be specialized for a designated function. You can. The auxiliary processor 123 may be implemented separately from the main processor 121 or as part of it.

The auxiliary processor 123 may, for example, act on behalf of the main processor 121 while the main processor 121 is in an inactive (e.g., sleep) state, or while the main processor 121 is in an active (e.g., application execution) state. ), together with the main processor 121, at least one of the components of the electronic device 101 (e.g., the display module 160, the sensor module 176, or the communication module 190) At least some of the functions or states related to can be controlled. According to one embodiment, coprocessor 123 (e.g., image signal processor or communication processor) may be implemented as part of another functionally related component (e.g., camera module 180 or communication module 190). there is. According to one embodiment, the auxiliary processor 123 (eg, neural network processing device) may include a hardware structure specialized for processing artificial intelligence models. Artificial intelligence models can be created through machine learning. For example, such learning may be performed in the electronic device 101 itself, where artificial intelligence is performed, or may be performed through a separate server (e.g., server 108). Learning algorithms may include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but It is not limited. An artificial intelligence model may include multiple artificial neural network layers. Artificial neural networks include deep neural network (DNN), convolutional neural network (CNN), recurrent neural network (RNN), restricted boltzmann machine (RBM), belief deep network (DBN), bidirectional recurrent deep neural network (BRDNN), It may be one of deep Q-networks or a combination of two or more of the above, but is not limited to the examples described above. In addition to hardware structures, artificial intelligence models may additionally or alternatively include software structures.

The memory 130 may store various data used by at least one component (eg, the processor 120 or the sensor module 176) of the electronic device 101. Data may include, for example, input data or output data for software (e.g., program 140) and instructions related thereto. Memory 130 may include volatile memory 132 or non-volatile memory 134.

The program 140 may be stored as software in the memory 130 and may include, for example, an operating system 142, middleware 144, or application 146.

The input module 150 may receive commands or data to be used in a component of the electronic device 101 (e.g., the processor 120) from outside the electronic device 101 (e.g., a user). The input module 150 may include, for example, a microphone, mouse, keyboard, keys (eg, buttons), or digital pen (eg, stylus pen).

The sound output module 155 may output sound signals to the outside of the electronic device 101. The sound output module 155 may include, for example, a speaker or a receiver. Speakers can be used for general purposes such as multimedia playback or recording playback. The receiver can be used to receive incoming calls. According to one embodiment, the receiver may be implemented separately from the speaker or as part of it.

The display module 160 can visually provide information to the outside of the electronic device 101 (eg, a user). The display module 160 may include, for example, a display, a hologram device, or a projector, and a control circuit for controlling the device. According to one embodiment, the display module 160 may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of force generated by the touch.

The audio module 170 can convert sound into an electrical signal or, conversely, convert an electrical signal into sound. According to one embodiment, the audio module 170 acquires sound through the input module 150, the sound output module 155, or an external electronic device (e.g., directly or wirelessly connected to the electronic device 101). Sound may be output through the electronic device 102 (e.g., speaker or headphone).

The sensor module 176 detects the operating state (e.g., power or temperature) of the electronic device 101 or the external environmental state (e.g., user state) and generates an electrical signal or data value corresponding to the detected state. can do. According to one embodiment, the sensor module 176 includes, for example, a gesture sensor, a gyro sensor, an air pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, It may include a temperature sensor, humidity sensor, or light sensor.

The interface 177 may support one or more designated protocols that can be used to connect the electronic device 101 directly or wirelessly with an external electronic device (eg, the electronic device 102). According to one embodiment, the interface 177 may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

The connection terminal 178 may include a connector through which the electronic device 101 can be physically connected to an external electronic device (eg, the electronic device 102). According to one embodiment, the connection terminal 178 may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (eg, a headphone connector).

The haptic module 179 can convert electrical signals into mechanical stimulation (e.g., vibration or movement) or electrical stimulation that the user can perceive through tactile or kinesthetic senses. According to one embodiment, the haptic module 179 may include, for example, a motor, a piezoelectric element, or an electrical stimulation device.

The camera module 180 can capture still images and moving images. According to one embodiment, the camera module 180 may include one or more lenses, image sensors, image signal processors, or flashes.

The power management module 188 can manage power supplied to the electronic device 101. According to one embodiment, the power management module 188 may be implemented as at least a part of, for example, a power management integrated circuit (PMIC).

The battery 189 may supply power to at least one component of the electronic device 101. According to one embodiment, the battery 189 may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

Communication module 190 is configured to provide a direct (e.g., wired) communication channel or wireless communication channel between electronic device 101 and an external electronic device (e.g., electronic device 102, electronic device 104, or server 108). It can support establishment and communication through established communication channels. Communication module 190 operates independently of processor 120 (e.g., an application processor) and may include one or more communication processors that support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module 190 is a wireless communication module 192 (e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module 194 (e.g., : LAN (local area network) communication module, or power line communication module) may be included. Among these communication modules, the corresponding communication module is a first network 198 (e.g., a short-range communication network such as Bluetooth, wireless fidelity (WiFi) direct, or infrared data association (IrDA)) or a second network 199 (e.g., legacy It may communicate with an external electronic device 104 through a telecommunication network such as a cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., LAN or WAN). These various types of communication modules may be integrated into one component (e.g., a single chip) or may be implemented as a plurality of separate components (e.g., multiple chips). The wireless communication module 192 uses subscriber information (e.g., International Mobile Subscriber Identifier (IMSI)) stored in the subscriber identification module 196 to communicate within a communication network such as the first network 198 or the second network 199. The electronic device 101 can be confirmed or authenticated.

The wireless communication module 192 may support 5G networks after 4G networks and next-generation communication technologies, for example, NR access technology (new radio access technology). NR access technology provides high-speed transmission of high-capacity data (eMBB (enhanced mobile broadband)), minimization of terminal power and access to multiple terminals (mMTC (massive machine type communications)), or high reliability and low latency (URLLC (ultra-reliable and low latency). -latency communications)) can be supported. The wireless communication module 192 may support high frequency bands (eg, mmWave bands), for example, to achieve high data rates. The wireless communication module 192 uses various technologies to secure performance in high frequency bands, for example, beamforming, massive array multiple-input and multiple-output (MIMO), and full-dimensional multiplexing. It can support technologies such as input/output (FD-MIMO: full dimensional MIMO), array antenna, analog beam-forming, or large scale antenna. The wireless communication module 192 may support various requirements specified in the electronic device 101, an external electronic device (e.g., electronic device 104), or a network system (e.g., second network 199). According to one embodiment, the wireless communication module 192 supports peak data rate (e.g., 20 Gbps or more) for realizing eMBB, loss coverage (e.g., 164 dB or less) for realizing mmTC, or U-plane latency (e.g., 164 dB or less) for realizing URLLC. Example: Downlink (DL) and uplink (UL) each of 0.5 ms or less, or round trip 1 ms or less) can be supported.

The antenna module 197 may transmit or receive signals or power to or from the outside (eg, an external electronic device). According to one embodiment, the antenna module 197 may include an antenna including a radiator made of a conductor or a conductive pattern formed on a substrate (eg, PCB). According to one embodiment, the antenna module 197 may include a plurality of antennas (eg, an array antenna). In this case, at least one antenna suitable for the communication method used in the communication network, such as the first network 198 or the second network 199, is connected to the plurality of antennas by, for example, the communication module 190. can be selected Signals or power may be transmitted or received between the communication module 190 and an external electronic device through the at least one selected antenna. According to one embodiment, in addition to the radiator, other components (eg, radio frequency integrated circuit (RFIC)) may be additionally formed as part of the antenna module 197.

According to various embodiments, the antenna module 197 may form a mmWave antenna module. According to one embodiment, a mmWave antenna module includes a printed circuit board, an RFIC disposed on or adjacent to a first side (e.g., bottom side) of the printed circuit board and capable of supporting a designated high frequency band (e.g., mmWave band), And a plurality of antennas (e.g., array antennas) disposed on or adjacent to the second surface (e.g., top or side) of the printed circuit board and capable of transmitting or receiving signals in the designated high frequency band. can do.

At least some of the components are connected to each other through a communication method between peripheral devices (e.g., bus, general purpose input and output (GPIO), serial peripheral interface (SPI), or mobile industry processor interface (MIPI)) and signal ( (e.g. commands or data) can be exchanged with each other.

According to one embodiment, commands or data may be transmitted or received between the electronic device 101 and the external electronic device 104 through the server 108 connected to the second network 199. Each of the external electronic devices 102 or 104 may be of the same or different type as the electronic device 101. According to one embodiment, all or part of the operations performed in the electronic device 101 may be executed in one or more of the external electronic devices 102, 104, or 108. For example, when the electronic device 101 needs to perform a certain function or service automatically or in response to a request from a user or another device, the electronic device 101 may perform the function or service instead of executing the function or service on its own. Alternatively, or additionally, one or more external electronic devices may be requested to perform at least part of the function or service. One or more external electronic devices that have received the request may execute at least part of the requested function or service, or an additional function or service related to the request, and transmit the result of the execution to the electronic device 101. The electronic device 101 may process the result as is or additionally and provide it as at least part of a response to the request. For this purpose, for example, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology can be used. The electronic device 101 may provide an ultra-low latency service using, for example, distributed computing or mobile edge computing. In one embodiment, the external electronic device 104 may include an Internet of Things (IoT) device. Server 108 may be an intelligent server using machine learning and/or neural networks. According to one embodiment, the external electronic device 104 or server 108 may be included in the second network 199. The electronic device 101 may be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology and IoT-related technology.

Electronic devices according to various embodiments disclosed in this document may be of various types. Electronic devices may include, for example, portable communication devices (e.g., smartphones), computer devices, portable multimedia devices, portable medical devices, cameras, wearable devices, or home appliances. Electronic devices according to embodiments of this document are not limited to the above-mentioned devices.

The various embodiments of this document and the terms used herein are not intended to limit the technical features described in this document to specific embodiments, and should be understood to include various changes, equivalents, or replacements of the embodiments. In connection with the description of the drawings, similar reference numbers may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of the above items, unless the relevant context clearly indicates otherwise. As used herein, “A or B”, “at least one of A and B”, “at least one of A or B”, “A, B or C”, “at least one of A, B and C”, and “A Each of phrases such as “at least one of , B, or C” may include any one of the items listed together in the corresponding phrase, or any possible combination thereof. Terms such as "first", "second", or "first" or "second" may be used simply to distinguish one element from another, and may be used to distinguish such elements in other respects, such as importance or order) is not limited. One (e.g. first) component is said to be "coupled" or "connected" to another (e.g. second) component, with or without the terms "functionally" or "communicatively". Where mentioned, it means that any of the components can be connected to the other components directly (e.g. wired), wirelessly, or through a third component.

The term “module” used in various embodiments of this document may include a unit implemented in hardware, software, or firmware, and is interchangeable with terms such as logic, logic block, component, or circuit, for example. can be used A module may be an integrated part or a minimum unit of the parts or a part thereof that performs one or more functions. For example, according to one embodiment, the module may be implemented in the form of an application-specific integrated circuit (ASIC).

Various embodiments of the present document are one or more instructions stored in a storage medium (e.g., built-in memory 136 or external memory 138) that can be read by a machine (e.g., electronic device 101). It may be implemented as software (e.g., program 140) including these. For example, a processor (e.g., processor 120) of a device (e.g., electronic device 101) may call at least one command among one or more commands stored from a storage medium and execute it. This allows the device to be operated to perform at least one function according to the at least one instruction called. The one or more instructions may include code generated by a compiler or code that can be executed by an interpreter. A storage medium that can be read by a device may be provided in the form of a non-transitory storage medium. Here, 'non-transitory' only means that the storage medium is a tangible device and does not contain signals (e.g. electromagnetic waves), and this term refers to cases where data is semi-permanently stored in the storage medium. There is no distinction between temporary storage cases.

According to one embodiment, methods according to various embodiments disclosed in this document may be included and provided in a computer program product. Computer program products are commodities and can be traded between sellers and buyers. The computer program product may be distributed in the form of a machine-readable storage medium (e.g. compact disc read only memory (CD-ROM)) or via an application store (e.g. Play Store ^TM ) or on two user devices (e.g. It can be distributed (e.g. downloaded or uploaded) directly between smart phones) or online. In the case of online distribution, at least a portion of the computer program product may be at least temporarily stored or temporarily created in a machine-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or a relay server.

According to various embodiments, each component (e.g., module or program) of the above-described components may include a single or plural entity, and some of the plurality of entities may be separately placed in other components. . According to various embodiments, one or more of the components or operations described above may be omitted, or one or more other components or operations may be added. Alternatively or additionally, multiple components (eg, modules or programs) may be integrated into a single component. In this case, the integrated component may perform one or more functions of each component of the plurality of components in the same or similar manner as those performed by the corresponding component of the plurality of components prior to the integration. . According to various embodiments, operations performed by a module, program, or other component may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or , or one or more other operations may be added.

According to one embodiment, the display module 160 shown in FIG. 1 is described as including a foldable display or a flexible display, but is not limited thereto. The display module 160 may include a bar type or plate type display (eg, micro LED display).

According to one embodiment, the display module 160 shown in FIG. 1 may include a flexible display (eg, flexible micro LED display) configured to fold or unfold a screen (eg, display screen).

According to one embodiment, the display module 160 shown in FIG. 1 may include a flexible display (eg, flexible micro LED display) that is slidably disposed to provide a screen (eg, display screen).

FIG. 2A is a perspective view of the front of an electronic device according to an embodiment of the present disclosure. FIG. 2B is a perspective view of the rear of an electronic device according to an embodiment of the present disclosure.

Referring to FIGS. 2A and 2B, the electronic device 200 (e.g., the electronic device 101 of FIG. 1) according to an embodiment of the present disclosure has a first side (or front) 210A, a second side ( or rear) (210B), and a housing (210). The electronic device 200 (e.g., the electronic device 101 of FIG. 1) according to an embodiment of the present disclosure includes a display 201 (e.g., the display 320 of FIG. 3A and the display 410 of FIG. 4). It can be included.

According to one embodiment, the display 201 may be supported by the housing 210. For example, display 210 may include a micro LED display.

According to one embodiment, the housing 210 may include a side surface 210C surrounding the space between the first surface 210A and the second surface 210B. According to one embodiment, the housing 210 may refer to a structure that forms part of the first surface 210A, the second surface 210B, and the side surface 210C.

According to one embodiment, the first surface 210A may be formed at least in part by a substantially transparent front plate 202 (eg, a glass plate including various coating layers, or a polymer plate).

According to one embodiment, the second surface 210B may be formed by a substantially opaque back plate 211. The back plate 211 is formed, for example, by coated or colored glass, ceramic, polymer, metal (e.g., aluminum, stainless steel (STS), or magnesium), or a combination of at least two of these materials. It can be. However, it is not limited to this, and the rear plate 211 may be formed of transparent glass.

According to one embodiment, the side 210C is joined to the front plate 202 and the back plate 211 by a side bezel structure 218 (or “side member”) comprising metal and/or polymer. can be formed. According to one embodiment, the back plate 211 and the side bezel structure 218 are formed as one piece and may include the same material (eg, a metal material such as aluminum).

According to one embodiment, the front plate 202 may include two first regions 210D that are curved and extend seamlessly from the first surface 210A toward the rear plate 211. Two first areas 210D may be disposed at both ends of the long edge of the front plate 202.

According to one embodiment, the rear plate 211 may include two second regions 210E that are curved and extend seamlessly from the second surface 210B toward the front plate 202.

According to one embodiment, the front plate 202 (or the rear plate 211) may include only one of the first areas 210D (or the second areas 210E). According to one embodiment, some of the first areas 210D or the second areas 210E may not be included. In embodiments, when viewed from the side of the electronic device 200, the side bezel structure 218 has a first bezel structure 218 on the side that does not include the first regions 210D or the second regions 210E. It may have a thickness (or width), and may have a second thickness that is thinner than the first thickness on the side including the first areas 210D or the second areas 210E.

According to one embodiment, the electronic device 200 includes a display 201, an audio input device 203 (e.g., the input module 150 in FIG. 1), and an audio output device 207 and 214 (e.g., the input module 150 in FIG. 1). sound output module 155), sensor modules 204 and 219 (e.g., sensor module 176 in FIG. 1), camera modules 205 and 212 (e.g., camera module 180 in FIG. 1), and flash. It may include at least one of (213), a key input device 217, an indicator (not shown), and connectors 208 and 209. According to one embodiment, the electronic device 200 may omit at least one of the components (eg, the key input device 217) or may additionally include another component.

According to one embodiment, the display 201 may be visually visible through the upper portion of the front plate 202.

According to one embodiment, at least a portion of the display 201 may be visible through the front plate 202 forming the first surface 210A and the first area 210D of the side surface 210C. The display 201 may be combined with or disposed adjacent to a touch detection circuit, a pressure sensor capable of measuring the strength (pressure) of touch, and/or a digitizer that detects a magnetic field-type stylus pen.

According to one embodiment, at least a portion of the sensor modules 204 and 219 and/or at least a portion of the key input device 217 are located in the first area 210D and/or the second area 210E. can be placed.

According to one embodiment, at least one of a sensor module 204, a camera module 205 (e.g., an image sensor), an audio module 214, and a fingerprint sensor is installed on the back of the screen display area of the display 201. may include.

According to one embodiment, the display 201 may be combined with or disposed adjacent to a touch detection circuit, a pressure sensor capable of measuring the intensity (pressure) of touch, and/or a digitizer that detects a magnetic field-type stylus pen. there is.

According to one embodiment, at least a portion of the sensor modules 204 and 219 and/or at least a portion of the key input device 217 are located in the first areas 210D and/or the second areas 210E. can be placed in the field.

According to one embodiment, the sound input device 203 may include a microphone. According to one embodiment, the input device 203 may include a plurality of microphones arranged to detect the direction of sound.

According to one embodiment, the sound output devices 207 and 214 may include an external speaker 207 and a receiver for a call (eg, audio module 214). In some embodiments, the audio input device 203 (e.g., microphone), audio output devices 207 and 214, and connectors 208 and 209 are disposed in the internal space of the electronic device 200 and formed in the housing 210. It may be exposed to the external environment through at least one hole. In some embodiments, the hole formed in the housing 210 may be commonly used for the sound input device 203 (eg, microphone) and the sound output devices 207 and 214. In some embodiments, the sound output devices 207 and 214 may include speakers (eg, piezo speakers) that operate without the hole formed in the housing 210.

According to one embodiment, the sensor modules 204 and 219 (e.g., the sensor module 176 in FIG. 1) transmit electrical signals or data corresponding to the internal operating state of the electronic device 200 or the external environmental state. A value can be created. The sensor modules 204, 219 may include, for example, a first sensor module 204 (e.g., a proximity sensor) disposed on the first side 210A of the housing 210 and/or a second sensor of the housing 210. It may include a second sensor module 219 (eg, HRM sensor) and/or a third sensor module (not shown) (eg, fingerprint sensor) disposed on the second side 210B. As an example, the fingerprint sensor may be disposed on the first side 210A (eg, display 201) and/or the second side 210B of the housing 210. The electronic device 200 may include sensor modules not shown, for example, a gesture sensor, a gyro sensor, a barometric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, a temperature sensor, It may further include at least one of a humidity sensor or an illuminance sensor.

According to one embodiment, the camera modules 205 and 212 include a first camera module 205 disposed on the first side 210A of the electronic device 200, and a second camera module 205 disposed on the second side 210B. It may include 2 camera modules 212. A flash 213 may be disposed around the camera modules 205 and 212. Camera modules 205 and 212 may include one or more lenses, an image sensor, and/or an image signal processor. The flash 213 may include, for example, a light emitting diode or a xenon lamp.

According to one embodiment, the first camera module 205 may be disposed below the display panel of the display 201 in an under display camera (UDC) manner. According to one embodiment, two or more lenses (wide-angle and telephoto lenses) and image sensors may be disposed on one side of the electronic device 200. According to one embodiment, a plurality of first camera modules 205 may be disposed on the first side (eg, the side where the screen is displayed) of the electronic device 200 in an under-display camera (UDC) manner.

According to one embodiment, the key input device 217 may be disposed on the side 210C of the housing 210. According to one embodiment, the electronic device 200 may not include some or all of the key input devices 217 mentioned above, and the key input devices 217 not included may include soft keys, etc. on the display 201. It can be implemented in different forms. According to one embodiment, the key input device 217 may be implemented using a pressure sensor included in the display 201.

According to one embodiment, the connectors 208 and 209 include a first connector hole 208 that can accommodate a connector (for example, a USB connector) for transmitting and receiving power and/or data with an external electronic device; and/or a second connector hole 209 (or earphone jack) capable of receiving a connector for transmitting and receiving audio signals to and from an external electronic device. The first connector hole 208 may include a universal serial bus (USB) type A or USB type C port. When the first connector hole 208 supports USB Type C, the electronic device 200 (eg, the electronic device 101 of FIG. 1) can support USB power delivery (PD) charging.

According to one embodiment, some first camera modules 205 among the camera modules 205 and 212 and/or some sensor modules 204 among the sensor modules 204 and 219 display visual information through the display 201. It can be arranged to be visible as .

According to one embodiment, when the first camera module 205 is arranged in an under display camera (UDC) manner, the first camera module 205 may not be visually visible to the outside.

According to one embodiment, the first camera module 205 may be arranged to overlap the display area, and may display a screen in the display area corresponding to the second camera module 205. Some sensor modules 204 may be arranged to perform their functions in the internal space of the electronic device 200 without being visually exposed through the front plate 202.

FIG. 3A is a diagram illustrating a display panel according to an embodiment of the present disclosure. FIG. 3B is a cross-sectional view of the display panel shown in FIG. 3A. FIG. 3C is a diagram showing the arrangement of pixels arranged on a display panel. The display panel 300 shown in FIGS. 3A to 3C can be applied to a television (TV), monitor, or video wall display that displays images on a large screen.

3A to 3C, the display panel 300 according to an embodiment of the present disclosure includes a light emitting panel 310, a color converter panel 320, a light emitting panel 310, and a color conversion panel. It may include a light-transmissive layer 330 located between 320 and a coupling member 340 that couples the light-emitting panel 310 and the color conversion panel 320.

According to one embodiment, the light emitting panel 310 and the color conversion panel 320 may be arranged to face each other with the light transmissive layer 330 interposed therebetween. The color conversion panel 320 may be disposed in a direction in which light is emitted from the light emitting panel 310. The coupling member 340 is arranged along the edges of the light emitting panel 310 and the color conversion panel 320. For example, the coupling member 340 may include a sealing member.

According to one embodiment, the display panel 300 may include a display area (DA) and a non-display area (PA) for displaying an image. For example, the non-display area PA may be located around the display area DA and the coupling member 340 may be disposed thereon.

According to one embodiment, the display area DA may include a plurality of pixels P arranged along a first direction (eg, x-axis direction) and a second direction (eg, y-axis direction). Each pixel P may include a plurality of subpixels P1, P2, and P3 displaying different colors. For example, three subpixels (P1, P2, and P3) may be gathered to form one pixel (P). However, the present invention is not limited to this, and one pixel P may be composed of four or more subpixels.

For example, the plurality of pixels P may be arranged in a bayer matrix, a pentile matrix, and/or a diamond matrix, but is not limited thereto.

For example, each subpixel (P1, P2, P3) may display three primary colors or a combination of three primary colors. Each subpixel (P1, P2, P3) may display red, green, blue, or a combination of these colors. For example, the first subpixel P1 may display a red color, the second subpixel P2 may display a green color, and the third subpixel P3 may display a blue color. For example, the subpixels P1, P2, and P3 may have the same area, but the area is not limited to this, and the areas of each subpixel P1, P2, and P3 may be different.

The display panel 300 according to an embodiment of the present disclosure may be applied to a bar type, foldable type, rollable type, sliding type, wearable type, tablet PC, and/or laptop PC. The display panel 300 according to an embodiment of the present disclosure may include a large screen display panel (eg, television (TV), monitor, video wall display).

The electronic device according to an embodiment of the present disclosure is not limited to the above-described examples and may include various other electronic devices.

Figure 4 is a block diagram of a display module according to an embodiment of the present disclosure.

The display module 160 shown in FIG. 4 may be at least partially similar or identical to the display module 160 shown in FIG. 1 . The display module 160 shown in FIG. 4 may include an embodiment different from the display module 160 shown in FIG. 1 .

Referring to FIG. 4, the display module 160 includes a display 410 (e.g., display 201 in FIG. 2A, display 320 in FIG. 3A), and a display driver IC (display driver IC) for driving the display 410. It may include a driver integrated circuit) 400 (hereinafter referred to as 'DDI 400'), and a power supply device 460 for supplying power (ELVDD, ELVSS) to the display 410.

According to one embodiment, the display 410 may include a micro LED display in which a plurality of micro LEDs (eg, micro LEDs 520 in FIG. 5) are arranged. The display 410 includes a light source substrate (e.g., the light source substrate 501 in FIG. 5) (e.g., a micro LED substrate), and a quantum dot color conversion substrate for color conversion (e.g., the quantum dot color conversion substrate 502 in FIG. 5). may include. The display 410 may include a plurality of pixels (P) arranged in a matrix form, and each pixel (P) includes a micro LED 520 and a color conversion layer (e.g., color conversion layer 530 in FIG. 5). This can be placed. For example, one unit pixel may be composed of a red pixel, a green pixel, and a blue pixel.

According to one embodiment, the DDI 400 may include a data control unit 420, a gate control unit 430, a timing control unit 440, and a memory 450.

For example, at least some of the data control unit 420, gate control unit 430, timing control unit 440, and memory 450 may be disposed on the substrate on which the display 410 is formed, and the remaining part may be disposed on the DDI (400). can be included in

For example, at least some of the data control unit 420, gate control unit 430, timing control unit 440, and memory 450 may be included in the display 410. When at least some of the data control unit 420, gate control unit 430, timing control unit 440, and memory 450 are included in the display 410, a non-display area (e.g., bezel area) of the display 410 can be placed in

According to one embodiment, the display 410 may include a plurality of gate lines (GL) and a plurality of data lines (DL). For example, the plurality of gate lines GL may be formed in a first direction (eg, x-axis direction, horizontal direction in FIG. 4) and arranged at designated intervals. For example, the plurality of data lines DL may be formed in a second direction (eg, y-axis direction, vertical direction in FIG. 4) substantially perpendicular to the first direction, and may be arranged at designated intervals.

In an embodiment of the present disclosure, the “scan direction of the display 410” refers to a direction (e.g., vertical direction, y-axis direction) perpendicular to the direction in which the gate lines GL are formed (e.g., horizontal direction, x-axis direction). It can be defined as: For example, when a plurality of gate lines GL are formed in a first direction (e.g., horizontal direction, x-axis direction in FIG. 4), the scan direction of the display 410 is the second direction perpendicular to the first direction. It may be defined as a direction (e.g., vertical direction, y-axis direction in FIG. 4).

According to one embodiment, a pixel P may be disposed in each of some areas of the display 410 where a plurality of gate lines GL and a plurality of data lines DL intersect.

According to one embodiment, each pixel P may display a designated gray level by being electrically connected to the gate line GL and the data line DL.

According to one embodiment, the power supply device 460 generates driving voltages (ELVDD, ELVSS) to emit micro LEDs (e.g., micro LEDs 520 in FIG. 5) arranged in a plurality of pixels (P). You can. The power supply device 460 may supply driving voltages (ELVDD and ELVSS) to micro LEDs (eg, micro LEDs 520 in FIG. 5) disposed on the display 410.

According to one embodiment, the pixels (P) may receive scan signals and emission (EM) signals through the gate line (GL) and receive data signals through the data line (DL). According to one embodiment, the pixels P may receive a high potential voltage (eg, ELVDD voltage) and a low potential voltage (eg, ELVSS voltage) as a power source for driving the micro LED 520.

According to one embodiment, each pixel P may include a pixel driving circuit (eg, a plurality of transistors, a plurality of capacitors) for driving the micro LED 520.

According to one embodiment, the pixel driving circuit disposed in each pixel P turns the micro LED 520 on (e.g., activated state) or off (e.g., deactivated state) based on scan signals and light emission signals. can be controlled.

According to one embodiment, when the micro LED 520 of each pixel P is turned on (e.g., activated), it displays a gray level (e.g., luminance) corresponding to the data signal for one frame period (or one frame period). During some of the time) it can be displayed.

According to one embodiment, the data control unit 420 may drive a plurality of data lines DL. According to one embodiment, the data control unit 420 receives at least one synchronization signal and a data signal (e.g., digital image data) from the timing control unit 440 or a processor (e.g., processor 120 of FIG. 1). You can. According to one embodiment, the data control unit 420 may determine a data voltage (data) (eg, analog image data) corresponding to an input data signal using a reference gamma voltage and a designated gamma curve. According to one embodiment, the data control unit 420 may supply the data voltage (data) to each pixel (P) by applying the data voltage (data) to the plurality of data lines (DL).

According to one embodiment, a processor (eg, processor 120 of FIG. 1) may control the overall operation of the display module 160. The processor 120 may be comprised of one or multiple processors. For example, the processor 120 executes at least one instruction stored in a memory (e.g., memory 130 of FIG. 1), thereby enabling the operation of the display module 160 according to various embodiments of the present disclosure. It can be done.

According to one embodiment, the processor 120 includes a digital signal processor (DSP), a microprocessor, a Graphics Processing Unit (GPU), an Artificial Intelligence (AI) processor, and an NPU (NPU) that processes digital image signals. It can be implemented with a Neural Processing Unit (Neural Processing Unit), TCON (Time controller), etc. However, it is not limited to this, and can be implemented with a central processing unit (CPU), MCU (Micro Controller Unit), MPU (micro processing unit), It may include one or more of a controller, an application processor (AP), a communication processor (CP), or an ARM processor, or may be defined by those terms. In addition, the processor 120 ) may be implemented in the form of a SoC (System on Chip) or LSI (large scale integration) with a built-in processing algorithm, or in the form of an ASIC (application specific integrated circuit) or FPGA (field programmable gate array).

According to one embodiment, the processor 120 can control hardware or software components connected to the processor 120 by running an operating system or application program, and can perform various data processing and calculations. Additionally, the processor 120 may load and process commands or data received from at least one of the other components into volatile memory and store various data in the memory 130 .

According to one embodiment, the data control unit 420 receives a plurality of synchronization signals having the same frequency (or different frequencies) on a frame-by-frame basis from the timing control unit 440 or a processor (e.g., processor 120 in FIG. 1). You can receive input. For example, consecutive first and second frames may be driven based on a plurality of synchronization signals having the same frequency (or different frequencies).

According to one embodiment, the data control unit 420 receives a plurality of synchronization signals having the same frequency (or different frequencies) on a frame-by-frame basis from the timing control unit 440 or a processor (e.g., processor 120 in FIG. 1). You can receive input. For example, consecutive first and second frames may be driven based on a plurality of synchronization signals having the same frequency (or different frequencies).

According to one embodiment, the gate control unit 430 may drive a plurality of gate lines GL. According to one embodiment, the gate control unit 430 may receive at least one synchronization signal from the timing control unit 440 or a processor (eg, processor 120 of FIG. 1).

According to one embodiment, each gate line GL may include scan signal lines SCL to which scan signals are applied and emission signal lines EML to which light emission signals are applied.

According to one embodiment, the gate control unit 430 includes a scan control unit 431 that sequentially generates a plurality of scan signals based on the synchronization signal and supplies the generated plurality of scan signals to the scan signal line (SCL). It can be included.

According to one embodiment, the gate control unit 430 sequentially generates a plurality of emission (EM) signals based on the synchronization signal, and connects the generated plurality of emission (EM) signals to the emission signal lines (EML). It may further include a light emission control unit 432 that supplies light.

According to one embodiment, the gate control unit 430 may receive a masking signal from the timing control unit 440 or a processor (eg, processor 120 of FIG. 1).

According to one embodiment, the gate control unit 430 may not supply at least one of the scan signal and/or the light emission signal to at least some gate lines GL of the display 410 based on the masking signal. For example, the gate control unit 430 supplies a scan signal and/or a light emission signal to at least some of the plurality of gate lines GL, based on the masking signal, and provides a scan signal to the remaining gate lines GL. and/or may not supply a light emitting signal.

According to one embodiment, among the plurality of pixels disposed on the display 410, pixels connected to gate lines GL to which scan signals and/or light emitting signals are not supplied are turned off (e.g., in an inactive state) during the corresponding frame period. ) can be. In one embodiment, the operation of the gate control unit 430 receiving a masking signal from the timing control unit 440 or the processor 120 may be omitted.

According to one embodiment, the timing control unit 440 may control the driving timing of the data control unit 420 and the gate control unit 430. According to one embodiment, the timing control unit 440 may receive data signals from the processor 120 in units of one frame. According to one embodiment, the timing control unit 440 converts a data signal (e.g., digital image data) input from the processor 120 to correspond to the resolution of the display 410, and sends the converted data signal to the data control unit 420. ) can be supplied to.

According to one embodiment, the display module 160 may further include a touch circuit (eg, a touch sensor). For example, at least a portion of the touch circuitry may be included as part of the DDI 400 or the display 410.

According to one embodiment, the display module 160 may further include at least one sensor (eg, a fingerprint sensor, an iris sensor, a pressure sensor, or an illumination sensor) of the sensor module 176, or a control circuit therefor. In this case, the at least one sensor or a control circuit therefor may be embedded in a part of the display module 160 (eg, the display 410 or the DDI 400). For example, when the sensor module 176 embedded in the display module 160 includes a biometric sensor (e.g., a fingerprint sensor), the biometric sensor transmits biometric information associated with a touch input through a portion of the display 410. (e.g. fingerprint image) can be acquired. For another example, when the sensor module 176 embedded in the display module 160 includes a pressure sensor, the pressure sensor may acquire pressure information associated with a touch input through part or the entire area of the display 410. You can. According to one embodiment, the touch sensor or sensor module 176 may be disposed between pixels of a pixel layer of the display 410, or above or below the pixel layer.

According to one embodiment, the display 410 (e.g., micro LED display) shown in FIG. 4 is used in wearable devices, portable devices, handheld devices, and mobile devices requiring various displays. Can be applied to devices.

According to one embodiment, the display 410 (eg, micro LED display) shown in FIG. 4 may be applied to electronic products such as wireless communication devices.

According to one embodiment, the display 410 (eg, micro LED display) shown in FIG. 4 may be applied to a TV.

According to one embodiment, the display 410 (e.g., micro LED display) shown in FIG. 4 is a video wall, a large format display (LFD), a digital signage, and a digital information display (DID). , can be applied to devices with display functions, such as projector displays.

According to one embodiment, the display 410 (e.g., micro LED display) shown in FIG. 4 is a monitor for a personal computer (PC) in which a plurality of displays are implemented and assembled in a matrix type, a high-resolution TV, and a signage display. (Or, it can be applied to various display devices such as digital signage) and electronic displays.

Figure 5 is a diagram showing a micro LED display according to an embodiment of the present disclosure.

Referring to FIG. 5, a display 500 (e.g., micro LED display) (e.g., display 201 of FIG. 2A, display 320 of FIG. 3A, display 410 of FIG. 4) according to an embodiment of the present disclosure. )) may include a light source substrate 501 (eg, micro LED substrate) and a quantum dot color conversion substrate 502.

According to one embodiment, the light source substrate 501 (e.g., micro LED substrate) includes a glass substrate 510, a plurality of micro LEDs 520 disposed on the glass substrate 510, and a plurality of micro LEDs 520. ) may include pixel circuits for driving. For example, a plurality of pixels (e.g., pixels P in FIG. 4) are defined on the light source substrate 501 (e.g., a micro LED substrate), and a micro LED 520 is located in each of the plurality of pixels P. can be placed.

According to one embodiment, the quantum dot color conversion substrate 502 includes a quantum dot (QD) color conversion layer 530, a partition 540, a flat layer 550, and a light blocking layer 560 (e.g., a black matrix (BM)). , a color filter layer 570, and a transparent substrate 580 (eg, transparent glass).

For example, the areas of each pixel may be divided by a partition 540, and a quantum dot (QD) color conversion layer 530 may be disposed in each pixel area. A color filter layer 570 may be disposed on the quantum dot (QD) color conversion layer 530 of each pixel. A light blocking layer 560 is disposed between the color filter layers 570 of each pixel to prevent color mixing between pixels and to distinguish the area of each pixel. A transparent substrate 580 (eg, transparent glass) may be disposed on the color filter layer 570.

According to one embodiment, when manufacturing the display 500, the light source substrate 501 (e.g., micro LED substrate) and the quantum dot color conversion substrate 502 are each manufactured and then bonded together by an adhesive layer 503. .

According to one embodiment, the micro LEDs 520 may be blue LEDs that generate blue color light and may be used as a single light source.

According to one embodiment, the color of each pixel may be defined by the color of the quantum dot (QD) color conversion layer 530 and the color of the color filter layer 570 disposed on the micro LED 520.

For example, one unit pixel may be composed of a red pixel, a green pixel, and a blue pixel.

For example, a red color conversion layer 530R and a red color filter layer 570R are disposed on the blue micro LED 520 to form a red pixel that displays red light. The red pixel can convert the blue light generated by the blue color micro LED 520 into red light and output it through the red color conversion layer 530R and the green color filter layer 570R.

For example, a green color conversion layer 530G and a green color filter layer 570G are disposed on top of the blue colored micro LED 520 to form a green pixel that displays green colored light. The green pixel can convert the blue light generated by the blue color micro LED 520 into green light and output it through the green color conversion layer 530G and the green color filter layer 570G.

For example, a blue pixel where a transparent layer 530G (or a blue color conversion layer) and a blue color filter layer 570B are disposed on top of a blue colored micro LED 520 to display blue colored light. This can be. The blue pixel transmits the blue light generated by the blue colored micro LED 520 through the transparent layer 530G, and filters light of other colors through the blue color filter layer 570B so that only blue light is output.

In the description referring to FIG. 4, it is said that a blue colored micro LED 520 is used as the pixel, but the pixel is not limited to this and a white light micro LED may be used.

Figures 6 to 8 are diagrams showing a method of manufacturing the micro LED display shown in Figure 5. 6 to 8 show an example of a method of manufacturing the quantum dot color conversion substrate 502 of the micro LED display 500.

5 and 6, according to one embodiment, for manufacturing the quantum dot color conversion substrate 502 of the micro LED display 500, each pixel on the transparent substrate 580 has an open area (e.g., an opening area). ) The light blocking layer 560 may be formed in the portion excluding the area. A color filter layer 570 may be formed in the open area of each pixel formed by the light blocking layer 560. For example, a red color filter layer 570R may be formed in a red pixel area, a green color filter layer 570G may be formed in a green pixel area, and a blue color filter layer 570B may be formed in a blue pixel area.

According to one embodiment, the planarization layer 550 may be formed to cover the color filter layer 570. According to one embodiment, the partition wall 540 may be formed on the planarization layer 550.

FIG. 8 shows a cross section taken along line A1-A2 in FIG. 7.

Referring to FIGS. 5, 7, and 8, according to one embodiment, pixels of the same color connected in the direction in which the nozzle 710 travels are separated by a partition 540. For example, the quantum dot (QD) color conversion layer 530 can be formed in each pixel area divided by the partition 540 using an electro hydrodynamic (EHD) spinning process.

For example, quantum dot (QD) ink 7201 can be applied to each pixel area using the nozzle 710. For example, the quantum dot (QD) ink 7201 may include a photosensitive resin and a plurality of quantum dots.

For example, quantum dot (QD) ink 7201 may be sequentially applied to red pixel, green pixel, and blue pixel areas.

For example, a red color conversion layer 530R can be formed by applying red quantum dot (QD) ink 7201 to a red pixel. When applying the quantum dot (QD) ink 7201 to the red pixel area, the red colored quantum dot (QD) ink 7201 may be applied along the center line (R) of the red pixel. After aligning the nozzle 710 with the center line (R) of the red pixel, the nozzle 710 can be moved in the scan direction to apply quantum dot (QD) ink 7201 for color conversion to red color on a plurality of red pixels. .

For example, green color quantum dot (QD) ink 7201 can be applied to the green pixel to form a green color conversion layer 530G. When applying the quantum dot (QD) ink 7201 to the green pixel area, the green colored quantum dot (QD) ink 7201 may be applied along the center line (G) of the green pixel. After aligning the nozzle 710 with the center line (G) of the green pixel, the nozzle 710 can be moved in the scan direction to apply quantum dot (QD) ink 7201 for color conversion of the green color to a plurality of green pixels. .

For example, transparent quantum dot (QD) ink 7201 (or blue quantum dot ink) can be applied to the green pixel to form a transparent layer 530B (or blue color conversion layer). When applying quantum dot (QD) ink 7201 to the blue pixel area, transparent quantum dot (QD) ink 7201 may be applied along the center line (B) of the blue pixel. After aligning the nozzle 710 with the center line (B) 0 of the blue pixel, the nozzle 710 can be moved in the scan direction to apply transparent quantum dot (QD) ink 7201 to a plurality of blue pixels.

According to one embodiment, quantum dot (QD) ink 7201 is applied using the nozzle 710 to pixels of the same color connected in the direction of movement of the nozzle 710, thereby forming quantum dot (QD) ink 7201 on the upper surface of the partition 540. ) Some ink 7201 may remain. At this time, if the surface energy of the barrier rib 540 and the quantum dot (QD) ink 7201 is adjusted, substantially no quantum dot (QD) ink 7201 remains on the upper surface of the barrier rib 540, or only a small amount remains, thereby forming the light source substrate. There is no problem in joining the light source substrate 501 of FIG. 5 and the quantum dot color conversion substrate 502. However, if a large amount of quantum dot (QD) ink 7201 remains on the upper surface of the partition 540, the adhesion of the light source substrate (e.g., the light source substrate 501 in FIG. 5) and the quantum dot color conversion substrate 502 may be defective. It can happen.

The method of manufacturing a display device according to an embodiment of the present disclosure includes forming a partition 540 to prevent defects from occurring when a light source substrate (e.g., the light source substrate 501 of FIG. 5) and the quantum dot color conversion substrate 502 are bonded. You can.

FIG. 9 is a diagram 900 showing the shape of a partition formed on a quantum dot color conversion substrate according to an embodiment of the present disclosure.

Referring to FIG. 9, a partition 940 is formed on a quantum dot color conversion substrate 502 (e.g., the quantum dot color conversion substrate 502 of FIG. 5) according to an embodiment of the present disclosure, and a plurality of pixel areas 910 are formed. ) can be distinguished. For example, a plurality of pixel areas 910 of the same color may be arranged in a first direction (e.g., the y-axis direction, up and down direction in FIG. 9). A plurality of pixel areas 910 of different colors may be arranged in the second direction (e.g., x-axis direction, left and right direction in FIG. 9).

According to one embodiment, micro LED pads may be disposed in the plurality of pixel areas 910. For example, the micro LED pad may be placed in a position corresponding to the open area 920 (BM opening) (eg, opening area). The open area 920 (BM opening) (eg, opening area) of the plurality of pixel areas 910 may be defined by the light blocking layer 960.

According to one embodiment, the area of the pixel area 910 formed by the partition 940 (e.g., the first area of the pixel area) is the area of the pixel area formed by the light blocking layer 960 (e.g., the pixel area The partition 940 may be formed to be larger than the second area of (e.g., the area of the open area). For example, a light blocking layer 960 may be formed in the pixel area 910 formed by the partition 940.

According to one embodiment, the gap 941 between the first pixel 910a and the second pixel 910b adjacent to each other in the first direction (e.g., the y-axis direction in FIG. 9, up and down direction) is increased in the second direction (e.g., vertical direction). In FIG. 9 , the partition wall 940 may be formed to be narrower than the gap 942 between adjacent pixels in the x-axis direction (left and right directions).

According to one embodiment, the gap 941 between the first pixel 910a and the second pixel 910b adjacent to each other in the first direction (e.g., the y-axis direction in FIG. 9, up and down direction) is increased in the second direction (e.g., vertical direction). In FIG. 9 , the partition wall 940 may be formed to be equal to the spacing 942 between adjacent pixels in the x-axis direction (left and right directions).

The gap 941 between the first pixel 910a and the second pixel 910b adjacent in the first direction (e.g., the y-axis direction, up and down direction in FIG. 9) is greater than or equal to the distance 941 in the second direction (e.g., the x-axis direction in FIG. 9). , left and right directions), when the partition 940 is formed to be the same (or narrow) as the gap 942 between adjacent pixels, quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) is formed on the upper surface of the partition 940. There may be substantially no remaining (or a small amount remaining). Since the upper surface of the barrier rib 940 has liquid-repellent properties, quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) flows into the pixel area 910, and quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) flows into the upper surface of the barrier rib 940. Quantum dot ink 7201) may substantially not remain (or a small amount may remain). As the upper surface of the partition 940 becomes narrower, the effect of the quantum dot ink 7201 flowing into the pixel area can be increased. Through this, the light source substrate (e.g., the light source substrate 501 in FIG. 5) and the quantum dot color conversion substrate 502 can be bonded smoothly.

FIG. 10 is a diagram 1000 showing the shape of a partition formed on a quantum dot color conversion substrate according to an embodiment of the present disclosure.

Referring to FIG. 10, a partition 1040 is formed on a quantum dot color conversion substrate 502 (e.g., the quantum dot color conversion substrate 502 of FIG. 5) according to an embodiment of the present disclosure, and a plurality of pixel regions 1010 are formed. ) can be distinguished. For example, a plurality of pixel areas 1010 of the same color may be arranged in a first direction (e.g., the y-axis direction, up and down direction in FIG. 10). A plurality of pixel areas 1010 of different colors may be arranged in a second direction (e.g., x-axis direction, left and right direction in FIG. 10).

According to one embodiment, micro LED pads may be disposed in the plurality of pixel areas 1010. For example, the micro LED pad may be placed in a position corresponding to the open area 1020 (BM opening) (eg, opening area). The open area 1020 (BM opening) (eg, opening area) of the plurality of pixel areas 1010 may be defined by the light blocking layer 1060.

According to one embodiment, the area of the pixel area 1010 formed by the partition 1040 (e.g., the first area of the pixel area) is the area of the pixel area formed by the light blocking layer 1060 (e.g., the pixel area The partition 1040 may be formed to be larger than the second area of (e.g., the area of the open area). For example, the light blocking layer 1060 may be formed in the pixel area 1010 formed by the partition wall 1040.

According to one embodiment, the partition wall 1040 may be formed so that the pixel areas 1010 have a hexagonal shape.

For example, the partition wall 1040 is formed so that the adjacent portion of the first pixel 1010a and the second pixel 1010b in the first direction (e.g., the y-axis direction, vertical direction in FIG. 10) has a sharp shape. It can be.

For example, the partition 1040 may be formed so that the corner portion 1012 of the first pixel 1010a and the corner portion 1014 of the second pixel 1010b are disposed adjacent to each other.

For example, an area where the corner portion 1012 of the first pixel 1010a and the corner portion 1012 of the second pixel 1010b are adjacent in the first direction (e.g., the y-axis direction, up and down direction in FIG. 10). The partition wall 1040 may be formed such that the gap 1041 is narrower than the gap 1042 between adjacent pixels in the second direction (e.g., the x-axis direction, left and right direction in FIG. 10).

The partition walls of the corner portion 1012 of the first pixel 1010a and the corner portion 1014 of the second pixel 1010b adjacent in the first direction (e.g., the y-axis direction, vertical direction in FIG. 10) are formed to be narrow, Substantially no quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) may remain on the upper surface of the partition 1040 (or a small amount may remain). Since the upper surface of the barrier rib 1040 has liquid-repellent properties, quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) flows into the pixel area 1010, and quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) flows into the upper surface of the barrier rib 1040. Quantum dot ink 7201) may substantially not remain (or a small amount may remain). As the upper surface of the partition 1040 becomes narrower, the effect of the quantum dot ink 7201 flowing into the pixel area can be increased. Through this, the light source substrate (e.g., the light source substrate 501 in FIG. 5) and the quantum dot color conversion substrate 502 can be bonded smoothly.

FIG. 11 is a diagram 1100 showing the shape of a partition formed on a quantum dot color conversion substrate according to an embodiment of the present disclosure.

Referring to FIG. 11, a partition 1140 is formed on a quantum dot color conversion substrate 502 (e.g., the quantum dot color conversion substrate 502 of FIG. 5) according to an embodiment of the present disclosure, and a plurality of pixel areas 1110 are formed. ) can be distinguished. For example, a plurality of pixel areas 1110 of the same color may be arranged in a first direction (e.g., the y-axis direction, up and down direction in FIG. 11). A plurality of pixel areas 1110 of different colors may be arranged in the second direction (e.g., x-axis direction, left and right direction in FIG. 11).

According to one embodiment, micro LED pads may be disposed in the plurality of pixel areas 1110. For example, the micro LED pad may be placed in a position corresponding to the open area 1120 (BM opening) (eg, opening area). The open area 1120 (BM opening) (eg, opening area) of the plurality of pixel areas 1110 may be defined by the light blocking layer 1160.

According to one embodiment, the area of the pixel area 1110 formed by the partition 1140 (e.g., the first area of the pixel area) is the area of the pixel area formed by the light blocking layer 1160 (e.g., the pixel area The partition wall 1140 may be formed to be larger than the second area of (e.g., the area of the open area). For example, the light blocking layer 1160 may be formed in the pixel area 1110 formed by the partition 1140.

According to one embodiment, a partition 1140 may be formed to connect the first pixel 1110a and the second pixel 1110b adjacent to each other in a first direction (e.g., the y-axis direction, up and down direction in FIG. 11). .

For example, the partition wall 1140 is formed to form a connection portion 1150 connecting the first pixel 1110a and the second pixel 1110b adjacent to each other in a first direction (e.g., the y-axis direction, up and down direction in FIG. 11). can be formed.

For example, the width (e.g., the first width) of the connecting portion 1150 connecting the first pixel 1110a and the second pixel 1110b adjacent in the first direction (e.g., the y-axis direction, up and down direction in FIG. 11). ) may be formed to be narrower than the width (eg, second width) of the pixel area 1110.

In this way, when the connection portion 1150 is formed connecting the first pixel 1110a and the second pixel 1110b adjacent in the first direction (e.g., the y-axis direction in FIG. 11, up and down direction), quantum dot ink (e.g., quantum dot ink) is formed. When applying the quantum dot ink 7201 of FIG. 7, the quantum dot ink (e.g., the quantum dot ink 7201 of FIG. 7) flows into the connection portion 1150. Accordingly, quantum dot ink (eg, quantum dot ink 7201 in FIG. 7) may be prevented from remaining substantially (or a small amount remaining) on the upper surface of the partition 1140. Through this, the light source substrate (e.g., the light source substrate 501 in FIG. 5) and the quantum dot color conversion substrate 502 can be bonded smoothly. Even if the first pixel 1110a and the second pixel 1110b, which are adjacent in the first direction (e.g., the y-axis direction, up and down direction in FIG. 11) are connected to each other, the second pixel 1110b light is transmitted between the first pixels 1110a. It does not spread. Additionally, light leakage between the first pixel 1110a and the second pixel 1110b adjacent to each other in the first direction (e.g., the y-axis direction, up and down direction in FIG. 11) can be prevented by the light blocking layer 1160.

FIG. 12 is a diagram 1200 showing the shape of a partition formed on a quantum dot color conversion substrate according to an embodiment of the present disclosure.

Referring to FIG. 12, a partition 1140 is formed on a quantum dot color conversion substrate 502 (e.g., the quantum dot color conversion substrate 502 of FIG. 5) according to an embodiment of the present disclosure, and a plurality of pixel regions 1210 are formed. ) can be distinguished. For example, a plurality of pixel areas 1210 of the same color may be arranged in a first direction (e.g., the y-axis direction, up and down direction in FIG. 12). A plurality of pixel areas 1210 of different colors may be arranged in the second direction (e.g., x-axis direction, left and right direction in FIG. 12).

According to one embodiment, micro LED pads may be disposed in the plurality of pixel areas 1210. For example, the micro LED pad may be placed in a position corresponding to the open area 1220 (BM opening) (eg, opening area). The open area 1220 (BM opening) (eg, opening area) of the plurality of pixel areas 1210 may be defined by the light blocking layer 1260.

According to one embodiment, the area of the pixel area 1210 formed by the partition 1240 (e.g., the first area of the pixel area) is the area of the pixel area formed by the light blocking layer 1260 (e.g., the pixel area The partition 1240 may be formed to be larger than the second area of (e.g., the area of the open area). For example, the light blocking layer 1260 may be formed in the pixel area 1210 formed by the partition wall 1240.

According to one embodiment, a partition 1240 may be formed to connect the first pixel 1210a and the second pixel 1210b adjacent to each other in a first direction (e.g., the y-axis direction, up and down direction in FIG. 12). .

For example, the partition wall 1240 is formed to form a connection portion 1250 connecting the first pixel 1210a and the second pixel 1210b adjacent to each other in a first direction (e.g., the y-axis direction, up and down direction in FIG. 12). can be formed.

For example, the width (e.g., the first width) of the connecting portion 1250 connecting the first pixel 1210a and the second pixel 1210b adjacent in the first direction (e.g., the y-axis direction, up and down direction in FIG. 12). ) may be formed to be substantially equal to the width (eg, second width) of the pixel area 1210.

In this way, when the connection portion 1250 is formed connecting the first pixel 1210a and the second pixel 1210b adjacent in the first direction (e.g., the y-axis direction, up and down direction in FIG. 12), quantum dot ink (e.g., quantum dot ink) is formed. When applying the quantum dot ink 7201 of FIG. 7, the quantum dot ink (e.g., the quantum dot ink 7201 of FIG. 7) flows into the connection portion 1250. Accordingly, quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) may be prevented from remaining substantially (or a small amount remaining) on the upper surface of the partition 1240. Through this, the light source substrate (e.g., the light source substrate 501 in FIG. 5) and the quantum dot color conversion substrate 502 can be bonded smoothly. Even if the first pixel 1210a and the second pixel 1210b, which are adjacent in the first direction (e.g., the y-axis direction in FIG. 12, the vertical direction) are connected to each other, the second pixel 1210b light is transmitted between the first pixels 1210a. This does not spread. Additionally, light leakage between the first pixel 1210a and the second pixel 1210b adjacent to each other in the first direction (e.g., the y-axis direction, up and down direction in FIG. 12) can be prevented by the light blocking layer 1260.

FIG. 13A is a diagram 1310 showing the shape of a partition formed on a quantum dot color conversion substrate according to an embodiment of the present disclosure. Figure 13a is a plan view showing the shape of the partition when the quantum dot color conversion substrate is viewed from above.

Referring to FIG. 13A, a partition 1314 is formed on a quantum dot color conversion substrate (e.g., the quantum dot color conversion substrate 502 of FIG. 5) according to an embodiment of the present disclosure, thereby dividing a plurality of pixel regions 1312. It can be done as much as possible. For example, a plurality of pixel areas 1312 of the same color may be arranged in a first direction (eg, the vertical direction in FIG. 13A). A plurality of pixel areas 1312 of different colors may be arranged in the second direction (e.g., left and right direction in FIG. 13A).

According to one embodiment, a partition 1314 may be formed to connect pixels adjacent to each other in a first direction (e.g., the vertical direction in FIG. 13A).

For example, the partition wall 1314 may be formed to form a connection portion 1315 connecting adjacent pixels in a first direction (e.g., the vertical direction in FIG. 13A).

For example, the width (e.g., first width) of the connecting portion 1315 connecting adjacent pixels in the first direction (e.g., up and down direction in FIG. 13A) is the width (e.g., second width) of the pixel area 1312. It can be formed substantially the same as.

In this way, when the connection portion 1315 is formed to connect pixels adjacent to each other in the first direction (e.g., the vertical direction in FIG. 13A), when applying quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7), quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) is formed. : Quantum dot ink 7201 in FIG. 7 flows into the connection portion 1315. Accordingly, quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) may be prevented from remaining substantially (or a small amount remaining) on the upper surface of the partition 1314. Through this, the light source substrate (e.g., the light source substrate 501 in FIG. 5) and the quantum dot color conversion substrate 502 can be bonded smoothly. Even if pixels adjacent to each other in the first direction (e.g., up and down in FIG. 13A) are connected to each other, light does not propagate between pixels. Additionally, light leakage between adjacent pixels in the first direction (e.g., the vertical direction in FIG. 13A) may be prevented by the light blocking layer (e.g., the light blocking layer 1260 in FIG. 12).

FIG. 13B is a diagram 1320 showing the shape of a partition formed on a quantum dot color conversion substrate according to an embodiment of the present disclosure. Figure 13b is a plan view showing the shape of the partition when the quantum dot color conversion substrate is viewed from above.

Referring to FIG. 13B, a partition 1324 is formed on a quantum dot color conversion substrate (e.g., the quantum dot color conversion substrate 502 of FIG. 5) according to an embodiment of the present disclosure, thereby dividing a plurality of pixel regions 1322. It can be done as much as possible. For example, a plurality of pixel areas 1322 of the same color may be arranged in the first direction (eg, the vertical direction in FIG. 13B). A plurality of pixel areas 1322 of different colors may be arranged in the second direction (e.g., left and right direction in FIG. 13B).

According to one embodiment, a partition 1324 may be formed to connect pixels adjacent to each other in a first direction (e.g., the vertical direction in FIG. 13B).

For example, the partition wall 1324 may be formed to form a connection portion 1325 connecting adjacent pixels in a first direction (e.g., the vertical direction in FIG. 13B).

For example, the width (e.g., first width) of the connecting portion 1325 connecting adjacent pixels in the first direction (e.g., up and down direction in FIG. 13B) is the width (e.g., second width) of the pixel area 1322. It can be formed substantially the same as.

According to one embodiment, internal partition walls 1326 may be formed in the space of the connection portion 1325. For example, the internal partition walls 1326 may be formed to protrude from the partition wall 1324 into the space of the connection part 1325.

In this way, when the connection portion 1325 connecting adjacent pixels in the first direction (e.g., the vertical direction in FIG. 13B) is formed and the internal partition walls 1326 are formed, quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) is formed. )), quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) flows into the connection portion 1325. Accordingly, quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) may be prevented from remaining substantially (or a small amount remaining) on the upper surface of the partition 1324. Through this, the light source substrate (e.g., the light source substrate 501 in FIG. 5) and the quantum dot color conversion substrate 502 can be bonded smoothly. Even if pixels adjacent to each other in the first direction (e.g., up and down in FIG. 13B) are connected to each other, light does not propagate between pixels. Additionally, light leakage between adjacent pixels in the first direction (e.g., the vertical direction in FIG. 13B) may be prevented by the light blocking layer (e.g., the light blocking layer 1260 in FIG. 12).

FIG. 13C is a diagram 1330 showing the shape of a partition formed on a quantum dot color conversion substrate according to an embodiment of the present disclosure. Figure 13c is a plan view showing the shape of the partition when the quantum dot color conversion substrate is viewed from above.

Referring to FIG. 13C, a partition 1334 is formed on a quantum dot color conversion substrate (e.g., the quantum dot color conversion substrate 502 of FIG. 5) according to an embodiment of the present disclosure, thereby dividing a plurality of pixel regions 1332. It can be done as much as possible. For example, a plurality of pixel areas 1332 of the same color may be arranged in a first direction (e.g., up and down direction in FIG. 13C). A plurality of pixel areas 1332 of different colors may be arranged in the second direction (e.g., left and right direction in FIG. 13C).

According to one embodiment, a partition 1334 may be formed to connect pixels adjacent to each other in a first direction (e.g., the vertical direction in FIG. 13C).

For example, the partition wall 1334 may be formed to form a connection portion 1335 connecting adjacent pixels in a first direction (e.g., the vertical direction in FIG. 13C).

For example, the width (e.g., first width) of the connecting portion 1335 connecting adjacent pixels in the first direction (e.g., up and down direction in FIG. 13C) is the width (e.g., second width) of the pixel area 1332. It can be formed substantially the same as.

According to one embodiment, at least one internal partition 1336 may be formed in the space of the connection part 1335. For example, the internal partition wall 1336 may be formed in an island shape. For example, the internal partition 1336 may be formed in an “I” shape that is long in the vertical direction in FIG. 13C.

In this way, when a connection portion 1335 is formed to connect pixels adjacent to each other in the first direction (e.g., the vertical direction in FIG. 13C) and an internal partition 1336 is formed, quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) is formed. ), quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) flows into the connection portion 1335. Accordingly, quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) may be prevented from remaining substantially (or a small amount remaining) on the upper surface of the partition wall 1334. Through this, the light source substrate (e.g., the light source substrate 501 in FIG. 5) and the quantum dot color conversion substrate 502 can be bonded smoothly. Even if pixels adjacent to each other in the first direction (e.g., up and down in FIG. 13C) are connected to each other, light does not propagate between pixels. Additionally, light leakage between adjacent pixels in the first direction (e.g., the vertical direction in FIG. 13C) may be prevented by the light blocking layer (e.g., the light blocking layer 1260 in FIG. 12).

FIG. 13D is a diagram 1340 showing the shape of a partition formed on a quantum dot color conversion substrate according to an embodiment of the present disclosure. Figure 13d is a plan view showing the shape of the partition when the quantum dot color conversion substrate is viewed from above.

Referring to FIG. 13D, a partition 1344 is formed on a quantum dot color conversion substrate (e.g., the quantum dot color conversion substrate 502 of FIG. 5) according to an embodiment of the present disclosure, thereby dividing a plurality of pixel regions 1342. It can be done as much as possible. For example, a plurality of pixel areas 1342 of the same color may be arranged in a first direction (e.g., up and down direction in FIG. 13D). A plurality of pixel areas 1342 of different colors may be arranged in the second direction (e.g., left and right direction in FIG. 13D).

According to one embodiment, a partition 1344 may be formed to connect pixels adjacent to each other in a first direction (e.g., the vertical direction in FIG. 13D).

For example, the partition wall 1344 may be formed to form a connection portion 1345 connecting adjacent pixels in a first direction (e.g., the vertical direction in FIG. 13D).

For example, the width (e.g., first width) of the connecting portion 1345 connecting adjacent pixels in the first direction (e.g., up and down direction in FIG. 13D) is the width (e.g., second width) of the pixel area 1342. It can be formed substantially the same as.

According to one embodiment, at least one internal partition 1346 (internal wall) may be formed in the space of the connection part 1345. For example, the internal partition wall 1346 may be formed in an island shape. For example, the internal partition 1346 may be formed in an “I” shape that is long in the vertical direction in FIG. 13D.

In this way, when the connection portion 1345 connecting adjacent pixels in the first direction (e.g., the vertical direction in FIG. 13D) is formed and the internal partition wall 1346 is formed, quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) is formed. ), quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) flows into the connection portion 1345. Therefore, it is possible to ensure that quantum dot ink (eg, quantum dot ink 7201 in FIG. 7) does not substantially remain (or a small amount remains) on the upper surface of the partition 1344. Through this, the light source substrate (e.g., the light source substrate 501 in FIG. 5) and the quantum dot color conversion substrate 502 can be bonded smoothly. Even if pixels adjacent to each other in the first direction (e.g., up and down in FIG. 13D) are connected to each other, light does not propagate between pixels. Additionally, light leakage between adjacent pixels in the first direction (e.g., the vertical direction in FIG. 13D) may be prevented by the light blocking layer (e.g., the light blocking layer 1260 in FIG. 12).

FIG. 13E is a diagram 1340 showing the shape of a partition formed on a quantum dot color conversion substrate according to an embodiment of the present disclosure. Figure 13e is a plan view showing the shape of the partition when the quantum dot color conversion substrate is viewed from above.

Referring to FIG. 13E, a partition 1354 is formed on a quantum dot color conversion substrate (e.g., the quantum dot color conversion substrate 502 of FIG. 5) according to an embodiment of the present disclosure, thereby dividing a plurality of pixel regions 1352. It can be done as much as possible. For example, a plurality of pixel areas 1352 of the same color may be arranged in the first direction (eg, the vertical direction in FIG. 13E). A plurality of pixel areas 1352 of different colors may be arranged in the second direction (e.g., left and right direction in FIG. 13E).

According to one embodiment, a partition 1354 may be formed to connect pixels adjacent to each other in a first direction (e.g., the vertical direction in FIG. 13E).

For example, the partition 1354 may be formed to form a connection portion 1355 that connects adjacent pixels in a first direction (e.g., the vertical direction in FIG. 13E).

For example, the width (e.g., first width) of the connecting portion 1355 connecting adjacent pixels in the first direction (e.g., up and down direction in FIG. 13E) is the width (e.g., second width) of the pixel area 1352. It can be formed substantially the same as.

According to one embodiment, at least one internal partition 1356 (internal wall) may be formed in the space of the connection part 1355. For example, the internal partition wall 1356 may be formed in an island shape. For example, the internal partition 1356 may be formed in an “I” shape that is long in the vertical direction in FIG. 13E.

For example, a portion of the first pixel area may be disposed on the first side 1357 of the internal partition wall 1356. For example, the second side 1358 of the internal partition 1356 may also be disposed in a portion of the second pixel area that is vertically adjacent to the first pixel area.

For example, adjacent pixels in a first direction (e.g., the vertical direction in FIG. 13E) may be connected to each other by the internal partition 1356.

In this way, when a connection portion 1355 is formed to connect pixels adjacent to each other in the first direction (e.g., the vertical direction in FIG. 13e) and an internal partition 1356 is formed, quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) is formed. ), quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) flows into the connection portion 1355. Accordingly, quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) may be prevented from remaining substantially (or a small amount remaining) on the upper surface of the partition wall 1354. Through this, the light source substrate (e.g., the light source substrate 501 in FIG. 5) and the quantum dot color conversion substrate 502 can be bonded smoothly. Even if pixels adjacent to each other in the first direction (e.g., the vertical direction in FIG. 13E) are connected to each other, light does not propagate between the pixels. Additionally, light leakage between adjacent pixels in the first direction (e.g., the vertical direction in FIG. 13E) may be prevented by the light blocking layer (e.g., the light blocking layer 1260 in FIG. 12).

FIG. 13F is a diagram 1360 showing the shape of a partition formed on a quantum dot color conversion substrate according to an embodiment of the present disclosure. Figure 13f is a plan view showing the shape of the partition when the quantum dot color conversion substrate is viewed from above.

Referring to FIG. 13F, partition walls 1364 and 1366 are formed on a quantum dot color conversion substrate (e.g., quantum dot color conversion substrate 502 of FIG. 5) according to an embodiment of the present disclosure, thereby forming a plurality of pixel areas 1362. field and dummy areas 1365 can be distinguished.

For example, a plurality of pixel areas 1332 of the same color may be arranged in the first direction (e.g., the vertical direction in FIG. 13F). A plurality of pixel areas 1332 of different colors may be arranged in the second direction (e.g., left and right direction in FIG. 13F).

For example, adjacent pixel areas 1362 may be divided in a first direction (e.g., the vertical direction in FIG. 13F ) by partition walls 1364 and 1366 .

For example, a plurality of pixel regions 1332 of different colors may be divided into a second direction (e.g., left and right direction in FIG. 13F) by the partition walls 1364 and 1366.

For example, a dummy area 1365 may be disposed between pixel areas 1362 adjacent to each other in the first direction (e.g., the vertical direction in FIG. 13F).

For example, the width (e.g., first width) of the dummy area 1365 disposed between adjacent pixel areas 1362 in the first direction (e.g., the vertical direction in FIG. 13C) is the width of the pixel area 1332 ( For example, it may be formed substantially the same as the second width).

When applying quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7), the quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) flows into the dummy area 1365. Accordingly, quantum dot ink (e.g., quantum dot ink 7201 in FIG. 7) may be prevented from remaining substantially (or a small amount remaining) on the upper surfaces of the partition walls 1364 and 1366. Through this, the light source substrate (e.g., the light source substrate 501 in FIG. 5) and the quantum dot color conversion substrate 502 can be bonded smoothly.

A dummy area 1365 is disposed between adjacent pixels in the first direction (e.g., up and down in FIG. 13F), so light does not propagate between pixels. Additionally, light leakage between adjacent pixels in the first direction (e.g., the vertical direction in FIG. 13C) may be prevented by the light blocking layer (e.g., the light blocking layer 1260 in FIG. 12).

Figure 14 is a plan view showing a partition formed on a quantum dot color conversion substrate and a conductive layer formed on the upper part of the partition according to an embodiment of the present disclosure. FIG. 15 is a cross-sectional view taken along lines A1-A2 and B1-B2 shown in FIG. 14.

14 and 15, a display (e.g., display 500 of FIG. 5) according to an embodiment of the present disclosure includes a light source substrate (e.g., light source substrate 501 of FIG. 5), and a quantum dot color conversion substrate. It may include (1400) (e.g., the quantum dot color conversion substrate 502 of FIG. 5).

According to one embodiment, the quantum dot color conversion substrate 1400 includes a quantum dot (QD) color conversion layer (e.g., quantum dot color conversion layer 530 in FIG. 5) and a partition wall 1530 (e.g., partition wall 540 in FIG. 5). ), flat layer 1550 (e.g., flat layer 550 in FIG. 5), light blocking layer 1560 (e.g., light blocking layer 560 in FIG. 5 (e.g., black matrix (BM)), color filter layer 1570 ) (e.g., the color filter layer 570 in Figure 5), a conductive layer 1580, and a transparent substrate (e.g., the transparent substrate 580 in Figure 5). Figures 14 and 15 show quantum dot color conversion. This shows the state during the manufacturing process of the substrate 1400, and the quantum dot (QD) color conversion layer (eg, quantum dot color conversion layer 530 in FIG. 5) is not shown.

According to one embodiment, areas of each pixel may be divided by a partition 1350. A light blocking layer 1560 is disposed between the color filter layers 1570 of each pixel to prevent color mixing between pixels and to distinguish the area of each pixel. A transparent substrate (eg, transparent glass) may be disposed on the color filter layer 1570.

According to one embodiment, the conductive layer 1580 may be disposed on the partition wall 1530.

According to one embodiment, light generated from a quantum dot (QD) color conversion layer (e.g., quantum dot color conversion layer 530 in FIG. 5) is reflected inside the pixel by the conductive layer 1580, thereby improving luminous efficiency. there is.

According to one embodiment, the conductive layer 1580 may also be formed on the upper part of the partition wall 1314 shown in FIG. 13A. For example, if the conductive layer 1580 is formed on the upper part of the partition wall 1314 shown in FIG. 13A, the luminous efficiency of the pixel can be improved by securing a light reflection area on the left and right sides of the pixel.

According to one embodiment, the conductive layer 1580 may also be formed on top of the partition wall 1324 and the internal partition wall 1326 shown in FIG. 13B. For example, when the conductive layer 1580 is formed on the upper part of the partition wall 1324 and the internal partition wall 1326 shown in FIG. 13B, the light reflection area is secured on the left, right, upper, and lower sides of the pixel. Luminous efficiency can be improved.

According to one embodiment, the conductive layer 1580 may also be formed on top of the partition wall 1334 and the internal partition wall 1336 shown in FIG. 13C. For example, when the conductive layer 1580 is formed on the upper part of the partition 1334 and the internal partition 1336 shown in FIG. 13C, the light reflection area is secured on the left, right, upper, and lower sides of the pixel. Luminous efficiency can be improved.

According to one embodiment, the conductive layer 1580 may also be formed on the upper part of the partition wall 1344 and the internal partition wall 1346 shown in FIG. 13D. For example, when the conductive layer 1580 is formed on the upper part of the partition 1344 and the internal partition 1346 shown in FIG. 13D, the light reflection area is secured on the left, right, upper, and lower sides of the pixel. Luminous efficiency can be improved.

According to one embodiment, the conductive layer 1580 may also be formed on top of the partition wall 1354 and the internal partition wall 1356 shown in FIG. 13E. For example, when the conductive layer 1580 is formed on the upper part of the partition 1354 and the internal partition 1356 shown in FIG. 13E, the light reflection area is secured on the left, right, upper, and lower sides of the pixel. Luminous efficiency can be improved.

Figure 16 is a plan view showing a partition formed on a quantum dot color conversion substrate and a conductive layer formed on the upper part of the partition according to an embodiment of the present disclosure. FIG. 17 is a cross-sectional view taken along lines A1-A2 and B1-B2 shown in FIG. 16.

16 and 17, a display (e.g., display 500 of FIG. 5) according to an embodiment of the present disclosure includes a light source substrate (e.g., light source substrate 501 of FIG. 5), and a quantum dot color conversion substrate. It may include (1600) (e.g., the quantum dot color conversion substrate 502 of FIG. 5).

According to one embodiment, the quantum dot color conversion substrate 1600 includes a quantum dot (QD) color conversion layer (e.g., quantum dot color conversion layer 530 in FIG. 5) and a partition wall 1640 (e.g., partition wall 540 in FIG. 5). ), flat layer 1650 (e.g., flat layer 550 in FIG. 5), light blocking layer 1660 (e.g., light blocking layer 560 in FIG. 5 (e.g., black matrix (BM)), color filter layer 1670 ) (e.g., the color filter layer 570 in FIG. 5), a conductive layer 1680, an internal partition wall 1690, and a transparent substrate (e.g., the transparent substrate 580 in FIG. 5). For example, , A plurality of pixel areas 1610 may be divided by a partition 1640. Figures 16 and 17 show the state during the manufacturing process of the quantum dot color conversion substrate 1600, and the quantum dot (QD) color conversion layer ( Example: The quantum dot color conversion layer 530 in FIG. 5 is not shown.

According to one embodiment, areas of each pixel may be divided by a partition 1640. A light blocking layer 1660 is disposed between the color filter layers 1670 of each pixel to prevent color mixing between pixels and to distinguish the area of each pixel. A transparent substrate (eg, transparent glass) may be disposed on the color filter layer 1670.

According to one embodiment, a conductive layer 1680 may be disposed on the partition wall 1640.

According to one embodiment, light generated from a quantum dot (QD) color conversion layer (e.g., quantum dot color conversion layer 530 in FIG. 5) is reflected inside the pixel by the conductive layer 1680, thereby improving light emission efficiency. there is.

According to one embodiment, the conductive layer 1680 may be formed on top of the partition wall 1640 and the internal partition wall 1690. For example, the internal partition wall 1690 may be formed in an “I” shape that is long in the first direction (up and down direction in FIG. 16).

When the conductive layer 1680 is formed on the partition wall 1640 and the internal partition wall 1690, the light-emitting efficiency of the pixel can be improved by securing a light reflection area on the left, right, upper, and lower sides of the pixel.

Figure 18 is a plan view showing a partition formed on a quantum dot color conversion substrate and a conductive layer formed on the upper part of the partition according to an embodiment of the present disclosure.

17 and 18, a display (e.g., display 500 of FIG. 5) according to an embodiment of the present disclosure includes a light source substrate (e.g., light source substrate 501 of FIG. 5), and a quantum dot color conversion substrate. It may include (1800) (e.g., the quantum dot color conversion substrate 502 of FIG. 5).

According to one embodiment, the quantum dot color conversion substrate 1800 includes a quantum dot (QD) color conversion layer (e.g., quantum dot color conversion layer 530 in FIG. 5) and a partition wall 1840 (e.g., partition wall 540 in FIG. 5). ), a flat layer (e.g., the flattening layer 550 in FIG. 5), a light blocking layer (e.g., a light blocking layer 560 in FIG. 5 (e.g., BM (black matrix)), a color filter layer (e.g., a color filter layer in FIG. 5) (570)), a conductive layer (e.g., the conductive layer 1680 in FIG. 17), an internal barrier wall 1890 (e.g., an inner barrier wall 1690 in FIGS. 16 and 17), and a transparent substrate (e.g., the conductive layer 1680 in FIG. 5). It may include a transparent substrate 580. For example, a plurality of pixel areas 1810 may be divided by a partition 1840. Figure 18 shows the state during the manufacturing process of the quantum dot color conversion substrate 1800. It shows a quantum dot (QD) color conversion layer (e.g., the quantum dot color conversion layer 530 in FIG. 5), a flattening layer (e.g., the flattening layer 550 in FIG. 5), and a light blocking layer (e.g., the light blocking layer in FIG. 5). The layer 560 (eg, black matrix (BM)) and the color filter layer (eg, color filter layer 570 in FIG. 5) are not shown.

According to one embodiment, the areas 1810 of each pixel may be divided by a partition 1840.

According to one embodiment, a conductive layer (for example, the conductive layer 1680 in FIG. 17) may be disposed on the partition wall 1840.

According to one embodiment, light generated from a quantum dot (QD) color conversion layer (e.g., quantum dot color conversion layer 530 in FIG. 5) is reflected inside the pixel by the conductive layer 1880, thereby improving luminous efficiency. there is.

According to one embodiment, a conductive layer (eg, the conductive layer 1680 in FIG. 17) may be formed on the partition wall 1840 and the inner partition wall 1890. For example, the internal partition wall 1890 may be formed in an “I” shape that is long in the first direction (up and down direction in FIG. 18).

When a conductive layer (e.g., the conductive layer 1680 in FIG. 17) is formed on the upper part of the partition 1840 and the internal partition 1890, the light reflection area is secured on the left, right, upper, and lower sides of the pixel. Luminous efficiency can be improved.

Figure 19 is a plan view showing a partition formed on a quantum dot color conversion substrate and a conductive layer formed on the upper part of the partition according to an embodiment of the present disclosure. FIG. 20 is a cross-sectional view taken along lines A1-A2 and B1-B2 shown in FIG. 19.

19 and 20, a display (e.g., display 500 of FIG. 5) according to an embodiment of the present disclosure includes a light source substrate (e.g., light source substrate 501 of FIG. 5), and a quantum dot color conversion substrate. It may include (1900) (e.g., the quantum dot color conversion substrate 502 of FIG. 5).

According to one embodiment, the quantum dot color conversion substrate 1900 includes a quantum dot (QD) color conversion layer (e.g., quantum dot color conversion layer 530 in FIG. 5) and a partition wall 2040 (e.g., partition wall 540 in FIG. 5). ), flat layer 2050 (e.g., flat layer 550 in FIG. 5), light blocking layer 2060 (e.g., light blocking layer 560 in FIG. 5 (e.g., black matrix (BM)), color filter layer 2070 ) (e.g., color filter layer 570 in FIG. 5), a conductive layer 2080 (e.g., conductive layer 1680 in FIG. 17), and a transparent substrate (e.g., transparent substrate 580 in FIG. 5). 19 and 20 show the state during the manufacturing process of the quantum dot color conversion substrate 1900, and the quantum dot (QD) color conversion layer (e.g., the quantum dot color conversion layer 530 in FIG. 5) is not shown. .

According to one embodiment, the areas 1910 of each pixel may be divided by a partition 2040.

According to one embodiment, a conductive layer 2080 (eg, conductive layer 1680 in FIG. 17) may be disposed on the partition wall 2040. For example, the conductive layer 2080 (e.g., the conductive layer 1680 in FIG. 17) disposed in each pixel area 1910 is electrically connected at least in part through the contact portions 1920, so that the entire conductive layer ( 2080) (e.g., the conductive layer 1680 of FIG. 17) may be electrically connected.

According to one embodiment, light generated from a quantum dot (QD) color conversion layer (e.g., quantum dot color conversion layer 530 in FIG. 5) is reflected inside the pixel by the conductive layer 2080, thereby improving light emission efficiency. there is.

According to one embodiment, the conductive layer 2080 (e.g., the conductive layer 1680 in FIG. 17) may be formed on the partition wall 2040 and the internal partition wall 2090. For example, the internal partition 2090 may be formed in an “I” or “I” shape with a long length in the first direction (e.g., the vertical direction in FIG. 18). When the conductive layer 2080 (e.g., the conductive layer 1680 in FIG. 17) is formed on the upper part of the partition 2040 and the internal partition 2090, the light reflection area is secured on the left, right, upper, and lower sides of the pixel. This can improve the luminous efficiency of the pixel.

Figures 21 and 22 are diagrams showing a method of forming a quantum dot color conversion layer.

Referring to FIG. 21, a conductive layer 2080 may be formed on the partition wall 2040 and the inner partition wall 2090. To form a quantum dot color conversion layer, quantum dot ink 2120 can be applied to the pixel area using the nozzle 2110. At this time, a quantum dot color conversion substrate can be placed on the king plate 2130, and voltage V1 can be applied to the nozzle 2110. When voltage V1 is applied to the nozzle 2110, lift may be generated by the conductive layer 2080 formed on the partition wall 2040 and the internal partition wall 2090. When a lift force occurs in the conductive layer 2080, the quantum dot ink 2120 may be pulled toward the conductive layer 2080. When the quantum dot ink 2120 is drawn toward the conductive layer 2080, the quantum dot ink 2120 may be applied to the pixel area along the wall of the conductive layer 2080.

Referring to FIG. 22, a conductive layer 2080 may be formed on the partition wall 2040 and the inner partition wall 2090. To form a quantum dot color conversion layer, quantum dot ink 2120 can be applied to the pixel area using the nozzle 2110. At this time, a quantum dot color conversion substrate may be placed on the working plate 2130, a first voltage V1 may be applied to the conductive layer 2890, and a second voltage V2 may be applied to the nozzle 2110. When the first voltage V1 is applied to the conductive layer 2890 and the second voltage V2 is applied to the nozzle 2110, quantum dot ink 2120 can be applied to the center of the pixel.

For example, to prevent the quantum dot ink 2120 from being pulled toward the conductive layer 2080, the first voltage V1 (eg, V1 > V2) may be applied at a voltage greater than the second voltage V2.

For example, the first voltage V1 may have a first phase, and the second voltage V2 may have a second phase opposite to the first phase of the first voltage. For example, if the polarity (+, -) of the second voltage (V2) applied to the conductive layer 2080 and the polarity (+, -) of the first voltage (V1) applied to the nozzle 2110 are reversed, A repulsive force may be generated on the surface of the partition and an attractive force may be formed on the bottom surface. Due to the surface where the attractive force is formed in the opposite direction, the quantum dot ink 2120 is applied to the center of the pixel without being pulled toward the conductive layer 2080.

For example, a voltage greater than the second voltage (V2) may be applied to the first voltage (V1). Hearing is formed in the plane where the polarity (+, -) of the second voltage (V2) applied to the conductive layer 2080 and the polarity (+, -) of the first voltage (V1) applied to the nozzle (2110) are formed. When hearing is formed on the side where the polarity (+, -) of the first voltage (V1) and the polarity (+, -) of the second voltage (V2) are formed, the quantum dot ink 2120 is formed in the conductive layer 2080. ) can be applied to the center of the pixel without being dragged into the group.

The display 500 according to an embodiment of the present disclosure is a micro LED (light emitting diode) display (e.g., the display 500 of FIG. 5), and includes a pixel area (e.g., the pixel area 910 of FIG. 9, Pixel area 1010 in FIG. 10, pixel area 1110 in FIG. 11, pixel area 1210 in FIG. 12, pixel area 1312 in FIG. 13A, pixel area 1322 in FIG. 13B, and pixel area in FIG. 13C. 1332, pixel area 1342 in FIG. 13D, pixel area 1352 in FIG. 13E, pixel area 1362 in FIG. 13F, pixel area 1610 in FIG. 16, pixel area 1810 in FIG. 18, FIG. A partition wall (e.g., partition wall 540 in FIG. 5) forming a pixel area 1910 of 19, the pixel areas 910, 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362, 1610, 1810, 1910), an open area (e.g., the open area of FIG. 9) of the pixel area (910, 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362, 1610, 1810, 1910) A light blocking portion defining an area 920, the open area 1020 of FIG. 10, the open area 1120 of FIG. 11, and the open area 1220 of FIG. 12), the pixel areas 910, 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362, 1610, 1810, 1910) (e.g., quantum dot color conversion layer 530 in FIG. 5), and corresponding to the quantum dot color conversion layer 530. It may include a color filter layer (e.g., the color filter layer 570 of FIG. 5, the color filter layer 1570 of FIG. 15, the color filter layer 1670 of FIG. 16, and the color filter layer 2070 of FIG. 20). The area of the pixel areas (910, 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362, 1610, 1810, 1910) may be wider than the open areas (920, 1020, 1120, 1220). there is. A first interval between adjacent pixel areas (910, 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362, 1610, 1810, 1910) in a first direction is perpendicular to the first direction. It may be formed to be narrower than the second gap between adjacent pixels.

According to one embodiment, the pixel areas (910, 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362, 1610, 1810, 1910) adjacent to each other in the first direction are in the form of a hexagon with narrow corners. can be formed.

According to one embodiment, the first partition wall 540 between pixel areas 910, 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362, 1610, 1810, and 1910 adjacent to each other in the first direction. One width may be narrower than the second width of the partition 540 between adjacent pixels in the second direction.

According to one embodiment, the first pixel areas 910, 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362, 1610, 1810, 1910 and the second pixel area 910 are adjacent to each other in the first direction. , 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362, 1610, 1810, 1910).

According to one embodiment, the first width of the connection portion is greater than the second width of the first pixel area (910, 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362, 1610, 1810, 1910). It can be formed narrowly.

According to one embodiment, the width of the connection portion and the width of the first pixel area (910, 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362, 1610, 1810, 1910) are substantially the same. can be formed.

According to one embodiment, it may include at least one internal partition (e.g., the internal partition 1336 in Figure 13C, the internal partition 1346 in Figure 13D, and the internal partition 1356 in Figure 13E) disposed in the connection part. there is.

According to one embodiment, the at least one internal partition wall 1336, 1346, and 1356 may be formed to protrude from the partition wall 1334 in the direction of the connection part.

According to one embodiment, the at least one internal partition wall 1336, 1346, and 1356 may be formed in an island shape within the connection portion.

According to one embodiment, the at least one internal partition 1346 may be formed in an “I” or “I” shape that is long in the first direction within the connection portion.

According to one embodiment, the first side of the at least one internal partition 1336, 1346, 1356 is located in the first pixel area 910, 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362, 1610. , 1810, 1910), and the second side of the at least one internal partition is disposed in the second pixel area (910, 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362, 1610, 1810, 1910).

According to one embodiment, it may include a conductive layer disposed on at least one of the top, side, and bottom surfaces of the partition wall 540.

According to one embodiment, it may include a conductive layer disposed on at least one of the top, side, and bottom surfaces of the internal partition walls 1336, 1346, and 1356.

A method of manufacturing a display 500 according to an embodiment of the present disclosure includes pixel areas 910, 1010, 1110, 1210, and 1312 on a substrate. 1322, 1332, 1342, 1352, 1362, 1610, 1810, 1910, forming a partition wall 540, and pixel areas 910, 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362. , 1610, 1810, 1910), forming a light blocking portion defining open areas 920, 1020, 1120, 1220, and pixel areas 910, 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362. , 1610, 1810, 1910, a quantum dot color conversion layer 530 is formed, color filter layers 570, 1570, 1670, 2070 are formed to correspond to the quantum dot color conversion layer, and the pixel areas 910, 1010, The areas of 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362, 1610, 1810, and 1910 are formed to be wider than the open areas (920, 1020, 1120, and 1220), and the pixel areas adjacent in the first direction ( 910, 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362, 1610, 1810, 1910) and a second interval between adjacent pixels in a second direction orthogonal to the first direction. It can be formed more narrowly.

According to one embodiment, the pixel areas (910, 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362, 1610, 1810, 1910) adjacent to each other in the first direction are in the form of a hexagon with narrow corners. It can be formed.\

According to one embodiment, the first partition wall 540 between pixel areas 910, 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362, 1610, 1810, and 1910 adjacent to each other in the first direction. One width may be formed to be narrower than the second width of the partition 540 between adjacent pixels in the second direction.

According to one embodiment, the first pixel areas 910, 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362, 1610, 1810, 1910 and the second pixel area 910 are adjacent to each other in the first direction. , 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362, 1610, 1810, 1910).

According to one embodiment, the first width of the connection portion is greater than the second width of the first pixel area (910, 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362, 1610, 1810, 1910). It can be formed narrowly.

In the display and its manufacturing method according to an embodiment of the present disclosure, when forming the quantum dot color conversion layer of the display by EHD spinning, the partition wall can be formed so that the quantum dot ink does not substantially remain on the upper surface of the partition wall. Through this, it is possible to ensure smooth bonding of the light source substrate and the quantum dot color conversion substrate.

In the display and its manufacturing method according to an embodiment of the present disclosure, light leakage between adjacent first pixels and second pixels in a first direction (e.g., y-axis direction, vertical direction) can be prevented.

The display and its manufacturing method according to an embodiment of the present disclosure can form a barrier rib such that quantum dot ink is ejected from the center of the pixel so that the quantum dot ink does not substantially remain on the upper surface of the barrier rib. Through this, the quality of the product can be improved by ensuring smooth bonding of the light source substrate and the quantum dot color conversion substrate.

The micro LED display and its manufacturing method according to an embodiment of the present disclosure can reduce the manufacturing cost of the product.

500: display
530: Quantum dot color conversion layer
540: Bulkhead
570, 1570, 1670, 2070: Color filter layer
910, 1010, 1110, 1210, 1312, 1322, 1332, 1342, 1352, 1362: Pixel area
1610, 1810, 1910: pixel area
1336, 1346, 1356: internal bulkhead
920, 1020, 1120, 1220: Open area

Claims (20)

In a micro LED (light emitting diode) display,
A partition wall forming a pixel area;
Micro LED disposed in the pixel area;
a light blocking portion defining an open area of the pixel area;
A quantum dot color conversion layer formed in the pixel area; and
A color filter layer disposed to correspond to the quantum dot color conversion layer,
The area of the pixel area is formed to be larger than the open area,
A first gap between adjacent pixel areas in a first direction is formed to be narrower than a second gap between adjacent pixels in a second direction orthogonal to the first direction,
display. According to claim 1,
The pixel area adjacent to the first direction is formed in a hexagonal shape with narrow corners,
display. According to any one of claims 1 to 2,
A first width of the partition between adjacent pixel areas in the first direction is formed to be narrower than a second width of the partition between adjacent pixels in the second direction,
display. According to claim 1,
Comprising a connection unit connecting a first pixel area and a second pixel area adjacent in the first direction,
display. According to clause 4,
The first width of the connection portion is narrower than the second width of the first pixel area,
display. According to clause 4,
The width of the connection portion and the width of the first pixel area are formed to be substantially equal,
display. The method according to any one of claims 5 to 6,
Comprising at least one internal partition disposed in the connection section,
display. According to clause 7,
The at least one internal partition is formed to protrude from the partition in the direction of the connection part,
display. According to clause 7,
The at least one internal partition is formed in an island shape within the connection part,
display. According to any one of claims 7 to 8,
The at least one internal partition is formed in an “I” or “Ⅰ” shape with a long length in the first direction within the connection portion,
display. According to any one of claims 7 to 8,
A first side of the at least one internal partition is disposed in at least a portion of the first pixel area,
A second side of the at least one internal partition is disposed in at least a portion of the second pixel area,
display. The method according to any one of claims 7 to 11,
Comprising a conductive layer disposed on at least one of the upper, side, and lower surfaces of the partition,
display. The method according to any one of claims 7 to 12,
Comprising a conductive layer disposed on at least one of the top, side, and bottom surfaces of the internal partition,
display. The method according to any one of claims 7 to 13,
A conductive layer disposed on the upper surface of the partition wall,
A conductive layer disposed on the upper surface of the internal partition is electrically connected,
display. The method according to any one of claims 7 to 14,
Conductive layers placed in the entire pixel area are electrically connected,
display. In a method of manufacturing a micro LED (light emitting diode) display,
Forming a partition wall defining a pixel area on the substrate,
Forming a light blocking portion defining an open area of the pixel area,
Forming a quantum dot color conversion layer in the pixel area,
Forming a color filter layer to correspond to the quantum dot color conversion layer,
The area of the pixel area is formed to be larger than the open area,
Forming a first gap between adjacent pixel areas in a first direction to be narrower than a second gap between adjacent pixels in a second direction orthogonal to the first direction.
Manufacturing method of display. According to claim 16,
The pixel area adjacent to the first direction is formed in a hexagonal shape with narrow corners,
Manufacturing method of display. The method according to any one of claims 16 to 17,
forming a first width of a partition between adjacent pixel areas in the first direction to be narrower than a second width of a partition between adjacent pixels in the second direction,
Manufacturing method of display. According to claim 16,
Forming a connection part connecting a first pixel area and a second pixel area adjacent in the first direction,
Manufacturing method of display. According to clause 19,
Forming the first width of the connection portion to be narrower than the second width of the first pixel area,
Manufacturing method of display.

Images