KR20240009670A - New Phase-Shift Full-Bridge Converter with Coupled Inductor Rectifier - Google Patents

Abstract

A new phase-shift full bridge converter combined with an inductor rectifier and its operating method and system are presented. The new phase-shift full bridge converter combined with the inductor rectifier proposed in the present invention includes a primary circuit and a secondary circuit, and the primary circuit includes a first switch (Q1) and a second switch (Q2) in series. connected, the third switch (Q3) and the fourth switch (Q4) are connected in series, the connection terminal between the first switch (Q1) and the second switch (Q2), and the third switch (Q3) and the fourth switch (Q4) ) A primary transformer is connected to the connection terminal, and in the secondary circuit, a first switch (SR1) and a second switch (SR2) are connected in series, and the first switch (SR1) and the second switch (SR2) A first transformer on the secondary side (T21) and a second transformer (T22) are connected in parallel to the connection terminal between the two, and another end of the first transformer on the secondary side (T21) is connected to the first diode (DB1), and the first Another end of the diode DB1 is connected to the first inductor Lo1, another end of the second secondary transformer T22 is connected to the second diode DB2, and another end of the second diode DB2 is connected to the first inductor Lo1. The other end is connected to the second inductor (Lo2).

Description

New Phase-Shift Full-Bridge Converter with Coupled Inductor Rectifier}

The present invention relates to a new phase-shift full bridge converter combined with an inductor rectifier and a method of operating the same.

Currently, many automobile companies around the world are actively investing in research on electric vehicles. LDC (Low DC-DC Converter) is considered the core of the main power conversion devices in electric vehicles because it supplies power to electrical loads within the vehicle using a high-voltage battery as a source of supply. As the driving range of electric vehicles increases, improvements in LDC efficiency are also required. The topology of LDC with high efficiency includes Coupled Inductor Rectifier (CIR), Phase Shift Full Bridge (PSFB), and Converter With Low Conduction Loss. The existing CIR PSFB converter with low conduction loss has low conduction loss by reducing the circulating current on the primary side in freewheeling mode. However, there is a disadvantage that the voltage ringing of the two diodes on the secondary side is large and the duty ratio variation increases as the input voltage range becomes wider.

Korean Patent Publication No. 10-1622139 (2016.05.12)

The technical problem to be achieved by the present invention is to create an inductor rectifier with high efficiency by clamping the voltage of two switches on the secondary side to the output voltage and increasing the voltage gain through a boost operation. The aim is to provide a new combined phase shift full bridge converter and its operating method.

In one aspect, the new phase-shift full bridge converter combined with the inductor rectifier proposed in the present invention includes a primary circuit and a secondary circuit, and the primary circuit includes a first switch (Q1) and a second switch ( Q2) is connected in series, the third switch (Q3) and the fourth switch (Q4) are connected in series, and the connection terminal between the first switch (Q1) and the second switch (Q2) and the third switch (Q3) A primary transformer is connected to the connection terminal between the fourth switches (Q4), and in the secondary circuit, a first switch (SR1) and a second switch (SR2) are connected in series, and the first switch (SR1) and the second switch (SR2) are connected in series. The first transformer (T21) and the second transformer (T22) on the secondary side are connected in parallel at the connection terminal between the two switches (SR2), and another end of the first transformer (T21) on the secondary side is connected to the first diode (DB1). connected, another end of the first diode DB1 is connected to the first inductor Lo1, and another end of the second secondary transformer T22 is connected to the second diode DB2, and the second diode Another end of (DB2) is connected to the second inductor (Lo2).

In the normal operation according to an embodiment of the present invention, when the first switch (Q1) and the fourth switch (Q4) on the primary side are turned on at the same time, the first switch (SR1) on the secondary side is turned on and enters the power mode. It operates in Powering Mode, and when the second switch (Q2) and the third switch (Q3) on the primary side are turned on at the same time, the second switch (SR2) on the secondary side is turned on and operates in powering mode.

In the boost operation according to an embodiment of the present invention, the PWM (Pulse Width Modulation) of the secondary first switch SR1 and the second switch SR2 in the normal operation stage is delayed in phase, so that the primary 1 switch (Q1) and the fourth switch (Q4) are turned on, and operate in build-up mode when the second switch (SR2) on the secondary side is turned on, and the first switch (Q1) on the primary side And the fourth switch (Q4) is turned on, and operates in power mode when the first switch (SR1) on the secondary side is turned on, the second switch (Q2) and third switch (Q3) on the primary side are turned on, and the secondary side switch (Q2) and the third switch (Q3) are turned on. When the first switch (SR1) is turned on, it operates in build-up mode, the second switch (Q2) and third switch (Q3) on the primary side are turned on, and the second switch (SR2) on the secondary side is turned on. ) operates in power mode when turned on.

Boost by building up the current of the first inductor (Lo1) and the second inductor (Lo2) in the build-up mode according to an embodiment of the present invention, and powering the built-up current to the output terminal in the power mode. Perform the action.

The voltage stress of the first switch SR1 and the second switch SR2 according to an embodiment of the present invention is clamped to the output voltage, and the voltage gain is increased through a boost operation. .

In one aspect, the operating method of the new phase shift full bridge converter combined with the inductor rectifier proposed in the present invention is that when the first switch (Q1) and the fourth switch (Q4) on the primary side are turned on simultaneously, the first switch on the secondary side (Q1) and the fourth switch (Q4) are turned on simultaneously. When the switch (SR1) is turned on and operates in the powering mode, and the second switch (Q2) and the third switch (Q3) on the primary side are turned on simultaneously, the second switch (SR2) on the secondary side is turned on and turns on. The PWM (Pulse Width Modulation) of the secondary first switch SR1 and the second switch SR2 in the normal operation stage and the normal operation stage operating in the powering mode are phase delayed and the primary 1 switch (Q1) and the fourth switch (Q4) are turned on, and operate in build-up mode when the second switch (SR2) on the secondary side is turned on, and the first switch (Q1) on the primary side And the fourth switch (Q4) is turned on, and operates in power mode when the first switch (SR1) on the secondary side is turned on, the second switch (Q2) and third switch (Q3) on the primary side are turned on, and the secondary side switch (Q2) and the third switch (Q3) are turned on. When the first switch (SR1) is turned on, it operates in build-up mode, the second switch (Q2) and third switch (Q3) on the primary side are turned on, and the second switch (SR2) on the secondary side is turned on. ) includes a boost operation step that operates in power mode when turned on.

Through a new phase-shift full bridge converter combined with an inductor rectifier according to embodiments of the present invention and its operating method, the voltage of two switches on the secondary side is clamped to the output voltage and a boost operation is performed. By increasing the voltage gain, high efficiency can be achieved.

1 is a circuit diagram of a CIR PSFB low conduction loss converter according to the prior art.
Figure 2 is a diagram showing the main waveform of CIR PSFB when the input voltage is 350 V according to the prior art.
Figure 3 is a diagram showing the main waveform of CIR PSFB when the input voltage is 650 V according to the prior art.
Figure 4 is a diagram showing the main waveform of CIR PSFB when the input voltage is 800 V according to the prior art.
Figure 5 is a circuit diagram of a new phase shift full bridge converter combined with an inductor rectifier according to an embodiment of the present invention.
Figure 6 is a flowchart for explaining the operation method of a new phase-shift full bridge converter combined with an inductor rectifier according to an embodiment of the present invention.
Figure 7 is a diagram showing the gate signal of a phase-shift full bridge converter according to an embodiment of the present invention.
Figure 8 is a diagram showing the main waveform when the input voltage of the phase shift full bridge converter according to an embodiment of the present invention is 350 V.
Figure 9 is a diagram showing the main waveform when the input voltage of the phase shift full bridge converter according to an embodiment of the present invention is 650 V.
Figure 10 is a diagram showing the main waveform when the input voltage of the phase shift full bridge converter according to an embodiment of the present invention is 800 V.

Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings.

1 is a circuit diagram of a CIR PSFB low conduction loss converter according to the prior art.

The primary side of the CIR (Coupled Inductor Rectifier) PSFB (Phase Shift Full Bridge) Converter With Low Conduction Loss shown in Figure 1 consists of four switches Q1, Q2, Q3, and Q4, and the secondary side The structure consists of three diodes D1, D2, and DF1, and a coupled inductor consisting of Lo1 and Lo2 inductors is combined. The same switch control as the primary side of the PSFB converter according to the prior art is possible. The PWM of Q1 and Q2 are complementary operations, so when Q1 is On, Q2 is Off, and Q1 is Off. When it is on, Q2 is on. Likewise for the PWM of Q3 and Q4, when Q3 is on, Q4 is turned off, and when Q3 is off, Q4 is turned on.

Figure 2 is a diagram showing the main waveform of CIR PSFB when the input voltage is 350 V according to the prior art.

The CIR PSFB low conduction loss converter according to the prior art has an input voltage range of 350 V to 800 V, and the nominal input voltage is 650 V.

Figure 2 is an example of a CIR PSFB converter with low conduction loss according to the prior art, Vs = 350 V, Fs = 70 kHz, Vo = 14 V, Llkg = 10 μH, Lm = 600 μH, Lo1 = Lo2 = 100 μH, The main waveform is when Co=100 μF and Turns ratio = 21:1. PWM_Q1, PWM_Q2, PWM_Q3, and PWM_Q4 are the gate waveforms of primary switches Q1, Q2, Q3, and Q4, respectively. I(pri) is the current flowing in the leakage inductor of the transformer. At this time, the RMS size is 1.7 A. I(D1), I(D2), and I(DF1) are the currents flowing through the secondary diodes D1, D2, and DF1, respectively. VD1 and VD2 are the voltage waveforms of the secondary diodes D1 and D2, respectively. At this time, the voltage stress of diodes D1 and D2 is 32.3 V. VDF1 is the voltage waveform of the secondary diode DF1. At this time, the voltage stress of diode DF1 is 17.5 V.

Figure 3 is a diagram showing the main waveform of CIR PSFB when the input voltage is 650 V according to the prior art.

The CIR PSFB low conduction loss converter according to the prior art has an input voltage range of 350 V to 800 V and the nominal input voltage is 650 V. Figure 3 is an example of a CIR PSFB converter with low conduction loss according to the prior art, Vs = 650 V, Fs = 70 kHz, Vo = 14 V, Llkg = 10 μH, Lm = 600 μH, Lo1 = Lo2 = 100 μH, The main waveform is when Co=100 μF and Turns ratio = 21:1. PWM_Q1, PWM_Q2, PWM_Q3, and PWM_Q4 are the gate waveforms of primary switches Q1, Q2, Q3, and Q4, respectively. I(pri) is the current flowing in the leakage inductor of the transformer. At this time, the RMS size is 1.6 A. I(D1), I(D2), and I(DF1) are the currents flowing through the secondary diodes D1, D2, and DF1, respectively. VD1 and VD2 are the voltage waveforms of the secondary diodes D1 and D2, respectively. At this time, the voltage stress of diodes D1 and D2 is 59.8 V. VDF1 is the voltage waveform of the secondary diode DF1. At this time, the voltage stress of diode DF1 is 45.7 V.

Figure 4 is a diagram showing the main waveform of CIR PSFB when the input voltage is 800 V according to the prior art.

The CIR PSFB low conduction loss converter according to the prior art has an input voltage range of 350 V to 800 V and the nominal input voltage is 650 V. Figure 4 is an example of a CIR PSFB converter with low conduction loss according to the prior art, Vs = 800 V, Fs = 70 kHz, Vo = 14 V, Llkg = 10 μH, Lm = 600 μH, Lo1 = Lo2 = 100 μH, The main waveform is when Co=100 μF and Turns ratio = 21:1. PWM_Q1, PWM_Q2, PWM_Q3, and PWM_Q4 are the gate waveforms of primary switches Q1, Q2, Q3, and Q4, respectively. I(pri) is the current flowing in the leakage inductor of the transformer. At this time, the RMS size is 1.5 A. I(D1), I(D2), and I(DF1) are the currents flowing through the secondary diodes D1, D2, and DF1, respectively. VD1 and VD2 are the voltage waveforms of the secondary diodes D1 and D2, respectively. At this time, the voltage stress of diodes D1 and D2 is 73.6 V. VDF1 is the voltage waveform of the secondary diode DF1. At this time, the voltage stress of diode DF1 is 59.6 V.

From the example of the waveform above, it can be seen that in the case of the existing circuit, the maximum RMS of the primary current at the maximum input voltage is 1.7 A, the maximum voltage stress of the secondary diodes D1 and D2 is 73.6 V, and the maximum voltage stress of the secondary diode DF1 is 59.6 V. You can.

In contrast, in the new phase shift full bridge converter combined with an inductor rectifier according to an embodiment of the present invention, the existing diodes D1 and D2 are changed to switches SR1 and SR2 on the secondary side, diode DF1 is removed, and two diodes DB1 and DB2 are added. The voltage stress of switches SR1 and SR2 is clamped to the output voltage, so there is no need to use a snubber. Additionally, voltage gain can be increased through boost operation.

Figure 5 is a circuit diagram of a new phase shift full bridge converter combined with an inductor rectifier according to an embodiment of the present invention.

The present invention changes the existing diodes D1 and D2 to the first switch (SR1) and the second switch (SR2) on the secondary side, removes the existing diode DF1, and adds the first diode (DB1) and the second diode (DB2). This is a circuit in which the voltage stress of the first switch (SR1) and the second switch (SR2) is clamped to the output voltage, and efficiency is improved by increasing the voltage gain through a boost operation.

In the primary circuit of the phase shift full bridge converter according to an embodiment of the present invention, the first switch (Q1) and the second switch (Q2) are connected in series, and the third switch (Q3) and the fourth switch (Q4) are connected in series. They are connected in series, and the primary transformer is connected to the connection terminal between the first switch (Q1) and the second switch (Q2) and the connection terminal between the third switch (Q3) and the fourth switch (Q4).

The secondary circuit of the phase shift full bridge converter according to an embodiment of the present invention includes a first switch (SR1) and a second switch (SR2) connected in series, and a connection between the first switch (SR1) and the second switch (SR2). The first transformer (T21) on the secondary side and the second transformer (T22) are connected in parallel at the connection end, and another end of the first transformer (T21) on the secondary side is connected to the first diode (DB1), and the first diode Another end of (DB1) is connected to the first inductor (Lo1), another end of the second secondary transformer (T22) is connected to the second diode (DB2), and another end of the second diode (DB2) First, it is connected to the second inductor (Lo2).

Referring to Figure 5, the primary side is composed of four switches Q1, Q2, Q3, and Q4, and the secondary side is composed of two switches SR1 and SR2, two diodes DB1 and DB2, and a coupling inductor composed of Lo1 and Lo2 inductors ( Coupled Inductor) is combined. The same switch control as the primary side of the existing PSFB converter is possible, and the PWM of Q1 and Q2 are complementary operations, so when Q1 is on, Q2 is turned off, and when Q1 is off, Q2 comes on. Likewise for the PWM of Q3 and Q4, when Q3 is on, Q4 is turned off, and when Q3 is off, Q4 is turned on.

In the normal operation according to an embodiment of the present invention, when the first switch (Q1) and the fourth switch (Q4) on the primary side are turned on simultaneously, the first switch (SR1) on the secondary side is turned on and enters the power mode ( It operates in Powering Mode), and when the second switch (Q2) and the third switch (Q3) on the primary side are turned on at the same time, the second switch (SR2) on the secondary side is turned on and operates in powering mode.

In the boost operation according to an embodiment of the present invention, the PWM (Pulse Width Modulation) of the first switch SR1 and SR2 on the secondary side in the normal operation step is delayed in phase, so that the first switch on the primary side is delayed. The switch (Q1) and the fourth switch (Q4) are turned on, and operate in build-up mode when the second switch (SR2) on the secondary side is turned on, and the first switch (Q1) on the primary side and The fourth switch (Q4) is turned on and operates in power mode when the first switch (SR1) on the secondary side is turned on, the second switch (Q2) and third switch (Q3) on the primary side are turned on, and the second switch (Q2) and third switch (Q3) on the primary side are turned on. 1 When the switch (SR1) is turned on, it operates in build-up mode, the second switch (Q2) and third switch (Q3) on the primary side are turned on, and the second switch (SR2) on the secondary side is turned on. When turned on, it operates in power mode.

Boost by building up the current of the first inductor (Lo1) and the second inductor (Lo2) in the build-up mode according to an embodiment of the present invention, and powering the built-up current to the output terminal in the power mode. Perform the action.

The voltage stress of the first switch SR1 and the second switch SR2 according to an embodiment of the present invention is clamped to the output voltage, and the voltage gain is increased through a boost operation. .

Figure 6 is a flowchart for explaining the operation method of a new phase-shift full bridge converter combined with an inductor rectifier according to an embodiment of the present invention.

The operating method of the proposed new phase-shift full bridge converter combined with a ductor rectifier is that when the first switch (Q1) and the fourth switch (Q4) on the primary side are turned on simultaneously, the first switch (SR1) on the secondary side is turned on and the power is turned on. It operates in Powering Mode, and when the second switch (Q2) and third switch (Q3) on the primary side are turned on at the same time, the second switch (SR2) on the secondary side is turned on and operates in powering mode. In the normal operation phase (Normal Operation) 610 and the normal operation phase, the PWM (Pulse Width Modulation) of the first switch (SR1) and the second switch (SR2) on the secondary side are phase delayed, so that the first switch (Q1) on the primary side And the fourth switch (Q4) is turned on, and operates in build-up mode when the second switch (SR2) on the secondary side is turned on, and the first switch (Q1) and fourth switch (Q1) on the primary side are turned on. Q4) is turned on, and operates in power mode when the first switch (SR1) on the secondary side is turned on, the second switch (Q2) and third switch (Q3) on the primary side are turned on, and the first switch (SR1) on the secondary side is turned on. ) is turned on, operates in build-up mode, the second switch (Q2) and third switch (Q3) on the primary side are turned on, and the second switch (SR2) on the secondary side is turned on. Includes a boost operation step (Boost Operation) 620 operating in power mode.

In the boost operation according to an embodiment of the present invention, the current of the first inductor (Lo1) and the second inductor (Lo2) is built up in the build-up mode, and the built-up current is transferred to the output terminal in the power mode. Boost operation is performed by powering.

According to an embodiment of the present invention, the voltage stress of the first switch SR1 and the second switch SR2 is clamped to the output voltage, and the voltage gain is increased through a boost operation. You can do it.

Figure 7 is a diagram showing the gate signal of a phase-shift full bridge converter according to an embodiment of the present invention.

Shows gate signals in normal operation and boost operation of a phase-shift full bridge converter according to an embodiment of the present invention.

In normal operation according to an embodiment of the present invention, SR1 turns on when Q1 and Q4 are turned on at the same time and operates in power mode. Likewise, SR2 turns on when Q2 and Q3 are turned on at the same time and operates in power mode. On the other hand, in boost operation, the PWM of SR1 and SR2 in normal operation becomes phase delayed. So, Q1 and Q4 are turned on, and when SR2 is turned on, it operates in build-up mode. Q1 and Q4 are turned on, and when SR1 is turned on, it operates in power mode. Likewise, Q2 and Q3 are turned on, and when SR1 is turned on, it operates in build-up mode. Q2 and Q3 are turned on, and when SR2 is turned on, it operates in power mode. Boost operation is possible by building up the current of the coupling inductor in build-up mode and powering the built-up current to the output terminal in power mode. Therefore, the proposed circuit can increase the voltage gain by performing a boost operation at 0.5, which is the maximum duty ratio of the existing circuit. At this time, the voltage gain of the proposed circuit is 1/(n (1 - 2D _B )) is larger than D/n, which is the voltage gain of the existing circuit, so the voltage gain increases.

Figure 8 is a diagram showing the main waveform when the input voltage of the phase shift full bridge converter according to an embodiment of the present invention is 350 V.

The phase-shift full bridge converter according to an embodiment of the present invention has an input voltage range of 350 V to 800 V, and the nominal input voltage is 650 V. Figure 8 is an example of a phase shift full bridge converter according to an embodiment of the present invention, Vs = 350 V, Fs = 70 kHz, Vo = 14 V, Llkg = 10 μH, Lm = 600 μH, Lo1 = Lo2 = 100 μH. , Co=100 μF, turns ratio = 25:1 is the main waveform. PWM_Q1, PWM_Q2, PWM_Q3, and PWM_Q4 are the gate waveforms of the primary switches Q1, Q2, Q3, and Q4, respectively, and PWM_SR1 and PWM_SR2 are the gate waveforms of the secondary switches SR1 and SR2, respectively. At this time, the phase shift full bridge converter according to an embodiment of the present invention performs a boost operation. I(pri) is the current flowing in the leakage inductor of the transformer. At this time, the RMS size is 1.5 A. I(SR1) and I(SR2) are the currents flowing through the secondary switches SR1 and SR2, and I(DB1) and I(DB2) are the currents flowing through the secondary diodes DB1 and DB2. VSR1 and VSR2 are the voltage waveforms of secondary switches SR1 and SR2, respectively. At this time, the voltage stress is 14.0 V. VDB1 and VDB2 are the voltage waveforms of the secondary diodes DB1 and DB2, respectively. At this time, the voltage stress is 42.0 V.

Figure 9 is a diagram showing the main waveform when the input voltage of the phase shift full bridge converter according to an embodiment of the present invention is 650 V.

The phase-shift full bridge converter according to an embodiment of the present invention has an input voltage range of 350 V to 800 V, and the nominal input voltage is 650 V. Figure 9 is an example of a phase shift full bridge converter according to an embodiment of the present invention, Vs = 650 V, Fs = 70 kHz, Vo = 14 V, Llkg = 10 μH, Lm = 600 μH, Lo1 = Lo2 = 100 μH. , Co=100 μF, turns ratio = 25:1 is the main waveform. PWM_Q1, PWM_Q2, PWM_Q3, and PWM_Q4 are the gate waveforms of the primary switches Q1, Q2, Q3, and Q4, respectively, and PWM_SR1 and PWM_SR2 are the gate waveforms of the secondary switches SR1 and SR2, respectively. At this time, the phase shift full bridge converter according to an embodiment of the present invention operates normally. I(pri) is the current flowing in the leakage inductor of the transformer. At this time, the RMS size is 1.6 A. I(SR1) and I(SR2) are the currents flowing through the secondary switches SR1 and SR2, and I(DB1) and I(DB2) are the currents flowing through the secondary diodes DB1 and DB2. VSR1 and VSR2 are the voltage waveforms of secondary switches SR1 and SR2, respectively. At this time, the voltage stress is 14.0 V. VDB1 and VDB2 are the voltage waveforms of the secondary diodes DB1 and DB2, respectively. At this time, the voltage stress is 36.3 V.

Figure 10 is a diagram showing the main waveform when the input voltage of the phase shift full bridge converter according to an embodiment of the present invention is 800 V.

The phase-shift full bridge converter according to an embodiment of the present invention has an input voltage range of 350 V to 800 V, and the nominal input voltage is 650 V. Figure 10 is an example of a phase shift full bridge converter according to an embodiment of the present invention, Vs = 800 V, Fs = 70 kHz, Vo = 14 V, Llkg = 10 μH, Lm = 600 μH, Lo1 = Lo2 = 100 μH. , Co=100 μF, turns ratio = 25:1 is the main waveform. PWM_Q1, PWM_Q2, PWM_Q3, and PWM_Q4 are the gate waveforms of the primary switches Q1, Q2, Q3, and Q4, respectively, and PWM_SR1 and PWM_SR2 are the gate waveforms of the secondary switches SR1 and SR2, respectively. At this time, the phase shift full bridge converter according to an embodiment of the present invention operates normally. I(pri) is the current flowing in the leakage inductor of the transformer. At this time, the RMS size is 1.6 A. I(SR1) and I(SR2) are the currents flowing through the secondary switches SR1 and SR2, and I(DB1) and I(DB2) are the currents flowing through the secondary diodes DB1 and DB2. VSR1 and VSR2 are the voltage waveforms of secondary switches SR1 and SR2, respectively. At this time, the voltage stress is 14.0 V. VDB1 and VDB2 are the voltage waveforms of the secondary diodes DB1 and DB2, respectively. At this time, the voltage stress is 47.7 V.

Through the examples of the waveform according to an embodiment of the present invention, the proposed circuit can increase the voltage gain compared to the existing circuit through a boost operation. Additionally, the voltage stress of switches SR1 and SR2 is clamped to the output voltage, eliminating the need to use a snubber, thereby improving efficiency. Table 1 shows the primary RMS current and maximum voltage stress of diodes D1, D2, and DF1 of the existing circuit and the primary RMS current and maximum voltage of switches SR1, SR2 and diodes DB1 and DB2 of the proposed circuit in the input voltage range of 450 to 800 V. This table summarizes stress.

<Table 1>

As shown in Table 1, in the proposed circuit, the voltage stress of switches SR1 and SR2 clamps the output voltage, and diodes DB1 and DB2 can use devices with a lower voltage rating than the existing circuit.

The proposed circuit can increase the voltage gain by performing a boost operation through a structure consisting of two switches SR1 and SR2 and two diodes DB1 and DB2 on the secondary side, and the voltage stress of switches SR1 and SR2 is clamped to the output voltage to operate the snubber. You don't have to use it. Therefore, the present invention can be a circuit suitable for LDC (Low DC/DC Converter) applications with a high input voltage as a nominal.

The device described above may be implemented with hardware components, software components, and/or a combination of hardware components and software components. For example, devices and components described in embodiments may include, for example, a processor, a controller, an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable gate array (FPGA), etc. , may be implemented using one or more general-purpose or special-purpose computers, such as a programmable logic unit (PLU), a microprocessor, or any other device capable of executing and responding to instructions. A processing device may execute an operating system (OS) and one or more software applications that run on the operating system. Additionally, a processing device may access, store, manipulate, process, and generate data in response to the execution of software. For ease of understanding, a single processing device may be described as being used; however, those skilled in the art will understand that a processing device includes multiple processing elements and/or multiple types of processing elements. It can be seen that it may include. For example, a processing device may include a plurality of processors or one processor and one controller. Additionally, other processing configurations, such as parallel processors, are possible.

Software may include a computer program, code, instructions, or a combination of one or more of these, which may configure a processing unit to operate as desired, or may be processed independently or collectively. You can command the device. Software and/or data may be used on any type of machine, component, physical device, virtual equipment, computer storage medium or device to be interpreted by or to provide instructions or data to a processing device. It can be embodied in . Software may be distributed over networked computer systems and stored or executed in a distributed manner. Software and data may be stored on one or more computer-readable recording media.

The method according to the embodiment may be implemented in the form of program instructions that can be executed through various computer means and recorded on a computer-readable medium. The computer-readable medium may include program instructions, data files, data structures, etc., singly or in combination. Program instructions recorded on the medium may be specially designed and configured for the embodiment or may be known and available to those skilled in the art of computer software. Examples of computer-readable recording media include magnetic media such as hard disks, floppy disks, and magnetic tapes, optical media such as CD-ROMs and DVDs, and magnetic media such as floptical disks. -Includes optical media (magneto-optical media) and hardware devices specifically configured to store and execute program instructions, such as ROM, RAM, flash memory, etc. Examples of program instructions include machine language code, such as that produced by a compiler, as well as high-level language code that can be executed by a computer using an interpreter, etc.

As described above, although the embodiments have been described with limited examples and drawings, various modifications and variations can be made by those skilled in the art from the above description. For example, the described techniques are performed in a different order than the described method, and/or components of the described system, structure, device, circuit, etc. are combined or combined in a different form than the described method, or other components are used. Alternatively, appropriate results may be achieved even if substituted or substituted by an equivalent.

Therefore, other implementations, other embodiments, and equivalents of the claims also fall within the scope of the claims described below.

Claims (8)

In the phase shift full bridge converter,
Includes a primary circuit and a secondary circuit,
The primary circuit is,
The first switch (Q1) and the second switch (Q2) are connected in series, the third switch (Q3) and the fourth switch (Q4) are connected in series, and the first switch (Q1) and the second switch (Q2) are connected in series. ) The primary transformer is connected to the connection terminal between the third switch (Q3) and the fourth switch (Q4),
The secondary circuit is,
The first switch (SR1) and the second switch (SR2) are connected in series, and a secondary first transformer (T21) and a second transformer (T22) are connected at the connection terminal between the first switch (SR1) and the second switch (SR2). ) are connected in parallel, another end of the first transformer (T21) on the secondary side is connected to the first diode (DB1), and another end of the first diode (DB1) is connected to the first inductor (Lo1) , Another end of the second transformer (T22) on the secondary side is connected to the second diode (DB2), and another end of the second diode (DB2) is connected to the second inductor (Lo2).
Phase shift full bridge converter. According to paragraph 1,
In normal operation,
When the first switch (Q1) and the fourth switch (Q4) on the primary side are turned on at the same time, the first switch (SR1) on the secondary side is turned on and operates in powering mode, and the second switch (Q2) on the primary side is turned on. And when the third switch (Q3) is turned on at the same time, the second switch (SR2) on the secondary side is turned on and operates in powering mode.
Phase shift full bridge converter. According to paragraph 1,
In the boost operation phase,
In the normal operation phase, the PWM (Pulse Width Modulation) of the first switch SR1 and the second switch SR2 on the secondary side are phase delayed, so that the first switch Q1 and the fourth switch Q4 on the primary side are turned on, When the second switch (SR2) on the secondary side is turned on, it operates in build-up mode, the first switch (Q1) and the fourth switch (Q4) on the primary side are turned on, and the first switch on the secondary side When (SR1) is turned on, it operates in power mode,
The second switch (Q2) and third switch (Q3) on the primary side are turned on, and when the first switch (SR1) on the secondary side is turned on, it operates in build-up mode, and the second switch on the primary side (Q2) and the third switch (Q3) are turned on, and the second switch (SR2) on the secondary side is turned on, operating in power mode.
Phase shift full bridge converter. According to paragraph 3,
In build-up mode, build-up the current of the first inductor (Lo1) and the second inductor (Lo2),
In power mode, boost operation is performed by powering the built-up current to the output stage.
Phase shift full bridge converter. According to clause 4,
The voltage stress of the first switch (SR1) and the second switch (SR2) is clamped to the output voltage, and the voltage gain is increased through a boost operation.
Phase shift full bridge converter. When the first switch (Q1) and the fourth switch (Q4) on the primary side are turned on at the same time, the first switch (SR1) on the secondary side is turned on and operates in powering mode, and the second switch (Q2) on the primary side is turned on. And when the third switch (Q3) is turned on at the same time, the second switch (SR2) on the secondary side is turned on and operates in power mode (Normal Operation); and
In the normal operation phase, the PWM (Pulse Width Modulation) of the first switch SR1 and the second switch SR2 on the secondary side are phase delayed, so that the first switch Q1 and the fourth switch Q4 on the primary side are turned on, When the second switch (SR2) on the secondary side is turned on, it operates in build-up mode, the first switch (Q1) and the fourth switch (Q4) on the primary side are turned on, and the first switch on the secondary side When (SR1) is turned on, it operates in power mode, the second switch (Q2) and third switch (Q3) on the primary side are turned on, and when the first switch (SR1) on the secondary side is turned on, it operates in build-up mode (Build-up mode). -up Mode), the second switch (Q2) and the third switch (Q3) on the primary side are turned on, and the boost operation stage (Boost Operation) operates in power mode when the second switch (SR2) on the secondary side is turned on. )
Operating method of a phase shift full bridge converter including. According to clause 6,
In the boost operation phase,
In build-up mode, build-up the current of the first inductor (Lo1) and the second inductor (Lo2),
In power mode, boost operation is performed by powering the built-up current to the output stage.
How a phase shift full bridge converter works. In clause 7,
The voltage stress of the first switch (SR1) and the second switch (SR2) is clamped to the output voltage, and the voltage gain is increased through a boost operation.
How a phase shift full bridge converter works.