KR20230168392A - Top Emission Type Electroluminescence Display - Google Patents

Abstract

This specification relates to a top emission type electroluminescent display device. The electroluminescence display device according to the present specification includes a substrate, a pad electrode, a buffer layer, a pad protective layer, an insulating film, and a pad terminal. The pad electrode is disposed on the substrate. The buffer layer exposes the central area of the pad electrode and covers the edge area. The pad protection layer overlaps the edge area of the pad electrode on the buffer layer. The insulating film exposes the central area of the pad protective layer and covers the edge area. The pad terminal covers the pad electrode on an insulating film.

Description

Top Emission Type Electroluminescence Display}

This specification relates to a top emission type electroluminescent display device. In particular, this specification relates to a top-emitting electroluminescent display device having a structure that prevents loss and damage to pad terminals.

Recently, various types of display devices such as CRT (Cathode Ray Tube), LCD (Liquid Crystal Display), PDP (Plasma Display Panel), and electroluminescent display (Luminescent Display) have been developed and developed. These various types of display devices are used to display image data of various products such as computers, mobile phones, bank teller machines (ATMs), and vehicle navigation systems according to their unique characteristics.

In particular, organic electroluminescent displays, which are self-luminous displays, have excellent optical performance such as viewing angle and color reproducibility, and their application fields are gradually expanding, and they are attracting attention as video display devices. With these advantages, it is attracting attention as the most appropriate display device for implementing ultra-high resolution display devices of 8K beyond 4K. As the resolution increases, the size of the pixel becomes smaller, and the size of the light emitting area occupied within the pixel also becomes smaller. When the size of a pixel in an electroluminescent display device becomes small, it is desirable to apply a top-emitting structure to maximize the size of the light-emitting area.

In an electroluminescent display device with a large-area, high-resolution top-emitting structure, materials with relatively low resistance, such as copper (Cu), are used for wiring for applying signals and pad electrodes for receiving signals. The pad electrode has a structure exposed to the outside so that it can receive signals. If the pad electrode is made of a material such as copper (Cu), a low-resistance material, corrosion may occur if the copper is exposed as is.

To prevent this, a pad terminal that covers the pad electrode can be formed with molybdenum (Mo), titanium (Ti), or an alloy thereof with excellent corrosion resistance. When forming a separate pad terminal, an additional mask process is added. If a mask process is added, manufacturing costs increase and manufacturing time becomes correspondingly longer, which may reduce productivity.

Additionally, in the process of forming an anode electrode made of a metal material such as silver (Ag) with low resistance, a pad terminal that covers the pad electrode can be formed. However, when silver (Ag) is exposed to the outside, it can corrode and cause short circuit problems.

Therefore, there is a need to develop a structure with a pad terminal with excellent corrosion resistance that can protect the pad terminal while lowering the contact resistance of the pad portion in a large-area electroluminescent display device with ultra-high resolution. In particular, there is a need to develop an electroluminescent display device that has a pad terminal with low contact resistance and excellent corrosion resistance without adding a mask process.

The purpose of this specification is to overcome the problems of the prior art and to provide an electroluminescent display device having a pad terminal with excellent corrosion resistance that can protect the pad electrode without an additional mask process. Another object of the present specification is to provide an electroluminescent display device having a structure that can protect a low-resistance pad electrode from an etchant used during the manufacturing process. Another object of the present specification is to provide an electroluminescent display device in which a pad electrode and a pad terminal are made of a low-resistance metal material and has a structure in which no damage or loss occurs to the pad electrode.

To achieve the above object, the electroluminescent display device according to the present specification includes a substrate, wiring, a pad electrode, a buffer layer, a pad contact hole, a pad protection layer, a gate insulating film, an opening region, and a pad terminal. The substrate has a display area and a non-display area surrounding the display area. The wiring is arranged to extend from the display area to the non-display area. The pad electrode is disposed at the end of the wiring in the non-display area. The buffer layer covers the pad electrode and wiring. The pad contact hole is formed in the buffer layer to expose the pad electrode. The pad protection layer is disposed around the pad contact hole on the buffer layer. The gate insulating film is disposed on the pad protection layer and the buffer layer. The opening area is formed in the gate insulating film to expose the pad contact hole. The pad terminal is formed on the gate insulating film and contacts the pad electrode.

For example, the pad electrode includes copper (Cu).

In one example, the pad protection layer includes a first layer disposed over the buffer layer and a second layer disposed over the first layer.

For example, the first layer includes Indium-Galium-Zinc-Oxide. The second layer includes at least one of molybdenum (Mo), titanium (Ti), and molybdenum-titanium alloy (MoTi).

For example, the pad terminal includes at least one of molybdenum (Mo), titanium (Ti), and molybdenum-titanium alloy (MoTi).

For example, the opening area exposes the entire pad contact hole and a portion of the pad protection layer.

In one example, the pad terminal covers the opening area on the gate insulating film, a portion of the exposed pad protective layer, and the etched sidewall of the pad contact hole, and covers the entire exposed upper surface of the pad electrode.

For example, it further includes a thin film transistor disposed in the display area. A thin film transistor includes a semiconductor layer, a gate electrode, a source electrode, and a drain electrode. The semiconductor layer is formed on the same layer as the pad protective layer. The gate electrode is formed on the same layer as the pad terminal and overlaps the central region of the semiconductor layer with the gate insulating film interposed therebetween. The source electrode is formed on the same layer as the pad terminal and is in contact with one side of the semiconductor layer. The drain electrode is formed on the same layer as the pad terminal and is in contact with the other side of the semiconductor layer.

In one example, the semiconductor layer includes a channel layer, a source ohmic layer, and a drain ohmic layer. The channel layer is made of the same material as the first layer of the pad protection layer. The source ohmic layer is formed on one side above the channel layer and is made of the same material as the second layer of the pad protection layer. The drain ohmic layer is formed on the other side of the channel layer and is made of the same material as the second layer of the pad protection layer.

For example, the gate electrode, source electrode, and drain electrode include a first metal layer made of the same material as the pad terminal, and a second metal layer stacked on the first metal layer and made of copper (Cu).

Additionally, the electroluminescent display device according to the present specification includes a substrate, a pad electrode, a buffer layer, a pad protective layer, an insulating film, and a pad terminal. The pad electrode is disposed on the substrate. The buffer layer exposes the central area of the pad electrode and covers the edge area. The pad protection layer overlaps the edge area of the pad electrode on the buffer layer. The insulating film exposes the central area of the pad protective layer and covers the edge area. The pad terminal is formed on the insulating film and covers the pad electrode.

For example, the pad electrode includes copper (Cu).

In one example, the pad protection layer includes a first layer made of indium-gallium-zinc-oxide and a second layer made of molybdenum-titanium alloy laminated on the first layer.

In one example, the pad terminal includes any one of molybdenum, titanium, and molybdenum-titanium alloy.

In one example, the pad terminal covers the etched side of the insulating film, covers the exposed edge area of the pad protective layer, covers the etched side of the buffer layer, and covers the exposed upper surface of the pad electrode.

For example, it further includes a thin film transistor disposed on the substrate. A thin film transistor includes a semiconductor layer, a gate electrode, a source electrode, and a drain electrode. The semiconductor layer is formed on the same layer as the pad protective layer. The gate electrode is formed on the same layer as the pad terminal and overlaps the central region of the semiconductor layer with an insulating film interposed therebetween. The source electrode is formed on the same layer as the pad terminal and is in contact with one side of the semiconductor layer. The drain electrode is formed on the same layer as the pad terminal and is in contact with the other side of the semiconductor layer.

In one example, the pad protection layer includes a first layer disposed over the buffer layer, and a second layer disposed over the first layer. The semiconductor layer includes a channel layer, a source ohmic layer, and a drain ohmic layer. The channel layer is made of the same material as the first layer of the pad protection layer. The source ohmic layer is formed on one side above the channel layer and is made of the same material as the second layer of the pad protection layer. The drain ohmic layer is formed on the other side of the channel layer and is made of the same material as the second layer of the pad protection layer.

For example, the gate electrode, source electrode, and drain electrode include a first metal layer made of the same material as the pad terminal, and a second metal layer stacked on the first metal layer and made of copper (Cu).

The electroluminescent display device according to the present specification can provide an electroluminescent display device having a pad terminal with excellent corrosion resistance that can protect the pad electrode without an additional mask process. Electroluminescence display devices according to embodiments of the present specification have a structure in which a pad protection layer made of molybdenum or titanium with excellent corrosion resistance is disposed around a data pad electrode. Furthermore, after the data pad electrode is exposed, a data pad terminal made of molybdenum or titanium, which has excellent corrosion resistance, covers the data pad electrode. Therefore, it is possible to prevent damage to the data pad portion from etchants used in various etching processes performed during the manufacturing process.

1 is a plan view showing a schematic structure of an electroluminescence display device according to the present specification.
Figure 2 is a diagram showing the circuit configuration of one pixel constituting the electroluminescence display device according to the present specification.
Figure 3 is a plan view showing the structure of pixels arranged in the electroluminescence display device according to the present specification.
FIG. 4 is a cross-sectional view showing the structure of the electroluminescence display device according to the present specification, taken along line II' of FIG. 3.
FIGS. 5A to 5G are cross-sectional views taken along line II′ of FIG. 3 illustrating the manufacturing process of the electroluminescent display device according to the present specification.
FIG. 6 is a cross-sectional view showing the structure of an electroluminescent display device according to another embodiment of the present specification, taken along line II′ of FIG. 3 .

The advantages and features of the present specification and methods for achieving them will become clear by referring to examples described in detail below along with the accompanying drawings. However, the present specification is not limited to the examples disclosed below and will be implemented in various different forms, and only the examples of the present specification ensure that the disclosure of the present application is complete and are not limited to the examples disclosed below, and only the examples of the present specification serve to complete the disclosure of the present application and are not limited to the examples disclosed below. It is provided to fully inform those with knowledge of the scope of the invention, and the invention of this specification is only defined by the scope of the claims.

The shape, size, ratio, angle, number, etc. shown in the drawings for explaining an example of the present specification are illustrative and are not limited to the details shown here. Like reference numerals refer to like elements throughout the specification. Additionally, when describing examples of the present specification, if it is determined that detailed descriptions of related known technologies may unnecessarily obscure the gist of the present specification, the detailed descriptions will be omitted.

Exemplary embodiments of the present specification will be described in detail with reference to the attached drawings. The same reference numerals are used throughout the drawings to refer to identical or similar components. In this specification, similar reference signs already used to indicate similar components in other drawings are preferably used for one component. In the following description, if functions and configurations known to those skilled in the art to which this specification pertains are unrelated to the essential structure of this specification, detailed descriptions thereof may be omitted. Terms used in the specification of this specification should be understood as follows.

When 'includes', 'has', 'consists of', etc. mentioned in the specification are used, other parts may be added unless 'only' is used. When a component is expressed in the singular, the plural is included unless specifically stated otherwise.

When interpreting a component, it is interpreted to include the margin of error even if there is no separate explicit description.

In the case of a description of a positional relationship, for example, if the positional relationship of two parts is described as 'on top', 'on the top', 'on the bottom', 'next to', etc., 'immediately' Alternatively, there may be one or more other parts placed between the two parts, unless 'directly' is used.

In the case of a description of a temporal relationship, for example, if a temporal relationship is described as 'after', 'successfully after', 'after', 'before', etc., 'immediately' or 'directly' Unless used, non-consecutive cases may also be included.

Although first, second, etc. are used to describe various components, these components are not limited by these terms. These terms are merely used to distinguish one component from another. Accordingly, the first component mentioned below may also be the second component within the technical idea of the present specification.

The term “at least one” should be understood to include all possible combinations from one or more related items. For example, “at least one of item 1, item 2, and item 3” means each of item 1, item 2, or item 3, as well as item 2 of item 1, item 2, and item 3. It can mean a combination of all items that can be presented from more than one.

Each feature of the various examples of the present specification can be partially or entirely combined or combined with each other, and various technological interconnections and operations are possible, and each example can be implemented independently of each other or together in a related relationship. .

Hereinafter, an example of a light emitting display device according to the present specification will be described in detail with reference to the attached drawings. In adding reference numerals to components in each drawing, identical components may have the same reference numerals as much as possible even if they are shown in different drawings.

Hereinafter, the present specification will be described in detail with reference to the attached drawings. 1 is a plan view showing the schematic structure of an electroluminescent display device according to the present specification. In FIG. 1, the X-axis represents a direction parallel to the scan wire, the Y-axis represents a direction parallel to the data wire, and the Z-axis represents the height direction of the display device.

Referring to FIG. 1, the electroluminescent display device according to the present specification includes a substrate 110, a gate (or scan) driver 200, a data pad unit 300, a source driving integrated circuit 410, and a flexible wiring film 430. ), a circuit board 450, and a timing control unit 500.

The substrate 110 may include an insulating material or a material with flexibility. The substrate 110 may be made of glass, metal, or plastic, but is not limited thereto. If the electroluminescent display device is a flexible display device, the substrate 110 may be made of a flexible material such as plastic. For example, it may include a transparent polyimide material.

The substrate 110 may be divided into a display area (AA) and a non-display area (NDA). The display area AA is an area where an image is displayed, and may be defined in most areas including the center of the substrate 110, but is not limited thereto. Scan wires (or gate wires), data wires, and pixels are formed in the display area AA. The pixels include a plurality of sub-pixels, and each of the plurality of sub-pixels includes scan lines and data lines.

The non-display area NDA is an area in which an image is not displayed, and may be defined at the edge of the substrate 110 to surround all or part of the display area AA. A gate driver 200 and a data pad unit 300 may be formed in the non-display area NDA.

The gate driver 200 supplies scan (or gate) signals to scan lines according to a gate control signal input from the timing controller 500. The gate driver 200 may be formed in a non-display area (NDA) outside one side of the display area (AA) of the base substrate 110 using a gate driver in panel (GIP) method. The GIP method refers to a structure in which the gate driver 200 is formed directly on the substrate 110.

The data pad unit 300 supplies data signals to data wires according to a data control signal input from the timing control unit 500. As another example, the data driving element is manufactured as a driving chip, mounted on the flexible wiring film 430, and used in a non-display area (NDA) outside one side of the display area (AA) of the substrate 110 using a tape automated bonding (TAB) method. ) can be attached to the data pad unit 300 provided in the.

The source driving integrated circuit 410 receives digital video data and a source control signal from the timing control unit 500. The source driving integrated circuit 410 converts digital video data into analog data voltages according to a source control signal and supplies them to the data lines. When the source driving integrated circuit 410 is manufactured as a chip, it may be mounted on the flexible wiring film 430 using a chip on film (COF) or chip on plastic (COP) method.

Wires connecting the data pad unit 300 and the source driving integrated circuit 410 and wires connecting the data pad unit 300 and the circuit board 450 may be formed on the flexible wiring film 430 . The flexible wiring film 430 is attached to the data pad unit 300 using an anisotropic conducting film, so that the wires of the data pad unit 300 and the flexible film 430 can be connected.

The circuit board 450 may be attached to the flexible wiring films 430 . The circuit board 450 may be equipped with multiple circuits implemented with driving chips. For example, the timing control unit 500 may be mounted on the circuit board 450. The circuit board 450 may be a printed circuit board or a flexible printed circuit board.

The timing control unit 500 receives digital video data and timing signals from an external system board through a cable of the circuit board 450. The timing control unit 500 generates a gate control signal for controlling the operation timing of the gate driver 200 and a source control signal for controlling the source driving integrated circuits 410 based on the timing signal. The timing control unit 500 supplies a gate control signal to the gate driver 200 and a source control signal to the source driving integrated circuits 410. Depending on the product, the timing control unit 500 may be formed of the source driving integrated circuit 410 and one driving chip and mounted on the substrate 110.

Figure 2 is a diagram showing the circuit configuration of one pixel constituting the electroluminescence display device according to the present specification. Figure 3 is a plan view showing the structure of pixels arranged in the electroluminescence display device according to the present specification. FIG. 4 is a cross-sectional view showing the structure of the electroluminescence display device according to the present specification, taken along line II' of FIG. 3.

2 to 4, one pixel of a light emitting display device includes a scan line (SL), a data line (DL), and a driving current line (VDD). A data pad (DP) is placed at the end of the data line (DL). Although not shown in the drawing, a scan pad may be placed at the end of the scan line SL. Additionally, one pixel of a light emitting display device includes a switching thin film transistor (ST), a driving thin film transistor (DT), a light emitting diode (OLE), and an auxiliary capacitance (Cst). A high potential voltage for driving the light emitting diode (OLE) is applied to the driving current line (VDD).

For example, the switching thin film transistor (ST) may be disposed at the intersection of the scan line (SL) and the data line (DL). The switching thin film transistor (ST) includes a switching gate electrode (SG), a switching source electrode (SS), and a switching drain electrode (SD). The switching gate electrode (SG) may be branched from the scan line (SL) or may be a part of the scan line (SL) as shown in FIG. 3 . The switching source electrode (SS) is connected to the data line (DL), and the switching drain electrode (SD) is connected to the driving thin film transistor (DT). The switching thin film transistor (ST) functions to select a pixel to be driven by applying a data signal to the driving thin film transistor (DT).

The driving thin film transistor (DT) functions to drive the light emitting diode (OLE) of the pixel selected by the switching thin film transistor (ST). The driving thin film transistor (DT) includes a driving gate electrode (DG), a driving source electrode (DS), and a driving drain electrode (DD). The driving gate electrode (DG) is connected to the switching drain electrode (SD) of the switching thin film transistor (ST). The driving source electrode DS is connected to the driving current line VDD, and the driving drain electrode DD is connected to the anode electrode ANO of the light emitting diode OLE. An auxiliary capacitance (Cst) may be formed between the switching drain electrode (SD) of the driving thin film transistor (DT) and the anode electrode (ANO) of the light emitting diode (OLE).

The driving thin film transistor (DT) is disposed between the driving current line (VDD) and the light emitting diode (OLE). The driving thin film transistor (DT) is connected to the drain electrode (SD) of the switching thin film transistor (ST) according to the magnitude of the voltage of the gate electrode (DG) of the driving thin film transistor (ST) from the driving current line (VDD) to the light emitting diode (OLE). ) Adjust the amount of current flowing.

Figure 4 shows a structure in which top-gate thin film transistors (ST, DT) are formed. Although not shown in the drawing, as another example, a thin film transistor with a bottom-gate structure may be provided. The bottom-gate structure is a structure in which a gate electrode is formed first, and then a semiconductor layer is formed on the gate insulating film that covers the gate electrode. However, in realizing ultra-high density resolution, the electroluminescent display device according to the present specification is preferably provided with a thin film transistor with a top-gate structure in order to increase the aperture ratio, which is the ratio of the light emitting area to the pixel area.

The electroluminescent display device according to the present specification relates to a large-area, ultra-high-resolution electroluminescent display device, and the data line (DL) and the data pad electrode (DP) can be formed with a low-resistance metal material. In this case, the data line DL and the data pad electrode DP may be formed of a low-resistance material containing copper (Cu), which has a relatively low resistance. At this time, the driving current wiring (VDD) and the driving current wiring pad electrode (not shown) may be further formed using the same material as the data wiring (DL) and the data pad electrode (DP). Additionally, a light blocking layer (LS) that overlaps the semiconductor layer of the thin film transistor may be further formed using the same material as the data line (DL) and the data pad electrode (DP). A buffer layer (BUF) may be stacked on the data line (DL), data pad electrode (DP), driving current line (VDD), and light blocking layer (LS).

The top-gate structure refers to a structure in which gate electrodes (SG, DG) are placed on semiconductor layers (SA, DA). That is, the top-gate structure is a structure in which the semiconductor layers (SA, DA) are first formed on the buffer layer (BUF), and the gate electrodes (SG, DG) are formed on the gate insulating film (GI) covering the semiconductor layers (SA, DA). have The semiconductor layers (SA, DA) may be formed as a double layer. For example, the semiconductor layers SA and DA may be a stack of a first semiconductor layer S1 and a second semiconductor layer S2. Here, the first semiconductor layer S1 may be formed of a material for a channel layer. The second semiconductor layer (S2) is formed only in the source and drain regions of the first semiconductor layer (S1) and serves as an ohmic contact layer to reduce contact resistance with the source electrodes (SS, DS) and drain electrodes (SD, DD). can be formed. The second semiconductor layer (S2) in contact with the source electrodes (SS, DS) becomes a source ohmic layer (or source ohmic contact layer), and the second semiconductor layer (S2) in contact with the drain electrodes (SD, DD) becomes It becomes a drain ohmic layer (or drain ohmic contact layer).

The first semiconductor layer (S1) and the second semiconductor layer (S2) may be made of the same semiconductor material. For example, the first semiconductor layer S1 may include an oxide semiconductor material such as indium-gallium-zinc-oxide (IGZO). The second semiconductor layer S2 may include a semiconductor material in which an oxide semiconductor material is further doped with an n-type or p-type material.

Additionally, the first semiconductor layer (S1) and the second semiconductor layer (S2) may be made of different materials. For example, the first semiconductor layer S1 may include an oxide semiconductor material such as indium-gallium-zinc-oxide. Meanwhile, the second semiconductor layer S2 may include a molybdenum-titanium (MoTi) alloy material. Although the molybdenum-titanium alloy is not a semiconductor material, it is functionally a material for ohmic contact and is formed in the same pattern as the semiconductor layer, so for convenience, it is called the second semiconductor layer (S2).

In the case of the top-gate structure shown in FIG. 4, the switching source electrode (SS), switching drain electrode (SD), driving source electrode (DS), and driving drain electrode (DD) are located on the same layer as the gate electrodes (SG and DG). ) is formed. The switching source electrode (SS) is connected to the data line (DL) formed on the same layer as the light blocking layer (LS), and the driving drain electrode (DD) is connected to the driving current line (VDD) formed on the same layer as the light blocking layer (LS). is connected to

Meanwhile, although not shown in the drawing, the scan line SL may be formed extending from the switching gate electrode SG. The scan line SL may be disposed on the gate insulating layer GI. A scan pad electrode may be disposed at the end of the scan line SL in the non-display area NDA. The scan pad electrode may be disposed on the same layer as the light blocking layer LS, and the scan line SL may be connected through a contact hole formed in the gate insulating layer GI and the buffer layer BUF.

In Figure 4, the data pad unit 300 is shown as the center. A data pad DP formed on the same layer as the light blocking layer LS is disposed in the data pad portion 300. The data pad DP is formed at an end of the data line DL extending from the display area AA. A buffer layer (BUF) is formed on the data pad (DP). A pad contact hole (DPH) is formed in the buffer layer (BUF) exposing most of the central area of the data pad (DP).

A pad protection layer (SE) (or protection layer) including a first semiconductor layer (S1) and a second semiconductor layer (S2) is stacked around the pad contact hole (DPH) on the buffer layer (BUF). For example, the first semiconductor layer S1 may include an oxide semiconductor material such as IGZO. The second semiconductor layer S2 may include a metal material with excellent corrosion resistance, such as molybdenum (Mo), titanium (Ti), or molybdenum-titanium alloy (MoTi). A gate insulating film (GI) is stacked on the pad protection layer (SE) and the buffer layer (BUF). The gate insulating film GI has an opening area in which a pad contact hole DPH is extended.

A data pad terminal (DPC) is formed on the data pad electrode (DP) exposed by the pad contact hole (DPH). The data pad terminal (DPC) extends along the sidewall of the pad contact hole (DPH) on the gate insulating film (GI) and is in surface contact with the surface of the data pad electrode (DP). The data pad terminal (DPC) can be made of a metal material with excellent corrosion resistance, such as molybdenum (Mo), titanium (Ti), or molybdenum-titanium alloy (MoTi).

Here, the data pad terminal (DPC) may be formed of the same material as the gate electrodes (SG, DG) and the scan line (SL). The gate electrodes (SG, DG) and scan wiring (SL) may include copper (Cu), a low-resistance material, and a metal material with excellent corrosion resistance. Here, the metal material with excellent corrosion resistance includes any one of molybdenum (Mo), titanium (Ti), or molybdenum-titanium alloy (MoTi). For example, the gate electrodes (SG, DG) and scan wiring (SL) include a first gate layer (G1) made of molybdenum-titanium alloy (MoTi) and a second gate layer (G2) containing copper (Cu). It can be formed by stacking.

When forming the gate electrodes SG and DG and the scan line SL, a first gate layer G1 and a second gate layer G2 may be formed on the data pad electrode DP. Thereafter, the second gate layer (G2) may be removed to form a data pad terminal (DPC) consisting only of the first gate layer (G1). The second gate layer G2 is a metal layer containing copper (Cu). Copper (Cu) can corrode and cause short circuit problems when exposed to the outside, so remove the second gate layer (G2) and use molybdenum (Mo), titanium (Ti), or molybdenum-titanium alloy (MoTi). It is desirable to leave only the first gate layer (G1), which has excellent corrosion resistance.

A light emitting diode (OLE) includes an anode electrode (ANO), a light emitting layer (EL), and a cathode electrode (CAT). A light emitting diode (OLE) emits light according to a current controlled by a driving thin film transistor (DT). In other words, the light emitting diode (OLE) adjusts the amount of light emitted according to the current controlled by the driving thin film transistor (DT), so the brightness of the electroluminescence display device can be adjusted. The anode electrode (ANO) of the light emitting diode (OLE) is connected to the driving drain electrode (DD) of the driving thin film transistor (DT), and the cathode electrode (CAT) is connected to the low-power wiring (VSS) to which a low potential voltage is supplied. do. That is, the light emitting diode (OLE) is driven by a low potential voltage and a high potential voltage controlled by the driving thin film transistor (DT).

In this way, a protective film (PAS) may be laminated on the surface of the substrate 110 on which the switching thin film transistor (ST) and driving thin film transistor (DT) are formed. The protective film PAS may be applied only to the display area AA and may not be laminated on the non-display area NDA where the data pad portion 300 is disposed. The protective film (PAS) is preferably formed of an inorganic film such as silicon oxide or silicon nitride. A planarization film (PL) is laminated on the protective film (PAS).

The surface of the substrate 110 on which the thin film transistors (ST, DT) are formed becomes uneven, and the planarization film (PL) is a thin film for flattening the surface. To equalize the height difference, the planarization film PL may be formed of an organic material. A pixel contact hole (PH) is formed in the protective film (PAS) and the planarization film (PL) to expose a portion of the drain electrode (DD) of the driving thin film transistor (DT).

An anode electrode (ANO) is formed on the upper surface of the planarization film (PL). The anode electrode (ANO) is connected to the drain electrode (DD) of the driving thin film transistor (DT) through the pixel contact hole (PH). In the case of emitting light in an upward direction opposite to the substrate 110, it can be formed of a metal material with excellent light reflectance. For example, the anode electrode (ANO) is any one selected from silver (Ag), aluminum (Al), molybdenum (Mo), gold (Au), magnesium (Mg), calcium (Ca), or barium (Ba). It may be made of a material or an alloy material of two or more.

In the case of this specification, it is desirable to have a top emission structure suitable for implementing ultra-high resolution. In the top-emitting structure, it is desirable to form the anode electrode (ANO) to have the maximum area in the pixel area defined by the data line (DL), driving current line (VDD), and scan line (SL). Accordingly, the thin film transistors ST and DT may be arranged under the anode electrode ANO to overlap the anode electrode ANO. Additionally, a portion of the data line (DL), driving current line (VDD), and scan line (SL) may be disposed to overlap the anode electrode (ANO).

A bank (BA) is formed on the anode electrode (ANO). The bank BA covers the edge area of the anode electrode ANO and is arranged to expose most of the central area. Most of the central area exposed by the bank (BA) in the anode electrode (ANO) is defined as a light emitting area.

A light emitting layer (EL) is stacked on the anode electrode (AN0) and the bank (BA). The light emitting layer EL may be formed throughout the display area AA of the substrate 110 to cover the anode electrode ANO and the bank BA. The light emitting layer (EL) according to one example may include two or more light emitting units vertically stacked to emit white light. For example, the light emitting layer EL may include a first light emitting unit and a second light emitting unit for emitting white light by mixing the first light and the second light.

As another example, the light emitting layer EL may include any one of a blue light emitting part, a green light emitting part, and a red light emitting part for emitting light corresponding to the color set in the pixel. In this case, the light emitting layer EL may be disposed only inside the light emitting area defined by the bank BA. Additionally, the light emitting diode (OLE) may further include a functional layer to improve the luminous efficiency and/or lifespan of the light emitting layer (EL).

The cathode electrode (CAT) is stacked to form surface contact with the light emitting layer (EL). The cathode electrode (CAT) is formed across the entire substrate 110 to be commonly connected to the light emitting layer (EL) formed in all pixels. In the case of the top emitting type, the cathode electrode (CAT) is made of a transparent conductive material such as Indium-Tin-Oxide (ITO) or Indium-Zinc-Oxide (IZO). desirable.

Although not shown in the drawing, after the cathode electrode (CAT) is stacked and the light emitting diode (OLE) is completed, an encapsulation layer may be further stacked on the cathode electrode (CAT). The encapsulation layer may be disposed between the display area AA and the non-display area NDA so as to surround the display area AA. The encapsulation layer may have a structure in which an inorganic encapsulation layer, an organic encapsulation layer, and an inorganic encapsulation layer are stacked. Additionally, a color filter may be further formed on the encapsulation layer. The color filter may have an area equal to or slightly larger than that of the anode electrode (ANO) and may be formed to completely overlap the anode electrode (ANO).

Hereinafter, the manufacturing process of the electroluminescent display device according to the present specification will be described with reference to FIGS. 5A to 5G. FIGS. 5A to 5G are cross-sectional views taken along line II′ of FIG. 3 illustrating the manufacturing process of the electroluminescent display device according to the present specification.

Referring to FIG. 5A, a light blocking layer LS is formed on the substrate 110. The light blocking layer LS may be disposed below the semiconductor layers SA and DA to be formed later in order to prevent external light from entering the semiconductor layers SA and DA and changing the channel characteristics of the semiconductor channel region. . Additionally, the data line DL and the driving current line VDD may be formed on the same layer as the light blocking layer LS. The data line DL and the driving current line VDD are disposed in the display area AA. Meanwhile, a data pad electrode DP disposed in the non-display area NDA may be formed at an end of the data line DL.

Although not shown in the drawing, a driving current pad electrode disposed in the non-display area NDA may be further disposed at the end of the driving current line VDD. In addition, although the scan line SL has not yet been formed, a scan pad electrode disposed in the non-display area NDA may be formed at an end of the scan line SL to be formed later.

Referring to FIG. 5B, a buffer layer (BUF) is stacked on the light blocking layer (LS), the data line (DL), the data pad electrode (DP), and the driving current line (VDD). A first semiconductor layer (S1) and a second semiconductor layer (S2) are sequentially stacked on the buffer layer (BUF). The first semiconductor layer (S1) and the second semiconductor layer (S2) are etched to form a pad protection layer (SE), a switching semiconductor layer (SA), and a driving semiconductor layer (DA). The pad protection layer SE may have an annular shape that overlaps the edges of the data pad electrode DT and does not overlap most of the center.

Additionally, a switching semiconductor layer (SA) and a driving semiconductor layer (DA) are formed on the light blocking layer (LS). The switching semiconductor layer SA includes a first semiconductor layer S1 and a second semiconductor layer S2 stacked only on both sides of the first semiconductor layer S1. Likewise, the driving semiconductor layer DA includes a first semiconductor layer S1 and a second semiconductor layer S2 stacked only on both sides of the first semiconductor layer S1. The regions where the second semiconductor layer S2 is stacked form a source region and a drain region, respectively. A region comprised only of the first semiconductor layer (S1) between the second semiconductor layers (S2) forms a channel region. Using the pad protection layer SE formed on the data pad electrode DP as a mask, the buffer layer BUF is patterned to form a data pad contact hole DPH. The data pad contact hole (DPH) exposes most of the central area of the data pad electrode (DP).

Referring to FIG. 5C, a gate insulating film (GI) is applied. The gate insulating film GI is patterned to form an opening area OH exposing the data pad contact hole DPH. For example, the opening area OH may have a larger size than the data pad contact hole DPH. At this time, during the process of etching the gate insulating film (GI), the etched sidewall may be formed with severe unevenness in the shape of a columnar joint (K). This is due to the etching characteristics of the etchant when etching the gate insulating film (GI) made of silicon oxide. For example, when etching silicon oxide, if the etching speed in the vertical direction is faster than the etching speed in the horizontal direction, columnar jointing may occur. When the columnar joint shape is formed, the gate insulating film (GI) etchant or the etchant used in the subsequent etching process penetrates between the depressions of the columnar joint and causes damage to the buffer layer (BUF) and/or data pad electrode (DP) below it. The likelihood of giving increases.

However, in this specification, a pad protection layer (SE) formed by stacking the first semiconductor layer (S1) and the second semiconductor layer (S2) is formed under the gate insulating film (GI). During the process of etching the gate insulating film (GI), it is impossible to prevent the formation of a columnar joint shape on the side wall of the opening area (OH), but even if the etchant used later penetrates through the gap in the columnar joint, it does not affect the pad protection layer (SE). This can prevent the lower stacked buffer layer (BUF) and/or data pad electrode (DP) from being damaged.

In particular, the first semiconductor layer (S1) includes a metal oxide semiconductor material, and the second semiconductor layer (S2) is preferably formed of any one of molybdenum (Mo), titanium (Ti), or molybdenum-titanium alloy (MoTi). do. In this way, the pad protection layer (SE), especially the second semiconductor layer (S2) stacked on the top, contains a metal material, so it forms an opening area (OH), or the etchant used in the subsequent process forms an opening area (OH) at the bottom. It is easy to prevent penetration into the disposed material layer.

Additionally, contact holes exposing only the second semiconductor layer S2 are formed in the switching semiconductor layer SA and the driving semiconductor layer DA. For example, the source contact hole (H1) exposing the second semiconductor layer (S2) disposed in the source region of each of the switching semiconductor layer (SA) and the driving semiconductor (DA) and the second semiconductor layer (S2) disposed in the drain region. ) to form a drain contact hole (H2) exposing the . At this time, the gate insulating film (GI) and the buffer layer (BUF) are patterned together to expose a switching contact hole (SH) that exposes a part of the data line (DL) and a driving contact hole (DH) that exposes a part of the driving current line (VDD). ) to form.

Referring to FIG. 5D, a gate material is stacked on the gate insulating film GI. The gate material may have a structure in which a first gate layer (G1) and a second gate layer (G2) are stacked. The first gate layer (G1) is preferably formed of a metal material with excellent corrosion resistance, such as molybdenum (Mo), titanium (Ti), or molybdenum-titanium alloy (MoTi). The second gate layer G2 is preferably formed of copper (Cu), a low-resistance metal material, to lower the resistance of the scan line SL. Pattern the gate material to create a switching gate electrode (SG), a switching source electrode (SS), a switching drain electrode (SD), a driving gate electrode (DG), a driving source electrode (DS), a driving drain electrode (DD), and a data pad. Form a terminal (DPC).

As a result, the switching thin film transistor (ST) and driving thin film transistor (DT) are completed. Additionally, a data pad terminal (DPC) is formed that covers the pad contact hole (DPH) and is in contact with the data pad electrode (DP).

Referring to FIG. 5E, a protective film (PAS) is stacked and patterned on the surface of the substrate 110 on which the switching thin film transistor (ST) and driving thin film transistor (DT) are completed. It is preferable that the protective film PAS is disposed only on the display area AA and patterned to expose the data pad portion 300 in the non-display area NDA. A planarization film (PL) is stacked on the protective film (PAS) and patterned. The planarization film PL may also be laminated only on the display area AA and removed on the non-display area NDA. A pixel contact hole (PH) exposing a portion of the driving drain electrode (DD) is formed in the planarization film (PL) and the protective film (PAS).

Here, the second gate layer (G2) is removed from the data pad terminal (DPC) to complete the data pad terminal (DPC) consisting of only the first gate layer (G1). If the first gate layer (G1) containing copper (Cu) remains, the data pad terminal (DPC) may be damaged by corrosion, so it is removed in advance. When the second gate layer (G2) is removed, the first gate layer (G1) is exposed, but the first gate layer (G1) contains molybdenum (Mo) and/or titanium (Ti) with excellent corrosion resistance, It is not damaged by subsequent etching solutions. The data pad terminal (DPC) has a shape that completely covers the data pad electrode (DP) exposed by the pad contact hole (DPH). Accordingly, the data pad terminal (DPC) can protect the data pad electrode (DP) made of copper (Cu), which is easily damaged by etchants used in a subsequent etching process.

Referring to FIG. 5F, an anode electrode (ANO) is formed on the planarization film (PL). In the case of the top-emitting type, the anode electrode (ANO) preferably contains a material such as silver (Ag) with high light reflectance. Additionally, in the case of the top emission type, the anode electrode (ANO) can be formed to overlap the thin film transistors (ST, DT). A bank (BA) is formed on the anode electrode (ANO). The bank BA covers the edge area of the anode electrode ANO and is preferably patterned to expose most of the central area.

Most of the central area exposed by the bank (BA) in the anode electrode (ANO) is defined as the emission area (EA). In the process of forming the anode electrode (ANO), the same material as the anode electrode (ANO) may be laminated on the data pad terminal (DPC). However, since the material of the anode electrode (ANO) contains silver, which has weak corrosion resistance, it is desirable to remove the material of the anode electrode (ANO) so that it does not remain on the data pad terminal (DPC).

Referring to FIG. 5G, a light emitting layer (EL) is stacked on the anode electrode (AN0) and the bank (BA). The light emitting layer EL may be formed throughout the display area DA of the substrate 110 to cover the anode electrode ANO and the bank BA. A cathode electrode (CAT) is stacked on the light emitting layer (EL). The cathode electrode (CAT) is formed across the entire substrate 110 to be commonly connected to the light emitting layer (EL) formed in all pixels. In the case of the top emitting type, the cathode electrode (CAT) is made of a transparent conductive material such as Indium-Tin-Oxide (ITO) or Indium-Zinc-Oxide (IZO). desirable.

In the process of forming the cathode electrode (CAT), the same material as the cathode electrode (CAT) may be laminated on the data pad terminal (DPC). However, the material of the cathode electrode (CAT) contains a transparent conductive material with higher resistance than metal. Therefore, in order to prevent the contact resistance of the data pad terminal (DPC) from increasing, it is desirable to remove the cathode electrode (CAT) material so that it does not remain on the data pad terminal (DPC).

Hereinafter, with reference to FIG. 6, the structure of an electroluminescence display device according to another embodiment of the present specification will be described. FIG. 6 is a cross-sectional view showing the structure of an electroluminescent display device according to another embodiment of the present specification, taken along line II′ of FIG. 3 .

Comparing Figures 6 and 4, virtually all components are identical. The difference lies in the configuration of the switching semiconductor layer (SA) and the driving semiconductor layer (DA). In FIG. 6, the switching semiconductor layer (SA) and the driving semiconductor layer (DA) are made only of a metal oxide semiconductor material such as Indium-Galium-Zinc-Oxide (IGZO).

In other words, compared to FIG. 4, the difference in FIG. 6 is that the source region and the drain region do not include a second semiconductor layer for ohmic contact. In the case of metal oxide semiconductors such as IGZO, since they contain metal materials, ohmic contact with the source electrodes (SS, DS) and drain electrodes (SD, DD) is determined depending on the conditions of the thin film transistor to be implemented. , problems may not occur. In this case, a second semiconductor layer (S2) for separate ohmic contact may not be formed in the source region and drain region of the semiconductor layer.

However, in the data pad unit 300, the pad protection layer SE preferably stacked in an annular shape around the data pad contact hole DPH exposing the data pad electrode DP has the same structure as that of FIG. 4 . That is, the pad protection layer SE preferably includes a first semiconductor layer S1 and a second semiconductor layer S2 stacked thereon. In particular, it is preferable to include the second semiconductor layer (S2) containing a metal material with excellent corrosion resistance, such as molybdenum (Mo), titanium (Ti), or molybdenum-titanium alloy (MoTi).

The electroluminescent display device according to the embodiments of the present specification shown in FIGS. 4 and 6 has a pad protection layer (SE) made of molybdenum (Mo) or titanium (Ti) with excellent corrosion resistance around the data pad electrode (DP). ), it is possible to prevent damage to the data pad portion 300 from etchants used during the manufacturing process. Moreover, after the data pad electrode (DP) is exposed, the data pad terminal (DPT) made of molybdenum (Mo) or titanium (Ti), which has excellent corrosion resistance, covers the data pad electrode (DP) during the manufacturing process. The data pad portion 300 can be prevented from being damaged during various etching processes.

The features, structures, effects, etc. described in the examples of the present specification described above are included in at least one example of the present specification and are not necessarily limited to only one example. Furthermore, the features, structures, effects, etc. exemplified in at least one example of this specification can be combined or modified for other examples by those skilled in the art to which this specification pertains. Therefore, contents related to such combinations and modifications should be construed as being included in the scope of the present specification.

The present specification described above is not limited to the above-described embodiments and the accompanying drawings, and it is common in the technical field to which this specification pertains that various substitutions, modifications, and changes are possible without departing from the technical details of the present specification. It will be clear to those who have the knowledge of. Therefore, the scope of the present specification is indicated by the patent claims described later, and all changes or modified forms derived from the meaning and scope of the patent claims and their equivalent concepts should be interpreted as being included in the scope of the present specification.

OLE: light emitting diode ANO: anode electrode
EL: light emitting layer CAT: cathode electrode
ST: Switching thin film transistor DT: Driving thin film transistor
SA: switching semiconductor layer DA: driving semiconductor layer
SG: switching gate electrode DG: driving gate electrode
SS: switching source electrode DS: driving source electrode
SD: switching drain electrode DD: driving drain electrode
LS: Light blocking layer SE: Pad protection layer
S1: first semiconductor layer S2: second semiconductor layer
G1: first gate layer G2: second gate layer
DPC: Data pad terminal DPH: Data pad contact hole

Claims (18)

a substrate having a display area and a non-display area surrounding the display area;
a wiring extending from the display area to the non-display area;
a pad electrode disposed at an end of the wiring in the non-display area;
a buffer layer covering the pad electrode and the wiring;
a pad contact hole formed in the buffer layer to expose the pad electrode;
a pad protection layer disposed around the pad contact hole on the buffer layer;
a gate insulating layer disposed on the pad protection layer and the buffer layer;
an opening region formed in the gate insulating layer to expose the pad contact hole; and
An electroluminescent display device formed on the gate insulating film and including a pad terminal in contact with the pad electrode. According to claim 1,
The pad electrode is an electroluminescent display device containing copper (Cu). According to claim 1,
The pad protection layer is,
a first layer disposed over the buffer layer; and
An electroluminescent display device comprising a second layer disposed on the first layer. According to claim 3,
The first layer includes Indium-Galium-Zinc-Oxide,
The second layer is an electroluminescent display device comprising at least one of molybdenum (Mo), titanium (Ti), and molybdenum-titanium alloy (MoTi). According to claim 1,
The pad terminal is an electroluminescent display device including at least one of molybdenum (Mo), titanium (Ti), and molybdenum-titanium alloy (MoTi). According to claim 1,
The opening area exposes the entire pad contact hole and a portion of the pad protection layer. According to claim 6,
The pad terminal covers the opening area, the exposed portion of the pad protective layer, and an etched sidewall of the pad contact hole on the gate insulating film, and covers the entire exposed upper surface of the pad electrode. According to claim 1,
Further comprising a thin film transistor disposed in the display area,
The thin film transistor is,
a semiconductor layer formed on the same layer as the pad protection layer;
a gate electrode formed on the same layer as the pad terminal and overlapping a central region of the semiconductor layer with the gate insulating film interposed therebetween;
a source electrode formed on the same layer as the pad terminal and in contact with one side of the semiconductor layer; and
An electroluminescent display device comprising a drain electrode formed on the same layer as the pad terminal and in contact with the other side of the semiconductor layer. According to claim 8,
The pad protection layer is,
a first layer disposed over the buffer layer; and
comprising a second layer disposed over the first layer,
The semiconductor layer is,
a channel layer made of the same material as the first layer of the pad protection layer;
a source ohmic layer formed on one side of the channel layer and made of the same material as the second layer of the pad protection layer; and
An electroluminescent display device comprising a drain ohmic layer formed on the other side of the channel layer and made of the same material as the second layer of the pad protection layer. According to claim 8,
The gate electrode, the source electrode, and the drain electrode are,
a first metal layer made of the same material as the pad terminal; and
An electroluminescent display device stacked on the first metal layer and including a second metal layer made of copper (Cu). Board;
a pad electrode disposed on the substrate;
a buffer layer exposing the central area of the pad electrode and covering the edge area;
a pad protection layer overlapping an edge area of the pad electrode on the buffer layer;
an insulating film exposing a central area of the pad protection layer and covering an edge area; and
An electroluminescent display device comprising a pad terminal formed on the insulating film and covering the pad electrode. According to claim 11,
The pad electrode is an electroluminescent display device containing copper (Cu). According to claim 11,
The pad protection layer includes a first layer made of indium-gallium-zinc-oxide; and
An electroluminescent display device comprising a second layer laminated on the first layer and made of a molybdenum-titanium alloy. According to claim 11,
The pad terminal is an electroluminescent display device comprising any one of molybdenum, titanium, and molybdenum-titanium alloy. According to claim 11,
The pad terminal covers an electric field on the insulating film, covering an etched side of the insulating film, covering an exposed edge area of the pad protective layer, covering an etched side of the buffer layer, and covering an exposed upper surface of the pad electrode. Luminous display device. According to claim 11,
Further comprising a thin film transistor disposed on the substrate,
The thin film transistor is,
a semiconductor layer formed on the same layer as the pad protection layer;
a gate electrode formed on the same layer as the pad terminal and overlapping a central region of the semiconductor layer with the insulating film interposed therebetween;
a source electrode formed on the same layer as the pad terminal and in contact with one side of the semiconductor layer; and
An electroluminescent display device comprising a drain electrode formed on the same layer as the pad terminal and in contact with the other side of the semiconductor layer. According to claim 16,
The pad protection layer is,
a first layer disposed over the buffer layer; and
comprising a second layer disposed over the first layer,
The semiconductor layer is,
a channel layer made of the same material as the first layer of the pad protection layer;
a source ohmic layer formed on one side of the channel layer and made of the same material as the second layer of the pad protection layer; and
An electroluminescent display device comprising a drain ohmic layer formed on the other side of the channel layer and made of the same material as the second layer of the pad protection layer. According to claim 16,
The gate electrode, the source electrode, and the drain electrode are,
a first metal layer made of the same material as the pad terminal; and
An electroluminescent display device stacked on the first metal layer and including a second metal layer made of copper (Cu).

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