KR20230166350A - Display device - Google Patents

Abstract

A display device according to an embodiment of the present invention includes a lower substrate that is made of a transmissive material and can be stretched, a pattern layer disposed on the lower substrate and composed of a plurality of plate patterns and a plurality of wiring patterns, and the plurality of plate patterns. Transparent, including a plurality of light-emitting elements disposed on each of the plurality of light-emitting elements, a plurality of stretched wirings disposed on an upper portion of each of the plurality of wiring patterns, and a light blocking member disposed on the plurality of wiring patterns and covering the plurality of stretched wirings, It is possible to implement a display device that can be stretched while doing so.

Description

Display device {DISPLAY DEVICE}

The present invention relates to a display device, and more specifically to a stretchable display device that can be stretched.

Display devices used in computer monitors, TVs, mobile phones, etc. include organic light emitting displays (OLED) that emit light on their own, and liquid crystal displays (LCD) that require a separate light source. there is.

The scope of application of display devices is becoming more diverse, including not only computer monitors and TVs but also personal portable devices, and research is being conducted on display devices that have a large display area but reduced volume and weight.

In addition, recently, display devices that are manufactured by forming the display portion and wiring on a flexible substrate such as plastic, which can expand and contract in a specific direction and change into various shapes, are attracting attention as next-generation display devices. there is.

The problem to be solved by the present invention is to provide a display device that can be stretched while transmitting external light.

Another problem to be solved by the present invention is to provide a display device that can minimize external light reflection due to stretched wiring.

Another problem to be solved by the present invention is to provide a display device that can improve stretching reliability.

The problems of the present invention are not limited to the problems mentioned above, and other problems not mentioned will be clearly understood by those skilled in the art from the description below.

In order to solve the above-described problem, a display device according to an embodiment of the present invention is formed of a transparent material, has an extendable lower substrate, is disposed on the lower substrate, and has a plurality of plate patterns and a plurality of wiring patterns. A pattern layer is formed, a plurality of light emitting elements disposed on each of the plurality of plate patterns, a plurality of stretched wirings disposed on an upper portion of each of the plurality of wiring patterns, and disposed on the plurality of wiring patterns, and the plurality of stretched wirings are disposed on the plurality of wiring patterns. A display device that is transparent and stretchable can be implemented by including a light blocking member that covers wiring.

Specific details of other embodiments are included in the detailed description and drawings.

The present invention can prevent peeling during stretching by forming a fine pattern between a plurality of rigid substrates.

In the present invention, the wire anchor is formed to correspond to the wire extension direction, thereby maximizing the elongation rate and improving reliability.

In the present invention, the voltage applied to the stretched wiring can be changed by forming a transistor by disposing a semiconductor layer on the stretched wiring.

The effects according to the present invention are not limited to the details exemplified above, and further various effects are included within the present invention.

1 is a plan view of a display device according to an embodiment of the present invention.
2 and 3 are enlarged plan views of the display area of a display device according to an embodiment of the present invention.
Figure 4 is a cross-sectional view taken along the cutting line IV-IV' shown in Figure 2.
Figure 5 is a cross-sectional view taken along the cutting line V-V' shown in Figure 3.
Figure 6 is a cross-sectional view taken along the cutting line VI-VI' shown in Figure 3.
FIG. 7 is a diagram illustrating a case in which one transparent area is stretched in a display device according to an embodiment of the present invention.
Figure 8 is a cross-sectional view of an extended wiring of a display device according to another embodiment of the present invention cut along the extension direction.
Figure 9 is a cross-sectional view of the stretched wiring of a display device according to another embodiment of the present invention cut along the vertical direction of the extension direction.
Figure 10 is an enlarged plan view of a straight area of a display device according to another embodiment (third embodiment) of the present invention.
FIG. 11 is a cross-sectional view taken along the cutting line XI-XI' shown in FIG. 10.
FIG. 12 is a cross-sectional view taken along the cutting line XII-XII' shown in FIG. 10.
Figure 13 is an enlarged plan view of a straight area of a display device according to another embodiment (fourth embodiment) of the present invention.
FIG. 14 is a cross-sectional view taken along the cutting line XIV-XIV' shown in FIG. 13.
FIG. 15 is a cross-sectional view taken along the cutting line XV-XV' shown in FIG. 13.
FIG. 16 is a circuit diagram showing a transistor included in a wiring anchor of a display device according to another embodiment (fourth embodiment) of the present invention.
Figure 17 is an enlarged plan view of a straight area of a display device according to another embodiment (fifth embodiment) of the present invention.
FIG. 18 is a cross-sectional view taken along line XVIII-XVIII' shown in FIG. 17.
FIG. 19 is a cross-sectional view taken along the cutting line XIX-XIX' shown in FIG. 17.
FIG. 20 is a circuit diagram showing a transistor included in a wiring anchor of a display device according to another embodiment (fifth embodiment) of the present invention.

The advantages and features of the present invention and methods for achieving them will become clear by referring to the embodiments described in detail below along with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below and will be implemented in various different forms, and only the present embodiments make the disclosure of the present invention complete, and are known to those skilled in the art in the technical field to which the present invention pertains. It is provided to fully inform those who have the scope of the invention, and the present invention is only defined by the scope of the claims.

The shape, area, ratio, angle, number, etc. disclosed in the drawings for explaining embodiments of the present invention are illustrative and the present invention is not limited to the matters shown. Like reference numerals refer to like elements throughout the specification. Additionally, in describing the present invention, if it is determined that a detailed description of related known technologies may unnecessarily obscure the gist of the present invention, the detailed description will be omitted. When 'comprises', 'has', 'consists of', etc. mentioned in the present invention are used, other parts may be added unless 'only' is used. When a component is expressed in the singular, the plural is included unless specifically stated otherwise.

When interpreting a component, it is interpreted to include the margin of error even if there is no separate explicit description.

In the case of a description of a positional relationship, for example, if the positional relationship of two parts is described as 'on top', 'on the top', 'on the bottom', 'next to', etc., 'immediately' Alternatively, there may be one or more other parts placed between the two parts, unless 'directly' is used.

When an element or layer is referred to as “on” another element or layer, it includes instances where the other layer or other element is directly on top of or interposed between the other elements.

And, when described as being 'connected' or 'connected', unless 'immediately' or 'directly' is used, it includes being 'connected' or 'connected' through one or more other components located between two components. can do.

Additionally, first, second, etc. are used to describe various components, but these components are not limited by these terms. These terms are merely used to distinguish one component from another. Accordingly, the first component mentioned below may also be the second component within the technical spirit of the present invention.

Like reference numerals refer to like elements throughout the specification.

The area and thickness of each component shown in the drawings are shown for convenience of explanation, and the present invention is not necessarily limited to the area and thickness of the components shown.

Each feature of the various embodiments of the present invention can be combined or combined with each other, partially or entirely, and various technological interconnections and operations are possible, and each embodiment can be implemented independently of each other or together in a related relationship. It may be possible.

Hereinafter, various embodiments of the present invention will be described in detail with reference to the attached drawings.

A display device according to an embodiment of the present invention is a display device capable of displaying an image even when bent or stretched, and may also be referred to as a stretchable display device, a stretchable display device, and a stretchable display device. A display device may have high flexibility and stretchability compared to a conventional display device. Accordingly, not only can the user bend or stretch the display device, but the shape of the display device can be freely changed according to the user's manipulation. For example, when a user holds the end of the display device and pulls it, the display device may stretch in the direction in which the user pulls it. Alternatively, when a user places the display device on a non-flat outer surface, the display device may be arranged to be curved following the shape of the outer surface of the wall. Additionally, when the force applied by the user is removed, the display device can be restored to its original form.

<Stretchable substrate and pattern layer>

1 is a plan view of a display device according to an embodiment of the present invention.

2 and 3 are enlarged plan views of the display area of a display device according to an embodiment of the present invention.

Figure 4 is a cross-sectional view taken along the cutting line IV-IV' shown in Figure 2.

Specifically, Figures 2 and 3 are enlarged plan views of area A shown in Figure 1. FIG. 2 is an enlarged plan view excluding the light blocking member BM, and FIG. 3 is an enlarged plan view including the light blocking member BM.

Referring to FIG. 1, the display device 100 according to an embodiment of the present invention includes a lower substrate 111, a pattern layer 120, a plurality of pixels (PX), a gate driver (GD), and a data driver (DD). and a power supply (PS). And, referring to FIG. 4 , the display device 100 according to an embodiment of the present invention may further include a filling layer 190 and an upper substrate 112.

The lower substrate 111 is a substrate for supporting and protecting various components of the display device 100. Additionally, the upper substrate 112 is a substrate for covering and protecting various components of the display device 100. That is, the lower substrate 111 is a substrate that supports the pattern layer 120 on which the pixel (PX), gate driver (GD), and power supply (PS) are formed. And, the upper substrate 112 is a substrate that covers the pixel (PX), gate driver (GD), and power supply (PS).

Each of the lower substrate 111 and the upper substrate 112 is a transparent flexible substrate and may be made of an insulating material that can be bent or stretched. For example, each of the lower substrate 111 and the upper substrate 112 is made of silicone rubber such as polydimethylsiloxane (PDMS), or polyurethane (PU) and polytetrafluoroethylene (PTFE). It is made of an elastomer and, therefore, may have flexible properties. Additionally, the materials of the lower substrate 111 and the upper substrate 112 may be the same, but are not limited thereto and may be modified in various ways.

Each of the lower substrate 111 and the upper substrate 112 is a flexible substrate and can be reversibly expanded and contracted. Accordingly, the lower substrate 111 includes a lower stretchable substrate, a lower stretchable substrate, a lower stretched substrate, a lower flexible substrate, a lower flexible substrate, a first stretchable substrate, a first stretchable substrate, a first stretched substrate, and a first stretchable substrate. It may also be referred to as a flexible substrate or a first flexible substrate, and the upper substrate 112 is an upper stretchable substrate, an upper stretchable substrate, an upper stretched substrate, an upper flexible substrate, an upper flexible substrate, and a second stretchable substrate. , the second stretchable substrate may also be referred to as a second stretched substrate, a second flexible substrate, or a second flexible substrate. Additionally, the modulus of elasticity of the lower substrate 111 and the upper substrate 112 may be several MPa to several hundred MPa. Additionally, the ductile breaking rate of the lower substrate 111 and the upper substrate 112 may be 100% or more. Here, the ductile fracture rate means the elongation rate at the point when the stretched object is destroyed or cracked. The thickness of the lower substrate may be 10um to 1mm, but is not limited thereto.

The lower substrate 111 may have a display area (Active Area) and a non-active area (NA) surrounding the display area (AA). However, the display area (AA) and the non-display area (NA) are not limited to the lower substrate 111 but may be referred to throughout the display device.

The display area AA is an area where an image is displayed on the display device 100. A plurality of pixels PX are arranged in the display area AA. Additionally, each pixel PX may include a light-emitting element and various driving elements for driving the light-emitting element. The various driving elements may include at least one thin film transistor (TFT) and a capacitor, but are not limited thereto. Additionally, each of the plurality of pixels (PX) may be connected to various wiring lines. For example, each of the plurality of pixels (PX) may be connected to various wires such as a gate wire, a data wire, a high-potential voltage wire, a low-potential voltage wire, a reference wire, and an initialization voltage wire.

Meanwhile, referring to Figures 2 and 3, the display area (AA) includes a light emitting area (EA) through which the light emitting device emits light, a transmission area (TA) through which external light is transmitted, and a light blocking area (BA) through which external light is not transmitted. can do.

The light emitting area EA is an area where the light emitting elements arranged in the plurality of pixels PX emit light, and refers to an area in the display area AA where the plurality of pixels PX are arranged. Additionally, the transmission area TA is an area that transmits external light and refers to an area of the lower substrate 111 and the upper substrate 112 where the light blocking member BM is not disposed. And, the light blocking area (BA) is an area through which external light does not transmit, and refers to an area excluding the light emitting area (EA) and the transmission area (TA). In addition, stretched wires 181 and 182 connecting the plurality of pixels PX and a light blocking member BM covering them may be disposed in the light blocking area BA.

Additionally, the light emitting area EA may be separated into a plurality of pieces and arranged in a matrix arranged in the first direction (X) and the second direction (Y). Additionally, the light blocking area BA may extend in the first direction (X) or the second direction (Y) to connect the light emitting area (EA) arranged in the first direction (X) and the second direction (Y). . In addition, the transmission area (TA) may be disposed between the light blocking areas (BA) facing each other, or between the light emitting areas (EA) facing diagonally in the first direction (X) and the second direction (Y). You can. Additionally, the transmission area TA may also be arranged separately into a plurality of pieces in the form of a matrix arranged in the first direction (X) and the second direction (Y).

The non-display area (NA) is an area where images are not displayed. The non-display area (NA) may be an area adjacent to the display area (AA). Additionally, the non-display area NA may be an area adjacent to the display area AA and surrounding the display area AA. However, the non-display area NA corresponds to an area of the lower substrate 111 excluding the display area AA, and may be deformed and separated into various shapes. Components for driving the plurality of pixels PX arranged in the display area AA are arranged in the non-display area NA. A gate driver (GD) and a power supply (PS) may be disposed in the non-display area (NA). In addition, a plurality of pads connected to the gate driver (GD) and the data driver (DD) may be disposed in the non-display area (NA), and each pad is connected to each of the plurality of pixels (PX) in the display area (AA). can be connected

On the lower substrate 111, a plurality of internal plate patterns 121 and a plurality of internal line patterns 122 are arranged in the display area AA, and a plurality of external patterns are arranged in the non-display area NA. A pattern layer 120 including a plate pattern 123 and a plurality of external line patterns 124 is disposed.

The plurality of internal plate patterns 121 are disposed in the display area AA of the lower substrate 111, and a plurality of pixels PX are formed on the plurality of internal plate patterns 121. Additionally, the plurality of external plate patterns 123 may be disposed in the non-display area NA of the lower substrate 111 . Then, a gate driver (GD) and a power supply (PS) are formed on the plurality of external plate patterns 123.

The plurality of inner plate patterns 121 and the plurality of outer plate patterns 123 described above may be arranged in an island shape spaced apart from each other. That is, the plurality of internal plate patterns 121 and the plurality of external plate patterns 123 may be arranged in a matrix form with respect to the first direction (X) and the second direction (Y). Each of the plurality of inner plate patterns 121 and the plurality of outer plate patterns 123 may be individually separated. Accordingly, the plurality of internal plate patterns 121 and the plurality of external plate patterns 123 include a first island pattern, a second island pattern, or a first individual pattern and It may be referred to as a second individual pattern.

Specifically, a plurality of pixels (PX) including light-emitting elements may be disposed in the plurality of internal plate patterns 121. The plurality of internal plate patterns 121 may have a diamond shape with respect to the first direction (X) and the second direction (Y). That is, one side of the plurality of internal plate patterns 121 may extend in the diagonal third direction D1 or fourth direction D2. Accordingly, the plurality of pixels PX formed on the plurality of internal plate patterns 121 may also extend in the third direction D1 or the fourth direction D2.

Accordingly, the edge of the transmission area (TA) may extend in the third direction (D1) or the fourth direction (D2) rather than in a right angle shape where the first direction (X) and the second direction (Y) perpendicularly intersect. . That is, the transmission area TA may have a polygonal shape of 4 or more, such as an octagon.

Additionally, gate drivers (GD) may be mounted on the plurality of external plate patterns 123. The gate driver (GD) may be formed on the outer plate pattern 123 using a gate in panel (GIP) method when manufacturing various components on the inner plate pattern 121. Accordingly, various circuit configurations constituting the gate driver (GD), such as various transistors, capacitors, wiring, etc., may be disposed on the plurality of external plate patterns 123. However, the gate driver (GD) is not limited to this and may be mounted using a COF (Chip on Film) method.

Additionally, a power supply (PS) may be mounted on the plurality of external plate patterns 123. The power supply (PS) may be formed on the outer plate pattern 123 with a plurality of power blocks that are patterned when manufacturing various components on the inner plate pattern 121. Accordingly, power blocks arranged in different layers may be disposed on the outer plate pattern 123. That is, the lower power block and the upper power block may be sequentially arranged on the second plate pattern 123. Additionally, a low potential voltage may be applied to the lower power block, and a high potential voltage may be applied to the upper power block. Accordingly, low-potential voltage may be supplied to the plurality of pixels (PX) through the lower power block. Additionally, a high potential voltage may be supplied to the plurality of pixels (PX) through the upper power block.

Referring to FIG. 1, the size of the plurality of external plate patterns 123 may be larger than the size of the plurality of internal plate patterns 121. Specifically, the size of each of the plurality of external plate patterns 123 may be larger than the size of each of the plurality of internal plate patterns 121. As described above, a gate driver (GD) may be disposed on each of the plurality of external plate patterns 123, and one stage of the gate driver (GD) may be disposed on each of the plurality of external plate patterns 123. Accordingly, since the area occupied by various circuit configurations constituting one stage of the gate driver (GD) is relatively larger than the area occupied by the pixel (PX), the size of each of the plurality of external plate patterns 123 is smaller than that of the plurality of internal plate patterns 123. The size of each plate pattern 121 may be larger.

In FIG. 1, the plurality of external plate patterns 123 are shown as being disposed on both sides of the first direction (X) in the non-display area (NA), but are not limited thereto and may be disposed in any area of the non-display area (NA). It can be. In addition, the plurality of internal plate patterns 121 and the plurality of external plate patterns 123 are shown in a square shape, but are not limited thereto, and the plurality of internal plate patterns 121 and the plurality of external plate patterns 123 are It can be transformed into various forms.

Referring to FIG. 1, the pattern layer 120 includes a plurality of internal line patterns 122 disposed in the display area AA and a plurality of external line patterns 122 disposed in the non-display area NA. 124) may be further included.

The plurality of internal wiring patterns 122 are arranged in the display area AA and connect adjacent internal plate patterns 121 to each other, and may be referred to as internal wiring patterns. That is, a plurality of internal wiring patterns 122 are disposed between the plurality of internal plate patterns 121. Accordingly, the plurality of internal wiring patterns 122 may extend in the first direction (X) or the second direction (Y).

The plurality of external wiring patterns 124 are disposed in the non-display area (NA) and connect the internal plate patterns 121 and the external plate patterns 123 that are adjacent to each other, or form a plurality of external wiring patterns 123 that are adjacent to each other. It may be a pattern that connects. Accordingly, the plurality of external wiring patterns 124 may be referred to as external wiring patterns. Accordingly, the plurality of external wiring patterns 124 may also extend in the first direction (X) or the second direction (Y).

Additionally, the plurality of external wiring patterns 124 may be disposed between the inner plate patterns 121 and the outer plate patterns 123 that are adjacent to each other, and between the plurality of external plate patterns 123 that are adjacent to each other. Referring to FIG. 1, the plurality of internal wiring patterns 122 and external wiring patterns 124 have a curved shape. For example, the plurality of internal wiring patterns 122 and external wiring patterns 124 may have a sine wave shape. However, the shapes of the plurality of internal wiring patterns 122 and external wiring patterns 124 are not limited to this, and for example, the plurality of internal wiring patterns 122 and external wiring patterns 124 may extend in a zigzag shape. It may be possible. Alternatively, the shapes of the plurality of internal wiring patterns 122 and the external wiring patterns 124 may have various shapes, such as a plurality of diamond-shaped substrates connected at the vertices and extending. In addition, the number and shape of the plurality of internal wiring patterns 122 and external wiring patterns 124 shown in FIG. 1 are exemplary, and the number and shape of the plurality of internal wiring patterns 122 and external wiring patterns 124 are can change in various ways depending on the design.

Additionally, the plurality of internal plate patterns 121, the plurality of internal wiring patterns 122, the plurality of external plate patterns 123, and the plurality of external wiring patterns 124 are rigid patterns. That is, the plurality of internal plate patterns 121, the plurality of internal wiring patterns 122, the plurality of external plate patterns 123, and the plurality of external wiring patterns 124 are connected to the lower substrate 111 and the upper substrate 112. In comparison, it may be rigid. Accordingly, the modulus of elasticity of the plurality of internal plate patterns 121, the plurality of internal wiring patterns 122, the plurality of external plate patterns 123, and the plurality of external wiring patterns 124 is the lower substrate 111. ) may be higher than the modulus of elasticity. The modulus of elasticity is a parameter that represents the rate of deformation relative to the stress applied to the substrate. When the modulus of elasticity is relatively high, the hardness may be relatively high. Accordingly, the plurality of internal plate patterns 121, the plurality of internal wiring patterns 122, the plurality of external plate patterns 123, and the plurality of external wiring patterns 124 each include a plurality of first rigid patterns and a plurality of second rigid patterns. It may be referred to as a rigidity pattern, a plurality of third rigidity patterns, and a plurality of fourth rigidity patterns. The elastic moduli of the plurality of internal plate patterns 121, the plurality of internal wiring patterns 122, the plurality of external plate patterns 123, and the plurality of external wiring patterns 124 are the lower substrate 111 and the upper substrate 112. It may be more than 1000 times higher than the elastic modulus of, but is not limited to this.

A plurality of internal plate patterns 121, a plurality of internal wiring patterns 122, a plurality of external plate patterns 123, and a plurality of external wiring patterns 124, which are a plurality of rigid substrates, are formed on the lower substrate 111 and the upper substrate ( 112) and may be made of a plastic material with lower flexibility. For example, the plurality of internal plate patterns 121, the plurality of internal wiring patterns 122, the plurality of external plate patterns 123, and the plurality of external wiring patterns 124 are made of polyimide (PI) or polyacrylic. It may be made of at least one material selected from polyacrylate and polyacetate. At this time, the plurality of internal plate patterns 121, the plurality of internal wiring patterns 122, the plurality of external plate patterns 123, and the plurality of external wiring patterns 124 may be made of the same material, but are not limited thereto. , may be made of different materials. When the plurality of internal plate patterns 121, the plurality of internal wiring patterns 122, the plurality of external plate patterns 123, and the plurality of external wiring patterns 124 are made of the same material, they may be formed as one piece.

In some embodiments, the lower substrate 111 may be defined as including a plurality of first lower patterns and a plurality of second lower patterns. The plurality of first lower patterns may be areas that overlap the plurality of inner plate patterns 121 and the plurality of outer plate patterns 123 of the lower substrate 111 . The second lower pattern may be an area that does not overlap the plurality of inner plate patterns 121 and the plurality of outer plate patterns 123.

Additionally, the upper substrate 112 may be defined as including a plurality of first and second upper patterns. The plurality of first upper patterns may be areas that overlap the plurality of inner plate patterns 121 and the plurality of outer plate patterns 123 of the upper substrate 112, and the second upper patterns may be regions of the plurality of inner plate patterns 121. ) and may be an area that does not overlap with the plurality of external plate patterns 123.

At this time, the elastic modulus of the plurality of first lower patterns and the first upper pattern may be greater than that of the second lower pattern and the second upper pattern. For example, the plurality of first lower patterns and the first upper patterns may be made of the same material as the plurality of inner plate patterns 121 and the plurality of outer plate patterns 123, and the second lower patterns and the second upper patterns may be made of the same material. may be made of a material having a lower elastic modulus than the plurality of inner plate patterns 121 and the plurality of outer plate patterns 123.

That is, the first lower pattern and the first upper pattern may be made of polyimide (PI), polyacrylate, or polyacetate, and the second lower pattern and the second upper pattern may be made of polyimide (PI), polyacrylate, or polyacetate. It may be made of an elastomer such as silicone rubber such as polydimethylsiloxane (PDMS), polyurethane (PU), or polytetrafluoroethylene (PTFE).

<Non-display area driving element>

The gate driver (GD) is a component that supplies gate voltage to a plurality of pixels (PX) arranged in the display area (AA). The gate driver (GD) includes a plurality of stages formed on a plurality of external plate patterns 123, and each stage of the gate driver (GD) may be electrically connected to each other through a plurality of gate stretching wires. Therefore, the gate voltage output from one stage can be transferred to another stage. Additionally, each stage may sequentially supply a gate voltage to a plurality of pixels (PX) connected to each stage.

The power supply (PS) is connected to the gate driver (GD) and can supply a gate driving voltage and a gate clock voltage. Additionally, the power supply PS may be connected to a plurality of pixels PX and supply a pixel driving voltage to each of the plurality of pixels PX. Additionally, the power supply (PS) may be formed on the plurality of external plate patterns 123. That is, the power supply (PS) may be formed adjacent to the gate driver (GD) on the external plate pattern 123. Additionally, each of the power supplies PS formed on the plurality of external plate patterns 123 may be electrically connected to the gate driver GD and the plurality of pixels PX. That is, a plurality of power supplies PS formed on the plurality of external plate patterns 123 may be connected by a gate power supply extension wire and a pixel power supply extension wire. Accordingly, each of the plurality of power supplies (PS) may supply a gate driving voltage, a gate clock voltage, and a pixel driving voltage.

A printed circuit board (PCB) is a component that transmits signals and voltages for driving a light-emitting device from a control unit to the light-emitting device. Accordingly, a printed circuit board (PCB) may also be referred to as a driving board. A printed circuit board (PCB) may be equipped with control units such as IC chips and circuit units. Additionally, memory, processors, etc. may be mounted on the printed circuit board (PCB). Additionally, the printed circuit board (PCB) provided in the display device 100 may include a stretched region and a non-stretched region to ensure stretchability. Additionally, IC chips, circuits, memory, processors, etc. may be installed in the non-stretched area, and wires electrically connected to the IC chip, circuits, memory, and processor may be placed in the stretched area.

The data driver DD is a component that supplies data voltage to a plurality of pixels PX arranged in the display area AA. The data driver (DD) may be configured in the form of an IC chip and may also be referred to as a data integrated circuit (D-IC). Additionally, the data driver DD may be mounted on a non-stretched area of a printed circuit board (PCB). That is, the data driver DD may be mounted on a printed circuit board (PCB) in the form of a chip on board (COB). However, in Figure 1, the data driver (DD) is shown as being mounted in a COF (Chip On Film) method, but the data driver (DD) is not limited to this, and may be mounted on a COF (Chip on Board), COG (Chip On Glass), It may be mounted using a method such as TCP (Tape Carrier Package).

Additionally, in FIG. 1 , one data driver DD is shown to be disposed to correspond to a row of internal plate patterns 121 disposed in the display area AA, but the present invention is not limited thereto. That is, one data driver DD may be arranged to correspond to the plurality of rows of internal plate patterns 121.

Hereinafter, FIG. 4 will be referred to for a more detailed description of the display area AA of the display device 100 according to an embodiment of the present invention. For convenience of explanation, the plurality of internal plate patterns 121 are referred to as a plurality of plate patterns 121, and the plurality of internal wiring patterns 122 are referred to as a plurality of wiring patterns 122.

<Plan and section structure of display area>

Referring to FIG. 4 , the plurality of plate patterns 121 include a lower plate pattern 121a disposed on the lower substrate 111 and an upper plate pattern 121b disposed on the lower plate pattern 121a. Additionally, the plurality of wiring patterns 122 includes a lower wiring pattern 122a disposed on the lower substrate 111 and an upper wiring pattern 122b disposed on the lower wiring pattern 122a. That is, the pattern layer 120 is disposed on the lower substrate 111 and includes lower pattern layers 121a and 122a consisting of a plurality of lower plate patterns 121a and a plurality of lower wiring patterns 122a, and the lower pattern It is disposed on the layers 121a and 122a and may include upper pattern layers 121b and 122b composed of a plurality of upper plate patterns 121b and a plurality of upper wiring patterns 122b.

Referring to FIGS. 2 and 4 , a pixel PX including a plurality of sub-pixels SPX is disposed on the plurality of plate patterns 121 . Additionally, each sub-pixel SPX may include a pixel circuit including a light-emitting device 170, a driving transistor 160 for driving the light-emitting device 170, and a switching transistor 150. However, the light-emitting device in the sub-pixel (SPX) is not limited to LED, but may be changed to organic light-emitting diode. Additionally, the plurality of sub-pixels (SPX) may include a red sub-pixel, a green sub-pixel, and a blue sub-pixel, but are not limited thereto, and the colors of the plurality of sub-pixels (SPX) may be changed in various ways as needed. there is.

More specifically, as shown in FIG. 4, the driving transistor 160, switching transistor 150, and light emitting device 170 that constitute the pixel circuit are disposed on a plurality of upper plate patterns 121b.

Referring to FIG. 2 , a plurality of sub-pixels (SPX) may be connected to a plurality of stretched wires 181 and 182. That is, the plurality of sub-pixels SPX may be electrically connected to the first stretched wiring 181 extending in the first direction (X). Additionally, the plurality of sub-pixels SPX may be electrically connected to the second stretched wiring 182 extending in the second direction (Y).

More specifically, as shown in FIG. 4, the first stretched wiring 181 is a first lower stretched wiring 181a disposed on the lower wiring pattern 122a and a first stretched wiring 181a disposed on the upper wiring pattern 122b. 1 May include an upper elongated wiring 181b. And, as shown in FIG. 3, the second stretched wiring 182 is a second lower stretched wiring 182a disposed on the lower wiring pattern 122a and a second upper stretched wiring disposed on the upper wiring pattern 122b. It may include a wiring 182b.

And, a plurality of upper plate patterns 121b are disposed on the plurality of lower plate patterns 121a. Additionally, a fine pattern may be formed on the surface where the lower plate pattern 121a and the upper plate pattern 121b contact each other. The above-described fine pattern can anchor the lower plate pattern 121a and the upper plate pattern 121b. Accordingly, when the display device 100 is stretched, the fine pattern can more effectively combine the lower plate pattern 121a and the upper plate pattern 121b to prevent peeling.

The above-described fine pattern can be obtained through corona discharge treatment, and the lower plate pattern 121a and the upper plate pattern (121a) are formed through surface modification of the surface where the lower plate pattern 121a and the upper plate pattern 121b are in contact. 121b) Adhesion between livers can be improved.

More specifically, corona discharge treatment uses high voltage to ionize and accelerate free electrons or gases present in the atmosphere, and then the accelerated free electrons collide with the surface of the substrate, creating fine irregularities, forming a fine pattern.

Here, the roughness of the fine pattern may be formed in units of tens of nanometers to hundreds of nanometers, but it is preferable to form it in units of hundreds of nanometers.

As described above, the fine pattern may be formed differently depending on the speed and intensity of the corona discharge treatment. For example, the fine pattern may have uniform and low roughness, various roughnesses may be mixed, or the roughness density may be low. It can be.

And, a plurality of inorganic insulating layers are disposed on the plurality of upper plate patterns 121b. For example, the plurality of inorganic insulating layers may include a buffer layer 141, a gate insulating layer 142, a first interlayer insulating layer 143, a second interlayer insulating layer 144, and a passivation layer 145. , but is not limited thereto, and various inorganic insulating layers are additionally disposed on the plurality of upper plate patterns 121b, or are inorganic insulating layers such as a buffer layer 141, a gate insulating layer 142, a first interlayer insulating layer 143, and a second interlayer insulating layer. One or more of the interlayer insulating layer 144 and the passivation layer 145 may be omitted.

Specifically, the buffer layer 141 is disposed on the plurality of upper plate patterns 121b. The buffer layer 141 protects various components of the display device 100 from penetration of moisture (H ₂ O) and oxygen (O ₂ ) from the outside of the lower substrate 111 and the plurality of upper plate patterns 121b. It is formed on a plurality of upper plate patterns 121b. The buffer layer 141 may be made of an insulating material. For example, the buffer layer 141 may be composed of a single layer or a double layer made of at least one of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON). However, the buffer layer 141 may be omitted depending on the structure or characteristics of the display device 100.

At this time, the buffer layer 141 may be formed only in the area where the lower substrate 111 overlaps the plurality of plate patterns 121 and the plurality of external plate patterns 123. As described above, since the buffer layer 141 may be made of an inorganic material, it may easily be damaged, such as by generating cracks, during the process of stretching the display device 100. Accordingly, the buffer layer 141 is not formed in the area between the plurality of plate patterns 121 and the plurality of external plate patterns 123, but is formed in the shape of the plurality of plate patterns 121 and the plurality of external plate patterns 123. It may be patterned and formed only on top of the plurality of plate patterns 121 and the plurality of external plate patterns 123. Accordingly, the display device 100 according to an embodiment of the present invention forms the buffer layer 141 only in the area overlapping with the plurality of plate patterns 121 and the plurality of external plate patterns 123, which are rigid patterns, to form a display device ( Even when the 100 is deformed, such as being bent or stretched, damage to various components of the display device 100 can be prevented.

Referring to FIG. 4, on the buffer layer 141 is a switching transistor 150 including a gate electrode 151, an active layer 152, a source electrode 153, and a drain electrode 154, and a gate electrode 161, an active transistor A driving transistor 160 including a layer 162, a source electrode, and a drain electrode 164 is formed.

First, the active layer 152 of the switching transistor 150 and the active layer 162 of the driving transistor 160 are disposed on the buffer layer 141. For example, each of the active layer 152 of the switching transistor 150 and the active layer 162 of the driving transistor 160 may be formed of an oxide semiconductor, or the active layer 152 of the switching transistor 150 and The active layer 162 of the driving transistor 160 may be formed of amorphous silicon (a-Si), polycrystalline silicon (poly-Si), or an organic semiconductor.

A gate insulating layer 142 is disposed on the active layer 152 of the switching transistor 150 and the active layer 162 of the driving transistor 160. The gate insulating layer 142 electrically insulates the gate electrode 151 of the switching transistor 150 and the active layer 152 of the switching transistor 150, and electrically insulates the gate electrode 161 of the driving transistor 160 and the driving transistor. It is a layer for electrically insulating the active layer 162 of (160). And, the gate insulating layer 142 may be made of an insulating material. For example, the gate insulating layer 142 may be composed of a single layer of inorganic silicon nitride (SiNx) or silicon oxide (SiOx) or a multiple layer of silicon nitride (SiNx) or silicon oxide (SiOx), but is limited thereto. It doesn't work.

The gate electrode 151 of the switching transistor 150 and the gate electrode 161 of the driving transistor 160 are disposed on the gate insulating layer 142. The gate electrode 151 of the switching transistor 150 and the gate electrode 161 of the driving transistor 160 are arranged to be spaced apart from each other on the gate insulating layer 142. In addition, the gate electrode 151 of the switching transistor 150 overlaps the active layer 152 of the switching transistor 150, and the gate electrode 161 of the driving transistor 160 overlaps the active layer ( 162).

Each of the gate electrode 151 of the switching transistor 150 and the gate electrode 161 of the driving transistor 160 is made of various metal materials, such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold ( It may be one or an alloy of two or more of Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or a multilayer thereof, but is not limited thereto.

A first interlayer insulating layer 143 is disposed on the gate electrode 151 of the switching transistor 150 and the gate electrode 161 of the driving transistor 160. The first interlayer insulating layer 143 insulates the gate electrode 161 of the driving transistor 160 and the intermediate metal layer IM. The first interlayer insulating layer 143 may be made of the same inorganic material as the buffer layer 141. For example, the first interlayer insulating layer 143 may be composed of a single layer of inorganic silicon nitride (SiNx) or silicon oxide (SiOx) or a multiple layer of silicon nitride (SiNx) or silicon oxide (SiOx). It is not limited to this.

An intermediate metal layer (IM) is disposed on the first interlayer insulating layer 143. Additionally, the intermediate metal layer IM overlaps the gate electrode 161 of the driving transistor 160. Accordingly, a storage capacitor is formed in the overlapping area between the intermediate metal layer IM and the gate electrode 161 of the driving transistor 160. Specifically, the gate electrode 161 of the driving transistor 160, the first interlayer insulating layer 143, and the intermediate metal layer IM form a storage capacitor. However, the arrangement area of the intermediate metal layer (IM) is not limited to this, and the intermediate metal layer (IM) may overlap with other electrodes to form various storage capacitors.

The intermediate metal layer (IM) is made of various metal materials, such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and It may be any one of copper (Cu), an alloy of two or more, or a multilayer thereof, but is not limited thereto.

A second interlayer insulating layer 144 is disposed on the intermediate metal layer IM. The second interlayer insulating layer 144 insulates the gate electrode 151 of the switching transistor 150 and the source electrode 153 and drain electrode 154 of the switching transistor 150. Additionally, the second interlayer insulating layer 144 insulates the intermediate metal layer IM from the source and drain electrodes 164 of the driving transistor 160. The second interlayer insulating layer 144 may be made of the same inorganic material as the buffer layer 141. For example, the first interlayer insulating layer 143 may be composed of a single layer of inorganic silicon nitride (SiNx) or silicon oxide (SiOx) or a multiple layer of silicon nitride (SiNx) or silicon oxide (SiOx). It is not limited to this.

The source electrode 153 and the drain electrode 154 of the switching transistor 150 are disposed on the second interlayer insulating layer 144. And, the source electrode and drain electrode 164 of the driving transistor 160 are disposed on the second interlayer insulating layer 144. The source electrode 153 and drain electrode 154 of the switching transistor 150 are arranged to be spaced apart from each other on the same layer. Although the source electrode of the driving transistor 160 is omitted in FIG. 1, the source electrode of the driving transistor 160 is also disposed on the same layer and spaced apart from the drain electrode 164. In the switching transistor 150, the source electrode 153 and the drain electrode 154 may be electrically connected to the active layer 152 by contacting the active layer 152. Additionally, in the driving transistor 160, the source electrode and drain electrode 164 may be electrically connected to the active layer 162 in a manner that contacts the active layer 162. In addition, the drain electrode 154 of the switching transistor 150 may be electrically connected to the gate electrode 161 of the driving transistor 160 by contacting the gate electrode 161 of the driving transistor 160 through a contact hole. .

The source electrode 153 and the drain electrodes 154 and 164 are made of various metal materials, such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), and nickel (Ni). ), neodymium (Nd), and copper (Cu), an alloy of two or more, or a multilayer thereof, but is not limited thereto.

Additionally, in this specification, the driving transistor 160 is described as having a coplanar structure, but various transistors such as a staggered structure may also be used. And, in this specification, the transistor may be formed not only with a top gate structure but also with a bottom gate structure.

A gate pad (GP) and a data pad (DP) may be disposed on the second interlayer insulating layer 144.

Specifically, referring to FIG. 4 , the gate pad GP is a pad for transferring the gate voltage to the plurality of sub-pixels SPX. The gate pad GP is connected to the first upper stretched wiring 181b through a contact hole. Additionally, the gate voltage supplied from the first upper stretched wiring 181b may be transmitted from the gate pad GP to the gate electrode 151 of the switching transistor 150 through the wiring formed on the upper plate pattern 121b. .

Additionally, the data pad DP is a pad for transferring data voltage to the plurality of sub-pixels SPX. The data pad DP is connected to the second upper stretched wire 182b through a contact hole. In addition, the data voltage supplied from the second upper stretched wiring 182b is transmitted from the data pad DP to the source electrode 153 of the switching transistor 150 through the non-stretched wiring formed on the upper plate pattern 121b. You can.

Although not shown in FIG. 4, the display device according to an embodiment of the present invention may further include a voltage pad connected to the lower stretched wires 181a and 182a through a contact hole. The voltage pad described above is a pad for transmitting a low-potential voltage or a high-potential voltage to a plurality of sub-pixels (SPX). Additionally, the low-potential voltage supplied from the voltage pad may be transmitted to the n-electrode 174 of the LED 170 through the second contact pad CNT2. Also, the high potential voltage supplied from the voltage pad may be transmitted to the source electrode 163 of the driving transistor 160.

The voltage pad, gate pad (GP), and data pad (DP) may be made of the same material as the source electrode 153 and the drain electrodes 154 and 164, but are not limited thereto.

Referring to FIG. 4, a passivation layer 145 is formed on the switching transistor 150 and the driving transistor 160. That is, the passivation layer 145 covers the switching transistor 150 and the driving transistor 160 to protect the switching transistor 150 and the driving transistor 160 from penetration of moisture and oxygen. The passivation layer 145 may be made of an inorganic material and may be made of a single layer or a double layer, but is not limited thereto.

In addition, the gate insulating layer 142, the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145 are patterned and formed only in the area overlapping with the plurality of upper plate patterns 121b. You can. Since the gate insulating layer 142, the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145 may be made of the same inorganic material as the buffer layer 141, the display device 100 During the stretching process, it can easily be damaged, such as cracks. Accordingly, the gate insulating layer 142, the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145 are not formed in the area between the plurality of upper plate patterns 121b, and are not formed in the area between the plurality of upper plate patterns 121b. It may be patterned in the shape of the upper plate pattern 121b and formed only on the top of the plurality of upper plate patterns 121b.

A planarization layer 146 is formed on the passivation layer 145. The planarization layer 146 planarizes the upper part of the switching transistor 150 and the driving transistor 160. The planarization layer 146 may be composed of a single layer or multiple layers, and may be made of an organic material. Accordingly, the planarization layer 146 may also be referred to as an organic insulating layer. For example, the planarization layer 146 may be made of an acryl-based organic material, but is not limited thereto.

Referring to FIG. 4, the planarization layer 146 includes a buffer layer 141, a gate insulating layer 142, a first interlayer insulating layer 143, and a second interlayer insulating layer 144 on the plurality of upper plate patterns 121b. and may be arranged to cover the top and side surfaces of the passivation layer 145. In addition, the planarization layer 146 includes a plurality of upper plate patterns 121b, a buffer layer 141, a gate insulating layer 142, a first interlayer insulating layer 143, a second interlayer insulating layer 144, and a passivation layer. Surrounds (145). Specifically, the planarization layer 146 includes the top and side surfaces of the passivation layer 145, the side surface of the first interlayer insulating layer 143, the side surface of the second interlayer insulating layer 144, the side surface of the gate insulating layer 142, It may be arranged to cover a portion of the side surface of the buffer layer 141 and the top surface of the plurality of upper plate patterns 121b. Accordingly, the planarization layer 146 compensates for the steps on the sides of the buffer layer 141, the gate insulating layer 142, the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145. It is possible to increase the adhesive strength of the planarization layer 146 and the upper stretched wires 181b and 182b disposed on the side of the planarization layer 146.

Referring to FIG. 4, the inclination angle of the side of the planarization layer 146 is that of the buffer layer 141, the gate insulating layer 142, the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145. ) may be smaller than the inclination angle formed by the sides. For example, the side of the planarization layer 146 is the side of the passivation layer 145, the side of the first interlayer insulating layer 143, the side of the second interlayer insulating layer 144, and the side of the gate insulating layer 142. It may have a gentler slope than the slope formed by the side surface and the side surface of the buffer layer 141, respectively. Accordingly, the upper stretched wires 181b and 182b disposed in contact with the side surface of the planarization layer 146 are disposed with a gentle slope, so that when the display device 100 is stretched, the upper stretched wires 181b and 182b are generated. Stress can be reduced. In addition, since the side surface of the planarization layer 146 has a relatively gentle slope, it is possible to prevent the upper stretched wires 181b and 182b from cracking or peeling off the side surface of the planarization layer 146.

Referring to Figures 2 and 4, the stretched wires 181 and 182 refer to wires that electrically connect a plurality of pixels on the plurality of upper plate patterns 121b.

More specifically, the first lower stretched wiring 181a and the second lower stretched wiring 182a are disposed on the lower wiring pattern 122a, and the first upper stretched wiring 181b and the second upper stretched wiring 182b may be disposed on the upper wiring pattern 122b.

In addition, the stretched wires 181 and 182 may extend on the plurality of upper plate patterns 121b in order to be electrically connected to the gate pads GP and data pads DP on the plurality of upper plate patterns 121b. there is. Also, the wiring pattern 122 is not disposed in an area between the plurality of upper plate patterns 121b where the stretched wirings 181 and 182 are not disposed.

The stretched wirings 181 and 182 include a first stretched wiring 181 and a second stretched wiring 182 . The first stretched wiring 181 and the second stretched wiring 182 are disposed between the plurality of upper plate patterns 121b. Specifically, the first stretched wire 181 refers to a wire extending in the first direction (X) between the plurality of plate patterns 121 among the stretched wires 181 and 182, and the second stretched wire 182 is Among the stretched wires 181 and 182, it refers to a wire extending in the second direction (Y) between the plurality of plate patterns 121.

More specifically, as shown in FIG. 4, the first stretched wiring 181 is a first lower stretched wiring 181a disposed on the lower wiring pattern 122a and a first stretched wiring 181a disposed on the upper wiring pattern 122b. 1 May include an upper elongated wiring 181b. And, as shown in FIG. 4, the second stretched wiring 182 is a second lower stretched wiring 182a disposed on the lower wiring pattern 122a and a second upper stretched wiring disposed on the upper wiring pattern 122b. It may include a wiring 182b.

The stretched wires 181 and 182 are made of metal such as copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo), or copper/molybdenum-titanium (Cu/Moti) or titanium/aluminum/titanium (Ti). /Al/Ti) may be made of a laminated structure of metal materials such as, but is not limited to this.

In the case of a display panel of a typical display device, various wires, such as a plurality of gate wires and a plurality of data wires, are arranged to extend in a straight line between a plurality of sub-pixels, and a plurality of sub-pixels are connected to one signal wire. Accordingly, in the case of a display panel of a general display device, various wirings such as gate wiring, data wiring, high-potential voltage wiring, and reference wiring extend seamlessly on the substrate from one side of the display panel of the organic light emitting display device to the other side.

In contrast, in the case of the display device 100 according to an embodiment of the present invention, a gate wire, a data wire, a high-potential voltage wire, which are straight non-stretched wires that can be seen as used in the display panel of a general display device, Various wiring such as reference wiring, initialization voltage wiring, etc. are disposed only on the plurality of plate patterns 121 and the plurality of external plate patterns 123. That is, in the display device 100 according to an embodiment of the present invention, straight non-stretched wires are disposed only on the plurality of plate patterns 121 and the plurality of external plate patterns 123.

In the display device 100 according to an embodiment of the present invention, pads on two adjacent upper plate patterns 121b may be connected by stretched wires 181 and 182. Accordingly, the stretched wires 181 and 182 electrically connect various pads, such as the gate pad (GP) or data pad (DP), on the two adjacent plate patterns 121. Therefore, the display device 100 according to an embodiment of the present invention has a plurality of non-stretched wires such as gate wires, data wires, high-potential voltage wires, reference wires, etc. electrically connected between the plurality of plate patterns 121. It may include stretched wirings 181 and 182. For example, a non-stretched gate wire may be disposed on the plurality of plate patterns 121 arranged adjacent to each other in the first direction (X), and gate pads GP may be disposed at both ends of the gate wire. there is. At this time, each of the plurality of gate pads GP on the plurality of plate patterns 121 arranged adjacent to each other in the first direction (X) may be connected to each other by the first stretched wiring 181 functioning as a gate wiring. Accordingly, the gate wiring disposed on the plurality of plate patterns 121 and the first stretched wiring 181 disposed on the internal wiring pattern 122 may function as one gate wiring. The gate wiring described above may be referred to as a scan signal wiring. In addition, among all the various wires that may be included in the display device 100, wires extending in the first direction ( They may be electrically connected by the stretched wiring 181.

Referring to FIGS. 2 and 4 , the first stretched wiring 181 is formed by two plate patterns arranged side by side among the gate pads GP on the plurality of plate patterns 121 arranged adjacent to each other in the first direction (X). 121), the gate pads (GPs) or non-stretched wires can be connected to each other. Alternatively, the first stretched wire 181 may function as a gate wire, a light emitting signal wire, a high potential voltage wire, or a low potential voltage wire, but is not limited thereto. The gate pads GP on the plurality of plate patterns 121 arranged in the first direction (X) may be connected by the first stretched wire 181 functioning as a gate wire, and one gate voltage may be transmitted. .

And, referring to Figures 2 and 4, the second stretched wiring 182 is two plates arranged side by side among the data pads DP on the plurality of plate patterns 121 arranged adjacent to each other in the second direction (Y). Data pads (DP) or non-stretched wires on the pattern 121 may be connected to each other. The second stretched wire 182 may function as a data wire, a high-potential voltage wire, a low-potential voltage wire, or a reference wire, but is not limited thereto. Wires on the plurality of plate patterns 121 arranged in the second direction (Y) may be connected by a plurality of second stretched wires 182 that function as data wires, and one data voltage may be transmitted.

Meanwhile, referring to FIG. 3, upper pattern layers 121b and 122b are formed on the lower stretched wires 181a and 182a and the planarization layer 146. The upper pattern layers 121b and 122b may be disposed on the lower pattern layers 121a and 122a. Additionally, the upper pattern layers 121b and 122b may be composed of a plurality of upper plate patterns 121b and a plurality of upper wiring patterns 122b.

Additionally, the upper stretched wires 181b and 182b, the bank 147, and the light emitting device 170 may be disposed on the planarization layer 146.

Specifically, referring to FIG. 4 , a bank 147 is formed on the first connection pad CNT1, the upper stretched wires 181b and 182b, and the planarization layer 146. The bank 147 is a component that distinguishes adjacent sub-pixels (SPX). The bank 147 is arranged to cover at least a portion of the upper stretched wires 181b and 182b and the planarization layer 146. The bank 147 may be made of an insulating material. Additionally, the bank 147 may be made of black material. The bank 147 includes a black material and thus serves to hide wires that can be viewed through the display area AA. For example, the bank 147 may be made of a transparent carbon-based mixture, and may specifically include carbon black. However, the present invention is not limited thereto, and the bank 147 may be made of a transparent insulating material. Also, in FIG. 4 , the height of the bank 147 is shown to be lower than the height of the light emitting device 170, but the present invention is not limited to this and the height of the bank 147 may be the same as the height of the light emitting device 170.

Referring to FIG. 4, the light emitting device 170 is disposed on the first connection pad (CNT1) and the second connection pad (CNT2). The light emitting device 170 includes an n-type layer 171, an active layer 172, a p-type layer 173, an n-electrode 174, and a p-electrode 175. The light emitting element 170 of the display device 100 according to an embodiment of the present invention has a flip chip (filp-chip) structure in which an n electrode 174 and a p electrode 175 are formed on one side.

However, the structure of the light emitting device 170 may be divided into a lateral-chip and vertical-chip structure as well as a flip-chip structure.

The n-type layer 171 can be formed by implanting n-type impurities into gallium nitride (GaN), which has excellent crystallinity. The n-type layer 171 may be disposed on a separate base substrate made of a material that can emit light.

The active layer 172 is disposed on the n-type layer 171. The active layer 172 is a light-emitting layer that emits light from the light-emitting device 170, and may be made of a nitride semiconductor, for example, indium gallium nitride (InGaN). A p-type layer 173 is disposed on the active layer 172. The p-type layer 173 may be formed by implanting p-type impurities into gallium nitride (GaN).

As described above, the light emitting device 170 according to an embodiment of the present invention is made by sequentially stacking the n-type layer 171, the active layer 172, and the p-type layer 173, and then etching a predetermined portion. , is manufactured by forming the n electrode 174 and the p electrode 175. At this time, the predetermined portion is a space for separating the n-electrode 174 and the p-electrode 175, and the predetermined portion is etched to expose a portion of the n-type layer 171. In other words, the surface of the light emitting device 170 on which the n-electrode 174 and the p-electrode 175 are disposed may have different height levels rather than a flat surface.

In this way, the n-electrode 174 is disposed in the etched area, and the n-electrode 174 may be made of a conductive material. Additionally, the p-electrode 175 is disposed in the unetched area, and the p-electrode 175 may also be made of a conductive material. For example, the n electrode 174 is disposed on the n-type layer 171 exposed through the etching process, and the p electrode 175 is disposed on the p-type layer 173. The p-electrode 175 may be made of the same material as the n-electrode 174.

The adhesive layer (AD) is disposed between the upper surface of the first connection pad (CNT1) and the second connection pad (CNT2) and the first connection pad (CNT1) and the second connection pad (CNT2), so that the light emitting device 170 is It may be adhered to the first connection pad (CNT1) and the second connection pad (CNT2). At this time, the n electrode 174 may be placed on the second connection pad CNT2, and the p electrode 175 may be placed on the first connection pad CNT1.

The adhesive layer AD may be a conductive adhesive layer in which conductive balls are dispersed in an insulating base member. Accordingly, when heat or pressure is applied to the adhesive layer AD, the conductive balls are electrically connected to the area where heat or pressure is applied and have conductive properties, and the non-pressurized area may have insulating properties. For example, the n electrode 174 is electrically connected to the second connection pad (CNT2) through the adhesive layer (AD), and the p electrode 175 is electrically connected to the first connection pad (CNT1) through the adhesive layer (AD). It is connected to After applying the adhesive layer (AD) on the upper surface of the second connection pad (CNT2) and the first connection pad (CNT1) using an inkjet method or the like, the light emitting device 170 is transferred onto the adhesive layer (AD), and the light emitting device is The first connection pad (CNT1) and the p-electrode 175 and the second connection pad (CNT2) and the n-electrode 174 can be electrically connected by pressing and applying heat to 170. However, the portion of the adhesive layer (AD) disposed between the n electrode 174 and the second connection pad (CNT2) and the portion of the adhesive layer (AD) disposed between the p electrode 175 and the first connection pad (CNT1) Except for the other parts of the adhesive layer (AD), it has insulating properties. Meanwhile, the adhesive layer AD may be separated and disposed on each of the first connection pad CNT1 and the second connection pad CNT2.

In addition, the first connection pad CNT1 is electrically connected to the drain electrode 164 of the driving transistor 160 and receives a driving voltage for driving the light emitting device 170 from the driving transistor 160. In Figure 3, the first connection pad (CNT1) and the drain electrode 164 of the driving transistor 160 are shown to be indirectly connected without direct contact. However, this is not limited to this, and the first connection pad (CNT1) and the driving transistor 160 are connected indirectly. The drain electrode 164 of 160 may be contacted directly. Additionally, a low-potential driving voltage for driving the light-emitting device 170 is applied to the second connection pad CNT2. Accordingly, when the display device 100 is turned on, different voltage levels applied to each of the first connection pad (CNT1) and the second connection pad (CNT2) are applied to the n electrode 174 and the p electrode 175, respectively. It is transmitted and the light emitting element 170 emits light.

The upper substrate 112 is a substrate that supports various components disposed below the upper substrate 112.

The upper substrate 112 may be made of the same material as the lower substrate 111. For example, the upper substrate 112 may be made of silicone rubber such as polydimethylsiloxane (PDMS), or an elastomer such as polyurethane (PU) and polytetrafluoroethylene (PTFE). It can have flexible properties. However, the material of the upper substrate 112 is not limited thereto.

Meanwhile, although not shown in FIG. 4, a polarizing layer may be disposed on the upper substrate 112. The polarization layer may function to reduce external light reflection by polarizing light incident from the outside of the display device 100. Additionally, an optical film other than a polarizing layer may be disposed on the upper substrate 112.

Additionally, a filling layer 190 may be disposed on the entire surface of the lower substrate 111 to fill the space between the upper substrate 112 and the components disposed on the lower substrate 111. The filling layer 190 may be composed of a curable adhesive. Specifically, the material constituting the filling layer 190 is formed by coating the entire surface of the lower substrate 111 and then curing it to fill the space between the components placed on the upper substrate 112 and the lower substrate 111. Layer 190 may be placed. For example, the filling layer 190 may be an optically clear adhesive (OCA) and may be made of an acrylic adhesive, a silicone adhesive, or a urethane adhesive.

<Arrangement relationship of light blocking members>

Figure 5 is a cross-sectional view taken along the cutting line V-V' shown in Figure 3.

Figure 6 is a cross-sectional view taken along the cutting line VI-VI' shown in Figure 3.

For convenience of explanation, the description will be made with reference to FIGS. 1 to 4.

As shown in FIG. 2, a light blocking member BM may be disposed on the plurality of stretched wires 181 and 182.

And, as shown in FIG. 4, the light blocking member BM is not only disposed on the plurality of stretched wirings 181 and 182, but also in the plurality of upper regions of each of the plurality of plate patterns 121a and 121b. Each light emitting device 170 may be disposed in an area other than the area where each light emitting element 170 is disposed.

That is, the light blocking member BM may be formed not only on the top and side surfaces of the plurality of stretched wires 181 and 182 but also on the top and side surfaces of the bank 147 .

Meanwhile, the light blocking member BM may include a lower light blocking member BMa covering the plurality of lower extending wirings 181a and 182a and an upper light blocking member BMb covering the plurality of upper extending wirings 181b and 182b. .

Specifically, as shown in FIGS. 4 and 5, a first lower stretched wiring may be disposed on the lower wiring pattern, and a lower light blocking member BMa may be disposed on the first lower stretched wiring. Additionally, an upper wiring pattern may be formed on the lower light blocking member BMa, a first upper stretched wiring may be disposed on the upper wiring pattern, and an upper light blocking member BMb may be disposed on the first upper stretched wiring. It can be.

And, as shown in FIG. 4, the first lower stretched wiring 181a may be disposed on the lower wiring pattern 122a, and the lower light blocking member BMa may be disposed on the first lower stretched wiring 181a. It can be. In addition, an upper wiring pattern 122b may be formed on the lower light blocking member BMa, a first upper stretched wiring 181b may be disposed on the upper wiring pattern 122b, and a first upper stretched wiring ( An upper light blocking member (BMb) may be disposed on 181b).

Meanwhile, as shown in FIG. 6, a fine pattern may be formed on a surface where the lower wiring pattern 122a and the upper wiring pattern 122b contact each other. The above-described fine pattern can anchor the lower wiring pattern 122a and the upper wiring pattern 122b. Accordingly, when the display device 100 is stretched, the fine pattern can more effectively combine the lower wiring pattern 122a and the upper wiring pattern 122b, thereby preventing separation.

As described above, in order to form a fine pattern, corona discharge treatment may be performed on the upper surface of the lower wiring pattern 122a on which the lower light blocking member BMa and the lower stretched wiring 181a and 182a are formed. . Here, since the lower light blocking member BMa is formed to cover the lower stretched wires 181a and 182a, the lower stretched wires 181a and 182a may not be subjected to corona discharge treatment. Accordingly, despite corona discharge treatment, damage to the lower stretched wirings 181a and 182a can be prevented.

FIG. 7 is a diagram illustrating a case in which one transparent area is stretched in a display device according to an embodiment of the present invention.

As shown in FIG. 7, one transmission area (TA) before stretching may have a polygonal shape of 4 or more, such as an octagon. Also, when the display device according to an embodiment of the present invention is stretched, the width of the light blocking area BA becomes narrow, so that the hypotenuse portion of the octagon in the transparent area TA after stretching may be bent outward.

That is, the hypotenuse of the transparent area TA after stretching may be transformed into a shape with a radius of curvature. Accordingly, the light transmitted from the hypotenuse of the transmission area (TA) is concentrated at the center of the transmission area (TA), and the difference in light intensity becomes weaker as it goes outside the center, resulting in weak diffraction.

On the other hand, if the hypotenuse of the transmission area after stretching is in the form of a straight line, the light transmitted from the hypotenuse of the transmission area cannot be concentrated at the center of the transmission area, and the difference in light intensity outside the center increases, resulting in severe diffraction.

Accordingly, in the display device according to an embodiment of the present invention, diffraction of light passing through the transmission area can be minimized, which has the effect of allowing external light to be transmitted more clearly.

Additionally, since the area of the transmission area (TA) of the display device according to an embodiment of the present invention increases after stretching, there is an advantage that the transmittance of the display device is also improved.

<Other embodiments of the present invention>

Below, a display device according to another embodiment of the present invention will be described.

Since the display device according to another embodiment of the present invention and the display device according to one embodiment of the present invention differ only in the shape of the light blocking member, the description will focus on this.

Identical components of the display device according to another embodiment of the present invention and the display device according to one embodiment of the present invention use the same reference numerals.

Figure 8 is a cross-sectional view of an extended wiring of a display device according to another embodiment of the present invention cut along the extension direction.

Figure 9 is a cross-sectional view of the stretched wiring of a display device according to another embodiment of the present invention cut along the vertical direction of the extension direction.

FIG. 8 is a cross-sectional view corresponding to a cross-sectional view taken along line VV' shown in FIG. 3, which is a diagram of a display device according to an embodiment of the present invention, and FIG. 9 is a cross-sectional view of a display device according to an embodiment of the present invention. This is a cross-sectional view corresponding to the cross-sectional view cut along the cutting line VIVI' shown in FIG. 3, which is a drawing related to.

In a display device according to another embodiment of the present invention, the thickness of the light blocking members BMa' and BMb' may increase as the distance from each of the plurality of plate patterns increases.

That is, referring to FIGS. 8 and 2 , which are cross-sectional views of the stretched wiring of a display device according to another embodiment of the present invention cut along the extending direction, the upper light blocking member BMb' closest to the plurality of plate patterns 121 The thickness T1 of the first part A1, which is the outer part, is thinner than the thickness T2 of the second part A2, the inner part.

In addition, the thickness T3 of the third part A3, which is the inner part of the upper light blocking member BMb' furthest from the plurality of plate patterns 121, is equal to the thickness T2 of the second part A2, which is the outer part thereof. thicker than

That is, the thickness of the light blocking members BMa' and BMB' may become thicker toward the center area.

When the display device is stretched, the elongation rate of the central portion of the stretched wiring may be the largest. Accordingly, the present invention sets the thickness of the light blocking members (BMa', BMb') disposed on the central portion of the stretched wire with the largest elongation rate to the thickest, so that the light blocking effect is maintained even if the light blocking members (BMa', BMb') are stretched. It can effectively block external light without being deteriorated.

Additionally, in the display device according to another embodiment of the present invention, the light blocking members BMa' and BMb' may be inserted into anchor holes formed on the upper surfaces of each of the plurality of wiring patterns 122a and 122b.

Specifically, as shown in FIG. 9, at least one anchor hole may be formed in the upper part of the upper wiring pattern 122b. Additionally, the upper light blocking member BMb' may be inserted into the at least one anchor hole.

Although not shown, at least one anchor hole may be formed in the upper part of the lower wiring pattern 122a. Additionally, the lower light blocking member BMa' may be inserted into the at least one anchor hole.

Accordingly, in the display device according to another embodiment of the present invention, the light blocking members BMa' and BMb' may be fixed to the upper surface of each of the plurality of wiring patterns 122a and 122b, so that even if the display device is stretched, the light blocking members BMa ', BMB') may not be peeled off.

Below, a display device according to another embodiment of the present invention will be described.

<Another embodiment (third embodiment) of the present invention>

Since there is a difference between the display device according to another embodiment (third embodiment) of the present invention and the display device according to one embodiment of the present invention only in terms of wire anchors, the description will focus on this.

Identical components of the display device according to another embodiment (third embodiment) of the present invention and the display device according to one embodiment of the present invention use the same reference numerals.

Figure 10 is an enlarged plan view of a straight area of a display device according to another embodiment (third embodiment) of the present invention.

FIG. 11 is a cross-sectional view taken along the cutting line XI-XI' shown in FIG. 10.

FIG. 12 is a cross-sectional view taken along the cutting line XII-XII' shown in FIG. 10.

The stretched wiring of the display device according to another embodiment (third embodiment) of the present invention may be divided into a curved portion that extends in a curved manner and a straight portion that extends in a straight line.

FIG. 10 shows the second stretched wire 382 extending in the second direction (Y), and the straight portion of the second stretched wire 382 may extend in the first direction (X).

Although not shown, the straight portion of the first stretched wiring extending in the first direction (X) may extend in the second direction (Y).

Additionally, wire anchors LAa and LAb may be disposed below each straight portion of the stretched wire 382. With respect to the planar shape of each wire anchor (LAa, LAb), the width of the wire anchor (LAa, LAb) in the extension direction of the straight portion may be wider than the width in the vertical direction of the extension direction of the straight portion. .

That is, the widths of the wire anchors LAa and LAb in the first direction It may be wider than the width of the wire anchors LAa and LAb in the second direction (Y) perpendicular to the extension direction of the straight portion of the second stretched wire 382.

Meanwhile, the wire anchors LAa and LAb include an upper wire anchor LAb and a lower wire anchor LAa, and the upper wire anchor LAb is disposed below each straight portion of the plurality of upper stretched wires 382b. The lower wire anchor LAa may be disposed below the straight portion of each of the plurality of lower elongated wires 382a.

Specifically, as shown in FIGS. 11 and 12, the upper wire anchor LAb may be disposed below the straight portion of each of the plurality of second upper stretched wires 382b, and the plurality of second lower stretched wires (382b) 382a) Can be placed at the bottom of each straight portion.

Accordingly, in the display device according to another embodiment (third embodiment) of the present invention, the stretched wiring can be fixed to the upper surface of each of the plurality of wiring patterns 122a and 122b through the wiring anchors LAa and LAb. , even if the display device is stretched, the stretched wiring may not be separated.

More specifically, since the width of the wire anchors LAa and LAb in the direction in which the straight portion extends is relatively wide, stretching stress can be minimized when the display device is stretched. Accordingly, the elongation rate of the display device can be maximized.

And, as shown in FIGS. 11 and 12 , the upper wire anchor LAb and the lower wire anchor LAa may not overlap in the vertical direction.

Accordingly, the distance between the upper wiring anchor (LAb) and the lower wiring anchor (LAa) can be maximized. Accordingly, unnecessary parasitic capacitance occurring between the upper wire anchor (LAb) and the lower wire anchor (LAa) can be minimized. Accordingly, the delay of the driving signal of the display device can be minimized.

Additionally, by maximizing the distance between the upper wiring anchor (LAb) and the lower wiring anchor (LAa), short circuit issues that occur during the display device process can also be minimized.

Below, a display device according to another embodiment (fourth embodiment) of the present invention will be described.

<Another embodiment of the present invention (fourth embodiment)>

Since there is a difference between the display device according to another embodiment (fourth embodiment) of the present invention and the display device according to one embodiment of the present invention only in terms of wire anchors, the description will focus on this.

Identical components of the display device according to another embodiment (fourth embodiment) of the present invention and the display device according to one embodiment of the present invention use the same reference numerals.

Figure 13 is an enlarged plan view of a straight area of a display device according to another embodiment (fourth embodiment) of the present invention.

FIG. 14 is a cross-sectional view taken along the cutting line XIV-XIV' shown in FIG. 13.

FIG. 15 is a cross-sectional view taken along the cutting line XV-XV' shown in FIG. 13.

FIG. 16 is a circuit diagram showing a transistor included in a wiring anchor of a display device according to another embodiment (fourth embodiment) of the present invention.

In a display device according to another embodiment of the present invention, wire anchors LAa' and LAb' may be disposed above or below each straight portion of the stretched wire 482. With respect to the planar shape of each wire anchor LAa', LAb', the width of the wire anchors LAa', LAb' with respect to the extension direction of the straight portion is relative to the vertical direction of the extension direction of the straight portion. It can be wider than the width.

That is, the widths of the wire anchors LAa' and LAb' in the first direction It may be wider than the width of the wire anchors LAa' and LAb' in the second direction (Y) perpendicular to the extension direction of the straight portion of the illustrated second stretched wire 482.

Meanwhile, the wire anchors LAa' and LAb' include an upper wire anchor (LAb') and a lower wire anchor (LAa'), and the upper wire anchor (LAb') is one of each of the plurality of upper stretched wires 482a. It is disposed at the lower part of the straight portion, and the lower wire anchor LAa' may be disposed at the upper part of each straight portion of the plurality of lower elongated wirings 482b.

Specifically, as shown in FIGS. 14 and 15, the upper wire anchor LAb' may be disposed below the straight portion of each of the plurality of second upper stretched wires 482b, and the lower wire anchor LAa' may be disposed on the upper portion of each straight portion of the plurality of second lower elongated wires 482a.

Accordingly, in the display device according to another embodiment (fourth embodiment) of the present invention, the stretched wiring can be fixed to the upper and lower surfaces of each of the second wiring patterns through the wiring anchors LAa' and LAb', Even if the display device is stretched, the stretched wiring may not be separated.

More specifically, since the width of the wire anchors LAa' and LAb' in the direction in which the straight portion extends is relatively wide, stretching stress can be minimized when the display device is stretched. Accordingly, the elongation rate of the display device can be maximized.

And, as shown in FIGS. 14 and 15 , the upper wire anchor LAb' and the lower wire anchor LAa' may not overlap in the vertical direction.

Accordingly, the distance between the upper wiring anchor LAb' and the lower wiring anchor LAa' can be maximized. Accordingly, unnecessary parasitic capacitance occurring between the upper wire anchor LAb' and the lower wire anchor LAa' can be minimized. Accordingly, the delay of the driving signal of the display device can be minimized.

In addition, the distance between the upper wiring anchor LAb' and the lower wiring anchor LAa' is maximized, which has the effect of minimizing short-circuit issues that occur during the display device process.

Additionally, a semiconductor layer SC may be disposed between the lower wire anchor LAa' and the upper stretched wire 482b.

Specifically, as shown in FIGS. 14 and 15, the semiconductor layer SC may be in contact with the lower wiring anchor LAa' and the upper stretched wiring 482b, and may be in constant contact with the plurality of upper wiring anchors LAb'. Spacing can be spaced apart.

Accordingly, each of the plurality of upper wire anchors LAb' may correspond to a gate electrode, and a channel may be formed in the semiconductor layer SC according to the voltage of the upper wire anchor LAb'.

That is, one upper wire anchor (LAb') may correspond to one gate electrode, one lower wire anchor (LAa') may correspond to a drain electrode, and the upper stretched wire (482b) may correspond to a source electrode. Accordingly, the upper wire anchor (LAb'), the upper stretched wire, the lower wire anchor (LAa'), and the semiconductor layer (SC) may form one transistor.

Additionally, since the upper stretched wiring 482b and the upper wiring anchor LAb' are electrically connected, a transistor substantially diode connected can be formed.

Specifically, as shown in Figure 16, the layout shown in Figures 14 and 15 can be shown as two diode connection transistors connected in parallel.

Accordingly, when a high voltage is applied to the second upper stretched wiring 482b, the same voltage as that of the second upper stretched wiring 482b may be applied to the second lower stretched wiring 482a due to the diode connection transistor. However, when a low voltage is applied to the second upper stretched wiring 482b, a different voltage from that of the second upper stretched wiring 482b may be applied to the first upper stretched wiring 482a due to the diode connection transistor.

Accordingly, the display device according to another embodiment of the present invention configures a transistor by disposing the semiconductor layer SC, so that various voltages can be applied to the stretched wiring.

<Another embodiment of the present invention (fifth embodiment)>

Since there is a difference between the display device according to another embodiment (the fifth embodiment) of the present invention and the display device according to one embodiment of the present invention only in terms of wire anchors, the description will focus on this.

Identical components of the display device according to another embodiment of the present invention and the display device according to one embodiment of the present invention use the same reference numerals.

Figure 17 is an enlarged plan view of a straight area of a display device according to another embodiment (fifth embodiment) of the present invention.

FIG. 18 is a cross-sectional view taken along line XVIII-XVIII' shown in FIG. 17.

FIG. 19 is a cross-sectional view taken along the cutting line XIX-XIX' shown in FIG. 17.

FIG. 20 is a circuit diagram showing a transistor included in a wiring anchor of a display device according to another embodiment (fifth embodiment) of the present invention.

In another embodiment (fifth embodiment) of the present invention, wire anchors LAa'' and LAb'' may be disposed on or below each straight portion of the stretched wire 582. With respect to the planar shape of each wire anchor (LAa'', LAb''), the width of the wire anchor (LAa'', LAb'') with respect to the direction of extension of the straight part is perpendicular to the direction of extension of the straight part. It may be wider than the width for.

That is, the widths of the wire anchors LAa'' and LAb'' in the first direction (X), which is the extension direction of the straight portion of the second stretched wire 582 shown in FIGS. 17 and 18, are It may be wider than the width of the wire anchors LAa'' and LAb'' in the second direction (Y) perpendicular to the extension direction of the straight portion of the second stretched wire 382 shown in Figure 19.

Meanwhile, the wire anchors LAa'' and LAb'' include an upper wire anchor (LAb'') and a lower wire anchor (LAa''), and the upper wire anchor (LAb'') includes the plurality of upper stretched wires. (582b) is disposed at the bottom of each straight portion, and the lower wire anchor LAa'' may be disposed at the top of each straight portion of the plurality of lower elongated wires 582a.

Specifically, as shown in FIGS. 18 and 19, the upper wire anchor LAb'' may be disposed below the straight portion of each of the plurality of second upper stretched wires 582b, and the lower wire anchor LAa' ') may be disposed on the upper portion of each straight portion of the plurality of second lower elongated wires 582a.

Accordingly, in the display device according to another embodiment (fifth embodiment) of the present invention, the stretched wiring is fixed to the upper and lower surfaces of each of the upper wiring patterns 122a through wiring anchors LAa'' and LAb''. Therefore, even if the display device is stretched, the stretched wiring may not be peeled off.

More specifically, since the width of the wire anchors LAa'' and LAb'' in the direction in which the straight portion extends is relatively wide, stretching stress can be minimized when the display device is stretched. Accordingly, the elongation rate of the display device can be maximized.

And, as shown in FIGS. 18 and 19 , the upper wire anchor LAb'' and the lower wire anchor LAa'' may not overlap in the vertical direction.

Accordingly, the distance between the upper wiring anchor LAb'' and the lower wiring anchor LAa'' can be maximized. Accordingly, unnecessary parasitic capacitance occurring between the upper wire anchor LAb'' and the lower wire anchor LAa'' can be minimized. Accordingly, the delay of the driving signal of the display device can be minimized.

In addition, the distance between the upper wiring anchor LAb'' and the lower wiring anchor LAa'' is maximized, which has the effect of minimizing short circuit issues that occur during the display device process.

In addition, a first semiconductor layer (SC1), a second semiconductor layer (SC2), and a connecting metal layer (CM) may be disposed between each of the plurality of upper stretched wirings 582b and each of the plurality of lower stretched wirings 582a. You can.

Specifically, as shown in FIGS. 18 and 19, the first semiconductor layer SC1 is disposed between each of the plurality of lower stretched wires 582a and the connecting metal layer CM, and the second semiconductor layer SC2 is disposed between each of the plurality of upper stretched wires 582b and the connection metal layer CM.

Accordingly, each of the upper wire anchor (LAb'') and the lower wire anchor (LAa'') may correspond to a gate electrode. Accordingly, a channel may be formed in the first semiconductor layer SC1 according to the voltage of the lower wiring anchor LAa'', and a channel may be formed in the second semiconductor layer SC2 according to the voltage of the upper wiring anchor LAb''. This can be formed.

That is, the lower wiring anchor LAa'' may correspond to the gate electrode, the connecting metal layer CM may correspond to the drain electrode, and the lower stretched wiring 582a may correspond to the source electrode, so that the lower wiring anchor LAa'' may correspond to the gate electrode. The anchor LAa'', the lower stretched wiring 582a, the connection metal layer CM, and the first semiconductor layer SC1 may form one transistor.

Additionally, since the lower stretched wiring 582a and the lower wiring anchor LAa'' are electrically connected, a transistor substantially diode connected can be formed.

Similarly, the upper wire anchor LAb'' may correspond to the gate electrode, the connecting metal layer CM may correspond to the drain electrode, and the upper stretched wire 582b may correspond to the source electrode, The upper wire anchor LAb'', the upper stretched wire 582b, the connection metal layer CM, and the second semiconductor layer SC2 may form one transistor.

Additionally, since the upper stretched wiring 582b and the upper wiring anchor LAb'' are electrically connected, a transistor substantially diode connected can be formed.

Specifically, as shown in Figure 20, the layout shown in Figures 18 and 19 can be shown as two diode connection transistors connected in series.

If a high level voltage, which is the turn-on voltage, is applied to both the lower stretched wiring 582a and the upper stretched wiring 582b, a channel is formed in the first semiconductor layer SC1 and the second semiconductor layer SC2, The lower stretched wiring 582a and the upper stretched wiring 582b can be connected in parallel, thereby reducing resistance.

Additionally, in the case described above, even if one of the lower stretched wires 582a and the upper stretched wires 582b is disconnected, the signal can be transmitted due to the unbroken wire, so signal transmission can be performed stably.

A display device according to various embodiments of the present invention may be described as follows.

In order to solve the above-described problem, a display device according to an embodiment of the present invention is formed of a transparent material, is disposed on a stretchable lower substrate, and consists of a plurality of plate patterns and a plurality of wiring patterns. a pattern layer, a plurality of light-emitting elements disposed on top of each of the plurality of plate patterns, a plurality of stretched wirings disposed on top of each of the plurality of wiring patterns, and a light blocking layer disposed on the plurality of wiring patterns and covering the plurality of stretched wirings. By including the member, a transparent and stretchable display device can be implemented.

According to another feature of the present invention, the light blocking member may be disposed in an upper area of each of the plurality of plate patterns excluding the area where each of the plurality of light emitting devices is disposed.

According to another feature of the present invention, the light blocking member may be inserted into an anchor hole formed on the upper surface of each of the plurality of wiring patterns.

According to another feature of the present invention, the thickness of the light blocking member may become thicker as the distance from each of the plurality of plate patterns increases.

According to another feature of the present invention, the pattern layer includes a lower pattern layer and an upper pattern layer disposed on the lower pattern layer, the lower pattern layer is composed of a plurality of lower plate patterns and a plurality of lower wiring patterns, and the upper pattern layer The pattern layer may be composed of a plurality of upper plate patterns and a plurality of upper wiring patterns.

According to another feature of the present invention, a fine pattern may be formed on a surface where the lower pattern layer and the upper pattern layer are in contact.

According to another feature of the present invention, the plurality of stretched wires may include a plurality of lower stretched wires disposed on the lower wire pattern and a plurality of upper stretched wires disposed on the upper wire pattern.

According to another feature of the present invention, the light blocking member may include a lower light blocking member covering the plurality of lower extending wiring lines and an upper light blocking member covering the plurality of upper extending wiring lines.

According to another feature of the present invention, the plurality of wiring patterns and the plurality of stretched wirings extend in a first direction and a second direction, and one side of the plurality of plate patterns extends in a direction different from the first direction and the second direction. It can be.

According to another feature of the present invention, the plurality of plate patterns may have a diamond shape with respect to the first and second directions.

According to another feature of the present invention, the plurality of lower stretched wirings includes a plurality of first lower stretched wirings extending in a first direction and a plurality of second lower stretched wirings extending in a second direction, and the plurality of upper stretched wirings include It may include a plurality of first upper stretched wires extending in a first direction and a plurality of second upper stretched wires extending in a second direction.

According to another feature of the present invention, each of the plurality of stretched wires is formed in a wavy shape divided into a straight part and a curved part, and a wire anchor is disposed on one side of the straight part of each of the plurality of stretched wires, and the wire anchor is It can be inserted into an anchor hole formed on the other side of the plurality of wiring patterns.

According to another feature of the present invention, for each wire anchor, the width of the wire anchor in the direction in which the straight part extends may be wider than the width of the wire anchor in the vertical direction in the direction in which the straight part extends.

According to another feature of the present invention, the wire anchor includes an upper wire anchor and a lower wire anchor, the upper wire anchor is disposed at the lower part of the straight portion of each of the plurality of upper elongated wires, and the lower wire anchor is the plurality of lower elongated wires. It may be placed at the bottom of each straight portion of the wiring.

According to another feature of the present invention, the upper wire anchor and the lower wire anchor may not overlap in the vertical direction.

According to another feature of the present invention, the wire anchor includes an upper wire anchor and a lower wire anchor, the upper wire anchor is disposed at the lower part of the straight portion of each of the plurality of upper elongated wires, and the lower wire anchor is the plurality of lower elongated wires. It may be placed on top of each straight portion of the wiring.

According to another feature of the present invention, a semiconductor layer is disposed between the lower wire anchor and each of the plurality of upper stretched wires, and a channel may be formed in the semiconductor layer according to the voltage of the upper wire anchor.

According to another feature of the present invention, a first semiconductor layer, a second semiconductor layer, and a connecting metal layer are disposed between each of the plurality of upper stretched wirings and each of the plurality of lower stretched wirings, and the first semiconductor layer is disposed between the plurality of lower stretched wirings. It is disposed between each of the wirings and the connecting metal layer, and the second semiconductor layer is disposed between each of the plurality of upper stretched wirings and the connecting metal layer. A channel is formed in the first semiconductor layer according to the voltage of the upper wiring anchor, and the second semiconductor layer is A channel may be formed depending on the voltage of the lower wiring anchor.

A display device according to another embodiment of the present invention is divided into a light-emitting area through which a light-emitting element emits light, a transmission area through which external light transmits, and a light-shielding area through which external light does not transmit, and a stretched substrate formed of a transparent material and disposed in the light-emitting area. It includes a plurality of pixels emitting light, a plurality of stretched wires disposed in the light blocking area and connecting the plurality of pixels, and a wire anchor on one surface of each of the plurality of stretched wires, to improve stretching reliability. You can.

According to another feature of the present invention, each of the plurality of stretched wires is formed in a wavy shape divided into a straight part and a curved part, and for each wire anchor, the width of the wire anchor with respect to the extension direction of the straight part is the straight part. It may be wider than the width of the wiring anchor in the vertical direction of the extension direction of the portion.

According to another feature of the present invention, the plurality of stretched wirings include a plurality of lower stretched wirings and a plurality of upper stretched wirings, and the wiring anchor is disposed below a straight portion of each of the plurality of upper stretched wirings. It may include an upper wire anchor and a lower wire anchor disposed below the straight portion of each of the plurality of lower elongated wires.

Although embodiments of the present invention have been described in more detail, the present invention is not necessarily limited to these embodiments, and may be implemented in various modifications without departing from the technical spirit of the present invention. Accordingly, the embodiments disclosed in the present invention are not intended to limit the technical idea of the present invention, but are for illustrative purposes, and the scope of the technical idea of the present invention is not limited by these embodiments. Therefore, the embodiments described above should be understood in all respects as illustrative and not restrictive. The scope of protection of the present invention should be interpreted in accordance with the claims below, and all technical ideas within the equivalent scope should be construed as being included in the scope of rights of the present invention.

100: display device
111: lower substrate
112: upper substrate
120: Pattern layer
121a: lower plate pattern
122a: lower wiring pattern
121: Lower plate pattern
122: Lower wiring pattern
123: External plate pattern
124: External wiring pattern
141: buffer layer
142: Gate insulation layer
143: First interlayer insulating layer
144: second interlayer insulating layer
145: Passivation layer
146: Flattening layer
147: bank
150: switching transistor
160: Driving transistor
151, 161: Gate electrode
152, 162: active layer
153, 163: source electrode
154, 164: drain electrode
170: LED
171: n-type layer
172: active layer
173: p-type layer
174: n electrode
175: p electrode
181a first lower elongated wiring
182a, 382a, 482a, 582a: second lower elongated wiring
181b: first upper elongated wiring
182b, 382b, 482b, 582b: second upper elongated wiring
190: Filling layer
PX: pixel
SPX: Sub pixel
BM: light blocking member
BMa, BMa': lower light blocking member
BMB, BMB': upper light blocking member
GD: gate driver
DD: data driver
GP: gate pad
DP: data pad
PCB: printed circuit board
PS: Power supply
AA: display area
NA: Non-display area
BA: shaded area
EA: luminous area
TA: Transmissive area
LAa, LAa', LAa'': Bottom wiring anchors
LAb, LAb', LAb'': Upper wiring anchors
SC: semiconductor layer
SC1: first semiconductor layer
SC2: second semiconductor layer
CM: connecting metal layer

Claims (25)

a stretchable lower substrate formed of a permeable material;
a pattern layer disposed on the lower substrate and composed of a plurality of plate patterns and a plurality of wiring patterns;
a plurality of light emitting elements disposed on top of each of the plurality of plate patterns;
a plurality of stretched wires disposed on top of each of the plurality of wire patterns; and
A display device comprising a light blocking member disposed on the plurality of wiring patterns and covering the plurality of stretched wiring lines. According to claim 1,
The light blocking member is,
A display device disposed in an upper area of each of the plurality of plate patterns excluding an area where each of the plurality of light emitting elements is disposed. According to claim 1,
The light blocking member is,
A display device inserted into anchor holes formed on upper surfaces of each of the plurality of wiring patterns. According to claim 1,
The thickness of the light blocking member is,
A display device that becomes thicker as the distance from each of the plurality of plate patterns increases. According to claim 1,
The pattern layer includes a lower pattern layer and an upper pattern layer disposed on the lower pattern layer,
The lower pattern layer is composed of a plurality of lower plate patterns and a plurality of lower wiring patterns,
The display device wherein the upper pattern layer is composed of a plurality of upper plate patterns and a plurality of upper wiring patterns. According to clause 5,
A display device wherein a fine pattern is formed on a surface where the lower pattern layer and the upper pattern layer are in contact. According to clause 5,
The plurality of stretched wirings are:
a plurality of lower stretched wires disposed on the lower wire pattern, and
A display device comprising a plurality of upper stretched wirings disposed on the upper wiring pattern. According to clause 7,
The light blocking member is,
A lower light blocking member covering the plurality of lower stretched wirings, and
A display device comprising an upper light blocking member covering the plurality of upper stretched wirings. According to claim 1,
The plurality of wiring patterns and the plurality of stretched wirings extend in a first direction and a second direction,
One side of the plurality of plate patterns extends in a direction different from the first direction and the second direction. According to clause 9,
The display device wherein the plurality of plate patterns have a diamond shape with respect to a first direction and a second direction. According to clause 7,
The plurality of lower stretched wirings include a plurality of first lower stretched wirings extending in a first direction and a plurality of second lower stretched wirings extending in a second direction,
The display device, wherein the plurality of upper stretched wirings include a plurality of first upper stretched wirings extending in the first direction and second upper stretched wirings extending in the second direction. According to clause 7,
Each of the plurality of stretched wires,
It is formed in a wavy shape divided into a straight part and a curved part,
A wiring anchor is disposed on one side of a straight portion of each of the plurality of stretched wirings,
The display device wherein the wiring anchor is inserted into an anchor hole formed on the other side of the plurality of wiring patterns. According to claim 12,
For each of the above wiring anchors,
A display device wherein the width of the wire anchor in the direction in which the straight part extends is wider than the width of the wire anchor in a direction perpendicular to the direction in which the straight part extends. According to claim 12,
The wiring anchor includes an upper wiring anchor and a lower wiring anchor,
The upper wire anchor is disposed below a straight portion of each of the plurality of upper stretched wires,
The display device wherein the lower wire anchor is disposed below a straight portion of each of the plurality of lower stretched wires. According to claim 14,
The display device wherein the upper wire anchor and the lower wire anchor do not overlap in the vertical direction. According to claim 12,
The wiring anchor includes an upper wiring anchor and a lower wiring anchor,
The upper wire anchor is disposed below a straight portion of each of the plurality of upper stretched wires,
The display device wherein the lower wire anchor is disposed on an upper portion of a straight portion of each of the plurality of lower stretched wires. According to claim 16,
A semiconductor layer is disposed between the lower wire anchor and each of the plurality of upper stretched wires,
A display device in which a channel is formed in the semiconductor layer according to the voltage of the upper wiring anchor. According to claim 16,
A first semiconductor layer, a second semiconductor layer, and a connecting metal layer are disposed between each of the plurality of upper stretched wirings and each of the plurality of lower stretched wirings,
The first semiconductor layer is disposed between each of the plurality of lower stretched wirings and the connecting metal layer,
The second semiconductor layer is disposed between each of the plurality of upper stretched wirings and the connecting metal layer,
A channel is formed in the first semiconductor layer according to the voltage of the upper wiring anchor,
A display device in which a channel is formed in the second semiconductor layer according to the voltage of the lower wiring anchor. It is divided into a light emitting area where the light emitting device emits light, a transmission area that transmits external light, and a light blocking area that does not transmit external light,
A stretched substrate formed of a transparent material;
a plurality of pixels disposed in the light emitting area and emitting light;
a plurality of stretched wires disposed in the light blocking area and connecting the plurality of pixels;
A display device comprising a wire anchor disposed on one surface of each of the plurality of stretched wires. According to clause 19,
Each of the plurality of stretched wires,
It is formed in a wavy shape divided into a straight part and a curved part,
For each of the above wiring anchors,
A display device wherein the width of the wire anchor in the direction in which the straight part extends is wider than the width of the wire anchor in a direction perpendicular to the direction in which the straight part extends. According to claim 20,
The plurality of stretched wirings include a plurality of lower stretched wirings and a plurality of upper stretched wirings,
The wiring anchor is,
A display device comprising: an upper wiring anchor disposed below a straight portion of each of the plurality of upper stretched wirings; and a lower wiring anchor disposed below a straight portion of each of the plurality of lower stretched wirings. According to claim 21,
The display device wherein the upper wire anchor and the lower wire anchor do not overlap in the vertical direction. According to claim 20,
The plurality of stretched wirings include a plurality of lower stretched wirings and a plurality of upper stretched wirings,
The wiring anchor includes an upper wiring anchor disposed at a lower portion of a straight portion of each of the plurality of upper stretched wirings, and a lower wiring anchor disposed at an upper portion of a straight portion of each of the plurality of lower stretched wirings. According to clause 23,
A semiconductor layer is disposed between the lower wire anchor and each of the plurality of upper stretched wires,
A display device in which a channel is formed in the semiconductor layer according to the voltage of the upper wiring anchor. According to clause 23,
A first semiconductor layer, a second semiconductor layer, and a connecting metal layer are disposed between each of the plurality of upper stretched wirings and each of the plurality of lower stretched wirings,
The first semiconductor layer is disposed between each of the plurality of lower stretched wirings and the connecting metal layer,
The second semiconductor layer is disposed between each of the plurality of upper stretched wirings and the connecting metal layer,
A channel is formed in the first semiconductor layer according to the voltage of the upper wiring anchor,
A display device in which a channel is formed in the second semiconductor layer according to the voltage of the lower wiring anchor.

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