KR20230142376A - Method and apparatus for transmission and reception of synchronization signal havning layered structure in communication system - Google Patents

Abstract

A method of operating a first communication node according to an embodiment of the present disclosure includes identifying one or more synchronization signal components constituting a set of synchronization signal elements, the one or more synchronization signal components, and the one or more synchronization signal components. Generating a plurality of synchronization signal sections based on a plurality of primary coefficients corresponding to signal elements, and based on the combination of the plurality of synchronization signal sections, one or more synchronization signal portions. It may include generating (parts), and generating one or more synchronization signals based on a combination of the one or more synchronization signal parts in the time domain.

Description

Method and device for transmitting and receiving synchronous signals having a hierarchical structure in a communication system {METHOD AND APPARATUS FOR TRANSMISSION AND RECEPTION OF SYNCHRONIZATION SIGNAL HAVNING LAYERED STRUCTURE IN COMMUNICATION SYSTEM}

This disclosure relates to technology for transmitting and receiving synchronization signals in a communication system, and specifically relates to technology for transmitting and receiving synchronization signals with a hierarchical structure in a communication system.

With the advancement of information and communication technology, various wireless communication technologies are being developed. Representative wireless communication technologies include long term evolution (LTE) and new radio (NR), which are defined in the 3rd generation partnership project (3GPP) standard. LTE may be a wireless communication technology among 4G (4th Generation) wireless communication technologies, and NR may be a wireless communication technology among 5G (5th Generation) wireless communication technologies. Wireless communication technology after 5G (such as 6G (6th Generation), etc.) can be referred to as B5G (beyond 5G) wireless communication technology.

In one embodiment of the communication system, in order to access a wireless network, a user may perform serving cell identification after obtaining time/frequency synchronization with the network. Operations such as obtaining synchronization and identifying serving cells may be performed based on the synchronization signal. Here, the synchronization signal may correspond to a primary synchronization signal (PSS), a secondary synchronization signal (SSS), or a synchronization signal block (SSB) composed of PSS and SSS.

In one embodiment of a communication system, a synchronization signal may be used to achieve time synchronization and/or frequency synchronization between a transmitting device and a receiving device. Meanwhile, the synchronization signal may be used for distance estimation using transmission delay time, may be used to distinguish between a plurality of transmitting devices, or may be used to estimate a wireless channel between two wireless communication devices. Synchronization signals can be generated in a variety of ways. The performance of each synchronization signal generated in various ways may be excellent or inferior depending on the communication situation, communication environment, purpose, etc. There may be a need for synchronization signal transmission and reception technology that provides excellent performance of synchronous operation and/or estimation operation based on the synchronization signal in various communication situations, communication environments, purposes, etc.

The matters described in this background art section have been written to improve understanding of the background of the invention, and may include matters that are not prior art already known to those skilled in the art in the field to which this technology belongs.

The purpose of the present disclosure to achieve the above-mentioned requirements is to provide a method and device for transmitting and receiving a synchronization signal with a hierarchical structure to improve synchronization performance in a communication system.

One embodiment of a method of operating a first communication device for achieving the above object includes identifying one or more synchronization signal components constituting a set of synchronization signal elements, the one or more synchronization signal components, and Generating a plurality of synchronization signal sections based on a plurality of primary coefficients corresponding to one or more synchronization signal elements, based on a combination of the plurality of synchronization signal sections, generating one or more synchronization signal sections. Generating synchronization signal parts, generating one or more synchronization signals based on a combination in the time domain of the one or more synchronization signal parts, and transmitting the generated one or more synchronization signals. can do.

The synchronization signal element set has J synchronization signal elements as elements, and the step of generating the plurality of synchronization signal sections includes determining a first synchronization signal element matrix using the J synchronization signal elements, determining a first first-order coefficient matrix having the same size as a first synchronization signal element matrix and consisting of the plurality of first-order coefficients, and and generating the plurality of synchronization signal sections by multiplying corresponding elements, wherein J may be a natural number of 1 or more.

Each of the plurality of synchronization signal sections corresponds to one of first to Nth time intervals distinguished from each other in the time domain, and generating the one or more synchronization signal portions includes: For each of the plurality of synchronization signal sections, performing sum operations between synchronization signal sections corresponding to each of the first to N-th time intervals, and in each of the first to N-th time intervals and generating first to Nth synchronization signal portions corresponding to the first to Nth time intervals based on the corresponding results of the sum operations, where N may be a natural number of 1 or more.

Generating the first to Nth synchronization signal portions includes checking first to Nth secondary coefficients corresponding to each of the first to Nth time intervals, the first to Nth time intervals Performing multiplication operations between the results of the sum operations corresponding to each and the first to Nth secondary coefficients corresponding to each of the first to Nth time intervals, and the first to Nth time intervals It may include obtaining the first to Nth synchronization signal portions corresponding to results of the multiplication operations corresponding to each of the sections.

The first to Nth secondary coefficients may be determined as elements constituting a specific row or specific column of a Walsh matrix having a size of N×N.

The plurality of synchronization signal sections have different lengths in the time domain, and generating the one or more synchronization signal portions includes classifying the plurality of synchronization signal sections into first to M-th section groups, connecting one or more synchronization signal sections included in each of the first to M-th section groups to each other in the time domain to generate first to M-th synchronization signal section bundles, and generating first to M-th synchronization signal section bundles; and generating the one or more synchronization signal portions based on a sum operation on synchronization signal section bundles, wherein M may be a natural number greater than 1.

The one or more synchronization signals include one first synchronization signal, and the step of generating the one or more synchronization signals includes connecting all of the one or more synchronization signal parts without overlapping in the time domain to generate the first synchronization signal. It may include a creation step.

The number of the one or more synchronization signals is K, and the first to Kth synchronization signals generated based on the step of generating the one or more synchronization signals constitute a first synchronization signal set, and K may be a natural number. there is.

The one or more synchronization signal portions include first to Nth synchronization signal portions, the one or more synchronization signals include one second synchronization signal, and generating the one or more synchronization signals includes: and generating the second synchronization signal by connecting N-th synchronization signal portions in the time domain. In the step of generating the second synchronization signal, at least some of the first to N-th synchronization signal portions are connected to each other. Parts are connected so that they overlap, and N may be a natural number greater than 1.

One embodiment of a first communication device for achieving the above object includes a processor, wherein the first communication device includes one or more synchronization signal elements constituting a set of synchronization signal elements. identify synchronization signal elements and generate a plurality of synchronization signal sections based on the one or more synchronization signal elements and a plurality of primary coefficients corresponding to the one or more synchronization signal elements, Based on the combination of a plurality of synchronization signal sections, generate one or more synchronization signal parts, and based on the combination of the one or more synchronization signal parts in the time domain, generate one or more synchronization signals, and and may be operative to cause transmission of one or more synchronization signals.

The synchronization signal element set has j synchronization signal elements as elements, and when generating the plurality of synchronization signal sections, the processor causes the first communication device to generate a first synchronization signal element using the J synchronization signal elements. Determine a signal element matrix, determine a first primary coefficient matrix having the same size as the first synchronous signal element matrix and consisting of the plurality of primary coefficients, and determine the first synchronous signal element matrix and the first 1 Operates to further cause to generate the plurality of synchronization signal sections by multiplying corresponding elements in the first-order coefficient matrix, wherein J may be a natural number of 1 or more.

Each of the plurality of synchronization signal sections corresponds to one of first to Nth time intervals distinguished from each other in the time domain, and when generating the one or more synchronization signal portions, the processor is configured to enable the first communication device to , for each of the first to N-th time intervals, perform sum operations between synchronization signal sections corresponding to each of the first to N-th time intervals among the plurality of synchronization signal sections, and the first to N-th time intervals. Based on the results of the sum operations corresponding to each of the first to Nth time intervals, further cause to generate first to Nth synchronization signal portions corresponding to the first to Nth time intervals, The N may be a natural number of 1 or more.

When generating the first to Nth synchronization signal portions, the processor determines that the first communication device identifies first to Nth secondary coefficients corresponding to each of the first to Nth time intervals, and Perform multiplication operations between the results of the sum operations corresponding to each of the first to Nth time intervals and the first to Nth secondary coefficients corresponding to each of the first to Nth time intervals, and The operation may further cause obtaining the first to Nth synchronization signal portions corresponding to results of the multiplication operations corresponding to each of the first to Nth time intervals.

The plurality of synchronization signal sections have different lengths in the time domain, and when generating the one or more synchronization signal portions, the processor is configured to cause the first communication device to generate the plurality of synchronization signal sections into first to Mth Classifying into section groups and connecting one or more synchronization signal sections included in each of the first to M-th section groups to each other in the time domain to generate first to M-th synchronization signal section bundles, and further cause to generate the one or more synchronization signal portions based on a sum operation on the first to Mth synchronization signal section bundles, where M may be a natural number greater than 1.

The one or more synchronization signals include one first synchronization signal, and when generating the one or more synchronization signals, the processor is configured to cause the first communication device to combine all of the one or more synchronization signal portions without overlapping in the time domain. By connecting, it may further operate to generate the first synchronization signal.

The number of the one or more synchronization signals is K, the one or more synchronization signals include first to Kth synchronization signals, and the first to Kth synchronization signals constitute a first synchronization signal set, and the K may be a natural number.

The one or more synchronization signal portions include first to Nth synchronization signal portions, the one or more synchronization signals include one second synchronization signal, and when generating the one or more synchronization signals, the processor 1 The communication node operates to further cause the first to Nth synchronization signal portions to be connected in the time domain to generate the second synchronization signal, wherein when generating the second synchronization signal, the first to Nth synchronization signal portions are connected in the time domain. At least some of the N synchronization signal parts are connected so that some parts overlap each other, and N may be a natural number greater than 1.

One embodiment of a method of operating a first communication device to achieve the above object includes receiving one or more synchronization signals transmitted from a second communication device, and based on the one or more synchronization signals, the second communication device Obtaining synchronization information for a device, wherein the one or more synchronization signals are based on a combination in time of one or more synchronization signal portions generated based on a combination of a plurality of synchronization signal sections in the second communication device. Generated, the plurality of synchronization signal sections include one or more synchronization signal components constituting a synchronization signal element set in the second communication device and a plurality of primary corresponding to the one or more synchronization signal components. ) may have been generated based on the coefficients.

The synchronization signal element set has J synchronization signal elements as elements, and the plurality of synchronization signal sections consist of a first synchronization signal element matrix determined using the J synchronization signal elements and the plurality of primary coefficients. It is generated by multiplying corresponding elements in the first first-order coefficient matrix, where J is a natural number of 1 or more, and the first synchronization signal element matrix and the first first-order coefficient matrix may have the same size.

Each of the plurality of synchronization signal sections corresponds to any one of first to Nth time intervals distinguished from each other in the time domain, and the one or more synchronization signal portions include the first to Nth time sections among the plurality of synchronization signal sections. The first to Nth synchronization signal portions corresponding to the first to Nth time intervals are generated based on the results of sum operations between synchronization signal sections corresponding to each of the Nth time intervals, where N is It may be a natural number greater than or equal to 1.

According to an embodiment of a method and device for transmitting and receiving a synchronization signal with a hierarchical structure in a communication system, a transmitting device generates and transmits a synchronization signal with a hierarchical structure (or multi-layered structure) (hereinafter, a layered synchronization signal). You can. A hierarchical synchronization signal may be generated based on a synchronization signal element set consisting of one or more types of synchronization signals (hereinafter, synchronization signal elements). The transmitting device may generate a hierarchical synchronization signal based on a combination (eg, linear combination) of one or more synchronization signal elements included in the synchronization signal element set. The hierarchical synchronization signal generated in this way can simultaneously have the advantages of various types of synchronization signals. The hierarchical synchronization signal generated in this way may have improved synchronization performance and/or estimation performance. Additionally, the hierarchical synchronization signal may have low implementation complexity depending on the embodiment.

1 is a conceptual diagram illustrating an embodiment of a communication system.
Figure 2 is a block diagram showing an embodiment of a communication node constituting a communication system.
Figure 3 is a conceptual diagram showing an embodiment of the structure of a radio frame in a communication system.
4A and 4B are conceptual diagrams for explaining first and second embodiments of synchronization signals.
5A to 5C are conceptual diagrams for explaining third to fifth embodiments of synchronization signals.
Figure 6 is a conceptual diagram for explaining a sixth embodiment of a synchronization signal.
Figure 7 is a conceptual diagram for explaining a seventh embodiment of a synchronization signal.
Figure 8 is a conceptual diagram for explaining an eighth embodiment of a synchronization signal.
Figure 9 is a conceptual diagram for explaining a ninth embodiment of a synchronization signal.
Figure 10 is a conceptual diagram for explaining a first embodiment of a cross-correlator.
Figure 11 is a conceptual diagram for explaining a second embodiment of a cross-correlator.
Figure 12 is a conceptual diagram for explaining the tenth embodiment of a synchronization signal.
Figure 13 is a conceptual diagram for explaining a first embodiment of a synchronization signal detector.
Figure 14 is a conceptual diagram for explaining a second embodiment of a synchronization signal detector.
Figure 15 is a conceptual diagram for explaining a third embodiment of a synchronization signal detector.

Since the present disclosure can make various changes and have various embodiments, specific embodiments will be illustrated in the drawings and described in detail. However, this is not intended to limit the present disclosure to specific embodiments, and should be understood to include all changes, equivalents, and substitutes included in the spirit and technical scope of the present disclosure.

Terms such as first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The above terms are used only for the purpose of distinguishing one component from another. For example, a first component may be referred to as a second component, and similarly, the second component may be referred to as a first component without departing from the scope of the present disclosure. The term and/or includes any of a plurality of related stated items or a combination of a plurality of related stated items.

When a component is said to be "connected" or "connected" to another component, it is understood that it may be directly connected to or connected to the other component, but that other components may exist in between. It should be. On the other hand, when it is mentioned that a component is “directly connected” or “directly connected” to another component, it should be understood that there are no other components in between.

The terms used in this disclosure are only used to describe specific embodiments and are not intended to limit the disclosure. Singular expressions include plural expressions unless the context clearly dictates otherwise. In the present disclosure, terms such as “comprise” or “have” are intended to designate the presence of features, numbers, steps, operations, components, parts, or combinations thereof described in the specification, but are not intended to indicate the presence of one or more other features. It should be understood that this does not exclude in advance the possibility of the existence or addition of elements, numbers, steps, operations, components, parts, or combinations thereof.

Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by a person of ordinary skill in the technical field to which this disclosure pertains. Terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with the meaning in the context of the related technology, and unless clearly defined in the present disclosure, should not be interpreted in an idealized or excessively formal sense. No.

A communication system to which embodiments according to the present disclosure are applied will be described. Communication systems to which embodiments according to the present disclosure are applied are not limited to those described below, and embodiments according to the present disclosure can be applied to various communication systems. Here, communication system may be used in the same sense as communication network.

Throughout the specification, network refers to, for example, wireless Internet such as WiFi (wireless fidelity), mobile Internet such as WiBro (wireless broadband internet) or WiMax (world interoperability for microwave access), and GSM (global system for mobile communication). ) or 2G mobile communication networks such as CDMA (code division multiple access), 3G mobile communication networks such as WCDMA (wideband code division multiple access) or CDMA2000, HSDPA (high speed downlink packet access) or HSUPA (high speed uplink packet access) It may include 4G mobile communication networks such as 3.5G mobile communication networks, LTE (long term evolution) networks or LTE-Advanced networks, 5G mobile communication networks, B5G mobile communication networks (6G mobile communication networks, etc.).

Throughout the specification, terminal refers to a mobile station, mobile terminal, subscriber station, portable subscriber station, user equipment, and access terminal. It may refer to the like, and may include all or part of the functions of a terminal, a mobile station, a mobile terminal, a subscriber station, a portable subscriber station, a user device, an access terminal, etc.

Here, a desktop computer, laptop computer, tablet PC, wireless phone, mobile phone, smart phone, and smart watch that can communicate with terminals. (smart watch), smart glass, e-book reader, PMP (portable multimedia player), portable game console, navigation device, digital camera, DMB (digital multimedia broadcasting) player, digital voice digital audio recorder, digital audio player, digital picture recorder, digital picture player, digital video recorder, digital video player ), etc. can be used.

Throughout the specification, base station refers to an access point, radio access station, node B, evolved node B, base transceiver station, and MMR ( It may refer to a mobile multihop relay)-BS, etc., and may include all or part of the functions of a base station, access point, wireless access station, Node B, eNodeB, transmitting and receiving base station, and MMR-BS.

Hereinafter, preferred embodiments of the present disclosure will be described in more detail with reference to the attached drawings. In order to facilitate overall understanding in explaining the present disclosure, the same reference numerals are used for the same components in the drawings, and duplicate descriptions of the same components are omitted.

1 is a conceptual diagram illustrating an embodiment of a communication system.

Referring to FIG. 1, the communication system 100 includes a plurality of communication nodes 110-1, 110-2, 110-3, 120-1, 120-2, 130-1, 130-2, 130-3, 130-4, 130-5, 130-6). A plurality of communication nodes are 4G communication (e.g., long term evolution (LTE), LTE-A (advanced)), 5G communication (e.g., new radio (NR)) specified in the 3rd generation partnership project (3GPP) standard. ), etc. can be supported. 4G communications can be performed in frequency bands below 6 GHz, and 5G communications can be performed in frequency bands above 6 GHz as well as below 6 GHz.

For example, for 4G communication and 5G communication, a plurality of communication nodes may use a communication protocol based on code division multiple access (CDMA), a communication protocol based on wideband CDMA (WCDMA), a communication protocol based on time division multiple access (TDMA), Communication protocol based on FDMA (frequency division multiple access), communication protocol based on OFDM (orthogonal frequency division multiplexing), communication protocol based on Filtered OFDM, communication protocol based on CP (cyclic prefix)-OFDM, DFT-s-OFDM (discrete Fourier transform-spread-OFDM)-based communication protocol, OFDMA (orthogonal frequency division multiple access)-based communication protocol, SC (single carrier)-FDMA-based communication protocol, NOMA (Non-orthogonal Multiple Access), GFDM (generalized frequency) division multiplexing)-based communication protocols, FBMC (filter bank multi-carrier)-based communication protocols, UFMC (universal filtered multi-carrier)-based communication protocols, and SDMA (Space Division Multiple Access)-based communication protocols. .

Additionally, the communication system 100 may further include a core network. If the communication system 100 supports 4G communication, the core network may include a serving-gateway (S-GW), a packet data network (PDN)-gateway (P-GW), a mobility management entity (MME), etc. there is. When the communication system 100 supports 5G communication, the core network may include a user plane function (UPF), a session management function (SMF), and an access and mobility management function (AMF).

Meanwhile, a plurality of communication nodes (110-1, 110-2, 110-3, 120-1, 120-2, 130-1, 130-2, 130-3, 130-) constituting the communication system 100 4, 130-5, 130-6) Each can have the following structure.

Figure 2 is a block diagram showing an embodiment of a communication node constituting a communication system.

Referring to FIG. 2, the communication node 200 may include at least one processor 220, a memory 220, and a transmitting and receiving device 230 that is connected to a network and performs communication. Additionally, the communication node 200 may further include an input interface device 240, an output interface device 250, a storage device 260, etc. Each component included in the communication node 200 is connected by a bus 270 and can communicate with each other.

However, each component included in the communication node 200 may be connected through an individual interface or individual bus centered on the processor 220, rather than the common bus 270. For example, the processor 220 may be connected to at least one of the memory 220, the transmission and reception device 230, the input interface device 240, the output interface device 250, and the storage device 260 through a dedicated interface. .

The processor 220 may execute a program command stored in at least one of the memory 220 and the storage device 260. The processor 220 may refer to a central processing unit (CPU), a graphics processing unit (GPU), or a dedicated processor on which methods according to embodiments of the present disclosure are performed. Each of the memory 220 and the storage device 260 may be comprised of at least one of a volatile storage medium and a non-volatile storage medium. For example, the memory 220 may be comprised of at least one of read only memory (ROM) and random access memory (RAM).

Referring again to FIG. 1, the communication system 100 includes a plurality of base stations (110-1, 110-2, 110-3, 120-1, 120-2) and a plurality of terminals (130- 1, 130-2, 130-3, 130-4, 130-5, 130-6). Base stations (110-1, 110-2, 110-3, 120-1, 120-2) and terminals (130-1, 130-2, 130-3, 130-4, 130-5, 130-6) The communication system 100 that includes may be referred to as an “access network.” Each of the first base station 110-1, the second base station 110-2, and the third base station 110-3 may form a macro cell. Each of the fourth base station 120-1 and the fifth base station 120-2 may form a small cell. The fourth base station 120-1, the third terminal 130-3, and the fourth terminal 130-4 may belong to the cell coverage of the first base station 110-1. The second terminal 130-2, the fourth terminal 130-4, and the fifth terminal 130-5 may belong to the cell coverage of the second base station 110-2. The fifth base station 120-2, the fourth terminal 130-4, the fifth terminal 130-5, and the sixth terminal 130-6 may belong to the cell coverage of the third base station 110-3. there is. The first terminal 130-1 may belong to the cell coverage of the fourth base station 120-1. The sixth terminal 130-6 may belong to the cell coverage of the fifth base station 120-2.

Here, each of the plurality of base stations 110-1, 110-2, 110-3, 120-1, and 120-2 includes a NodeB, an evolved NodeB, a base transceiver station (BTS), Radio base station, radio transceiver, access point, access node, road side unit (RSU), radio remote head (RRH), transmission point (TP), TRP ( transmission and reception point), eNB, gNB, etc.

A plurality of terminals (130-1, 130-2, 130-3, 130-4, 130-5, and 130-6) each include a user equipment (UE), a terminal, an access terminal, and a mobile device. Terminal, station, subscriber station, mobile station, portable subscriber station, node, device, IoT (Internet of Thing) It may be referred to as a device, a mounted device (mounted module/device/terminal or on board device/terminal, etc.), etc.

Meanwhile, each of the plurality of base stations 110-1, 110-2, 110-3, 120-1, and 120-2 may operate in different frequency bands or may operate in the same frequency band. Each of the plurality of base stations 110-1, 110-2, 110-3, 120-1, and 120-2 may be connected to each other through an ideal backhaul link or a non-ideal backhaul link. , information can be exchanged with each other through an ideal backhaul link or a non-ideal backhaul link. Each of the plurality of base stations 110-1, 110-2, 110-3, 120-1, and 120-2 may be connected to the core network through an ideal backhaul link or a non-ideal backhaul link. Each of the plurality of base stations (110-1, 110-2, 110-3, 120-1, 120-2) transmits the signal received from the core network to the corresponding terminal (130-1, 130-2, 130-3, 130). -4, 130-5, 130-6), and the signal received from the corresponding terminal (130-1, 130-2, 130-3, 130-4, 130-5, 130-6) is sent to the core network. can be transmitted to.

In addition, each of the plurality of base stations 110-1, 110-2, 110-3, 120-1, and 120-2 performs MIMO transmission (e.g., single user (SU)-MIMO, multi user (MU)- MIMO, massive MIMO, etc.), coordinated multipoint (CoMP) transmission, carrier aggregation (CA) transmission, transmission in an unlicensed band, direct device to device communication (D2D) (or ProSe ( proximity services)), etc. can be supported. Here, each of the plurality of terminals 130-1, 130-2, 130-3, 130-4, 130-5, and 130-6 is connected to a base station 110-1, 110-2, 110-3, and 120-1. , 120-2) and operations corresponding to those supported by the base stations 110-1, 110-2, 110-3, 120-1, and 120-2. For example, the second base station 110-2 may transmit a signal to the fourth terminal 130-4 based on the SU-MIMO method, and the fourth terminal 130-4 may transmit a signal to the fourth terminal 130-4 based on the SU-MIMO method. A signal can be received from the second base station 110-2. Alternatively, the second base station 110-2 may transmit a signal to the fourth terminal 130-4 and the fifth terminal 130-5 based on the MU-MIMO method, and the fourth terminal 130-4 and the fifth terminal 130-5 can each receive a signal from the second base station 110-2 by the MU-MIMO method.

Each of the first base station 110-1, the second base station 110-2, and the third base station 110-3 may transmit a signal to the fourth terminal 130-4 based on the CoMP method, and the fourth terminal 130-4 may transmit a signal to the fourth terminal 130-4. The terminal 130-4 can receive signals from the first base station 110-1, the second base station 110-2, and the third base station 110-3 using the CoMP method. Each of a plurality of base stations (110-1, 110-2, 110-3, 120-1, 120-2) has a terminal (130-1, 130-2, 130-3, 130-4) within its cell coverage. , 130-5, 130-6), and signals can be transmitted and received based on the CA method. The first base station 110-1, the second base station 110-2, and the third base station 110-3 each control D2D between the fourth terminal 130-4 and the fifth terminal 130-5. and each of the fourth terminal 130-4 and the fifth terminal 130-5 can perform D2D under the control of each of the second base station 110-2 and the third base station 110-3. .

Next, methods for transmitting and receiving synchronization signals in a communication system will be described. Here, even when a method performed in a first communication node among the communication nodes (e.g., transmission or reception of a signal) is described, the corresponding second communication node is a method corresponding to the method performed in the first communication node. (For example, receiving or transmitting a signal) can be performed. For example, when the operation of a receiving node is described, the corresponding transmitting node may perform an operation corresponding to the operation of the receiving node. Conversely, when the operation of a transmitting node is described, the corresponding receiving node may perform an operation corresponding to the operation of the transmitting node.

Figure 3 is a conceptual diagram showing an embodiment of the structure of a radio frame in a communication system.

Referring to FIG. 3, in a communication system, one radio frame may consist of 10 subframes, and one subframe may consist of two time slots. One time slot may have a plurality of symbols in the time domain and may include a plurality of subcarriers in the frequency domain. A plurality of symbols in the time domain may be OFDM symbols. Below, for convenience, an embodiment of a radio frame structure in a communication system will be described using an OFDM transmission mode in which a plurality of symbols in the time domain are OFDM symbols as an example. However, this is only an example for convenience of explanation, and embodiments of the wireless frame structure in the communication system are not limited to this. For example, another embodiment of a radio frame structure in a communication system may be configured to support other transmission modes, such as a single carrier (SC) transmission mode.

In one embodiment of the communication system, one or more of the numerologies in Table 1 are used for various purposes such as reducing inter-carrier interference (ICI) according to frequency band characteristics and latency reduction according to service characteristics. This can be used.

Table 1 is only an example for convenience of explanation, and embodiments of numerology used in a communication system may not be limited thereto. Each numerology μ may correspond to information on subcarrier spacing (SCS) Δf and cyclic prefix (CP). The terminal determines the numerology μ and CP values applied to the downlink bandwidth part or uplink bandwidth part based on the upper layer parameters 'subcarrierSpacing', 'cyclicPrefix', etc. You can check it.

) 서브프레임(subframe)(320)으로 구성되는 프레임(frame)(330), 하나 이상의 () 슬롯(slot)(310)으로 구성되는 서브프레임(320), 그리고 개의 OFDM 심볼(symbol)들로 구성되는 슬롯(310)으로 표현될 수 있다. 이때 각 변수 , , 의 값들은 설정된 뉴머롤러지에 따라 정규 사이클릭 프리픽스인 경우는 표 2의 값을 따를 수 있고, 확장 사이클릭 프리픽스인 경우는 표 3의 값을 따를 수 있다. 한 슬롯에 포함되는 OFDM 심볼들은 상위 계층 시그날링 혹은 상위 계층 시그날링 및 L1 시그날링의 조합에 의하여 '하향링크(downlink)', '플렉서블(flexible)' 또는 '상향링크(uplink)'로 구별될 수 있다.The time resource for transmitting a wireless signal in the communication system 300 is one or more (

) A frame (330) consisting of a subframe (320), one or more ( ) a subframe 320 consisting of a slot 310, and It can be expressed as a slot 310 consisting of OFDM symbols. At this time, each variable , , The values of may follow the values of Table 2 in the case of a regular cyclic prefix and may follow the values in Table 3 in the case of an extended cyclic prefix, depending on the set numerology. OFDM symbols included in one slot can be distinguished as 'downlink', 'flexible', or 'uplink' by upper layer signaling or a combination of upper layer signaling and L1 signaling. You can.

In one embodiment of the communication system, frame 330 may have a length of 10 ms, and subframe 320 may have a length of 1 ms. Each frame 330 can be divided into two half-frames of equal length, and the first half-frame (half-frame 0) consists of subframes 320 numbered 0 to 4. may be, and the second half-frame (half-frame 1) may be composed of subframes 320 numbered 5 to 9. One carrier may include a set of frames for uplink (uplink frames) and a set of frames for downlink (downlink frames).

One slot can have 6 (in case of Extended Cyclic Prefix) or 7 (in case of Normal Cyclic Prefix) OFDM symbols. A time-frequency area defined by one slot can be called a resource block (RB). If one slot has 7 OFDM symbols, one subframe has 14 OFDM symbols ( ) can have.

A subframe can be divided into a control area and a data area. A Physical Downlink Control Channel (PDCCH) may be allocated to the control area. A Physical Downlink Shared Channel (PDSCH) may be allocated to the data area. Some of the subframes may be special subframes. Special subframes may include Downlink Pilot Time Slot (DwPTS), Guard Period (GP), and Uplink Pilot Time Slot (UpPTS). DwPTS can be used for UE time and frequency synchronization estimation and cell search. GP can be viewed as a section to eliminate interference caused by multipath delay of downlink signals.

In one embodiment of the communication system, in order to access a wireless network, a user may perform serving cell identification after obtaining time/frequency synchronization with the network. Operations such as obtaining synchronization and identifying serving cells may be performed based on the synchronization signal. Here, the synchronization signal may correspond to a primary synchronization signal (PSS), a secondary synchronization signal (SSS), or a synchronization signal block (SSB) composed of PSS and SSS.

In one embodiment of a communication system, a synchronization signal may be used to achieve time synchronization and/or frequency synchronization between a transmitting device and a receiving device. Meanwhile, the synchronization signal may be used for distance estimation using transmission delay time, may be used to distinguish between a plurality of transmitting devices, or may be used to estimate a wireless channel between two wireless communication devices. Synchronization signals can be generated in a variety of ways. The performance of each synchronization signal generated in various ways may be excellent or inferior depending on the communication situation, communication environment, purpose, etc. There may be a need for synchronization signal transmission and reception technology that provides excellent performance of synchronous operation and/or estimation operation based on the synchronization signal in various communication situations, communication environments, purposes, etc.

In one embodiment of a communication system, a synchronization signal may be constructed based on one or more sequences. One or more sequences constituting the synchronization signal may be arranged in a frame 330, a subframe 320, a slot 310, or an OFDM symbol constituting the slot 310 in the time domain. Meanwhile, one or more sequences constituting the synchronization signal may be modulated and mapped to a plurality of subcarriers in the frequency domain. In one embodiment of a communication system, one or more sequences constituting a synchronization signal may correspond to one or more binary sequences or complex sequences.

4A and 4B are conceptual diagrams for explaining first and second embodiments of synchronization signals.

In communication systems, synchronization signals can be generated in a variety of ways. Here, the synchronization signal may be the same or similar to the synchronization signal described with reference to FIG. 3. In one embodiment of the communication system, the synchronization signal may be generated based on analog methods. A synchronization signal (hereinafter referred to as an analog synchronization signal) generated based on an analog method may be composed of a simple pulse signal or chirp signal. When an analog synchronization signal is used, the transmission and reception time of the synchronization signal can be easily estimated. Meanwhile, when an analog synchronization signal is used, it may not be easy to identify (or distinguish) a specific transmission device that transmitted the synchronization signal among a plurality of wireless communication devices existing in a communication environment.

In another embodiment of the communication system, the synchronization signal may be generated on a digital basis. When a synchronization signal generated based on a digital method (hereinafter referred to as a digital synchronization signal) is used, the transmission and reception time of the synchronization signal can be easily estimated. When a digital synchronization signal is used, a specific transmitting device that transmitted the synchronization signal can be easily identified among a plurality of wireless communication devices existing in a communication environment. For example, in a communication system, each of a plurality of synchronization signals is assigned to each of a plurality of base stations, but the same synchronization signal may not be assigned to base stations that are close to each other. Through this, the user who receives the synchronization signal transmitted from each base station can identify the base station that transmitted the received synchronization signal.

As the functions and uses of synchronization signals are diverse, the indicators that evaluate the characteristics of synchronization signals may also vary. It may not be easy to consistently evaluate a specific synchronization signal as excellent based on various indicators. For example, one embodiment of the synchronization signal may have excellent synchronization estimation performance, but may have the disadvantage of having high implementation complexity or requiring a lot of radio resources. Other embodiments of the synchronization signal have excellent performance in a relatively noise-free wireless channel environment, but performance may be significantly reduced in a noisy wireless channel or a multi-path wireless channel environment with severe fading. Another embodiment of a synchronization signal may have good synchronization estimation performance but not good wireless channel estimation performance.

In one embodiment of the communication system, the synchronization signal may be generated by passing a mathematical or digital sequence through a pulse forming filter. The synchronization signal generated in this way may have excellent auto-correlation characteristics and excellent cross-correlation characteristics. When generating a synchronization signal in this way, the network can easily generate a synchronization signal set containing a relatively large number of elements. For example, in one embodiment of the communication system, PSS may be composed of 3 and SSS may be composed of 1008. By generating a synchronization signal using such a digital sequence or a digital synchronization signal as an element, various synchronization signals can be easily generated. This synchronization signal generation method can have a relatively high degree of design freedom. For example, the network can select a longer sequence to improve synchronization signal performance, or use a binary sequence rather than a complex sequence to reduce implementation complexity. To generate a synchronization signal, an m-sequence, Zadoff-Chu sequence, Gold sequence, etc. may be used. A receiving device that receives a digital synchronization signal may process the received synchronization signal in the digital domain to perform operations such as time and/or frequency synchronization estimation. The complexity of the synchronization signal processing unit (or synchronization signal processing operation) that processes the digital synchronization signal may be determined based on various factors. For example, the complexity of the synchronization signal processing unit that processes the digital synchronization signal may be determined based on factors such as the length of the sequence used, the number of elements constituting the synchronization signal set, and the bandwidth used. In order to support a synchronization signal with high performance, there may be a problem that the complexity of the synchronization signal processing unit (or synchronization signal processing operation) of the receiving device increases.

The target performance (or performance target) of the synchronization signal may be determined based on the requirements (or service requirements) of the system. Once the target performance is determined, the freedom in designing the synchronization signal can be significantly limited. For example, once the requirements and/or target performance of the system are determined, such as the bandwidth used, implementation complexity, transmission distance, power consumption, interference between devices, and various functions that the synchronization signal must handle, a type that has characteristics that satisfy the determined requirements. Only synchronization signals of can be selected. For example, in one embodiment of a communication system, when a synchronization signal is generated based on the Zadoff-Chu sequence, the generated synchronization signal may inherit the characteristics of the Zadoff-Chu sequence. In this way, the synchronization signal generated based on the Zadoff-Chu sequence can have the advantage of excellent cross-correlation characteristics. On the other hand, the synchronization signal generated based on the Zadoff-Chu sequence may have the disadvantage of being vulnerable to carrier frequency offset (CFO) and having somewhat high implementation complexity. In another embodiment of a communication system, when a synchronization signal is generated based on a chirp signal, the generated synchronization signal may inherit the characteristics of the chirp signal. In this way, the synchronization signal generated based on the chirp signal can have the advantage of excellent autocorrelation characteristics. Meanwhile, a synchronization signal generated based on a chirp signal may not have the functions and design flexibility supported by sequence-based synchronization signals.

Referring to FIGS. 4A and 4B, the synchronization signal may be generated to have a hierarchical structure (or multi-layer structure). Hereinafter, in the present disclosure, a 'synchronization signal with a hierarchical structure (or multi-layered structure)' may be referred to as a 'layered synchronization signal'.

A hierarchical synchronization signal may be generated based on a 'synchronization signal element set' composed of one or more types of synchronization signal components. The set of synchronization signal elements may be referred to as 'alphabet', ' Λ ', etc. The network may generate a synchronization signal by using at least some of one or more types of synchronization signal elements constituting the synchronization signal element set Λ .

Each of one or more types of synchronization signal elements constituting the synchronization signal element set may be an analog signal (eg, pulse signal, chirp signal, etc.). Each of one or more types of synchronization signal elements constituting the synchronization signal element set may be a digital signal. Each of one or more types of synchronization signal elements constituting the synchronization signal element set may be a signal whose mathematical sequence is converted into an analog signal based on a pulse forming filter. For example, a set of synchronization signal elements is a mathematical sequence mapped to an OFDM sub-carrier in the frequency domain, and the signal converted to the time domain through IDFT (inverse discrete Fourier transform) is converted into elements. It can be included. The synchronization signal element set may include signals generated based on other synchronization signal element sets as elements. The synchronization signal element set Λ may include signals generated in various other ways.

The synchronization signal element set Λ can be expressed identically or similarly to Equation 1.

In Equation 1, s _a (t) may refer to each of the elements constituting the synchronization signal element set (i.e., synchronization signal elements). N _Λ may be a natural number meaning the number of elements constituting the synchronization signal element set. The synchronization signal element set may have different signals as elements. For example, a set of synchronization signal elements may have pulse signals and chirp signals as elements at the same time. Alternatively, the synchronization signal element set may have a Chirp signal and a Zadoff-Chu sequence signal as elements at the same time. Alternatively, the synchronization signal element set may have an m-sequence signal and a Zadoff-Chu sequence signal as elements at the same time.

A synchronization signal may be generated based on a set of synchronization signal elements Λ . Here, the synchronization signal element set Λ may include matrix X as an element. Here, the size of matrix X may be (M×N), and M and N may be natural numbers. Alternatively, the synchronization signal element set Λ may include synchronization signal elements x _m,n (t) as elements, and a matrix X may be constructed based on x _m,n (t). Here, m and n can be natural numbers, It can be, It can be. The synchronization signal element set Λ may include vector g as an element. Here, the size of vector g may be (1×N). Alternatively, the synchronization signal element set Λ may include g[n] as an element, and the vector g may be constructed based on g[n]. The synchronization signal element set Λ may include a matrix A of size (M×N) as an element. Here, the size of matrix A may be (M×N). Alternatively, the synchronization signal element set Λ may include a _m,n as elements, and a matrix A may be constructed based on a _m,n . Here, a _m,n and/or x _m,n may be a coefficient that determines a combination method of synchronization signal elements x _m,n (t) to generate a synchronization signal.

In the present disclosure, for convenience of explanation, when a specific matrix (or specific vector, etc.) is constructed based on specific elements included in the synchronization signal element set Λ , the synchronization signal element set Λ is the corresponding matrix (or corresponding vector, etc.) It can be expressed as including as an element. For example, if the synchronization signal element set Λ includes r _m,n as an element and a matrix R is constructed based on r _m,n , the synchronization signal element set Λ can be expressed as including the matrix R as an element.

Referring to FIG. 4A, the synchronization signal p(t) 400 according to the first embodiment of the synchronization signal may be generated as a hierarchical synchronization signal. By multiplying the synchronization signal elements x _m,n (t) and the corresponding coefficients a _m,n (t), a synchronization signal section a _m,n ·x _m,n (t) can be generated. As one or more synchronization signal sections are combined, one or more synchronization signal parts may be generated. The synchronization signal p(t) (400) is composed of one or more synchronization signal parts g[n]·f _n (t)(0≤n≤N-1) expressed as Equation 2 in series in the time domain. It can be created by connecting.

The synchronization signal p(t) (400) is composed of synchronization signal parts g[0]·f ₀ (t)(401), g[1]·f ₁ (t)(402), ..., g[N- 1]·f _N-1 (t) (409) can be generated by connecting them in series in the time domain. The synchronization signal p(t) (400) may be expressed the same or similar to Equation 3.

Referring to Equation 3, the synchronization signal p(t) (400) can be defined as a value combining the synchronization signal portions g[n]·f _n (t) from n=0 to n=N-1. Here, g[n] can constitute vector g . Meanwhile, f _n (t) may be defined the same or similar to Equation 4.

Referring to Equation 4, f _n (t) can be defined as the sum of the synchronization signal sections a _m,n ·x _m,n (t) from m=0 to m=M-1. Here, a _m,n can form matrix A , and x _m,n (t) can form matrix X.

In FIG. 4A, f ₀ (t), f ₁ (t), ..., f _N-1 (t) of the synchronization signal portions 401, 402, ..., 409 are synchronization signal sections. ) a _m,n ·x _m,n (t) can be generated based on the sum of (410, 420, ..., 440). Specifically, f ₀ (t) of the first synchronization signal portion 401 is divided into synchronization signal sections a _0,0 ·x _0,0 (t) (411), a _1,0 ·x _1,0 (t )(421), ..., a _M-1,0 ·x _M-1,0 (t)(441). f ₁ (t) of the second synchronization signal portion 402 is divided into synchronization signal sections a _0,1 ·x _0,1 (t) (412), a _1,1 ·x _1,1 (t) (422) It can be determined based on the sum of , ..., a _M-1,1 ·x _M-1,1 (t) (442). f _N-1 (t) of the Nth synchronization signal portion 409 is the synchronization signal sections a _0,N-1 ·x _0,N-1 (t) (419), a _1,N-1 ·x ₁ It can be determined based on the sum of _,N-1 (t)(429), ..., a _M-1,N-1 ·x _M-1,N-1 (t)(449).

Referring to Equation 3 and Equation 4, the synchronization signal p(t) (400) is g[n] constituting the vector g , a _m,n constituting the matrix A , and x _m constituting the matrix X. It can be defined based on _n (t). Vector g , matrix A , and matrix X can be expressed as Equation 5.

The synchronization signal element set Λ may include vector g , matrix A , and/or matrix X as elements. Given a set of synchronization signal elements Λ and the vector g , matrix A , and matrix X are determined, the synchronization signal p(t) 400 can be determined. The generation process of this synchronization signal p(t)(400) can be expressed as Equation 6.

In the present disclosure, if there is no confusion in the context, based on Equation 6 can be interpreted as having the same meaning as p(t).

Even if the same synchronization signal element set Λ is given, the synchronization signal p(t) (400) may be determined differently depending on the vector g , matrix A , and matrix X. For example, the synchronization signal p ₁ (t) and the synchronization signal p ₂ (t) may be generated based on the same synchronization signal element set Λ . The synchronization signal p ₁ (t) can be determined based on vector g ₁ , matrix A ₁ and matrix X ₁ . The synchronization signal p ₂ (t) can be determined based on vector g ₂ , matrix A ₂ and matrix X ₂ . This can be expressed as Equation 7.

If vector g ₁ and vector g ₂ are equal to each other, matrix A ₁ and matrix A ₂ are equal to each other, and matrix X ₁ and matrix X ₂ are equal to each other, then synchronization signal p ₁ (t) and synchronization signal p ₂ (t) can be determined identically to each other. This can be expressed as Equation 8.

In Equation 8, '∧' may be a logical operator meaning 'AND'.

On the other hand, if vector g ₁ and vector g ₂ are different from each other, matrix A ₁ and matrix A ₂ are different from each other, or matrix X ₁ and matrix X ₂ are different from each other, synchronization signal p ₁ (t) and synchronization signal p ₂ (t) may be determined differently. This can be expressed as Equation 9.

In Equation 9, '∨' may be a logical operator meaning 'OR'. Equation 9 can also be expressed as Equation 10.

As in Equation 9 or Equation 10, even if the same set of synchronization signal elements Λ is given, if at least some of the vectors and matrices that are the basis of the synchronization signals are determined differently from each other, the synchronization signals will be determined differently from each other. You can. That is, even based on the same synchronization signal element set Λ , the synchronization signal can be configured in various ways by changing at least some of the vector g , matrix A , and matrix X.

The elements g[n] (n=0, 1, ..., N-1) constituting the vector g can be selected or determined in various ways depending on the nature and purpose of the synchronization signal. For example, vector g can be created based on the rows or columns of a Walsh matrix. Meanwhile, vector g may be generated based on an m-sequence or Zadoff-Chu sequence.

Referring to FIG. 4B, the synchronization signal 450 according to the second embodiment of the synchronization signal may be generated as a hierarchical synchronization signal. The synchronization signal 450 may be the same or similar to the synchronization signal 400 according to the first embodiment of the synchronization signal described with reference to FIG. 4A. The synchronization signal 450 may be generated based on at least part of Equation 1 to Equation 10.

In the embodiment shown in Figure 4B, M=1 and N=4. However, this is only an example for convenience of explanation, and the second embodiment of the synchronization signal is not limited to this. When M = 1 and N = 4, Equation 5 can be expressed as Equation 11.

Specifically, in the embodiment shown in FIG. 4B, vector g , matrix A , matrix X , and synchronization signal element set Λ can be expressed as Equation 12.

Referring to Equation 12, the synchronization signal element set Λ may include only one signal x(t) as an element. The signal x(t) may be a chirp signal. The signal x(t) may be a chirp signal whose frequency increases linearly with time in a specific time interval (for example, 0≤t<T _K ). Signal x(t) can be defined as Equation 13.

The synchronization signal 450 is x(t)(451), -x(t)(452), x(t)(453), -x(t)() generated based on vector g , matrix A , matrix X , etc. 454) can be generated by connecting them in series in the time domain.

5A to 5C are conceptual diagrams for explaining third to fifth embodiments of synchronization signals.

Referring to FIGS. 5A to 5C, synchronization signals 500, 550, and 560 according to the third to fifth embodiments of the synchronization signal may be generated as hierarchical synchronization signals. Hereinafter, in describing the third to fifth embodiments of the synchronization signal with reference to FIGS. 5A to 5C, content that overlaps with that described with reference to FIGS. 1 to 4B may be omitted.

Referring to FIG. 5A, the synchronization signal 500 according to the third embodiment of the synchronization signal may be the same or similar to the synchronization signal 400 according to the first embodiment of the synchronization signal described with reference to FIG. 4A. In the embodiment shown in Figure 5A, M=2 and N=2. However, this is only an example for convenience of explanation, and the third embodiment of the synchronization signal is not limited to this. When M=2 and N=2, Equation 5 can be expressed as Equation 14.

Specifically, in the embodiment shown in FIG. 5A, vector g , matrix A , matrix X , and synchronization signal element set Λ can be expressed as Equation 15.

Referring to Equation 15, the synchronization signal 500 can be generated based on synchronization signal elements x ₁ (t) and x ₂ (t), which are elements of the synchronization signal element set Λ . Here, x ₁ (t) may be a signal defined in a specific time interval (for example, 0≤t<T _K ). Meanwhile, x ₂ (t) can be defined based on x ₁ (t). For example, x ₂ (t) may be defined the same as or similar to Equation 16.

The synchronization signal p(t) (500) is a synchronization signal that is the sum of synchronization signal sections x ₁ (t) (511) and x ₂ (t) (512) generated based on vector g , matrix A , matrix X , etc. A signal part f ₀ (t) (510) and a synchronization signal part f 1 (t ₎ (520) which is the sum of synchronization signal sections x ₁ (t) (521) and -x ₂ (t) (522). It can be created by connecting, combining, or combining.

Referring to FIG. 5B, the synchronization signal 550 according to the fourth embodiment of the synchronization signal may be generated as a hierarchical synchronization signal. The synchronization signal 550 is the same as the synchronization signal 400 according to the first embodiment of the synchronization signal described with reference to FIG. 4A, the synchronization signal 500 according to the third embodiment of the synchronization signal described with reference to FIG. 5A, etc. It may be similar. The synchronization signal 550 may be generated based on at least part of Equations 1 to 10 and Equations 14 to 16.

One or more sequences constituting the synchronization signal 550 may be modulated and mapped to a plurality of subcarriers in the frequency domain. FIG. 5B shows the result of a plurality of components (or sequences) constituting the synchronization signal 550 being modulated and mapped to subcarriers of an OFDM symbol. For example, the synchronization signal 550 may be composed of N _FFT components. Here, N _FFT may be a natural number. The synchronization signal components P[i] (i=0, 1, ..., N _FFT ) are composed of components with even indices (i.e., i=0, 2, 4, ..., N _FFT -2) ( Hereinafter, it will include even-numbered components 551) and components with odd indices (i.e., i=1, 3, 5, ..., N _FFT -1) (hereinafter, odd-numbered components 552). For an integer k greater than or equal to 0, the value of the even component P[2k] constituting the synchronization signal 550 may be X ₁ [k], where X ₁ [k] is It may correspond to the synchronization signal component x ₁ (t) in the time domain according to the third embodiment of the described synchronization signal. In other words, the synchronization signal 500 constituting the synchronization signal 500 in the time domain described with reference to FIG. 5A Signal _component Similarly, the synchronization signal _component It can be seen that the th components 552 correspond to the result of being converted to the time domain through IDFT. As in Equation 16, the synchronization signal component x ₁ (t) constituting the synchronization signal 500 in the time domain and x ₂ (t) is You can have a double relationship. Here, Δf may be the same or similar to Equation 17.

Referring to Equation 17, the odd component P[2k+1] constituting the synchronization signal ₅₅₀ in the frequency domain has the same value It can be seen as a frequency shift by one subcarrier interval from the even-numbered component P[2k].

Referring to FIG. 5C, the synchronization signal 560 according to the fifth embodiment of the synchronization signal may be generated as a hierarchical synchronization signal. The synchronization signal 560 is the same as the synchronization signal 400 according to the first embodiment of the synchronization signal described with reference to FIG. 4A or the synchronization signal 500 according to the third embodiment of the synchronization signal described with reference to FIG. 5A. It may be similar. One or more sequences constituting the synchronization signal 560 may be modulated and mapped to a plurality of subcarriers in the frequency domain. The synchronization signal 560 may be composed of N _FFT components. The synchronization signal components P[i] may include even-numbered components 561 and odd-numbered components 562. For an integer k greater than or equal to 0, the value of the even component P[2k] constituting the synchronization signal 560 may be X ₁ [k]. Here, X ₁ [k] may correspond to the synchronization signal component x ₁ (t) in the time domain according to the third embodiment of the synchronization signal described with reference to FIG. 5A. Expressed differently, the synchronization signal _component The components 561 can be viewed as corresponding to the result of being converted to the time domain through IDFT. Similarly, the synchronization signal _component The components 562 can be viewed as corresponding to the result of being converted to the time domain through IDFT. As in Equation 16, the synchronization signal components x ₁ (t) and x ₂ (t) constituting the synchronization signal 500 in the time domain are You can have a double relationship. Here, Δf may be the same or similar to Equation 18.

Referring to Equation 18, the odd component P[2k+1] constituting the synchronization signal 560 in the frequency domain has the same _value It can be seen as a frequency shift from the even-numbered component P[2k] by the interval of (N _FFT /2+1) subcarriers. For example, the value of the even component P[0] may be X ₁ [0]. In addition, the value of the odd-numbered component P[N _FFT /2+1], which is frequency shifted by (N _FFT /2+1) subcarrier intervals from the even-numbered component P[0], is the same as the even-numbered component P[0]. It may be X ₁ [0].

In one embodiment of a communication system, the correlation coefficient ρ _xr (τ) between any two signals x(t) and r(t) may be defined the same as or similar to Equation 19.

Referring to Equation 19, if the two signals x(t) and r(t) are the same, ρ _xr (τ)=1 when τ=0.

In one embodiment of a communication system, if the synchronization signal has a long length in the time domain, it may be more affected by Doppler shift, CFO, phase noise, etc. In other words, the shorter the Doppler signal has in the time domain, the more robust it can be to Doppler shift, CFO, phase noise, etc.

In the third to fifth embodiments of the synchronization signal described with reference to FIGS. 5A to 5C, each of the synchronization signals 500, 550, and 560 may be composed of synchronization signal components that are shorter than themselves. For example, in the third embodiment of the synchronization signal described with reference to FIG. 5A, the synchronization signal 500 is a combination of f ₀ (t) (501) and f ₁ (t) (502) that are shorter than themselves in the time domain. It can be composed of . Meanwhile, in the fourth and fifth embodiments of the synchronization signal described with reference to FIGS. 5B and 5C, the synchronization signals 550 and 560 have relatively short even-numbered components 551 and 561 and odd-numbered components. It may be composed of components 552 and 562.

In one embodiment of the communication system, the synchronization signal (hereinafter referred to as 'transmitted signal') transmitted by the transmitting device is referred to as p(t), and the signal received by the receiving device (hereinafter referred to as 'received signal') is referred to as r(t). When , the correlation coefficient ρ _pr (τ) between the transmitted signal p(t) and the received signal r(t) may represent the characteristics of the detector output signal of the synchronization signal. When the transmitted signal p(t) and the received signal r(t) are the same, ρ _pr (τ)=1 when τ=0. However, due to the influence of the wireless channel, limitations in implementation of the transmitting and receiving device, etc., the received signal r(t) may not be the same as the transmitted signal p(t). For example, due to Doppler shift, carrier frequency offset (CFO) between transmitters and receivers, phase noise, etc., the received signal r(t) may not be the same as the transmitted signal p(t). there is. In this case, ρ _pr (τ) may be less than 1 when τ=0.

In one embodiment of a communication system, the transmitted signal p(t) may consist of transmitted signal components x ₁ (t) and x ₂ (t) and the received signal r(t) may consist of received signal components r ₁ (t) ) and r ₂ (t). Here, each of the received signal components r ₁ (t) and r ₂ (t) may correspond to each of the transmitted signal components x ₁ (t) and x ₂ (t). Expressed differently, each of the received signal components r ₁ (t) and r ₂ (t) may correspond to the reception result of each of the transmitted signal components x ₁ (t) and x ₂ (t). The transmission signal components x ₁ (t) and x ₂ (t) may have a relatively short length in the time domain compared to the transmission signal p(t). The received signal components r ₁ (t) and r ₂ (t) may have a relatively short length in the time domain compared to the received signal r(t). Assuming that τ is sufficiently small, the correlation coefficient ρ _pr (τ) between the transmitted signal p(t) and the received signal r(t) can be approximated to be the same as or similar to Equation 20.

Referring to Equation 20, the correlation coefficient ρ _pr (τ) between the transmitted signal p(t) and the received signal r(t) is the transmitted signal components x ₁ (t) and x ₂ (t) and the received signal components Correlation coefficient between r ₁ (t) and r ₂ (t) and It can be defined or approximated as a linear combination of . Expressed differently, the correlation coefficient characteristics of the transmission signal p(t) can be determined by the correlation coefficient characteristics of transmission signal components x ₁ (t) and x ₂ (t) that are relatively short in length in the time domain. The synchronization signals 500, 550, and 560 according to the third to fifth embodiments of the synchronization signal described with reference to FIGS. 5A to 5C may have robust characteristics against influences such as Doppler shift, CFO, and phase noise. there is. However, this is only an example for convenience of explanation, and the correlation coefficient characteristics of the synchronization signal in a communication system may appear in various ways based on the characteristics of the synchronization signal element set Λ .

When Equation 16 and Equation 20 are combined, the same or similar conclusion as Equation 21 can be drawn.

In Equation 21, the equal sign can be established when τ=0. Referring to Equation 21, in the case of the synchronization signals 500, 550, and 560 according to the third to fifth embodiments of the synchronization signal described with reference to FIGS. 5A to 5C, when τ≠0, the correlation coefficient The value of ρ _pr (τ) is the correlation coefficient It may be smaller than the value of . Expressed differently, the value in the sidelobe of ρ _pr (τ) (when τ≠0) is the correlation coefficient It may be smaller than the value in the sidelobe of . Here, the value of the correlation coefficient ρ _pr (τ) may correspond to the correlation coefficient characteristic of the synchronization signal p(t), and the correlation coefficient The value of may correspond to the correlation coefficient characteristic of the synchronization signal component x ₁ (t). Equation 21 shows that the synchronization signals 500, 550, and 560 according to the third to fifth embodiments of the synchronization signal described with reference to FIGS. 5A to 5C are obtained by connecting relatively short synchronization signal components. This may mean that, despite being generated, it can have the performance of a long synchronization signal. In this way, when generating a synchronization signal by connecting short-length synchronization signal components, a design that allows specific characteristics to be provided to improve the performance of the synchronization signal can be applied.

Figure 6 is a conceptual diagram for explaining a sixth embodiment of a synchronization signal.

Referring to FIG. 6, the synchronization signal structure 600 according to the sixth embodiment of the synchronization signal may be configured to include a hierarchical synchronization signal. Hereinafter, in describing the sixth embodiment of the synchronization signal with reference to FIG. 6, content that overlaps with that described with reference to FIGS. 1 to 5C may be omitted.

In one embodiment of the communication system, one synchronization signal may be used alone. Meanwhile, in another embodiment of the communication system, a synchronization signal set consisting of a plurality of synchronization signals may be configured, and the synchronization signals constituting the synchronization signal set may be used. When the number of elements of the synchronization signal set W is a natural number N _W , the synchronization signal set W can be expressed the same or similar to Equation 22.

Referring to Equation 22, the synchronization signal set W may have N _W synchronization signals p _i (t) (i = 0, 1, ..., N _W -1) as elements. In the synchronization signal structure 600 shown in FIG. 6, N _W = 4. In other words, the synchronization signal set W according to Equation 22 is composed of four synchronization signals p ₀ (t)(618), p ₁ (t)(628), p ₂ (t)(638), p ₃ (t)( 648) as an element. However, this is only an example for convenience of explanation, and the seventh embodiment of the synchronization signal is not limited to this.

Each of the four synchronization signals p ₀ (t) (618), p ₁ (t) (628), p ₂ (t) (638), and p ₃ (t) (648) that constitute the synchronization signal set W is, It can be generated based on a set of synchronization signal elements Λ . For example, each of the synchronization signals 618, 628, 638, and 648 may be determined to be the same as or similar to Equation 23.

In Equation 23, p _i (t) may refer to each of the synchronization signals 618, 628, 638, and 648. The synchronization signal p _i (t) may be determined based on vector g _i , matrix A _i , matrix X _i , etc. In the embodiment shown in Figure 6, the vector g _i , matrix A _i , matrix X _i , and synchronization signal element set Λ that determine the synchronization signal p _i (t) may be expressed the same or similar to Equation 24.

In Equation 24, each of the four vectors g ₁ , g ₂ , g ₃ and g ₄ may correspond to a row of a Walsh matrix of size (4×4) expressed as Equation 25.

Referring to Equation 24, each of the synchronization signals 618, 628, 638, and 648 can be generated based on a synchronization signal element set Λ that has only one synchronization signal element x(t) as an element. The synchronization signal p ₀ (t) 618 may be composed of a combination of synchronization signal sections 610, 611, ..., 617 generated based on Equation 24. The synchronization signal p ₁ (t) 628 may be composed of a combination of synchronization signal sections 620, 621, ..., 627 generated based on Equation 24. The synchronization signal p ₂ (t) 638 may be composed of a combination of synchronization signal sections 630, 631, ..., 637 generated based on Equation 24. The synchronization signal p ₃ (t) 648 may be composed of a combination of synchronization signal sections 640, 641, ..., 647 generated based on Equation 24.

Figure 7 is a conceptual diagram for explaining a seventh embodiment of a synchronization signal.

Referring to FIG. 7, the synchronization signal structure 700 according to the seventh embodiment of the synchronization signal may be configured to include a hierarchical synchronization signal. Hereinafter, in describing the seventh embodiment of the synchronization signal with reference to FIG. 7, content that overlaps with that described with reference to FIGS. 1 to 6 may be omitted.

In the synchronization signal structure 700 shown in FIG. 7, the synchronization signal set W includes four synchronization signals p ₀ (t) (718), p ₁ (t) (728), p ₂ (t) (738), It can have p ₃ (t) (748) as an element. However, this is only an example for convenience of explanation, and the seventh embodiment of the synchronization signal is not limited to this.

Each of the synchronization signals 718, 728, 738, and 748 can be expressed as a synchronization signal p _i (t). The vector g _i , _matrix A _{i ,} matrix

In Equation 26, each of the four vectors g ₁ , g ₂ , g ₃ and g ₄ may correspond to a row of a Walsh matrix of size (4×4) expressed as Equation 25. Referring to Equation 26, each of the synchronization signals 718, 728, 738, and 748 is based on a synchronization signal element set Λ having two synchronization signal elements x ₁ (t) and x ₂ (t) as elements. can be created. The synchronization signal p ₀ (t) 718 may be composed of a combination of synchronization signal sections 710, 711, ..., 717 generated based on Equation 27. The synchronization signal p ₁ (t) 728 may be composed of a combination of synchronization signal sections 720, 721, ..., 727 generated based on Equation 27. The synchronization signal p ₂ (t) 738 may be composed of a combination of synchronization signal sections 730, 731, ..., 737 generated based on Equation 27. The synchronization signal p ₃ (t) 748 may be composed of a combination of synchronization signal sections 740, 741, ..., 747 generated based on Equation 27.

Meanwhile, in one embodiment of the communication system, the synchronization signal set W may be generated based on the synchronization signal element set Λ including a plurality (for example, four) synchronization signal elements as shown in Equation 27.

Equation 24, Equation 26, and Equation 27 can be seen as expressing embodiments in which the matrix A _i and matrix X i applied to each synchronization signal p _i (t) are all the same. However, this is only an example for convenience of explanation, and embodiments of the communication system are not limited thereto. For example, in another embodiment of the communication system, the synchronization signal set W may be generated based on equations in which the matrix A _i and/or the matrix X i applied to each synchronization signal p _i (t) are different, as shown in Equation 28. .

Figure 8 is a conceptual diagram for explaining an eighth embodiment of a synchronization signal.

Referring to FIG. 8, the synchronization signal 800 according to the eighth embodiment of the synchronization signal may be configured as a hierarchical synchronization signal. Hereinafter, in describing the eighth embodiment of the synchronization signal with reference to FIG. 8, content that overlaps with that described with reference to FIGS. 1 to 7 may be omitted.

In the first to seventh embodiments of the synchronization signal described with reference to FIGS. 4A to 7, the synchronization signal is generated based on one synchronization signal element (e.g., x(t), etc.), or has the same length in the time domain. It can be viewed as being generated based on a plurality of synchronization signal elements (for example, x _i (t), etc.) having . Meanwhile, in the eighth embodiment of the synchronization signal, the synchronization signal p(t) may be generated based on a plurality of synchronization signal elements x _m,n (t), and a plurality of synchronization signal elements x _m,n (t ), at least some of which may have different lengths in the time domain.

In an eighth embodiment of the synchronization signal, the synchronization signal p(t) 800 may be defined based on one or more synchronization signal portions g·f(t). When there is one synchronization signal portion, one synchronization signal portion may correspond to the synchronization signal p(t) (800). Meanwhile, when there are a plurality of synchronization signal parts, the result of connecting the plurality of synchronization signal parts in the time domain may correspond to the synchronization signal p(t)(800). FIG. 8 shows an embodiment in which the synchronization signal p(t) (800) is generated based on one synchronization signal portion. However, the eighth embodiment of the synchronization signal is not limited to this.

The length of the synchronization signal p(t) (800) in the time domain can be expressed as L _P . Meanwhile, the length of each synchronization signal portion in the time domain can be expressed as L _S. When there are a plurality of synchronization signal parts, the plurality of synchronization signal parts may have the same length L _S or different lengths.

The synchronization signal p(t) (800) may be generated based on the synchronization signal element set Λ . The synchronization signal element set Λ may include a plurality of synchronization signal elements x _m,n (t). As one or more synchronization signal sections generated based on one or more synchronization signal elements x _m,n (t) are connected in the time domain, the length of the synchronization signal p(t) (800) in the time domain A synchronization signal section bundle having the same length can be generated. For example, the synchronization signal element set Λ can be expressed the same or similar to Equation 29.

In Equation 29, the length in the time domain of the synchronization signal element x _0,0 (t) may be L _S. The synchronization signal section a _0,0 ·x _0,0 (t) (811), defined based on the synchronization signal element x 0,0 (t) _, has a length equal to the length L _S of one synchronization signal portion in the time domain. You can have it. One synchronization signal section a _0,0 ·x _0,0 (t) 811 can be viewed as corresponding to the first synchronization signal section bundle 810.

The length of the synchronization signal elements x _1,0 (t), x _1,1 (t) in the time domain may be (1/2)L _S. Two synchronization signal sections defined based on synchronization signal elements x _1,0 (t), x _1,1 (t) a _1,0 ·x _1,0 (t) (821), a _1,1 ·x _1,1 (t) 822 may each have a length corresponding to 1/2 of the length L _S of one synchronization signal portion in the time domain. The second synchronization signal section bundle 820, which is the result of concatenating two synchronization signal sections in the time domain, may have a length equal to the length L _S of the synchronization signal portion in the time domain.

The length of the synchronization signal elements x _2,0 (t), x _2,1 (t), and x _2,2 (t) in the time domain may be (1/3)L _S. Three synchronization signal sections a _{2,0 ·x 2,0} (t ₎ defined based on synchronization signal elements x _2,0 (t), x _2,1 (t), x _2,2 (t) (831), a _2,1 ·x _2,1 (t)(832), a _2,2 ·x _2,2 (t)(833) are 1/ of the length L _S of the synchronization signal portion in the time domain, respectively. It can have a length equivalent to 3. The third synchronization signal bundle 830, which is the result of concatenating three synchronization signal sections in the time domain, may have a length equal to the length L _S of the synchronization signal portion in the time domain.

The length in the time domain of the synchronous signal elements x _3,0 (t), x _3,1 (t), x _3,2 (t), x _3,3 (t) is (1/4) L _S days. You can. Four synchronization signal sections a _3,0 defined based on synchronization signal elements x _3,0 (t), x _3,1 (t), x _3,2 (t), x _3,3 (t) ·x _3,0 (t)(841), a _3,1 ·x _3,1 (t)(843), a _3,3 ·x _3,3 (t)(844) are each synchronization signal in the time domain It can have a length equivalent to 1/4 of the length of the part, L _S. The fourth synchronization signal bundle 840, which is the result of concatenating four synchronization signal sections in the time domain, may have a length equal to the length L _S of the synchronization signal portion in the time domain.

One or more synchronization signal portions may be generated by adding one or more synchronization signal section bundles generated based on one or more synchronization signal sections. For example, a plurality of synchronization signal section bundles 810 based on a plurality of synchronization signal elements (811, 821, 822, 831, 832, 833, 841, 842, 843, 844). , 820, 830, 840) can be generated. By adding a plurality of synchronization signal section bundles 810, 820, 830, and 840, a synchronization signal portion g·f(t) 800 can be generated. Since there is only one synchronization signal portion, the synchronization signal portion 800 generated in this way may correspond to the synchronization signal p(t).

In the embodiment shown in FIG. 8, vector g , matrix A , matrix

Figure 9 is a conceptual diagram for explaining the ninth embodiment of a synchronization signal.

Referring to FIG. 9, the synchronization signal 900 according to the ninth embodiment of the synchronization signal may be configured as a hierarchical synchronization signal. Hereinafter, in describing the ninth embodiment of the synchronization signal with reference to FIG. 9, content that overlaps with that described with reference to FIGS. 1 to 8 may be omitted.

In one embodiment of a communication system, a synchronization signal may be generated based on a set of synchronization signal elements Λ . One or more synchronization signal sections may be generated based on the synchronization signal element set Λ . One or more synchronization signal portions may be generated based on one or more synchronization signal sections. One or more synchronization signal parts may be connected or combined to generate a synchronization signal.

In the first to eighth embodiments of the synchronization signal described with reference to FIGS. 4A to 8, when the synchronization signal is generated based on a plurality of synchronization signal parts, the plurality of synchronization signal parts do not overlap each other in the time domain. A synchronization signal can be generated by being connected (or combined). Meanwhile, in the ninth embodiment of the synchronization signal, when a synchronization signal is generated based on a plurality of synchronization signal parts, a synchronization signal may be generated by partially overlapping and combining some or all of the plurality of synchronization signal parts. there is.

In the embodiment shown in FIG. 9, the synchronization signal 900 may be generated based on N synchronization signal portions 910, 911, ..., 912. Here, N may be a natural number greater than 1. The values of each of the N synchronization signal parts (910, 911, ..., 912) are g[0]·f ₀ (t), g[1]·f ₁ (t), ..., g[ It may be N-1]·f _N-1 (t). When the synchronization signal 900 is generated based on the N synchronization signal portions 910, 911, ..., 912, some of the N synchronization signal portions 910, 911, ..., 912 or The synchronization signal 900 can be generated by combining all of them with some overlap with each other. Here, summation may be performed on sections where synchronization signal portions overlap each other. Alternatively, in a section where synchronization signal parts overlap each other, at least one of the two overlapping synchronization signal parts may not have an actual information value. Expressed differently, sections of the synchronization signal parts that do not have actual information values may be controlled to overlap.

Figure 10 is a conceptual diagram for explaining a first embodiment of a cross-correlator.

Referring to FIG. 10, in a communication system, a transmitting device may transmit a synchronization signal other than a hierarchical synchronization signal (hereinafter, a non-layered synchronization signal). The transmitting device may transmit a non-hierarchical synchronization signal p(t). The receiving device can receive the synchronization signal transmitted from the transmitting device. The receiving device may receive a non-hierarchical synchronization signal based on a cross-correlator that is the same or similar to that shown in FIG. 10. Hereinafter, in describing the first embodiment of the cross-correlator with reference to FIG. 10, content that overlaps with that described with reference to FIGS. 1 to 9 may be omitted.

In one embodiment of the communication system, information about the hierarchical synchronization signal p(t) may be shared in advance between the transmitting device and the receiving device. The receiving device can convert the synchronization signal p(t) to be detected into a digital signal p[n] consisting of N _p samples using an analog-to-digital converter (ADC).

The receiving device may input the correlator input 1001 to the crosscorrelator 1000. Here, the correlator input 1001 may refer to a signal received and/or demodulated by the receiving device. When the correlator input 1001 is input to the crosscorrelator 1000, the crosscorrelator 1000 may output a correlator output 1002.

The cross-correlator 1000 may perform a cross-correlation operation based on the signal p[n] on the correlator input 1001. In order to perform a cross-correlation operation based on a signal p[n] consisting of N _p samples, the crosscorrelator 1000 includes at least N _p memories 1020, N _p multipliers 1030, and 1 adder. It may include unit 1040.

Figure 11 is a conceptual diagram for explaining a second embodiment of a cross-correlator.

Referring to FIG. 11, in a communication system, a transmitting device can transmit a synchronization signal. The receiving device can receive a synchronization signal. In order to easily receive a synchronization signal, the receiving device may include the same or similar crosscorrelator as shown in FIG. 11. Hereinafter, in describing the second embodiment of the cross-correlator with reference to FIG. 11, content that overlaps with that described with reference to FIGS. 1 to 10 may be omitted.

In one embodiment of the communication system, the receiving device converts the synchronization signal p(t) into a digital signal p[n] (n=n=N _p samples) using an analog-to-digital converter (ADC). 0, 1, ..., N _p -1). In this case, the signal p[n] can be expressed as Equation 31.

In Equation 31, N _p may be a natural number meaning the number of samples of the digital signal p[n]. The crosscorrelator 1100 may use the converted signal p[n] to perform an operation to detect a component corresponding to the synchronization signal p(n) in the received signal.

The receiving device may input a correlator input 1101 to the crosscorrelator 1100. Here, the correlator input 1101 may be a signal received and/or demodulated by the receiving device. The cross-correlator 1100 may perform a cross-correlation operation based on the signal p[n] (n=0, 1, ..., N _p -1) with respect to the correlator input 1101. Cross-correlator 1100 may output a correlator output 1102.

In one embodiment of a communication system, a receiving device may receive a non-hierarchical synchronization signal transmitted from a transmitting device. In this case, the receiving device may detect the received non-hierarchical synchronization signal based on a cross-correlator that is the same or similar to the first embodiment of the cross-correlator described with reference to FIG. 10. If otherwise needed, if the crosscorrelator 1100 is configured identically or similarly to the crosscorerator 1000 described with reference to FIG. 10, the receiving device may detect a non-hierarchical synchronization signal using the crosscorrelator 1100. You can.

Meanwhile, in one embodiment of the communication system, a receiving device may receive a hierarchical synchronization signal transmitted from a transmitting device. In this case, the receiving device can detect the received hierarchical synchronization signal based on the same or similar synchronization signal detectors as in the first to third embodiments of the synchronization signal detector described with reference to FIGS. 13 to 15. there is. Alternatively, when the cross-correlator 1100 is included in any one of the synchronization signal detectors shown in FIGS. 13 to 15, the receiving device uses the synchronization signal detector including the cross-correlator 1100 to detect the hierarchical synchronization signal. can be detected.

Figure 12 is a conceptual diagram for explaining the tenth embodiment of a synchronization signal.

Referring to FIG. 12, the synchronization signal according to the tenth embodiment of the synchronization signal may be configured as a hierarchical synchronization signal. Hereinafter, in describing the tenth embodiment of the synchronization signal with reference to FIG. 12, content that overlaps with that described with reference to FIGS. 1 to 11 may be omitted.

A hierarchical synchronization signal may be generated based on one or more synchronization signal elements that are elements of a synchronization signal element set Λ . For example, based on the synchronization signal elements x _m,n (t) and the corresponding coefficients a _m,n (t), a synchronization signal section a _m,n ·x _m,n (t) 1201 is generated. It can be. Additionally, f _n (t) may be generated based on the combination of one or more synchronization signal sections including a _m,n ·x _m,n (t) (1201). Based on the generated f _n (t) and the corresponding coefficient g[n], the nth synchronization signal part g[n]·f _n (t) 1200 may be generated. As one or more synchronization signal portions are connected (or combined), a synchronization signal may be generated.

Expressed differently, the synchronization signal can be generated based on N synchronization signal portions. Among the N synchronization signal parts, the nth synchronization signal part g[n]·f _n (t) (1200) may be generated based on the M synchronization signal sections. Among the M synchronization signal sections, the m synchronization signal section a _m,n ·x _m,n (t) (1201) is based on the synchronization signal element x _m,n (t), which is an element of the synchronization signal element set Λ . can be created.

In one embodiment of the communication system, the synchronization signal received by the receiving device may have the same or similar structure as the tenth embodiment of the synchronization signal shown in FIG. 12. The receiving device may include a synchronization signal detector to detect the received synchronization signal. The synchronous signal detector may include one or more crosscorrelator modules. Each of the one or more crosscorrelator modules may be configured to perform an operation for detection of a specific synchronization signal element, a specific synchronization signal section, a specific synchronization signal section set, or a specific synchronization signal portion. For example, Figure 13 shows a cross-correlator module configured to perform a detection operation corresponding to a synchronization signal element x _m,n (t) or a synchronization signal section a _m,n ·x _m,n (t) (1201). An embodiment can be seen as shown.

Figure 13 is a conceptual diagram for explaining a first embodiment of a synchronization signal detector.

Referring to FIG. 13, the synchronization signal detector according to the first embodiment of the synchronization signal detector may be configured to detect a hierarchical synchronization signal. The synchronization signal detector may be configured to detect a hierarchical synchronization signal according to at least one of the first to ninth embodiments of the synchronization signal described with reference to FIGS. 4A to 9. For this purpose, the synchronization signal detector may include one or more crosscorrelator modules. Each crosscorrelator module may be configured identically or similarly to the structure shown in FIG. 13 . Hereinafter, in describing the first embodiment of the synchronization signal detector with reference to FIG. 13, content that overlaps with that described with reference to FIGS. 1 to 12 may be omitted.

Each of one or more cross-correlator modules included in the synchronization signal detector may include a cross-correlator 1300. A correlator input 1301 may be input to the crosscorrelator 1300 of the crosscorrelator module. The crosscorrelator module may perform an operation based on the structure of the crosscorrelator module and output a correlator output 1302.

Specifically, information about at least some of the vector g , matrix A , matrix X , and synchronization signal element set Λ for generating a hierarchical synchronization signal may be shared in advance between the transmitting device and the receiving device. The receiving device uses the synchronization signal element x _m,n (t), which is an element of the synchronization signal element set Λ , and uses an ADC to convert a digital signal x _m,n [k] (k=0, 1, ..) consisting of K samples. ., K-1). The signal x _m,n [k] can also be expressed as x _mn [k]. The synchronization signal detector of the receiving device may use the converted signal x _m,n [k] to perform an operation to detect a component corresponding to the synchronization signal element x _m,n (t) in the received signal.

The receiving device may input the correlator input 1301 to the crosscorrelator 1300 included in the synchronization signal detector. Here, the correlator input 1301 may refer to a signal received and/or demodulated by the receiving device. The cross-correlator 1300 may perform a cross-correlation operation based on the signal x _m,n [k] on the correlator input 1301.

The signal output from the crosscorrelator 1300 may be input to a multiplier or may be operated on one or more sample delays. Specifically, the crosscorrelator module may include one or more K-sample delays Z ^-K (1310). Each of the one or more K-sample delays Z ^-K (1310) may be composed of K sample delays Z ^-1 (1340). The signal output from the crosscorrelator 1300 may be input to the first multiplier 1350 through n K-sample delays Z ^-K (1310). In the first multiplier 1350, coefficients a _{m, n} (t) may be multiplied. The signal output from the multiplier 1350 may be input to the adder 1320. In the adder 1320, one or more signals output from the multipliers of each of one or more crosscorrelator modules may be added. The output of the adder 1320 may be input to the second multiplier 1330. In the second multiplier 1330, the coefficient g[n] may be multiplied. The signal output from the second multiplier 1330 may correspond to the output of the crosscorrelator module (i.e., correlator output 1302).

The crosscorrelator module according to the first embodiment of the synchronization signal detector shown in FIG. 13 may correspond to the synchronization signal section a _m,n ·x _m,n (t) 1201 described with reference to FIG. 12. The crosscorrelator module shown in FIG. 13 may perform operations for detection (or recovery) on the synchronization signal section a _m,n ·x _m,n (t) 1201. Based on the correlator output 1302 output from the cross-correlator module, detection (or restoration) of the synchronization signal section a _m,n ·x _m,n (t) 1201 may be performed.

Figure 14 is a conceptual diagram for explaining a second embodiment of a synchronization signal detector.

Referring to FIG. 14, a synchronization signal detector according to a second embodiment of the synchronization signal detector may be configured to detect a hierarchical synchronization signal. The synchronization signal detector may be configured to detect a hierarchical synchronization signal according to at least one of the first to ninth embodiments of the synchronization signal described with reference to FIGS. 4A to 9. For this purpose, the synchronization signal detector may include one or more crosscorrelator modules. FIG. 14 shows an embodiment of a synchronization signal detector structure including a plurality of cross-correlator modules. Hereinafter, in describing the second embodiment of the synchronization signal detector with reference to FIG. 14, content that overlaps with that described with reference to FIGS. 1 to 13 may be omitted.

In a second embodiment of a synchronous signal detector, the synchronous signal detector may include a plurality of crosscorrelator modules. When J is a natural number greater than 1, the synchronous signal detector may include J cross-correlator modules. A synchronization signal detector including J crosscorrelator modules can detect a synchronization signal generated using J synchronization signal elements.

In the embodiment shown in Figure 14, the sync signal detector may include a first crosscorrelator module and a second crosscorrelator module. The first crosscorrelator module may include a first crosscorrelator (1400-1), a first multiplier (1431), a second multiplier (1432), a first K-sample delay (1441), and a first adder (1451). there is. The second crosscorrelator module may include a second crosscorrelator (1400-2), a third multiplier (1433), a fourth multiplier (1434), a second K-sample delay (1442), and a second adder (1452). there is.

Specifically, information about at least some of the vector g , matrix A , matrix X , and synchronization signal element set Λ for generating a hierarchical synchronization signal may be shared in advance between the transmitting device and the receiving device. The receiving device converts the synchronization signal elements x ₁ (t) and x ₂ (t), which are elements of the synchronization signal element set Λ , into digital signals x ₁ [k] and x ₂ [k] consisting of K samples using an ADC. It can be converted to . The synchronization signal detector of the receiving device uses the first and second crosscorrelator modules and the converted signals x ₁ [k] and x ₂ [k] to detect synchronization signal elements x ₁ (t) and An operation can be performed to detect the component corresponding to x ₂ (t).

The receiving device may input the correlator input 1401 to the first cross correlator 1400-1 and the second cross correlator 1400-2 included in the synchronization signal detector. Here, the correlator input 1401 may refer to a signal received and/or demodulated by the receiving device. The first cross-correlator 1400-1 may perform a cross-correlation operation based on the signal x ₁ [k] with respect to the correlator input 1401. The second cross-correlator 1400-2 may perform a cross-correlation operation based on the signal x ₂ [k] with respect to the correlator input 1401.

The synchronization signal detector may further include a third adder 1453 to perform a sum operation on the signals output from the first and second crosscorrelator modules. In the synchronous signal detector shown in FIG. 14, signals output from the cross-correlator modules may be added in an adder 1453 and then output as a correlator output 1402.

The synchronization signal detector according to the second embodiment of the synchronization signal detector can effectively detect a synchronization signal generated based on a plurality of synchronization signal elements (eg, x ₁ (t), x ₂ (t)).

Figure 15 is a conceptual diagram for explaining a third embodiment of a synchronization signal detector.

Referring to FIG. 15, a synchronization signal detector according to a third embodiment of the synchronization signal detector may be configured to detect a hierarchical synchronization signal. The sync signal detector may include one or more crosscorrelator modules. FIG. 15 shows an embodiment of a synchronization signal detector structure including one crosscorrelator module. Hereinafter, in describing the third embodiment of the synchronization signal detector with reference to FIG. 15, content that overlaps with that described with reference to FIGS. 1 to 14 may be omitted.

In a third embodiment of a sync signal detector, the sync signal detector may include one or more crosscorrelator modules. A synchronization signal detector including one crosscorrelator module may perform operations to detect a synchronization signal generated based on one synchronization signal element (e.g., x(t)). Meanwhile, as in the second embodiment of the synchronization signal detector described with reference to FIG. 14, the synchronization signal detector including a plurality of crosscorrelator modules detects a plurality of synchronization signal elements (e.g., x ₁ (t), x ₂ ( An operation can be performed to detect the synchronization signal generated based on t)). FIG. 15 shows an embodiment in which the synchronization signal detector includes one crosscorrelator module. However, this is only an example for convenience of explanation, and the third embodiment of the synchronization signal detector is not limited to this.

In a third embodiment of the synchronization signal detector, the synchronization signal detector may perform an operation to detect a synchronization signal set W consisting of one or more synchronization signals. Alternatively, the synchronization signal detector determines that the received synchronization signal includes any synchronization signal among one or more synchronization signals p _i (t) (i = 0, 1, ..., N _W -1) constituting the synchronization signal set W. An operation can be performed to detect whether the Here, the synchronization signal set W may be the same or similar to the synchronization signal set W described with reference to FIG. 6 or the synchronization signal set W described with reference to FIG. 7 .

Specifically, between the transmitting device and the receiving device, information on at least some of the vector g , matrix A , matrix The receiving device uses the synchronization signal element x(t), which is an element of the synchronization signal element set Λ , and uses an ADC to generate a digital signal x[k] (k=0, 1, ..., K-1) consisting of K samples. It can be converted to . The synchronization signal detector of the receiving device may use the converted signal x[k] to perform an operation to detect a component corresponding to the synchronization signal element x(t) in the received signal.

The receiving device may input the correlator input 1501 to the crosscorrelator 1500 included in the synchronization signal detector. Here, the correlator input 1501 may refer to a signal received and/or demodulated by the receiving device. The cross-correlator 1500 may perform a cross-correlation operation based on the signal x[k] on the correlator input 1501.

In the embodiment shown in FIG. 15, the number N _W of elements of the synchronization signal set W may be 4. The synchronization signal set W may include four synchronization signals p ₀ (t), p ₁ (t), p ₂ (t), and p ₃ (t). The signal y(t) output from the crosscorrelator 1500 may be input to a multiplier, sample delay, adder, etc. For example, the crosscorrelator module has three multipliers (1531, 1532, 1533), three K-sample delays Z ^-K (1541, 1542, 1543), four adders (1551, 1552, 1553, 1554), etc. may include.

The signal y(t) output from the crosscorrelator 1500 may be input to the first and fourth adders 1551 and 1554, respectively. Meanwhile, the signal y(t) output from the crosscorrelator 1500 may be input to the first multiplier 1531 that performs a '-1' multiplication operation. The signal -y(t) that has undergone the '-1' multiplication operation in the first multiplier 1531 may be input to the second and third adders 1552 and 1553, respectively.

Meanwhile, the signal y(t) output from the crosscorrelator 1500 may be input to the first K-sample delay 1541 that performs a delay operation for K samples. The signal y(t+K) that has undergone the delay operation in the first K-sample delay 1541 may be input to the first and second adders 1551 and 1552, respectively. Meanwhile, the signal y(t+K) that has undergone the delay operation in the first K-sample delay 1541 may be input to the second multiplier 1532 that performs a '-1' multiplication operation. The signal -y(t+K) that has undergone the '-1' multiplication operation in the second multiplier 1532 may be input to the third and fourth adders 1553 and 1554, respectively.

Meanwhile, the signal y(t+K), which has undergone a delay operation in the first K-sample delay 1541, may be input to the second K-sample delay 1542, which performs a delay operation for K samples. The signal y(t+2K) that has undergone the delay operation in the second K-sample delay 1542 may be input to the first and third adders 1551 and 1553, respectively. Meanwhile, the signal y(t+2K) that has undergone the delay operation in the second K-sample delay 1542 may be input to the third multiplier 1533 that performs a '-1' multiplication operation. The signal -y(t+2K) that has undergone the '-1' multiplication operation in the third multiplier 1533 may be input to the second and third adders 1552 and 1553, respectively.

Meanwhile, the signal y(t+2K) that has undergone the delay operation in the second K-sample delay 1542 may be input to the third K-sample delay 1543 that performs a delay operation for K samples. The signal y(t+3K) that has undergone the delay operation in the third K-sample delay 1543 may be input to each of the first to fourth adders 1551, 1552, 1553, and 1554.

The first to fourth adders 1551, 1552, 1553, and 1554 may perform addition operations on input signals. Each of the first to fourth adders 1551, 1552, 1553, and 1554 can output the result of an addition operation. Output Y 1 (t) of the first adder 1551, output Y ₂ (t) _{of the second adder 1552, output Y 3 (} t) of the third adder 1553, output of the fourth adder 1554. Y ₄ (t) may be the same or similar to Equation 32.

Based on the output of each of the first to fourth adders (1551, 1552, 1553, and 1554) expressed as Equation 32, which synchronization signal does the received signal include among the elements of the synchronization signal set W ? can be detected.

According to an embodiment of a method and device for transmitting and receiving a synchronization signal with a hierarchical structure in a communication system, a transmitting device generates and transmits a synchronization signal with a hierarchical structure (or multi-layered structure) (hereinafter, a layered synchronization signal). You can. A hierarchical synchronization signal may be generated based on a synchronization signal element set consisting of one or more types of synchronization signals (hereinafter, synchronization signal elements). The transmitting device may generate a hierarchical synchronization signal based on a combination (eg, linear combination) of one or more synchronization signal elements included in the synchronization signal element set. The hierarchical synchronization signal generated in this way can simultaneously have the advantages of various types of synchronization signals. Accordingly, synchronization performance, estimation performance, etc. based on the synchronization signal can be improved.

However, the effects that can be achieved by embodiments of the method and device for transmitting and receiving a synchronization signal with a hierarchical structure in a communication system are not limited to those mentioned above, and other effects not mentioned may be achieved through the configuration described in the specification of the present disclosure. From these, the present disclosure can be clearly understood by those skilled in the art.

The operation of the method according to the present disclosure can be implemented as a computer-readable program or code on a computer-readable recording medium. Computer-readable recording media include all types of recording devices that store information that can be read by a computer system. Additionally, computer-readable recording media can be distributed across networked computer systems so that computer-readable programs or codes can be stored and executed in a distributed manner.

Additionally, computer-readable recording media may include hardware devices specially configured to store and execute program instructions, such as ROM, RAM, flash memory, etc. Program instructions may include not only machine language code such as that created by a compiler, but also high-level language code that can be executed by a computer using an interpreter, etc.

Although some aspects of the disclosure have been described in the context of an apparatus, it may also refer to a corresponding method description, where a block or device corresponds to a method step or feature of a method step. Similarly, aspects described in the context of a method may also be represented by corresponding blocks or items or features of a corresponding device. Some or all of the method steps may be performed by (or using) a hardware device, such as a microprocessor, programmable computer, or electronic circuit, for example. In some embodiments, at least one or more of the most important method steps may be performed by such an apparatus.

Programmable logic devices (e.g., field programmable gate arrays) may be used to perform some or all of the functionality of the methods described in this disclosure. A field-programmable gate array may operate in conjunction with a microprocessor to perform one of the methods described in this disclosure. In general, the methods are preferably performed by some hardware device.

Although the present disclosure has been described above with reference to preferred embodiments, those skilled in the art may modify and change the present disclosure in various ways without departing from the spirit and scope of the present disclosure as set forth in the claims below. You will understand that it is possible.

Claims (20)

A method of operating a first communication device, comprising:
identifying one or more synchronization signal components constituting a synchronization signal element set;
generating a plurality of synchronization signal sections based on the one or more synchronization signal elements and a plurality of primary coefficients corresponding to the one or more synchronization signal elements;
generating one or more synchronization signal parts based on combining the plurality of synchronization signal sections;
generating one or more synchronization signals based on a combination in the time domain of the one or more synchronization signal portions; and
Transmitting the generated one or more synchronization signals,
Method of operating a first communication device. In claim 1,
The synchronization signal element set has J synchronization signal elements as elements,
The step of generating the plurality of synchronization signal sections includes:
determining a first synchronization signal element matrix using the J synchronization signal elements;
determining a first primary coefficient matrix having the same size as the first synchronization signal element matrix and consisting of the plurality of primary coefficients; and
Generating the plurality of synchronization signal sections by multiplying corresponding elements in the first synchronization signal element matrix and the first primary coefficient matrix,
Wherein J is a natural number greater than or equal to 1,
Method of operating a first communication device. In claim 1,
Each of the plurality of synchronization signal sections corresponds to one of first to Nth time intervals distinct from each other in the time domain,
Generating the one or more synchronization signal portions includes:
For each of the first to Nth time intervals, performing sum operations between synchronization signal sections corresponding to each of the first to Nth time intervals among the plurality of synchronization signal sections; and
Based on the results of the sum operations corresponding to each of the first to N-th time intervals, generating first to N-th synchronization signal portions corresponding to the first to N-th time intervals; ,
where N is a natural number greater than or equal to 1,
Method of operating a first communication device. In claim 3,
The step of generating the first to Nth synchronization signal portions includes:
Confirming first to Nth secondary coefficients corresponding to each of the first to Nth time intervals;
Performing multiplication operations between the results of the sum operations corresponding to each of the first to Nth time intervals and the first to Nth secondary coefficients corresponding to each of the first to Nth time intervals. ; and
Comprising the step of obtaining the first to Nth synchronization signal portions corresponding to the results of the multiplication operations corresponding to each of the first to Nth time intervals,
Method of operating a first communication device. In claim 4,
The first to Nth secondary coefficients are determined by elements constituting a specific row or specific column of a Walsh matrix having a size of N × N,
Method of operating a first communication device. In claim 1,
The plurality of synchronization signal sections have different lengths in the time domain,
Generating the one or more synchronization signal portions includes:
classifying the plurality of synchronization signal sections into first to Mth section groups;
connecting one or more synchronization signal sections included in each of the first to Mth section groups to each other in the time domain to generate first to Mth synchronization signal section bundles; and
generating the one or more synchronization signal portions based on a sum operation on the first to Mth synchronization signal section bundles;
The M is a natural number greater than 1,
Method of operating a first communication device. In claim 1,
The one or more synchronization signals include one first synchronization signal,
Generating the one or more synchronization signals includes:
Containing generating the first synchronization signal by connecting all of the one or more synchronization signal parts without overlapping in the time domain,
Method of operating a first communication device. In claim 1,
The number of the one or more synchronization signals is K,
The first to Kth synchronization signals generated based on the step of generating one or more synchronization signals constitute a first synchronization signal set,
K is a natural number,
Method of operating a first communication device. In claim 1,
The one or more synchronization signal portions include first to Nth synchronization signal portions, and the one or more synchronization signals include a second synchronization signal,
Generating the one or more synchronization signals includes:
Generating the second synchronization signal by connecting the first to Nth synchronization signal parts in the time domain,
In the step of generating the second synchronization signal, at least some of the first to Nth synchronization signal parts are connected so that some parts overlap each other,
The N is a natural number greater than 1,
Method of operating a first communication device. As a first communication device,
Includes a processor,
The processor causes the first communication device to:
identify one or more synchronization signal components constituting a synchronization signal element set;
generate a plurality of synchronization signal sections based on the one or more synchronization signal elements and a plurality of primary coefficients corresponding to the one or more synchronization signal elements;
generate one or more synchronization signal parts based on a combination of the plurality of synchronization signal sections;
generate one or more synchronization signals based on a combination in the time domain of the one or more synchronization signal portions; and
operative to cause transmission of the generated one or more synchronization signals,
First communication device. In claim 10,
The synchronization signal element set has J synchronization signal elements as elements,
When generating the plurality of synchronization signal sections, the processor causes the first communication device to:
Using the J synchronization signal elements, determine a first synchronization signal element matrix;
determine a first primary coefficient matrix having the same size as the first synchronization signal element matrix and consisting of the plurality of primary coefficients; and
Operate to further cause to generate the plurality of synchronization signal sections by multiplying corresponding elements in the first synchronization signal element matrix and the first linear coefficient matrix;
Wherein J is a natural number greater than or equal to 1,
First communication device. In claim 10,
Each of the plurality of synchronization signal sections corresponds to one of first to Nth time intervals distinct from each other in the time domain,
When generating the one or more synchronization signal portions, the processor causes the first communication device to:
For each of the first to Nth time intervals, perform sum operations between synchronization signal sections corresponding to each of the first to Nth time intervals among the plurality of synchronization signal sections; and
Based on the results of the sum operations corresponding to each of the first to Nth time intervals, further cause to generate first to Nth synchronization signal portions corresponding to the first to Nth time intervals. It works,
where N is a natural number greater than or equal to 1,
First communication device. In claim 12,
When generating the first to Nth synchronization signal portions, the processor causes the first communication device to:
Checking first to Nth secondary coefficients corresponding to each of the first to Nth time intervals;
performing multiplication operations between the results of the sum operations corresponding to each of the first to Nth time intervals and the first to Nth secondary coefficients corresponding to each of the first to Nth time intervals; and
operative to further cause obtaining the first to Nth synchronization signal portions corresponding to results of the multiplication operations corresponding to each of the first to Nth time intervals,
First communication device. In claim 10,
The plurality of synchronization signal sections have different lengths in the time domain,
When generating the one or more synchronization signal portions, the processor causes the first communication device to:
classify the plurality of synchronization signal sections into first to Mth section groups;
connecting one or more synchronization signal sections included in each of the first to Mth section groups to each other in the time domain to generate first to Mth synchronization signal section bundles; and
operative to further cause generating the one or more synchronization signal portions based on a sum operation on the first to Mth synchronization signal section bundles;
The M is a natural number greater than 1,
First communication device. In claim 10,
The one or more synchronization signals include one first synchronization signal,
When generating the one or more synchronization signals, the processor causes the first communication device to:
operative to further cause to generate the first synchronization signal by connecting all of the one or more synchronization signal portions without overlap in the time domain,
First communication device. In claim 10,
The number of the one or more synchronization signals is K,
The one or more synchronization signals include first to Kth synchronization signals, and the first to Kth synchronization signals constitute a first synchronization signal set,
K is a natural number,
First communication device. In claim 10,
The one or more synchronization signal portions include first to Nth synchronization signal portions, and the one or more synchronization signals include a second synchronization signal,
When generating the one or more synchronization signals, the processor causes the first communication node to:
Operate to further cause generation of the second synchronization signal by connecting the first to Nth synchronization signal portions in the time domain,
When generating the second synchronization signal, at least some of the first to Nth synchronization signal parts are connected so that some parts overlap each other,
The N is a natural number greater than 1,
First communication device. A method of operating a first communication device, comprising:
Receiving one or more synchronization signals transmitted from a second communication device; and
Obtaining synchronization information for the second communication device based on the one or more synchronization signals,
The one or more synchronization signals are generated based on a combination in time of one or more synchronization signal portions generated based on the combination of a plurality of synchronization signal sections in the second communication device,
The plurality of synchronization signal sections include one or more synchronization signal components constituting a synchronization signal element set in the second communication device and a plurality of primary coefficients corresponding to the one or more synchronization signal components. Created based on,
Method of operating a first communication device. In claim 18,
The synchronization signal element set has J synchronization signal elements as elements,
The plurality of synchronization signal sections are generated by multiplying corresponding elements in a first synchronization signal element matrix determined using the J synchronization signal elements and a first primary coefficient matrix composed of the plurality of primary coefficients. And
The J is a natural number greater than or equal to 1, and the first synchronization signal element matrix and the first first coefficient matrix have the same size,
Method of operating a first communication device. In claim 18,
Each of the plurality of synchronization signal sections corresponds to one of first to Nth time intervals distinct from each other in the time domain,
The one or more synchronization signal portions are generated based on results of sum operations between synchronization signal sections corresponding to each of the first to N-th time intervals among the plurality of synchronization signal sections. The first to Nth synchronization signal parts corresponding to N time sections,
where N is a natural number greater than or equal to 1,
Method of operating a first communication device.

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