KR20230133035A - Power stabilization device for rocket projectiles - Google Patents

Abstract

A power stabilization device for a rocket launch vehicle is disclosed. The power stabilization device for a rocket launch vehicle according to an embodiment of the present invention includes a first power input unit connected to the main power source of the rocket launch vehicle, a second power input unit connected to the FTS (Flight Termination System) battery of the rocket launch vehicle, and a first power input unit. and a power output unit that supplies power supplied from any one of the second power input units to the INGU (Inertial Navigation Guidance Unit) of the rocket launch vehicle, and when the power supply through the first power input unit is cut off, the second power input unit powers the second power input unit. It includes an FPGA (Field Programmable Gate Array) unit connected to the output unit.

Description

{POWER STABILIZATION DEVICE FOR ROCKET PROJECTILES}

The present invention relates to a power stabilization device for a rocket launch vehicle, and more specifically, to a power stabilization device for a rocket launch vehicle that can immediately respond to the occurrence of a power abnormality supplied to the INGU of a rocket launch vehicle without complicated additional configuration.

Inertial Navigation System (INGU) is used to detect one's own position and find a target or destination route. It determines direction using a gyro sensor, measures speed using an accelerometer, and integrates the measured value. It works on the principle of finding out one's location.

Inertial navigation devices are often used for military purposes because they can help detect and aim at targets even in places where there are no GPS signals. For example, it is used to improve accuracy in the defense industry such as missiles, self-propelled artillery, and fleets.

In addition, inertial navigation devices were originally developed as missile guidance devices, but in recent years, they have been applied to aircraft, submarines, and ships, and have also become available in everyday life in the form of automobiles, robot vacuum cleaners, and game consoles.

These inertial navigation devices play a very important role in rocket launch vehicles. In order for an inertial navigation system to function properly, it must receive a stable supply of power, but this is not easy to control in a rocket launch vehicle equivalent to an unmanned aerial vehicle.

There are many reasons why problems occur in a rocket launch vehicle, but if something goes wrong for any reason, power may be temporarily cut off inside the rocket. Even if it is momentary, if the inertial navigation system does not operate due to lack of power, it can lead to flight failure of the rocket launch vehicle, which is a very serious problem.

It is possible to configure separate reserve power for the inertial navigation device within the rocket launch vehicle, but due to the nature of the rocket launch vehicle, a configuration that makes the system complex and heavy should be avoided, and there is also the problem of increased cost, making it a difficult choice to make.

Domestic Published Patent No. 10-2009-0082008 (published on July 29, 2009)

The technical problem that the present invention aims to achieve in order to solve the above-mentioned problems is to supply the extra power source of the FTS battery already installed inside the rocket launch vehicle to the INGU when an abnormality occurs in the main power supply that supplies power to the INGU of the rocket launch vehicle, The purpose is to present a power stabilization device for a rocket launch vehicle that can prevent INGU operation errors due to lack of power supply.

The problems of the present invention are not limited to those mentioned above, and other problems not mentioned will be clearly understood by those skilled in the art from the description below.

As a means to solve the above-described technical problem, the power stabilization device for a rocket launch vehicle according to an embodiment of the present invention includes a first power input unit connected to the main power source of the rocket launch vehicle, and an FTS (Flight Termination System) battery of the rocket launch vehicle. A connected second power input unit, a first power input unit, and a power output unit that supplies power supplied from any one of the second power input units to the INGU (Inertial Navigation Guidance Unit) of the rocket launch vehicle, and power through the first power input unit. When the supply is cut off, it includes an FPGA (Field Programmable Gate Array) unit that connects the second power input unit to the power output unit.

Preferably, the first power input unit and the second power input unit may each include a pair of resistors connected in series with each other.

Also preferably, the FPGA unit includes an FPGA element in which the first power input unit and the second power input unit are connected to each input side, and a first switching unit that switches the connection between the first power input unit and the power output unit by control of the FPGA element. , and a second switching unit that switches the connection between the second power input unit and the power output unit by controlling the FPGA element.

Also preferably, the first switching unit may include a first photo coupler connected to the output side of the FPGA device, and a first MOSFET connected to the first photo coupler and the power output unit.

Also preferably, the second switching unit may include a second photo coupler connected to the output side of the FPGA device, and a second MOSFET connected to the second photo coupler and the power output unit.

Also preferably, it may further include a first delay compensation unit interposed between the first switching unit and the power output unit, and a second delay compensation unit interposed between the second switching unit and the power output unit.

Also preferably, the first delay compensation unit and the second delay compensation unit may each include a pair of tantalum capacitors connected in parallel.

According to the present invention, by switching the power of the main power and the FTS battery through a simple circuit configuration including an FPGA element, there is an effect of providing a power stabilization device for a rocket launch vehicle that ensures that the power supplied to the INGU is always maintained in a stable state. .

In addition, by including a tantalum capacitor in the part that outputs power to the INGU, it has the effect of providing a power stabilization device for the rocket launch vehicle that takes into account compensation for time delays in the power switching process of the main power source and the FTS battery.

The effects of the present invention are not limited to those mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the description below.

1 is a block diagram of a power stabilization device for a rocket launch vehicle according to a preferred embodiment of the present invention;
Figure 2 is a detailed circuit diagram of a power stabilization device for a rocket launch vehicle according to a preferred embodiment of the present invention, and
3A and 3B are diagrams for explaining the power supply state of the power stabilization device for a rocket launch vehicle according to a preferred embodiment of the present invention.

The above objects, other objects, features and advantages of the present invention will be easily understood through the following preferred embodiments related to the attached drawings. However, the present invention is not limited to the embodiments described herein and may be embodied in other forms. Rather, the embodiments introduced herein are provided so that the disclosed content will be thorough and complete and so that the spirit of the present invention can be sufficiently conveyed to those skilled in the art.

In this specification, when an element is referred to as being on another element, it means that it may be formed directly on the other element or that a third element may be interposed between them. Additionally, in the drawings, the thickness of components is exaggerated for effective explanation of technical content.

In this specification, when terms such as first, second, etc. are used to describe components, these components should not be limited by these terms. These terms are merely used to distinguish one component from another. Embodiments described and illustrated herein also include complementary embodiments thereof.

Additionally, when a first element (or component) is referred to as being operated or executed on (ON) a second element (or component), the first element (or component) means that the second element (or component) is ON. It should be understood as being operated or executed in an environment in which it is operated or executed, or operated or executed through direct or indirect interaction with a second element (or component).

If any element, component, device, or system is said to contain a component consisting of a program or software, even if explicitly stated, that element, component, device, or system is not intended to allow that program or software to run or operate. It should be understood as including hardware (e.g., memory, CPU, etc.) or other programs or software (e.g., operating system or drivers required to run the hardware) required to run the computer.

In addition, unless specifically stated in the implementation of an element (or component), it should be understood that the element (or component) may be implemented in any form of software, hardware, or software and hardware.

Additionally, the terms used in this specification are for describing embodiments and are not intended to limit the present invention. As used herein, singular forms also include plural forms, unless specifically stated otherwise in the context. As used in the specification, 'comprises' and/or 'comprising' does not exclude the presence or addition of one or more other elements.

1 is a block diagram of a power stabilization device for a rocket launch vehicle according to a preferred embodiment of the present invention.

Referring to Figure 1, the power stabilization device (hereinafter referred to as 'power stabilization device') 10 for a rocket launcher according to a preferred embodiment of the present invention includes a first power input unit 100 and a second power input unit 200. , includes a first delay compensation unit 300, a second delay compensation unit 400, a power output unit 500, and an FPGA unit 600.

The first power input unit 100 is connected to the main power source of the rocket launch vehicle. The main power source of the rocket launch vehicle is provided for the purpose of supplying power to the INGU (Inertial Navigation Guidance Unit), which is responsible for the core control function of the rocket launch vehicle. That is, the first power input unit 100 serves to connect the main power source and the main power stabilization device 10.

The second power input unit 200 is connected to the Flight Termination System (FTS) battery of the rocket launch vehicle. That is, the second power input unit 200 serves to connect the main power stabilization device 10 with an FTS battery that is independently provided separately from the main power source.

If a rocket launcher flies abnormally, it can pose a very serious risk to the ground, and FTS is prepared for this. FTS is a launch vehicle termination system that terminates flight in order to prevent further damage when an emergency situation occurs in a rocket launch vehicle. Therefore, the rocket launch vehicle is equipped with a separate battery dedicated to the operation of the FTS, and this is called an FTS battery.

The first power input unit 100 and the second power input unit 200 have the same structure and correspond to each other. However, there is a difference in that the first power input unit 100 is connected to the main power source, and the second power input unit 200 is connected to the FTS battery.

The first delay compensator 300 and the second delay compensator 400 are used to compensate for time delays that may occur when the power supplied from the main power source and the FTS battery is switched, respectively, and have the same structure corresponding to each other. It is composed.

The first delay compensator 300 and the second delay compensator 400 are disposed adjacent to the power output unit 500, which will be described later. However, there is a difference in that the first delay compensation unit 300 is connected to the first power input unit 100, and the second delay compensation unit 400 is connected to the second power input unit 200.

The power output unit 500 supplies power supplied from either the first power input unit 100 or the second power input unit 200 to the INGU of the rocket launch vehicle. The source of power supplied through the power output unit 500 is controlled by the FPGA unit 600, which will be described later, and the power supplied to the INGU through the power output unit 500 always maintains a stable 28V.

When the power supply through the first power input unit 100 is cut off, the FPGA unit 600 connects the second power input unit 200 to the power output unit 500. More specifically, the FPGA unit 600 does not operate separately when the power supply through the first power input unit 100 is stable, and when it is determined that an abnormality has occurred in the power supply through the first power input unit 100. The connection with the first power input unit 100 is cut off and the second power input unit 200 is connected to control the power output unit 500 to always be supplied with stable power.

In this embodiment, in order to explain the functional operation of the power stabilization device 10, each function is described as a block, but each function can actually be implemented by a circuit. The circuit configuration of this power stabilization device 10 will be described in more detail in FIG. 2.

Figure 2 is a detailed circuit diagram of a power stabilization device for a rocket launch vehicle according to a preferred embodiment of the present invention.

The first power input unit 100 includes a pair of resistors R1 and R2 connected in series with each other. Resistor (R1) is directly connected to the terminal (Power IN1) connected to the main power supply, and resistor (R2) connected in series with resistor (R1) is grounded.

The second power input unit 200 includes a pair of resistors R3 and R4 connected in series with each other. Resistor (R3) is directly connected to the terminal (Power IN2) connected to the FTP battery, and resistor (R4) connected in series with resistor (R3) is grounded.

The first power input unit 100 and the second power input unit 200 have the same structure composed of two resistors connected in series, and are respectively connected to the input side of the FPGA device 610.

The FPGA unit 600 is capable of controlling a path for outputting power input through the first power input unit 100 and the second power input unit 200 to the power output unit 500, and includes the FPGA element 610, It includes a first switching unit 620 and a second switching unit 630.

The FPGA device 610 has a first power input unit 100 and a second power input unit 200 connected to its input side, respectively, and a first switching unit 630 and a second switching unit 630 connected to its output side, respectively.

The FPGA device 610 is a semiconductor device that includes a designable logic device and a programmable internal circuit. Designable logic devices can be programmed to replicate the functions of basic logic gates such as AND, OR, XOR, NOT, and more complex combinations of decoder or computational functions.

Using the function of the FPGA device 610, it is possible to check whether the supply state of the main power is stable by receiving a branched signal through the resistors R1 and R2 of the first power input unit 100. Additionally, if the main power supply is not normal, malfunctions can be confirmed at high speed, and the first switching unit 620 can be operated to prevent abnormal main power from being supplied to the INGU. At this time, according to the circuit configuration of the power stabilization device 10, the time required for the FPGA device 610 to check for malfunction of the main power supply is 10 ns, which is very high speed.

In addition, the FPGA element 610 blocks the supply of main power through the first switching unit 620 and then immediately activates the power of the FTP battery through the second switching unit 630 to supply power from the FTP battery. Let this happen.

The first switching unit 620 includes a first photo coupler (U164) and a first MOSFET (Q1). Additionally, one end of the first photo coupler (U164) is connected to the output side of the FPGA element 610 through a resistor (R363), and the other end is connected to the power output unit 500. Additionally, a resistor (R362) is interposed between the first photo coupler (U164) and the first MOSFET (Q1).

The second switching unit 630 includes a second photo coupler (U165) and a second MOSFET (Q24). Additionally, one end of the second photo coupler (U165) is connected to the output side of the FPGA element 610 through a resistor (R364), and the other end is connected to the power output unit 500. Additionally, a resistor (R366) is interposed between the second photo coupler (U165) and the second MOSFET (Q24).

A photo coupler is a device that combines a light-emitting device and a light-receiving device to transmit signals through light as a medium. It is a device that consists of a light-emitting diode and a phototransistor in one package.

If the FPGA device 610 determines that the power supply from the main power supply is abnormal, the FPGA device 610 issues a cut-off command to the first photo coupler (U164) and blocks the cut-off command transmitted to the first photo coupler (U164). By command, the power supplied to the INGU is cut off from the first MOSFET (Q1).

Along with issuing a blocking command to the first photo coupler (U164), the FPGA device 610 issues an activation command to the second photo coupler (U165), and the second photo coupler (U165) is activated by the activation command transmitted to the second photo coupler (U165). By activating the power supply connection at the MOSFET (Q24), power from the FTS battery is supplied to the INGU.

The FPGA unit 600 is a power output unit including a first power input unit 100 and a second power input unit 200 connected to the input side, respectively, and an output terminal (POWER OUT) for supplying power to the INGU on the output side. (500) is connected. At this time, the first delay compensation unit 300 and the second delay compensation unit 400 may be configured between the FPGA unit 600 and the power output unit 500.

The first delay compensation unit 300 includes a pair of tantalum capacitors (C1, C2) connected in parallel with each other. Additionally, the second delay compensation unit 400 includes a pair of tantalum capacitors C3 and C4 connected in parallel with each other.

As previously mentioned, the FPGA device 610 is capable of checking power supply malfunctions at a high speed of about 10 ns. Although the speed of 10ns is very fast, tantalum capacitors (C1 to C4) were configured to compensate for the time delay caused by the time difference in switching from power supply by the main power supply to power supply by the FTS battery.

Tantalum capacitors (C1 to C4) are polarized capacitors that can store high capacitance values, making them very suitable for power compensation due to time delay.

As shown, looking at the circuit configuration of the power stabilization device 10, it can be seen that the upper and lower parts of the drawing with respect to the FPGA element 610 are formed in the same structure and correspond to each other. The elements corresponding to the upper part of the drawing and the elements corresponding to the lower part of the drawing do not operate at the same time, and only one of the elements corresponding to the upper part of the drawing and the elements corresponding to the lower part of the drawing are operated by the activation signal of the FPGA element 610. It works.

This power stabilization device 10 is implemented with a simple circuit structure including an FPGA element 610 as shown in FIG. 2 in order to stabilize the power supplied to the INGU. This circuit structure not only has a simple structure, but also has a small volume, so it can be installed without significantly affecting the internal structure of the rocket launch vehicle.

In addition, rather than including a separate power source to replace the main power supply when an abnormality occurs, it is designed to use the extra power of the FTS battery already included in the rocket launch vehicle, so it can be applied to the internal structure of the rocket launch vehicle, which is sensitive to weight and volume. Very easy.

Generally, the operating voltage of INGU applied to a rocket launch vehicle is 28V, and the current consumption is 0.6A. According to the main power source applied to a typical rocket launch vehicle, INGU is expected to be capable of operating for 10 hours.

In addition, the FTS battery built into the rocket launch vehicle has a maximum current of 30A, and the expected consumption current required when the FTS operates is 12A. It is predicted that FTS can operate for 10 minutes with a typical FTS battery.

When FTS power consumption is analyzed based on these results, Table 1 appears.

FTS power consumption voltage used current consumption quantity total current consumption 28V 4.7A 2 9.9A 28V 0.5A One 9.9A

As shown in Table 1, when the FTS operates, it is analyzed that 9.9A is used for 10 minutes at full load. Accordingly, it can be seen that the FTS battery built into the rocket launch vehicle has about 20% of spare current in addition to the current required for the operation of the FTS. The spare current of this FTS battery corresponds to a capacity that can be safely used as a sole power source for INGU.

According to this principle, the power stabilization device 10 does not have a separate power source for replacement power of the main power source, but uses the equipped FTS battery to cope with situations when a main power failure occurs.

3A and 3B are diagrams for explaining the power supply state of the power stabilization device for a rocket launch vehicle according to a preferred embodiment of the present invention.

FIG. 3A schematically outlines the structure and shows the flow of power supply to explain the power supply state from the main power source 20 or the FTS battery 30 to the INGU 40 by the power stabilization device 10. It is indicated by an arrow, and FIG. 3B shows the voltage state at each point (A to G) indicated in FIG. 3A.

The INGU (40), which performs the core control function of the rocket launch vehicle, receives power from the main power source (20) unless a special event occurs. In this case, power is supplied in the direction of the arrow showing point A, and the normal voltage is +28V.

The FPGA device 610 monitors the power supplied from the main power supply 20, and does not perform any additional operation when a normal voltage of 28V is supplied. If a voltage of +28V is supplied and the voltage drops to 0, an error has occurred.

Accordingly, the FPGA element 610 detects that a power abnormality section has occurred and sends a command to block the main power supply 20 by a voltage of +3.3V in the direction of the arrow indicating point C. According to the blocking command of the main power supply 20, the voltage at point A becomes 0V. In addition, the FPGA device 610 sends an activation command by a voltage of +3.3V in the direction of the arrow indicating point D.

The FPGA element 610 blocks power supply from the main power source 20 and controls power supply from the FTS battery 30. As a result, power is supplied to the INGU 40 in the direction of the arrow indicating point B, and a voltage of +28V is generated at point B.

Finally, the INGU 40 is stably supplied with power by a +28V voltage, regardless of whether it is supplied with power from the main power source 20 or the FTS battery 30. This can be seen by the +28V voltage occurring at all points E, F, and G.

Points E and F in Figure 3b show that a capacitor charge (H) is supplied by the first delay compensator 300 or the second delay compensator 400 when a power abnormality section occurs. , As a result, it can be seen that the voltage finally supplied to the INGU 40 is always +28V.

Overall, if an abnormality occurs in the power supply through the path marked with point A (power abnormality section), the path marked with point A is immediately blocked, and power is supplied through the path marked with point B. Referring to B in FIG. 3B, a stable voltage of +28V is measured through the FTS battery. However, capacitor charging can be used to compensate for the time difference that may occur when switching between the path marked with point A and the path marked with point B. Accordingly, as shown in G of FIG. 3B, the voltage supplied to the INGU 40 is always maintained at +28V.

As described above, in this power stabilization device 10, the power supplied to the INGU is always in a stable state by using the spare power of the FTS battery already provided in the rocket launch vehicle through a simple and compact circuit configuration. Make sure to maintain it.

Those skilled in the art to which the present invention pertains will understand that the present invention can be implemented in other specific forms without changing its technical idea or essential features. Therefore, the embodiments described above should be understood in all respects as illustrative and not restrictive. The scope of the present invention is indicated by the claims described below rather than the detailed description above, and all changes or modified forms derived from the meaning and scope of the claims and their equivalent concepts should be construed as being included in the scope of the present invention. do.

10: Power stabilization device of rocket launch vehicle
100: first power input unit 200: second power input unit
300: first delay compensation unit 400: second delay compensation unit
500: Power output unit 600: FPGA unit

Claims (7)

A first power input connected to the main power source of the rocket launch vehicle;
A second power input unit connected to the Flight Termination System (FTS) battery of the rocket launch vehicle;
A power output unit that supplies power supplied from one of the first power input unit and the second power input unit to an INGU (Inertial Navigation Guidance Unit) of the rocket launch vehicle; and
When the power supply through the first power input unit is cut off, an FPGA (Field Programmable Gate Array) unit that connects the second power input unit to the power output unit. Power stabilization device for a rocket launch vehicle, comprising a. According to claim 1,
A power stabilization device for a rocket launch vehicle, wherein the first power input unit and the second power input unit each include a pair of resistors connected in series with each other. According to claim 1,
The FPGA unit is,
an FPGA device in which the first power input unit and the second power input unit are connected to each input side;
a first switching unit that switches the connection between the first power input unit and the power output unit under control of the FPGA device; and
A power stabilization device for a rocket launch vehicle comprising a second switching unit that switches the connection between the second power input unit and the power output unit by controlling the FPGA element. According to claim 1,
The first switching unit,
a first photo coupler connected to the output side of the FPGA device; and
A power stabilization device for a rocket launch vehicle, comprising: a first photo coupler and a first MOSFET connected to the power output unit. According to claim 1,
The second switching unit,
a second photo coupler connected to the output side of the FPGA device; and
A power stabilization device for a rocket launch vehicle, comprising: a second MOSFET connected to the second photo coupler and the power output unit. According to claim 3,
a first delay compensation unit interposed between the first switching unit and the power output unit; and
A power stabilization device for a rocket launch vehicle, further comprising a second delay compensation unit interposed between the second switching unit and the power output unit. According to claim 6,
A power stabilization device for a rocket launch vehicle, wherein the first delay compensator and the second delay compensator each include a pair of tantalum capacitors connected in parallel.

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