KR20230103873A - Tiling Display Device - Google Patents

Abstract

The tiling display device according to the present embodiment includes a plurality of display modules that are connected to each other through an interface circuit of a serial communication method and display a plurality of module images by dividing input image data constituting one screen, and Check the module identification number according to the connection order, and set the module image coordinate value and image re-matching control information corresponding to the module image for each display module according to the arrangement direction of the control printed circuit board individually provided in each display module. includes a set board that

Description

Tiling display device {Tiling Display Device}

This specification relates to a tiling display device capable of scalability.

A large display can be used in various fields such as indoor and outdoor digital advertising. To meet the demand for a large display, a tiling display device capable of scalability has been proposed. A tiling display device configures a single screen by connecting a plurality of display modules, and has an advantage in that the size of the screen can be adjusted according to the number of connected display modules.

The input image is displayed on a single screen implemented by connecting display modules. The resolution of the input image becomes the sum of resolutions that can be implemented in display modules. Each display module divides and displays an image amount corresponding to its own resolution among the input images. To this end, module identification numbers and module image coordinate values according to connection positions must be set in advance for each display module.

Several methods have been proposed to set module identification numbers and module image coordinate values for each display module. However, according to the existing methods, resources of the display device increase, user convenience is low, and there is a possibility that a connection error may occur due to a worker's mistake.

Accordingly, the present embodiment provides a tiling display device capable of automatically controlling regardless of a connection method, reducing resources of a display device related to setting module identification numbers and module image coordinate values, and enhancing user convenience.

The tiling display device according to the present embodiment includes a plurality of display modules that are connected to each other through an interface circuit of a serial communication method and display a plurality of module images by dividing input image data constituting one screen, and Check the module identification number according to the connection order, and set the module image coordinate value and image re-matching control information corresponding to the module image for each display module according to the arrangement direction of the control printed circuit board individually provided in each display module. includes a set board that

This embodiment has the following effects.

According to this embodiment, when the control printed circuit board is fastened to the lower plate, the arrangement direction and location of the control printed circuit board can be automatically known from the set board. Accordingly, the user does not need to input information related to the arrangement direction and position of the control printed circuit board into the memory whenever the display module is installed or replaced.

Through this, the present embodiment can reduce resources of the display device related to module identification number and module image coordinate value setting, increase user convenience, and prevent errors caused by user mistakes in advance.

Effects according to this embodiment are not limited by the contents exemplified above, and more various effects are included in this embodiment.

1 is a diagram schematically illustrating a tiling display device according to an exemplary embodiment of the present specification.
2 is a diagram showing a connection configuration of one display module included in a tiling display device.
3 and 4 are views showing a micro LED-based display panel.
5 is a schematic equivalent circuit diagram of one pixel included in the display panel.
6 is a diagram showing an interfacing structure of a tiling display device.
7 and 8 are diagrams showing an exemplary configuration in which a module identification number for image segmentation is automatically set in a tiling display device.
9 is a diagram showing a connection structure of first and second option pins of each display module for automatic setting of a module identification number.
10A to 10D are exemplary diagrams illustrating an atypical connection structure between display modules for implementing a tiling display device.
11A is a diagram showing an example in which an input image and an output image are identically matched to a default distribution order in a default arrangement structure of a control printed circuit board.
11B is a diagram showing an example in which an input image and an output image are not identically matched to the default distribution order in the inverted arrangement structure of the control printed circuit board.
12A to 12C are views showing a first embodiment of a connection structure of each display module for automatically recognizing the arrangement direction of a control printed circuit board.
13 and 14 are views showing that the control printed circuit board is connected to the lower plate in a state of being rotated by 0 degrees and 180 degrees from a specific direction, respectively, in one display module according to the first embodiment.
FIG. 15 is a diagram showing logic values of direction recognition pins according to arrangement directions of control printed circuit boards in one display module according to the first embodiment.
16A to 16C are views showing a second embodiment of a connection structure of each display module for automatically recognizing the arrangement direction of a control printed circuit board.
17 to 20 are views showing that a control printed circuit board is connected to a lower plate in a state in which a control printed circuit board is rotated 270 degrees, 90 degrees, 0 degrees, and 180 degrees from a specific direction, respectively, in a display module according to a second embodiment.
21 is a diagram showing logic values of first and second direction recognition pins according to the arrangement direction of a control printed circuit board in one display module according to the second embodiment.
22 and 23 are diagrams illustrating an example in which module image coordinate values of display modules are set based on an arrangement direction of a control printed circuit board in an atypical connection structure between display modules.
24 and 25 are views showing a third embodiment of a connection structure of each display module for automatically recognizing the arrangement direction of a control printed circuit board.
26 and 27 are views showing a fourth embodiment of a connection structure of each display module for automatically recognizing the arrangement direction of a control printed circuit board.
28 to 31 are diagrams showing examples of input/output image matching according to the arrangement direction of the control printed circuit board.
FIG. 32 is a diagram showing input image data of 4K resolution allocated to display modules having the irregular connection structure of FIG. 10A.
FIG. 33 is a diagram showing module image data allocated to first and fifth display modules among the input image data of FIG. 32 .
34 is a diagram showing an automatic control procedure of a tiling display device according to an embodiment of the present specification.

Advantages and features of this specification, and methods of achieving them, will become clear with reference to embodiments described below in detail in conjunction with the accompanying drawings. However, this specification is not limited to the embodiments disclosed below, but will be implemented in various different forms, and only these embodiments make the disclosure of this specification complete, and common knowledge in the art to which this specification belongs. It is provided to completely inform the person who has the scope of the invention, and this specification is only defined by the scope of the claims.

The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of this specification are illustrative, so this specification is not limited to the matters shown. Like reference numbers designate like elements throughout the specification. When 'includes', 'has', 'consists of', etc. mentioned in this specification is used, other parts may be added unless 'only' is used. In the case where a component is expressed in the singular, the case including the plural is included unless otherwise explicitly stated.

In interpreting the components, even if there is no separate explicit description, it is interpreted as including the error range.

In the case of a description of a positional relationship, for example, when the positional relationship of two parts is described as 'on ~', 'upon ~', '~ below', 'next to', etc., 'right' Or, unless 'directly' is used, one or more other parts may be located between the two parts.

Although first, second, etc. may be used to describe various components, these components are not limited by these terms. These terms are only used to distinguish one component from another. Therefore, the first component mentioned below may be the second component within the technical spirit of the present specification.

Hereinafter, embodiments of the present specification will be described in detail with reference to the accompanying drawings. In the following description, if it is determined that a detailed description of a known function or configuration related to the present specification may unnecessarily obscure the gist of the present specification, the detailed description will be omitted.

1 is a diagram schematically illustrating a tiling display device according to an exemplary embodiment of the present specification. 2 is a diagram showing a connection configuration of one display module.

Referring to FIGS. 1 and 2 , the tiling display device 100 according to the present exemplary embodiment includes a set board SET and a plurality of display modules CB. Each display module CB may be referred to as a cabinet.

The display modules CB may be connected to each other through an interface circuit to form a large screen. The total resolution of the large screen may be determined as the sum of unit resolutions of each display module (CB). For example, when one screen is composed of 8 display modules (CB) having a unit resolution of 960*1080, the total resolution of the screen may be 3840*2160. In this case, 3840*2160 is the resolution of input image data, and 960*1080 is the resolution of module image data implemented in one display module (CB).

Each display module CB may be implemented as an electroluminescence display type, a liquid crystal display type, or the like. In the present embodiment, a display module CB implemented as a micro LED-based electroluminescence display type will be exemplified. However, the technical spirit of the present specification is not limited by the implementation method of the display module CB.

The display modules CB execute target operations (eg, module identification number generation, sub-image re-matching, etc.) corresponding to the control command signal input from the set board SET, and feed back the results to the set board SET. In order to do this, they may be connected to each other through a first interface circuit of a bi-directional serial communication method. The first interface circuit may be implemented as a bi-directional multi-chain interface of a feedback loop type between neighboring display modules CB.

Meanwhile, the set board SET may transmit image data for implementing an input image to the display modules CB through the second interface circuit. The second interface circuit is a serial communication type interface circuit, and may be implemented in a V-by-One (Vx1) method capable of high-speed and large-capacity data interfacing.

The set board (SET) checks the module identification number according to the connection order of the display modules (CB), and the arrangement direction of the control printed circuit board (CPCB) individually provided in each display module (CB) and the control printed circuit board Module image coordinate values and image re-matching control information corresponding to the module image may be set for each display module (CB) based on the input/output direction of the module image for (CPCB). Then, each display module CB may separate module image data from input image data based on the module image coordinate value and image re-matching control information, and divide and re-match the module image data into sub image data.

Each display module CB includes a plurality of display panels PNL-A, B, C, and D and display panels PNL-A, B, C, and D for dividing and displaying a module image into sub-images. It may include panel driving circuits for driving, a timing controller (TCON) for controlling the panel driving circuits, and a control printed circuit board (CPCB) for mounting the timing controller (TCON). The control printed circuit board (CPCB) includes a plurality of image output ports (TA, TB, TC, TD) for electrically connecting the timing controller (TCON) and the display panels (PNL-A, B, C, D). can include The image output ports TA, TB, TC, and TD may be connected in parallel to panel driving circuits of the corresponding display module CB through a branch cable CAL.

The timing controller TCON may be connected to a neighboring display module CB or set board SET through first and second interface circuits. The timing controller (TCON) re-matches the image data of sub-images to the image output ports (TA, TB, TC, TD) based on the module image coordinate values and image re-matching control information set in the set board (SET) can do. Through this, image distortion phenomena such as image mixing and image inversion, which occur when the arrangement direction of the control printed circuit board (CPCB) is different from the preset default direction, can be prevented in advance. The default direction may be the same as or different from a specific direction (eg, forward direction) described below. However, the default direction and the specific direction are determined according to design specifications.

The panel driving circuits may be independently connected to each of the plurality of display panels PNL-A, B, C, and D. The panel driving circuits include a source printed circuit board (SPCB) connected to the timing controller (TCON) through a branch cable (CAL), a memory circuit (MEM) mounted on the source printed circuit board (SPCB), and a source printed circuit board (SPCB). A conductive film (COF) electrically connecting the display panel (PNL), a data driver (SIC) bonded on the conductive film (COF), a gate driver and power circuit electrically connected to the source printed circuit board (SPCB). can include

The memory circuit (MEM) is a non-volatile memory that stores panel characteristics, a correction value for gamma setting, a first compensation value for compensating for driving characteristic deviation/color deviation between pixels and adjacent display panels (PNL-A). , B, C, and D) may include a second compensation value for compensating for the deviation of the boundary and various image quality and driving control data. The memory circuit MEM may be a flash memory and/or an EEPROM. Large-capacity data may be stored in flash memory, and low-capacity data may be stored in EEPROM.

Referring to FIGS. 3 and 4 , a pixel array for reproducing an input image is formed on each of the display panels PNL. A plurality of pixels may be disposed in the pixel array, and signal lines for driving the pixels may be disposed. These signal wires include data lines DL for supplying the data voltage Vdata to the pixels, gate lines GL for supplying the gate signal GSIG to the pixels, and power supply voltage to the pixels. It may include power lines for supplying.

Each of the pixels may include a micro LED chip (μLED chip) as a light emitting element EL. Micro LED chips (μLED chips) may include red chips (μLED chip_R), green chips (μLED chip_G), and blue chips (μLED chip_B) positioned on a TFT back plane (Thin Film Transistor Backplane). The R pixel includes a red chip (μLED chip_R) as a light emitting element (EL), the G pixel includes a green chip (μLED chip_G) as a light emitting element (EL), and the B pixel includes a blue chip (μLED chip_B) as a light emitting element. Include as (EL).

Micro LED chips (μLED chips) can be mounted on a TFT back plane by being transferred from R/G/B donors. Red chips (μLED chip_R) are transferred from the R donor (R Donor), green chips (μLED chip_G) are transferred from the G donor (G Donor), and blue chips (μLED chip_B) are transferred from the B donor (B Door). can The transfer technology may use electrostatic force, laser, speed-dependent adhesive force, load-dependent adhesive force, and the like. The transfer technique is not limited thereto, and self-assembly based on electromagnetic force may be used.

The TFT back plane may have an active matrix structure for efficient driving. On the TFT back plane, pixels may be defined by data lines DL, gate lines GL, and power lines.

A plurality of pixels may constitute one unit pixel. For example, along the extension direction of the gate line GL or the extension direction of the data line DL, R (red), G (green), and B (blue) pixels adjacently disposed constitute one unit pixel. can do.

As shown in FIG. 5 , one pixel PXL may include a light emitting element EL, a driving TFT DT, and a node circuit NCON.

The node circuit NCON may be connected to the gate line GL and the data line DL. The node circuit NCON receives the data voltage Vdata from the data line DL and receives the gate signal GSIG from the gate line GL. The node circuit NCON applies the data voltage Vdata to the gate electrode of the driving TFT DT in synchronization with the gate signal GSIG, so that the voltage between the gate and source of the driving TFT DT meets the driving current generation condition. can be set appropriately. The node circuit NCON may include an internal compensation circuit that senses and compensates for the threshold voltage and/or electron mobility of the driving TFT DT.

The driving TFT (DT) is a driving element that generates a driving current in response to a gate-source voltage. The gate electrode of the driving TFT (DT) is connected to the node circuit (NCON), the first electrode (drain electrode) is connected to the high potential pixel power supply (VDD), and the second electrode (source electrode) is connected to the light emitting element (EL). can be connected to

The light emitting element EL is a light emitting element that emits light with an intensity corresponding to the driving current input from the driving TFT DT. The light emitting element EL may be implemented as a micro light emitting diode including an inorganic light emitting layer. A first electrode of the light emitting element EL is connected to the driving TFT (DT), and a second electrode is connected to the low potential pixel power supply (VSS).

Since the connection configuration and operation of one pixel (PXL) is only an example, the technical spirit of the present specification is not limited thereto. For example, the driving TFT (DT) and the node circuit (NCON) may be implemented based on PMOS or NMOS. Also, a plurality of gate lines GL may be connected to the node circuit NCON.

6 is a diagram showing an interfacing structure of a tiling display device according to an exemplary embodiment.

Referring to FIG. 6 , the first interface circuit connecting the set board SET and the first to n th timing controllers TCON#1 to TCON#n of the display modules includes a bi-directional dual SPI (Serial Peripheral interface) can be implemented. Since individual two-way serial communication is possible between the display modules CB by the first interface circuit, a short communication line can be secured, and the speed and reliability of large-capacity data communication through the short communication line can be improved.

To implement bidirectional dual SPI, each of the first to n th timing controllers TCON#1 to TCON#n includes a first master port, a first slave port, a second master port, and a second slave port. can do.

The first master port and the first slave port are for transmitting a control command signal (eg, CMD in FIG. 7 ) to a neighboring timing controller through forward SPI (F-SPI). The second master port and the second slave port are for transferring a control response signal (eg, ACK in FIG. 7 ) to a neighboring timing controller through reverse SPI (R-SPI).

Referring to FIG. 6 , the second interface circuit connecting the set board SET and the first to nth timing controllers TCON#1 to TCON#n of the display modules is unidirectional capable of high-speed and large-capacity data interfacing. It can be implemented as V-by-One (Vx1).

7 and 8 are diagrams showing an exemplary configuration in which module identification numbers for image segmentation are automatically set in the tiling display device according to the present embodiment.

Referring to FIG. 7 , the first to nth timing controllers TCON#1 to TCON#n sequentially generate module identification numbers in response to the control command signal CMD transmitted through the first interface circuit, , the control response signal (ACK) including the generation result is fed back to the set board (SET) through the first interface circuit. This “Auto nID setting process” may be performed in a power-on sequence period. The power-on sequence period may be a time from when operating power is turned on in the tiling display device to before screen output.

The “Auto nID setting process” will be amplified with reference to FIG. 8 as follows.

The control command signal CMD generated by the set board SET may be sequentially updated and transmitted to the first to eighth timing controllers TCON#1 to TCON#8 through forward SPI. 1 A data transmission packet can be divided into a head area (H), a data area (D), and an information area (I), and a control command signal (CMD) for generating a module identification number is located in the head area (H). can do. Each of the timing controllers TCON#1 to TCON#8 generates its own module identification number by checking the automatic nID generation command signal and the nID set value in the head region H. Then, each of the timing controllers TCON#1 to TCON#7 updates the nID set value of the head region H by adding “1” to its own nID value, and then transmits the new nID set value to the next-order timing controller. do.

The control response signal ACK generated by each of the first to eighth timing controllers TCON#1 to TCON#8 may be transmitted to the set board SET through the reverse SPI. The control response signal (ACK) may be located in the head region (H) of one data transmission packet. Each of the timing controllers (TCON#1 to TCON#8) checks the ACK command signal in the head area (H) to generate its own control response signal (ACK), updates it in the head area (H), and sent to the timing controller.

After checking the control response signal (ACK), the set board (SET) terminates the "Auto nID setting process" if there is no problem.

The set board (SET) performs the “Auto Image Coordinate Recognition Process” after the “Auto nID Setting Process” is finished. “Auto image coordinate recognition process” is a process of setting module image coordinate values and image re-matching control information corresponding to module images for each display module according to the arrangement direction of the control printed circuit board individually provided in each display module. “Auto image coordinate recognition process” can also be performed within the power-on sequence section.

9 is a diagram showing a connection structure of first and second option pins of each display module for automatic setting of a module identification number.

Referring to FIG. 9 , the first to nth timing controllers TCON#1 to TCON#n are mounted on the first to nth control printed circuit boards CPCB1 to CPCBn, respectively. Among the first to nth timing controllers TCON#1 to TCON#n, the first timing controller TCON#1 is a first timing controller connected to the set board SET, and the nth timing controller TCON#n ) is the last timing controller. It is preferable that the set board (SET) automatically recognizes the connection positions of at least the first timing control unit (TCON#1) and the n-th timing control unit (TCON#n) for the aforementioned “Auto nID setting process”.

To this end, the first timing controller TCON#1 includes a first option pin S-Pin1 connected to the high logic power supply 3.3V and a second option pin S-Pin2 connected to the high logic power supply 3.3V. can include The set board SET is based on the logical combination of '11' of the first and second option pins S-Pin1 and S-Pin2 for the first timing control unit TCON#1, and the first timing control unit TCON#. It can be recognized that 1) is the first timing controller directly connected to itself.

Also, the nth timing controller TCON#n may include a first option pin S-Pin1 connected to the low logic power supply GND and a floating second option pin S-Pin2. The nth timing controller TCON#n may recognize the floating potential of the second option pin S-Pin2 as a low logic potential. The set board SET is based on the logical combination of the first and second option pins S-Pin1 and S-Pin2 for the n-th timing control unit TCON#n, '00', and the n-th timing control unit TCON#. It can be recognized that n) is the last timing controller.

Meanwhile, except for the first timing controller TCON#1 and the nth timing controller TCON#n, the remaining timing controllers TCON#2 to TCON#n-1 are each connected to the low logic power supply GND. It may include 1 option pin (S-Pin1) and a second option pin (S-Pin2) connected to a high logic power supply (3.3V). The set board SET includes a logical combination of first and second option pins S-Pin1 and S-Pin2 for each of the second to n-1th timing controllers TCON#2 to TCON#n-1, Based on '01', it can be recognized that the second to n−1 th timing controllers (TCON#2 to TCON#n−1) are timing controllers positioned between the first and last timing controllers.

10A to 10D are exemplary diagrams illustrating an atypical connection structure between display modules for implementing a tiling display device.

Referring to FIGS. 10A to 10D , a connection structure between display modules may be irregular depending on a connection position of the set board SET and a system manufacturing method.

The display modules display module images divided from the input image. Control printed circuit boards included in the display modules are electrically connected to each other through an interface cable (CBL). Timing control units (TCON#1 to TCON#8) mounted on control printed circuit boards are connected to panel driving circuits through internal interface lines. The input/output direction of the image data may be designed to be fixed on the control printed circuit board so that the internal interface lines are not twisted when the display modules are connected. That is, based on the control printed circuit board arranged in the forward direction, the image data is input to the timing controller from the left side of the control printed circuit board and output from the timing controller to the right side of the control printed circuit board. Substrates can be designed. Considering the input/output direction of image data to the control printed circuit board and the length of the interface cable (CBL) between neighboring timing controllers, the control printed circuit boards arranged in odd-numbered rows may be arranged in the first direction, excellent The control printed circuit boards disposed in the second row may be disposed in a second direction opposite to the first direction.

For example, in FIG. 10A, the control printed circuit boards (corresponding to TCON#1 to TCON#4) disposed in the first row may be disposed in the forward direction, and the control printed circuit boards disposed in the second row (corresponding to TCON#5 to TCON#8) can be arranged in the reverse direction. The set board (SET) can know the arrangement direction of the control printed circuit board from the logic value information of the direction recognition pin set in the timing controller of the control printed circuit board. The set board (SET) is a module corresponding to the module image according to the module identification numbers (nID 1 to nID 8) assigned to the timing controllers (TCON#1 to TCON#8) and the arrangement direction of the control printed circuit boards. Image coordinate values ((1,1) to (2,4)) and image re-matching control information are set for each display module. When the module image coordinate value is represented by "(a, b)", "a" becomes the row coordinate where the module image is located in the input image, and "b" becomes the column coordinate where the module image is located in the input image. . In this case, the module image coordinate value of (1,1) is set in the first display module having the first timing controller TCON#1, and the fifth display module having the fifth timing controller TCON#5 ( Module image coordinate values of 2 and 4) may be set. When the total resolution of the input image is 3840*2160, the module image coordinate value of (1,1) has a unit horizontal resolution (X) of “1 to 960” and a unit vertical resolution (Y) of “1 to 1080” It represents one module image, and the module image coordinate value of (2,4) represents one module image having a unit horizontal resolution (X) of “2881 to 3840” and a unit vertical resolution (Y) of 1081 to 2160”.

And, in FIG. 10B, the control printed circuit boards (corresponding to TCON#5 to TCON#8) disposed in the first row may be disposed in the forward direction, and the control printed circuit boards (TCON) disposed in the second row Corresponding to #1 to TCON#4) can be arranged in the reverse direction. The set board (SET) can know the arrangement direction of the control printed circuit board from the logic value information of the direction recognition pin set in the timing controller of the control printed circuit board. In this case, module image coordinate values of (2,4) are set in the first display module having the first timing controller TCON#1, and in the fifth display module having the fifth timing controller TCON#5 ( Module image coordinate values of 1,1) may be set. When the total resolution of the input image is 3840*2160, the module image coordinate value of (2,4) has a unit horizontal resolution (X) of “1 to 960” and a unit vertical resolution (Y) of “1 to 1080” It represents one module image, and the module image coordinate value of (1,1) represents one module image having a unit horizontal resolution (X) of “2881 to 3840” and a unit vertical resolution (Y) of 1081 to 2160”.

10C, the control printed circuit boards (corresponding to TCONs#3, 4, 7, and 8) disposed in odd-numbered rows may be disposed in the forward direction, and the control printed circuit boards disposed in even-numbered rows (corresponding to TCONs#1,2,5,6) can be arranged in the reverse direction. The set board (SET) can know the arrangement direction of the control printed circuit board from the logic value information of the direction recognition pin set in the timing controller of the control printed circuit board. In this case, the module image coordinate value of (4,2) is set in the first display module having the first timing controller TCON#1, and the fifth display module having the fifth timing controller TCON#5 ( Module image coordinate values of 2,2) may be set.

In the same way, in FIG. 10D, the module image coordinate value of (2,2) is set in the first timing controller TCON#1, and the module image of (2,1) is set in the second timing controller TCON#2. A coordinate value is set, a module image coordinate value of (1,1) is set in the third timing controller TCON#3, and a module image coordinate value of (1,2) is set in the fourth timing controller TCON#4. can be set.

In FIGS. 10A to 10D , one module image is redistributed to four image output ports installed on a control printed circuit board, so that it is divided and displayed on four display panels. An operation of redistributing 1 module image into 4 sub-images is performed by all timing controllers. The sub-image re-matching operation is performed only in a specific timing control unit in order to prevent an image inversion/mixing phenomenon occurring when module images are redistributed into sub-images. That is, the sub-image re-matching operation is performed according to image re-matching control information input from the set board SET, and targets only control printed circuit boards disposed in a direction different from a preset default direction. Each of the timing controllers mounted on the control printed circuit boards disposed in a direction different from the default direction redistributes one module image to four image output ports differently from the preset default distribution order, thereby preventing image distortion in advance. can

11A is a diagram showing an example in which an input image and an output image are identically matched to a default distribution order in a default arrangement structure of a control printed circuit board. And, FIG. 11B is a diagram showing an example in which an input image and an output image are not identically matched to the default distribution order in the inverted arrangement structure of the control printed circuit board.

11A and 11B, the default direction may be the forward direction.

Referring to FIG. 11A , when a module image MI is input to one display module in which a control printed circuit board (CPCB) is arranged in a default direction, the timing controller TCON divides the module image MI into four sub-images ( A, B, C, D), and the sub-images A, B, C, D are distributed to four output ports according to the default distribution order.

Referring to FIG. 11B, when a module image MI is input to one display module in which the control printed circuit board CPCB is disposed in a direction rotated by 180 degrees from the default direction, the timing controller TCON outputs the module image MI. It is divided into four sub-images (A, B, C, and D), and the sub-images (A, B, C, and D) are distributed to four output ports differently from the default distribution order.

According to the default distribution order, the timing controller TCON outputs the sub-image A to the first display panel PNL-A through the first output port TA, and outputs the sub-image B through the second output port TB. output to the second display panel PNL-B through the third display panel PNL-B, output the sub image C to the third display panel PNL-C through the third output port TC, and output the sub image D to the fourth output port TD. ) through the fourth display panel PNL-D.

According to FIG. 11A , an output image implemented in display panels is equally matched with an input module image MI. That is, the module image MI is displayed on the four display panels as it is input without image inversion or image mixing. Therefore, in the display module in which the control printed circuit board (CPCB) is disposed in the default direction as shown in FIG. 11A, the sub-image re-matching operation does not need to be performed. In this case, image data of sub-images is distributed to the first to fourth output ports TA, TB, TC, and TD in the same default distribution order.

In contrast, according to FIG. 11B , the output image implemented in the display panels does not match the input module image MI. That is, the input module image MI is displayed on the four display panels in an inverted state. Therefore, in the display module in which the control printed circuit board (CPCB) is disposed in a direction rotated by 180 degrees from the default direction as shown in FIG. 11B, a sub-image re-matching operation is required to eliminate image reversal, and the image data of the sub-images is defaulted. Different from the distribution order, it is distributed to the first to fourth output ports TA, TB, TC, and TD. In other words, sub-image A is re-matched to the fourth output port (TD), sub-image B is re-matched to the third output port (TC), and sub-image C is re-matched to the second output port (TB). , the sub image D is re-matched to the first output port TA.

12A to 12C are views showing a first embodiment of a connection structure of each display module for automatically recognizing the arrangement direction of a control printed circuit board. 13 and 14 are views showing that the control printed circuit board is connected to the lower plate in a state of being rotated by 0 degrees and 180 degrees from a specific direction, respectively, in one display module according to the first embodiment. 15 is a diagram showing logic values of direction recognition pins according to the arrangement direction of the control printed circuit board in one display module according to the first embodiment.

Referring to FIGS. 12A to 12C , each display module further includes a lower plate (Lplate) fastened to the rear surface of the control printed circuit board (CPCB).

A timing controller TCON is mounted on the control printed circuit board CPCB. Since the timing controller TCON is fixed on the control printed circuit board CPCB, the arrangement direction of the timing controller TCON changes according to the arrangement direction of the control printed circuit board CPCB. In order to indicate two disposition directions of the control printed circuit board CPCB, a first direction recognition pin D-Pin is provided in the timing controller TCON. The first direction recognition pin D-Pin may indicate two pieces of direction information (eg, forward arrangement direction information and reverse arrangement direction information) having different logical values according to the arrangement direction of the control printed circuit board CPCB.

A plurality of sub-holes FH for fastening with the lower plate Lplate and a first power connection hole DH for connecting to a high logic power supply are formed in the control printed circuit board CPCB. The first power connection hole DH may be formed at a first upper position around an area where the timing controller TCON is mounted. The first power connection hole DH is connected to the first direction recognition pin D-Pin of the timing controller TCON through the first power line PL1 and is connected to the high logic power through the second power line PL2. (3.3V).

Regardless of whether the arrangement direction of the control printed circuit board (CPCB) is changed, the lower plate (Lplate) is fastened to the control printed circuit board (CPCB) while being fixed in a specific direction (eg, forward direction). A first fastening socket DSK is formed at a first lower position of the lower plate Lplate. A plurality of sub sockets FSK corresponding to the sub holes FH of the control printed circuit board CPCB are formed in the lower plate Lplate. The sub-holes FH and the sub-sockets FSK may be coupled with a conductive fastening body SRW, but are not limited thereto. The structure connecting the sub-holes FH and the sub-sockets FSK does not necessarily need to be a conductor.

Depending on the arrangement direction of the control printed circuit board CPCB, the first upper position of the control printed circuit board CPCB and the first lower position of the lower plate Lplate may or may not overlap each other. When the first upper position and the first lower position overlap each other, the first power connection hole DH and the first fastening socket DSK are fastened by the first conductive fastening body SRW. On the other hand, when the first upper position and the first lower position do not overlap each other, the first power connection hole DH and the first fastening socket DSK are fastened through the first conductive fastening body SRW. can't

For example, as shown in FIG. 13 , when the arrangement direction of the control printed circuit board is the same forward direction (0 degree) as the specific direction, the first upper position and the first lower position overlap each other, and the first power source The connection hole DH is fastened to the first fastening socket DSK by the first conductive fastening body SRW, so that the high logic power supply 3.3V is connected to the first and second power lines PL1 and PL2. It is connected to the first direction recognition pin D-Pin of the timing control unit TCON through the first conductive fastening body SRW. As a result, as shown in FIG. 15 , the timing control unit TCON may transmit forward arrangement direction information having a logic value of '1' to the set board.

On the other hand, as shown in FIG. 14, when the arrangement direction of the control printed circuit board (CPCB) is reverse (180 degrees) opposite to the specific direction, the first upper position and the first lower position do not overlap each other, and 1 The power connection hole DH and the first fastening socket DSK are not connected, so the high logic power supply (3.3V) is not connected to the first direction recognition pin D-Pin of the timing control unit TCON. The first direction recognition pin D-Pin of the timing control unit TCON is not connected to the high logic power supply (3.3V) and floats. As a result, as shown in FIG. 15 , the timing control unit TCON may transmit reverse arrangement direction information having a logic value of '0' to the set board.

16A to 16C are views showing a second embodiment of a connection structure of each display module for automatically recognizing the arrangement direction of a control printed circuit board. 17 to 20 are views showing that a control printed circuit board is connected to a lower plate in a state in which a control printed circuit board is rotated 270 degrees, 90 degrees, 0 degrees, and 180 degrees from a specific direction, respectively, in a display module according to a second embodiment. 21 is a diagram showing logic values of first and second direction recognition pins according to the arrangement direction of the control printed circuit board in one display module according to the second embodiment.

Referring to FIGS. 16A to 16C , each display module further includes a lower plate (Lplate) fastened to the rear surface of the control printed circuit board (CPCB).

A timing controller TCON is mounted on the control printed circuit board CPCB. Since the timing controller TCON is fixed on the control printed circuit board CPCB, the arrangement direction of the timing controller TCON changes according to the arrangement direction of the control printed circuit board CPCB. In order to indicate the four arrangement directions of the control printed circuit board (CPCB), the timing controller TCON is provided with a first direction recognition pin D-Pin1 and a second direction recognition pin D-Pin2. The first direction recognition pin (D-Pin1) and the second direction recognition pin (D-Pin2) are four directions (eg, 0 degrees, 90 degrees) having different logic values according to the arrangement direction of the control printed circuit board (CPCB). degree, 180 degree, 270 degree arrangement direction information).

In the control printed circuit board (CPCB), a plurality of sub-holes (FH) for fastening with the lower plate (Lplate), a first power connection hole (DH1) and a second power connection hole (DH2) for connection with a high logic power supply. ) is formed. The first power connection hole DH1 is formed at a first upper position around the area where the timing control unit TCON is mounted, and the second power connection hole DH2 is formed in the second area around the area where the timing control unit TCON is mounted. It may be formed in an upper position. The first power connection hole DH1 is connected to the first direction recognition pin D-Pin1 of the timing controller TCON through the first power line PL1 and is connected to the high logic power through the second power line PL2. (3.3V). The second power connection hole DH2 is connected to the second direction recognition pin D-Pin2 of the timing controller TCON through the third power line PL3 and is connected to the high logic power through the fourth power line PL4. (3.3V).

Regardless of whether the arrangement direction of the control printed circuit board CPCB is changed, the lower plate Lplate is fastened to the control printed circuit board CPCB while being fixed in a specific direction (eg, 0 degree, forward direction). A first fastening socket DSK1 is formed at a first lower position of the lower plate Lplate, and a second fastening socket DSK2 is formed at a second lower position of the lower plate Lplate. A plurality of sub sockets FSK corresponding to the sub holes FH of the control printed circuit board CPCB are formed in the lower plate Lplate. The sub-holes FH and the sub-sockets FSK may be coupled with a conductive fastening body SRW, but are not limited thereto.

Regardless of the arrangement direction of the control printed circuit board (CPCB), the sub-holes (FH) and the sub-sockets (FSK) are identical to enable mechanical fastening between the control printed circuit board (CPCB) and the lower plate (Lplate). It can be implemented as a number. In particular, the spacing between neighboring sub-holes FH and the spacing between neighboring sub-sockets FSK may be designed to be identical to each other.

According to the arrangement direction of the control printed circuit board (CPCB), at least one of the first and second upper positions of the control printed circuit board (CPCB) is at least one of the first and second lower positions of the lower plate (Lplate). It may or may not overlap with either one. When at least one of the first and second upper positions overlaps with at least one of the first and second lower positions, at least one of the first and second power connection holes DH1 and DH2 and at least one of the first and second fastening sockets DSK1 and DSK2 are fastened by at least one of the first and second conductive fastening bodies SRW. On the other hand, when the first and second upper positions do not overlap with the first and second lower positions, the first and second power connection holes DH1 and DH2 and the first and second fastening sockets (DSK1, DSK2) cannot be coupled through the first and second conductive fasteners SRW.

For example, as shown in FIG. 17, when the arrangement direction of the control printed circuit board (CPCB) is the same positive direction (0 degree) as the specific direction, the first upper position and the first lower position overlap each other, and the first The power connection hole DH1 is fastened to the first fastening socket DSK1 by the first conductive fastening body SRW, so that the high logic power supply 3.3V is connected to the first and second power lines PL1 and PL2. It is connected to the first direction recognition pin D-Pin1 of the timing controller TCON through the first conductive fastening body SRW. In addition, when the arrangement direction of the control printed circuit board (CPCB) is the same forward direction (0 degree) as the specific direction, the second upper position and the second lower position overlap each other, and the second power connection hole (DH2) It is fastened to the second fastening socket DSK2 by the second conductive fastening body SRW, so that the high logic power supply 3.3V is connected to the third and fourth power lines PL3 and PL4 and the second conductive fastening body SRW. ) is connected to the second direction recognition pin D-Pin2 of the timing control unit TCON. As a result, the timing control unit TCON may transmit 0 degree arrangement direction information having a logic value of '11' to the set board as shown in FIG. 21 .

As shown in FIG. 18, when the arrangement direction of the control printed circuit board (CPCB) is rotated 90 degrees from a specific direction, the first upper position and the second lower position overlap each other, and the first power connection hole DH1 It is fastened to the second fastening socket DSK2 by the first conductive fastening body SRW, so that the high logic power supply 3.3V is connected to the first and second power lines PL1 and PL2 and the first conductive fastening body SRW. ) is connected to the first direction recognition pin D-Pin1 of the timing controller TCON. In addition, when the arrangement direction of the control printed circuit board (CPCB) is rotated 90 degrees from a specific direction, the second upper position does not overlap with the first and second lower positions, and the second power connection hole (DH2) is not coupled to the first and second fastening sockets DSK1 and DSK2 , so that the high logic power supply (3.3V) is not connected to the second direction recognition pin D-Pin2 of the timing control unit TCON. As a result, as shown in FIG. 21 , the timing control unit TCON may transmit 90-degree arrangement direction information having a logic value of '10' to the set board.

As shown in FIG. 19, when the arrangement direction of the control printed circuit board (CPCB) is rotated 180 degrees from a specific direction, the first upper position does not overlap with the first and second lower positions, and the first power connection hole (DH1) is not engaged with the first and second fastening sockets (DSK1, DSK2), so that the high logic power supply (3.3V) is not connected to the first direction recognition pin (D-Pin1) of the timing controller (TCON). . In addition, when the arrangement direction of the control printed circuit board (CPCB) is rotated 180 degrees from a specific direction, the second upper position does not overlap with the first and second lower positions, and the second power connection hole DH2 is not coupled to the first and second fastening sockets DSK1 and DSK2 , so that the high logic power supply (3.3V) is not connected to the second direction recognition pin D-Pin2 of the timing control unit TCON. As a result, as shown in FIG. 21 , the timing controller TCON may transfer 180-degree arrangement direction information having a logic value of '00' to the set board.

As shown in FIG. 20, when the arrangement direction of the control printed circuit board (CPCB) is rotated 270 degrees from a specific direction, the first upper position does not overlap with the first and second lower positions, and the first power connection hole (DH1) is not engaged with the first and second fastening sockets (DSK1, DSK2), so that the high logic power supply (3.3V) is not connected to the first direction recognition pin (D-Pin1) of the timing controller (TCON). . In addition, when the arrangement direction of the control printed circuit board (CPCB) is rotated by 270 degrees from a specific direction, the second upper position and the first lower position overlap each other, and the second power connection hole DH2 has a second conductivity. It is fastened to the first fastening socket DSK1 by the fastening body SRW, so that the high logic power supply 3.3V is transmitted through the third and fourth power lines PL3 and PL4 and the second conductive fastening body SRW. It is connected to the second direction recognition pin D-Pin2 of the timing controller TCON. As a result, as shown in FIG. 21 , the timing controller TCON may transmit 270-degree arrangement direction information having a logical value of '01' to the set board.

22 and 23 are diagrams illustrating an example in which module image coordinate values of display modules are set based on an arrangement direction of a control printed circuit board in an atypical connection structure between display modules.

Referring to FIGS. 22 and 23 , in order to correspond to various atypical connection structures, cases 1, 2, 3, and 4 have a control printed circuit board (CPCB) arrangement direction of 90 degrees, 270 degrees, and 0 degrees from a specific direction, respectively. , may correspond to being rotated by 180 degrees. Cases 1, 2, 3, and 4 may be combined so that the length of the interface cable (CBL) is optimally implemented.

In the irregular connection structure, the input/output direction of image data based on the control printed circuit board (CPCB) depends on the arrangement direction of the control printed circuit board (CPCB). For example, in case 1, the input/output direction of image data is from the upper side to the lower side of the control printed circuit board (CPCB), in case 2, the input and output direction of image data is from the lower side to the upper side of the control printed circuit board (CPCB), and in case 3 In case 4, the input/output direction of image data is from left to right of the control printed circuit board (CPCB), and in case 4, the input/output direction of image data is from right to left of the control printed circuit board (CPCB).

The set board (SET) may determine module image coordinate values for each display module based on the arrangement direction information of the control printed circuit boards (CPCB) received from the display modules.

The set board (SET) combines the arrangement direction information of the previous and current control printed circuit boards (CPCB) and the module image coordinate values of the previous control printed circuit boards (CPCB), and the current control printed circuit boards (CPCB). ) module image coordinate values can be calculated.

For example, when the set board SET calculates the module image coordinate value of the second display module CB on which TCON#2 is mounted, the module image coordinate value of the first display module CB (1,1 ) to derive the module image coordinate value (1,2) by applying "column coordinate +1". This corresponds to the case of changing from case 3 to case 1.

When the set board (SET) calculates the module image coordinate values of the third display module (CB) on which TCON#3 is mounted, the module image coordinate values of (1,2) of the second display module (CB) are " The module image coordinate value (2,2) is derived by applying the coordinate +1". This corresponds to the case of changing from case 1 to case 1.

When the set board (SET) calculates the module image coordinate values of the fourth display module (CB) in which TCON#4 is mounted, the module image coordinate values (2,2) of the third display module (CB) are "column". The module image coordinate value (2,1) is derived by applying the coordinate -1". This corresponds to the case of changing from case 1 to case 4.

24 and 25 are views showing a third embodiment of a connection structure of each display module for automatically recognizing the arrangement direction of a control printed circuit board.

Referring to FIGS. 24 and 25 , each display module further includes a lower plate (Lplate) fastened to the rear surface of the control printed circuit board (CPCB).

A timing controller TCON is mounted on the control printed circuit board CPCB. Since the timing controller TCON is fixed on the control printed circuit board CPCB, the arrangement direction of the timing controller TCON changes according to the arrangement direction of the control printed circuit board CPCB. In order to indicate at least two or more disposition directions of the control printed circuit board (CPCB), at least one direction recognition pin (D-Pin) is provided in the timing control unit (TCON). The direction recognition pin (D-Pin) is two or more direction information (e.g., 0 degree, 180 degree arrangement direction information or 0 degree, 90 degree , 180 degree, 270 degree arrangement direction information).

A plurality of sub-holes for fastening with the lower plate Lplate and conductive pattern pairs CP1 and CP2 for connecting to a high logic power supply are formed in the control printed circuit board CPCB. The conductive pattern pairs CP1 and CP2 may be formed at a first upper position around an area where the timing controller TCON is mounted. The conductive pattern pairs CP1 and CP2 may be further formed at another first upper position around an area where the timing controller TCON is mounted.

The conductive pattern pairs CP1 and CP2 include a first conductive pattern CP1 and a second conductive pattern CP2 electrically separated from each other. The first conductive pattern CP1 is connected to the direction recognition pin D-Pin of the timing controller TCON through the first power line PL1, and the second conductive pattern CP2 is connected to the second power line PL2. It is connected to the high logic power supply (3.3V) through

Regardless of whether the arrangement direction of the control printed circuit board (CPCB) is changed, the lower plate (Lplate) is fastened to the control printed circuit board (CPCB) while being fixed in a specific direction (ie, 0 degrees). A first conductive gasket GSK is formed at a first lower portion of the lower plate Lplate. The first conductive gasket GSK may be further formed at another first lower position of the lower plate Lplate. A plurality of sub-sockets corresponding to sub-holes of the control printed circuit board CPCB are formed in the lower plate Lplate. The sub-holes FH and the sub-sockets FSK may be coupled with a conductive fastening body SRW, but are not limited thereto.

The sub-holes and the sub-sockets may be implemented in the same number so that the control printed circuit board (CPCB) and the lower plate (Lplate) can be mechanically fastened regardless of the arrangement direction of the control printed circuit board (CPCB). In particular, the spacing between neighboring sub-holes and the spacing between neighboring sub-sockets may be designed to be identical to each other.

Depending on the arrangement direction of the control printed circuit board (CPCB), at least one of the first upper positions of the control printed circuit board (CPCB) may overlap with at least one of the first lower positions of the lower plate (Lplate), Maybe not.

When at least one of the first upper positions overlaps with at least one of the first lower positions (for example, when the control printed circuit board (CPCB) is disposed in the same direction as the specific direction), the overlapping position , the first conductive pattern CP1 and the second conductive pattern CP2 are electrically connected to each other through the first conductive gasket GSK, so that the high logic power supply 3.3V is connected to the first and second power lines PL1. , PL2) and the first and second conductive patterns CP1 and CP2 may be connected to the direction recognition pin D-Pin of the timing controller TCON.

On the other hand, when the first upper position and the first lower position do not overlap each other (eg, when the control printed circuit board (CPCB) is disposed in the opposite direction to the specific direction), the first conductive pattern ( CP1) and the second conductive pattern CP2 are kept separated from each other, so that the high logic power supply (3.3V) cannot be connected to the direction recognition pin (D-Pin) of the timing control unit TCON.

24 and 25, when the control printed circuit board (CPCB) is connected to the lower plate (Lplate) in a state of being rotated by 0 degrees and 180 degrees from a specific direction, respectively, the timing controller (TCON) generates arrangement direction information. The operation is similar to that previously described in FIGS. 13 and 14 .

24 and 25, when the control printed circuit board (CPCB) is connected to the lower plate (Lplate) in a state of being rotated 0 degrees, 90 degrees, 180 degrees, and 270 degrees from a specific direction, respectively, the timing controller (TCON) An operation of generating arrangement direction information in is similar to the content previously described with reference to FIGS. 17 to 20 .

26 and 27 are views showing a fourth embodiment of a connection structure of each display module for automatically recognizing the arrangement direction of a control printed circuit board.

Referring to FIGS. 26 and 27 , each display module further includes a lower plate (Lplate) fastened to the rear surface of the control printed circuit board (CPCB).

A timing controller TCON is mounted on the control printed circuit board CPCB. Since the timing controller TCON is fixed on the control printed circuit board CPCB, the arrangement direction of the timing controller TCON changes according to the arrangement direction of the control printed circuit board CPCB. In order to indicate at least two or more disposition directions of the control printed circuit board (CPCB), at least one direction recognition pin (D-Pin) is provided in the timing control unit (TCON). The direction recognition pin (D-Pin) is two or more direction information (e.g., 0 degree, 180 degree arrangement direction information or 0 degree, 90 degree , 180 degree, 270 degree arrangement direction information).

A plurality of sub-holes for fastening with the lower plate Lplate and a push switch SW for connecting to a high logic power supply are formed in the control printed circuit board CPCB. The push switch SW may be formed at a first upper position around an area where the timing controller TCON is mounted. The push switch SW may be further formed at another first upper position around an area where the timing controller TCON is mounted.

The push switch SW is connected to the direction recognition pin D-Pin of the timing controller TCON through the first power line PL1 and is connected to the high logic power supply 3.3V through the second power line PL2. Connected.

Regardless of whether the arrangement direction of the control printed circuit board (CPCB) is changed, the lower plate (Lplate) is fastened to the control printed circuit board (CPCB) while being fixed in a specific direction (ie, 0 degrees). A first protrusion PP is formed at a first lower position of the lower plate Lplate. The first protrusion PP may be further formed at another first lower position of the lower plate Lplate. A plurality of sub-sockets corresponding to sub-holes of the control printed circuit board CPCB are formed in the lower plate Lplate. The sub-holes FH and the sub-sockets FSK may be coupled with a conductive fastening body SRW, but are not limited thereto.

The sub-holes and the sub-sockets may be implemented in the same number so that the control printed circuit board (CPCB) and the lower plate (Lplate) can be mechanically fastened regardless of the arrangement direction of the control printed circuit board (CPCB). In particular, the spacing between neighboring sub-holes and the spacing between neighboring sub-sockets may be designed to be identical to each other.

Depending on the arrangement direction of the control printed circuit board (CPCB), at least one of the first upper positions of the control printed circuit board (CPCB) may overlap with at least one of the first lower positions of the lower plate (Lplate), Maybe not.

When at least one of the first upper positions overlaps with at least one of the first lower positions (for example, when the control printed circuit board (CPCB) is disposed in the same direction as the specific direction), the overlapping position The push switch SW is turned on by contact with the first protrusion PP, and the high logic power supply 3.3V is timing through the first and second power lines PL1 and PL2 and the push switch SW. It may be connected to the direction recognition pin D-Pin of the control unit TCON.

On the other hand, when the first upper position and the first lower position do not overlap each other (for example, when the control printed circuit board (CPCB) is disposed in the opposite direction to the specific direction), the push switch (SW) is maintained in an off state, so that the high logic power supply (3.3V) cannot be connected to the direction recognition pin (D-Pin) of the timing controller (TCON).

26 and 27, when the control printed circuit board (CPCB) is connected to the lower plate (Lplate) in a state of being rotated by 0 degrees and 180 degrees from a specific direction, respectively, the timing controller (TCON) generates arrangement direction information. The operation is similar to that previously described in FIGS. 13 and 14 .

26 and 27, when the control printed circuit board (CPCB) is connected to the lower plate (Lplate) in a state of being rotated 0 degrees, 90 degrees, 180 degrees, and 270 degrees from a specific direction, respectively, the timing controller (TCON) An operation of generating arrangement direction information in is similar to the content previously described with reference to FIGS. 17 to 20 .

28 to 31 are diagrams showing examples of input/output image matching according to the arrangement direction of the control printed circuit board. 28 to 31, "EPI-1, EPI-2, EPI-3" are internal interface lines for data communication between the timing control unit (TCON) and panel driving circuits.

28 to 31, the timing controller TCON makes the distribution order of module images the same as the default distribution order according to the image re-matching control information from the set board or the default distribution order through a sub-image re-matching operation. can be done differently.

According to the default distribution order, sub image 1 is output to the first display panel PNL-A through the first output port TA, and sub image 2 is output to the second display panel through the second output port TB. (PNL-B), sub image 3 is output to the third display panel (PNL-C) through the third output port (TC), and sub image 4 is output to the fourth output port (TD). It is output to the display panel (PNL-D).

As shown in FIG. 28, in case 1 in which the arrangement direction of the control printed circuit board is the same as the default direction (eg, a direction rotated by 90 degrees from the normal direction), the panel output image according to the default distribution order is different from the input module image MI. are matched equally. That is, since the module image MI is displayed on the four display panels as it is input without image reversal or image mixing, the timing controller TCON does not need to perform a sub-image re-matching operation. The timing controller TCON distributes image data of sub-images to the first to fourth output ports TA, TB, TC, and TD according to a default distribution order.

29 to 31 , in cases 2, 3, and 4 in which the arrangement direction of the control printed circuit board is different from the default direction, the panel output image according to the default distribution order does not match the input module image MI. In order to eliminate such image mismatching, a sub-image re-matching operation is performed in cases 2, 3, and 4.

Specifically, in the display module in which the control printed circuit board (CPCB) is disposed in a direction rotated by 270 degrees from the normal direction as in Case 2 of FIG. are distributed to (TA, TB, TC, TD). In other words, sub-image 1 is redistributed to the fourth output port (TD), sub-image 2 is redistributed to the third output port (TC), sub-image 3 is redistributed to the second output port (TB), and sub-image is redistributed to the second output port (TB). 4 is redistributed to the first output port TA.

Also, in the display module in which the control printed circuit board (CPCB) is disposed in the forward direction as in case 3 of FIG. , TD). In other words, sub-image 1 is redistributed to the second output port (TB), sub-image 2 is redistributed to the fourth output port (TD), sub-image 3 is redistributed to the first output port (TA), and sub-image is redistributed to the first output port (TA). 4 is redistributed to the third output port (TC).

In addition, in a display module in which the control printed circuit board (CPCB) is disposed in a direction rotated by 180 degrees from the normal direction as in case 4 of FIG. (TA, TB, TC, TD). In other words, sub image 1 is redistributed to the fourth output port TD, sub image 2 is redistributed to the first output port TA, and sub image 4 is redistributed to the second output port TC. However, sub image 3 is distributed to the original third output port (TC).

FIG. 32 is a diagram showing input image data of 4K resolution allocated to display modules having the irregular connection structure of FIG. 10A. FIG. 33 is a diagram showing module image data allocated to first and fifth display modules among the input image data of FIG. 32 .

Referring to FIGS. 10A, 32, and 33, the set board (SET) includes module identification numbers (nID 1 to nID 8) assigned to timing controllers (TCON#1 to TCON#8), and a control printed circuit board. Module image coordinate values ((1,1) to (2,4)) corresponding to module images and image re-matching control information are set for each display module according to the arrangement direction of the modules.

4K resolution is 3840*2160. The timing controllers TCON#1 to TCON#8 divide and process eight module images A1 to A8 constituting 4K resolution. For example, the first timing controller TCON#1 processes the first module image A1 corresponding to the module image coordinate value of (1,1), and the fifth timing controller TCON#5 processes (2 The fifth module image A5 corresponding to the module image coordinate value of ,4) is processed.

The first module image A1 has a unit horizontal resolution (X) of “1 to 960” and a unit vertical resolution (Y) of “1 to 1080”. The fifth module image A5 has a unit horizontal resolution (X) of “2881 to 3840” and a unit vertical resolution (Y) of 1081 to 2160”.

34 is a diagram showing an automatic control procedure of a tiling display device according to an embodiment of the present specification.

Referring to FIG. 34, the automatic control method of a tiling display device according to an embodiment of the present specification includes an Auto nID setting process (S2, S3) and an Auto image coordinate recognition process (S4, S5, S6) performed in a power-on sequence section. includes

Auto nID setting processes (S2 and S3) are the same as those described above with reference to FIGS. 7 to 9.

Auto image coordinate recognition processes (S4, S5, S6) are the same as those described above with reference to FIGS. 12A to 31 .

Through the above description, those skilled in the art will understand that various changes and modifications are possible without departing from the spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be determined by the claims.

SET: set board TCON: timing control
CPCB: Control printed circuit board D-Pin: Direction recognition pin
DH: power connection hole DSK: fastening socket
PL1,PL2: power line SRW: conductive fastener
CP1,CP2: Conductive pattern GSK: Conductive gasket
SW: Push switch PP: Protrusion
S-Pin1,S-Pin2: Optional pins

Claims (18)

a plurality of display modules connected to each other through an interface circuit of a serial communication method and displaying a plurality of module images by dividing input image data constituting one screen; and
Module identification numbers according to the order of connection of the display modules are checked, and module image coordinate values and image rematching control information corresponding to the module image are calculated according to the arrangement direction of the control printed circuit board individually provided in each display module. A tiling display device including a set board set for each display module. According to claim 1,
Each of the display modules,
a timing controller for dividing the module image into a plurality of sub-images;
a plurality of display panels displaying the plurality of sub images;
a control printed circuit board mounted with the timing controller and having a plurality of image output ports for electrically connecting the timing controller and the display panels;
The timing controller,
The tiling display device for re-matching the image data of the sub-images to the image output ports based on the module image coordinate value and the image re-matching control information transmitted from the set board. According to claim 2,
The timing controller,
When the arrangement direction of the control printed circuit board is the same as a preset default direction, distributing the image data of the sub-images to the image output ports in the same preset default distribution order;
Distributing the image data of the sub-images to the image output ports differently from the default distribution order when the arrangement direction of the control printed circuit board is different from the default direction. According to claim 2,
Each of the display modules,
a lower plate fastened to the rear surface of the control printed circuit board in a fixed specific direction regardless of the arrangement direction of the control printed circuit board;
a first fastening socket formed at a first lower position of the lower plate;
a first power connection hole formed at a first upper position around an area where the timing controller is mounted on the control printed circuit board;
a first power line connected between a first direction recognition pin of the timing controller and the first power connection hole;
A second power line connected between a high logic power supply and the first power connection hole;
When the arrangement direction of the control printed circuit board is the same as the specific direction,
The first upper position and the first lower position overlap each other, and the first power connection hole is fastened to the first fastening socket by a first conductive fastening body, so that the high logic power supply is connected to the first and second power supply connections. A tiling display device connected to the first direction recognition pin of the timing control unit through power lines and the first conductive fastener. According to claim 4,
When the arrangement direction of the control printed circuit board is the same as the specific direction,
The first upper position and the first lower position overlap each other, and the first power connection hole is fastened to the first fastening socket by a first conductive fastening body, so that the high logic power supply is connected to the first and second power supply connections. A tiling display device connected to the first direction recognition pin of the timing control unit through power lines and the first conductive fastener. According to claim 4,
When the arrangement direction of the control printed circuit board is opposite to the specific direction,
The first upper position and the first lower position do not overlap each other, and the first power connection hole and the first fastening socket are not engaged with each other, so that the high logic power supply is applied to the first direction recognition pin of the timing control unit. A tiling display that is not connected to According to claim 2,
Each of the display modules,
a lower plate fastened to the rear surface of the control printed circuit board in a fixed specific direction regardless of the arrangement direction of the control printed circuit board;
a first fastening socket formed at a first lower position of the lower plate and a second fastening socket formed at a second lower position;
a first power connection hole formed at a first upper position around an area where the timing controller is mounted on the control printed circuit board and a second power supply connection hole formed at a second upper position;
a first power line connected between a first direction recognition pin of the timing controller and the first power connection hole;
a second power line connected between a high logic power supply and the first power connection hole;
a third power line connected between a second direction detection pin of the timing controller and the second power connection hole;
The tiling display device further includes a fourth power line connected between the high logic power supply and the second power connection hole. According to claim 7,
When the arrangement direction of the control printed circuit board is the same as the specific direction,
The first upper position and the first lower position overlap each other, and the first power connection hole is fastened to the first fastening socket by a first conductive fastening body, so that the high logic power supply is connected to the first and second power supply connections. connected to the first direction recognition pin of the timing control unit through power lines and the first conductive fastener;
The second upper position and the second lower position overlap each other, and the second power connection hole is fastened to the second fastening socket by a second conductive fastening body, so that the high logic power supply is connected to the third and fourth power supply connections. A tiling display device connected to the second direction recognition pin of the timing control unit through power lines and the second conductive fastener. According to claim 7,
When the arrangement direction of the control printed circuit board is rotated 90 degrees from the specific direction,
The first upper position and the second lower position overlap each other, and the first power connection hole is fastened to the second fastening socket by the first conductive fastening body, so that the high logic power supply is connected to the first and second fastening sockets. connected to the first direction recognition pin of the timing control unit through 2 power lines and the first conductive fastener;
The second upper position does not overlap with the first and second lower positions, and the second power connection hole is not engaged with the first and second fastening sockets, so that the high logic power is applied to the timing controller. A tiling display device not connected to the second direction recognition pin. According to claim 7,
When the arrangement direction of the control printed circuit board is rotated 180 degrees from the specific direction,
The first upper position does not overlap with the first and second lower positions, and the first power connection hole is not engaged with the first and second fastening sockets, so that the high logic power is applied to the timing control unit. Unconnected to the first direction recognition pin,
The second upper position does not overlap with the first and second lower positions, and the second power connection hole is not engaged with the first and second fastening sockets, so that the high logic power is applied to the timing controller. A tiling display device not connected to the second direction recognition pin. According to claim 7,
When the arrangement direction of the control printed circuit board is rotated 270 degrees from the specific direction,
The second upper position and the first lower position overlap each other, and the second power connection hole is fastened to the first fastening socket by the second conductive fastening body, so that the high logic power supply is connected to the third and fourth power supply connection holes. 4 connected to the second direction recognition pin of the timing control unit through power lines and the second conductive fastener;
The first upper position does not overlap with the first and second lower positions, and the first power connection hole is not engaged with the first and second fastening sockets, so that the high logic power is applied to the timing control unit. A tiling display device not connected to the first direction recognition pin. According to claim 2,
Each of the display modules,
a lower plate fastened to the rear surface of the control printed circuit board in a fixed specific direction regardless of the arrangement direction of the control printed circuit board;
a first conductive gasket formed at a first lower position of the lower plate;
a first conductive pattern and a second conductive pattern separated and formed at a first upper position around a region where the timing controller is mounted on the control printed circuit board;
a first power line connected between a direction recognition pin of the timing controller and the first conductive pattern;
The tiling display device further comprising a second power line connected between a high logic power supply and the second conductive pattern. According to claim 12,
When the arrangement direction of the control printed circuit board is the same as the specific direction,
The first upper position and the first lower position overlap each other, and the first conductive pattern and the second conductive pattern are electrically connected to each other through the first conductive gasket, so that the high logic power supply is connected to the first and second conductive patterns. A tiling display device connected to the direction recognition pin of the timing controller through second power lines and the first and second conductive patterns. According to claim 12,
When the arrangement direction of the control printed circuit board is opposite to the specific direction,
The first upper position and the first lower position do not overlap each other, and the first conductive pattern and the second conductive pattern are kept separated from each other, so that the high logic power supply is connected to the direction recognition pin of the timing controller. A tiling display that is not connected to According to claim 2,
Each of the display modules,
a lower plate fastened to the rear surface of the control printed circuit board in a fixed specific direction regardless of the arrangement direction of the control printed circuit board;
a first protrusion formed at a first lower position of the lower plate;
a push switch formed at a first upper position around an area where the timing controller is mounted on the control printed circuit board;
A first power line connected between a direction recognition pin of the timing controller and the push switch;
The tiling display device further comprising a second power line connected between a high logic power supply and the push switch. According to claim 15,
When the arrangement direction of the control printed circuit board is the same as the specific direction,
The first upper position and the first lower position overlap each other, and the push switch is turned on by contact with the first protrusion, so that the high logic power is connected to the first and second power lines and the push switch. A tiling display device connected to the direction recognition pin of the timing controller through a. According to claim 15,
When the arrangement direction of the control printed circuit board is opposite to the specific direction,
The tiling display device of claim 1 , wherein the first upper position and the first lower position do not overlap each other, the push switch is maintained in an off state, and the high logic power supply is not connected to the direction recognition pin of the timing controller. According to claim 1,
Each of the display modules includes a timing controller,
A first timing controller according to the connection order of the display modules includes a first option pin connected to a high logic power supply and a second option pin connected to the high logic power supply;
The last timing controller according to the connection order of the display modules includes a first option pin connected to a low logic power supply and a floating second option pin,
The tiling display device of claim 1 , wherein the remaining timing controllers excluding the first and last timing controllers each include a first option pin connected to a low logic power supply and a second option pin connected to a high logic power supply.

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