KR20230067442A - Charger integrated circuit for charging series battery device and electronic device including same - Google Patents

Abstract

A charger integrated circuit for charging a battery device including series-connected batteries includes a direct charger, a buck converter, a switched capacitor, and a linear charger. The direct charger generates, based on the input voltage, a first charging current for charging the battery device and a first current for generating a first system current provided to a system load. The buck converter generates, based on the input voltage, a second current for generating a second charging current for charging the battery device and a second system current provided to the system load. The switched capacitor generates a first system current based on the first current and a second charging current based on the second current. A linear charger provides a first charging current and a second charging current to a battery device.

Description

A charging integrated circuit for charging a serial battery device and an electronic device including the same

The present invention relates to a semiconductor integrated circuit, and more particularly, to a charger integrated circuit for charging a series battery device including a plurality of batteries, and an electronic device including the charger integrated circuit.

BACKGROUND OF THE INVENTION Portable electronic devices such as mobile phones contain batteries. With the advent of the 5G era, the power required for mobile phones is increasing. Since the use time of 5G mobile phones cannot help but decrease with the currently used battery capacity, an increase in battery capacity is required. For example, a battery device in which a plurality of batteries are connected in series is used, and accordingly, the importance of efficient charging and/or high-speed charging of a battery device including a plurality of batteries is also increasing.

One object of the present invention is to provide a charger integrated circuit capable of stably supplying a system voltage while charging a high voltage of a series battery device.

Another object of the present invention is to provide an electronic device including the charger integrated circuit.

In order to achieve the above object, a charging integrated circuit for charging a battery device including a first battery and a second battery connected in series according to embodiments of the present invention is a direct charger, a buck converter ), switched capacitors and linear chargers. The direct charger generates a first charging current for charging the battery device and a first current for generating a first system current provided to a system load, based on an input voltage received from an input terminal. The buck converter generates a second current for generating a second charging current for charging the battery device and a second system current provided to the system load, based on the input voltage. The switched capacitor generates the first system current based on the first current and generates the second charging current based on the second current. The linear charger provides the first charging current and the second charging current to the battery device.

In order to achieve the other object, an electronic device according to embodiments of the present invention includes a battery device, a charger integrated circuit for charging the battery device, and a system load. The battery device includes a first battery and a second battery connected in series. The system load operates based on an input voltage received from an input terminal and a battery voltage received from the battery device. The charger integrated circuit includes a direct charger, a buck converter, a switched capacitor, and a linear charger. The direct charger generates a first charging current for charging the battery device and a first current for generating a first system current provided to the system load, based on the input voltage. The buck converter generates a second current for generating a second charging current for charging the battery device and a second system current provided to the system load, based on the input voltage. The switched capacitor generates the first system current based on the first current and generates the second charging current based on the second current. The linear charger provides the first charging current and the second charging current to the battery device.

In order to achieve the above object, a charging integrated circuit for charging a battery device including a first battery and a second battery connected in series according to embodiments of the present invention is a direct charger, a buck converter ), switched capacitors and linear chargers. The direct charger is activated when an input voltage received from an input terminal has a variable voltage level, and generates a first charging current for charging the battery device and a first system current provided to a system load based on the input voltage. It generates a first current for generating and is deactivated when the input voltage has a fixed voltage level. The buck converter is activated when the input voltage has the fixed voltage level, and is provided to the system load and a second current for generating a second charging current for charging the battery device based on the input voltage It generates a second system current and is inactive when the input voltage has the variable voltage level. The switched capacitor generates the first system current based on the first current when the input voltage has the variable voltage level and based on the second current when the input voltage has the fixed voltage level. to generate the second charging current. The linear charger provides the first charging current to the battery device when the input voltage has the variable voltage level, and provides the second charging current to the battery device when the input voltage has the fixed voltage level. provided to The direct charger includes first and second switches connected in series between the input terminal and a control node. The buck converter is between third, fourth and fifth switches connected in series between the input terminal and the ground voltage, and between a switching node between the fourth switch and the fifth switch and a system node connected to the system load. A first inductor connected thereto is included. The linear charger includes a sixth switch connected between the control node and the battery device. Each of the first, second, third, fourth, fifth and sixth switches includes one transistor and one diode.

The charger integrated circuit and electronic device according to the embodiments of the present invention as described above include only a buck converter instead of a buck-boost converter, and an additional buck converter may be omitted. In addition, the operation of the switched capacitor varies depending on whether the input voltage is a variable voltage level or a fixed voltage level, and the switched capacitor may supply system current to a system load or charge current to a battery device. Therefore, compared to the conventional structure, the number of ICs, the number of transistors, and circuit area are reduced, and a charging method for stably supplying a system voltage while charging a high battery voltage of a battery device including series-connected batteries can be effectively implemented.

1 is a block diagram illustrating a charger integrated circuit and an electronic device including the same according to embodiments of the present invention.
2a, 2b and 2c are diagrams for explaining the operation of the charger integrated circuit of FIG. 1 and an electronic device including the same.
FIG. 3 is a diagram illustrating a specific example of the charger integrated circuit of FIG. 1 and an electronic device including the same.
4A, 4B, and 4C are diagrams for explaining the operation of the charger integrated circuit of FIG. 3 and an electronic device including the same.
5 is a block diagram illustrating an example of a switched capacitor included in the charger integrated circuit of FIGS. 1 and 3 .
FIG. 6 is a circuit diagram illustrating an example of a first switched capacitor circuit included in the switched capacitor of FIG. 5 .
7 is a block diagram illustrating a charger integrated circuit and an electronic device including the same according to example embodiments.
8A, 8B, and 8C are diagrams illustrating specific examples of the charger integrated circuit of FIG. 7 and an electronic device including the same.
9 and 10 are block diagrams illustrating a charger integrated circuit and an electronic device including the same according to embodiments of the present invention.
11 is a flowchart illustrating an operating method of a charger integrated circuit according to example embodiments.
FIG. 12 is a flowchart illustrating an example of generating the first charging current and the first system current of FIG. 11 .
13 is a flowchart illustrating an example of generating the second charging current and the second system current of FIG. 11 .
FIG. 14 is a flowchart illustrating an example of generating a third system current of FIG. 11 .
15 and 16 are block diagrams illustrating electronic devices according to embodiments of the present invention.

Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention will be described in more detail. The same reference numerals are used for the same components in the drawings, and redundant descriptions of the same components are omitted.

1 is a block diagram illustrating a charger integrated circuit and an electronic device including the same according to embodiments of the present invention.

Referring to FIG. 1 , an electronic device 10 includes a battery device 100 , a charger integrated circuit (IC) 200 and a system load 300 . The electronic device 10 may further include an input terminal (or input voltage terminal) 20 .

The battery device 100 includes a first battery 110 and a second battery 120 connected in series. As the electronic device 10 is implemented with high specifications and performs high-performance operations, an increase in battery capacity is required, and accordingly, a battery device 100 in which a plurality of batteries 110 and 120 are connected in series is used. there is. The electronic device 10 may execute a high-performance operation using the battery device 100 including the plurality of batteries 110 and 120 .

In one embodiment, the battery device 100 may be embedded in the electronic device 10 . In one embodiment, the battery device 100 may be detachable from the electronic device 10 . Although FIG. 1 illustrates a case in which the battery device 100 includes two batteries 110 and 120, the present invention is not limited thereto, and as will be described later with reference to FIG. 10, the battery device includes three or more connected in series. It may be implemented including batteries.

In one embodiment, the first battery 110 is a first battery cell, the second battery 120 is a second battery cell, and the battery device 100 may be a multi-cell battery including a plurality of battery cells. . For example, the battery device 100 may be implemented as a battery pack. In one embodiment, the first battery 110 is a first battery pack, the second battery 120 is a second battery pack, and the battery device 100 may be implemented as a battery device including a plurality of battery packs. there is. In one embodiment, at least one of the first and second battery packs may be a multi-cell battery including a plurality of battery cells. In one embodiment, at least one of the first and second battery packs may be a single cell battery including one battery cell.

The input terminal 20 may receive the input voltage VIN. In one embodiment, the input terminal 20 may be electrically connected to an output terminal of a travel adapter (TA). TA is AC (Alternating Current), which is household power, about 110 to 220V or DC (Direct Current) power (ie, input voltage (VIN)) required for battery charging. It can be converted into , and provided to the electronic device 10 . In one embodiment, the input terminal 20 may be electrically connected to the output terminal of the auxiliary battery. In one embodiment, the input terminal 20 may be electrically connected to another electronic device, for example another smart phone. The charger integrated circuit 200 may charge the battery device 100 using DC power received from a TA or an auxiliary battery.

The charging integrated circuit 200 is a circuit for charging the battery device 100 . For example, the charger integrated circuit 200 may be implemented as an integrated circuit chip and may be mounted on a printed circuit board (PCB). The charger integrated circuit 200 may also be referred to as a battery charger.

The charger integrated circuit 200 includes a direct charger 210, a buck converter 220, a switched capacitor 230, and a linear charger 240.

The direct charger 210 generates a first charging current for charging the battery device 100 and a first system current provided to the system load 300 based on the input voltage VIN received from the input terminal 20 . A first current for generating is generated. The direct charger 210 may be connected between the input terminal 20 receiving the input voltage VIN and the control node NCON where the control voltage VCON is formed.

The buck converter 220 generates a second current for generating a second charging current for charging the battery device 100 and a second system current provided to the system load 300 based on the input voltage VIN. do. The buck converter 220 may be connected between the input terminal 20 and the system node NSYS connected to the system load 300 and where the system voltage VSYS is formed. For example, the buck converter 220 may convert a relatively high DC voltage into a relatively low DC voltage. Buck converter 220 may also be referred to as a buck charger.

The switched capacitor 230 generates the first system current based on the first current and generates the second charging current based on the second current. The switched capacitor 230 may be connected between the control node NCON and the system node NSYS.

The linear charger 240 provides the first charging current and the second charging current to the battery device 100 . The linear charger 240 may be connected between the control node NCON and the battery device 100 providing the battery voltage VBAT. The voltage level of the control voltage VCON and the voltage level of the battery voltage VBAT may be substantially the same.

In one embodiment, depending on whether the input voltage VIN is received and the voltage level of the input voltage VIN, whether to activate and operate components included in the charger integrated circuit 200 may vary. A detailed operation of the charger integrated circuit 200 will be described later with reference to FIG. 2 and the like.

In one embodiment, each of the direct charger 210, the buck converter 220, the switched capacitor 230, and the linear charger 240 included in the charger integrated circuit 200 may include at least one transistor. . A specific configuration of the charger integrated circuit 200 will be described later in detail with reference to FIGS. 3 to 6 .

The system load 300 may operate based on a system voltage VSYS and/or one of the first, second and third system currents. For example, the system load 300 may include chips or modules included in the electronic device 10, such as a modem, an application processor, a memory, a display, and the like. For example, the system load 300 may include an operation block, a function block, or an intellectual property (IP) block included in the electronic device 10, for example, a multimedia block in an application processor, a memory controller, and the like. System load 300 may also be referred to as a consuming block or load.

In one embodiment, the electronic device 10 includes a laptop, a cellular phone, a smart phone, an MP3 player, a personal digital assistant (PDA), a portable multimedia player (PMP), a digital TV, and a digital camera. , portable game console, navigation device, wearable device, IoT (Internet of Things) device, IoE (Internet of Everything) device, e-book, VR (Virtual Reality) device, AR (Augmented Reality) device, drone (drone), it may be any mobile device such as automotive (automotive).

2a, 2b and 2c are diagrams for explaining the operation of the charger integrated circuit of FIG. 1 and an electronic device including the same.

Referring to FIG. 2A , when the input voltage VIN is received from the input terminal 20 and the input voltage VIN has a variable voltage level VVL, the direct charger 210 is activated (or activated). enabled) and the buck converter 220 may be disabled (or disabled). In FIG. 2A and subsequent figures, inactive components are shown with dotted lines.

When the input voltage VIN has the variable voltage level VVL, the direct charger 210 provides the first charging current ICG1 for charging the battery device 100 and the first charging current ICG1 provided to the system load 300. A first current IS1 for generating the system current ISYS1 may be generated. The switched capacitor 230 generates a first system current ISYS1 and a system voltage VSYS based on the first current IS1, and at this time, the control node NCON and the system node NSYS are respectively switched capacitors ( 230) may correspond to the input terminal and the output terminal. For example, the amount of current of the first current IS1 is about 1/2 times the amount of current of the first system current ISYS1, and the voltage level of the system voltage VSYS is about 1 of the voltage level of the control voltage VCON. / can be doubled. In other words, a voltage obtained by reducing the control voltage VCON (or the battery voltage VBAT) by about half may be supplied as the system voltage VSYS through the switched capacitor 230 . The linear charger 240 provides the first charging current ICG1 to the battery device 100 , and the battery device 100 may be charged based on the first charging current ICG1 .

In one embodiment, the charging operation shown in FIG. 2A may be an operation in a fast charging mode (or first charging mode). For example, the direct charger 210 is activated in the high-speed charging mode, and accordingly, the battery device 100 may be directly charged by directly providing the first charging current ICG1 to the battery device 100 . For example, the direct charger 210 directly charges the battery device 100 by directly connecting the input voltage VIN to the battery device 100, and the direct charging method has a relatively high charging efficiency. can

In one embodiment, the fast charging mode may correspond to a case in which the input voltage VIN is precisely controlled and/or a case in which the input voltage VIN has a variable voltage level VVL. For example, when the TA supports USB PD (Universal Serial Bus Power Delivery) 3.0, the direct charger 210 is activated and operates in the fast charging mode, but the present invention may not be limited thereto.

Referring to FIG. 2B , when the input voltage VIN is received from the input terminal 20 and the input voltage VIN has a fixed voltage level VFL, the buck converter 220 is activated and direct charger 210 may be deactivated.

When the input voltage VIN has a fixed voltage level VFL, the buck converter 220 generates a second charging current ICG2 for charging the battery device 100, and The second system current ISYS2 provided to the system load 300 may be generated. The switched capacitor 230 generates the second charging current ICG2 based on the second current IC2, and at this time, the system node NSYS and the control node NCON are input terminals of the switched capacitor 230 and It can correspond to the output terminal. For example, the amount of current of the second current IC2 is about twice the amount of current of the second charging current ICG2, and the voltage level of the control voltage VCON is about twice the voltage level of the system voltage VSYS. there is. In other words, a voltage obtained by boosting the system voltage VSYS by about two times through the switched capacitor 230 may be supplied as the control voltage VCON (or the battery voltage VBAT). The linear charger 240 provides the second charging current ICG2 to the battery device 100, and the battery device 100 may be charged based on the second charging current ICG2.

In one embodiment, the charging operation shown in FIG. 2B may be an operation in a normal charging mode (or a second charging mode). For example, the buck converter 220 is activated in the normal charging mode, and accordingly, the battery device 100 is charged by providing the second charging current ICG2 to the battery device 100 through the switched capacitor 230. can do.

In one embodiment, the normal charging mode may correspond to a case in which the input voltage VIN cannot be precisely controlled and/or a case in which the input voltage VIN has a fixed voltage level VFL. For example, when TA is the fixed voltage TA, the direct charger 210 may be deactivated and the buck converter 220 may be activated, but the present invention may not be limited thereto.

In one embodiment, the fixed voltage level VFL of the input voltage VIN may be lower than the voltage level of the battery voltage VBAT. For example, when TA is a low voltage TA, the fixed voltage level VFL may be about 5V, and the voltage level of the battery voltage VBAT may be about 8.4V. In another embodiment, the fixed voltage level VFL of the input voltage VIN may be higher than the voltage level of the battery voltage VBAT. For example, when TA is a high voltage TA, the fixed voltage level VFL may be about 9V, and the voltage level of the battery voltage VBAT may be about 8.4V. However, the present invention may not be limited thereto.

Referring to FIG. 2C , when the input voltage VIN is not received from the input terminal 20 (ie, not received), both the direct charger 210 and the buck converter 220 may be deactivated.

When the input voltage VIN is not received from the input terminal 20, the battery device 100 is not charged, and the electronic device 10 uses the battery current IBAT and the battery voltage supplied from the battery device 100. (VBAT). Linear charger 240 may provide battery current IBAT to switched capacitor 230 . The switched capacitor 230 generates a third system current ISYS3 provided to the system load 300 based on the battery current IBAT, and at this time, the control node NCON and the system node NSYS are switched capacitors, respectively. It may correspond to the input terminal and output terminal of (230). For example, the current amount of the battery current IBAT is about 1/2 times the current amount of the third system current ISYS3, and the voltage level of the system voltage VSYS is about 1/2 the voltage level of the control voltage VCON. may be twice as large. In other words, a voltage obtained by reducing the control voltage VCON (or the battery voltage VBAT) by about half may be supplied as the system voltage VSYS through the switched capacitor 230 .

In one embodiment, the operation shown in FIG. 2C may be an operation in a discharge mode.

As described above, the direct charger 210 and the buck converter 220 may be activated or deactivated according to an operation mode. However, the switched capacitor 230 and the linear charger 240 may always maintain an activated state regardless of the operation mode.

The charger integrated circuit 200 according to embodiments of the present invention includes only the buck converter 220 instead of the buck-boost converter, and an additional buck converter may be omitted. In addition, the operation of the switched capacitor 230 is changed depending on whether the input voltage VIN is a variable voltage level (VVL) or a fixed voltage level (VFL), and the switched capacitor 230 applies the system load 300 to the system current ( ISYS1) or the charging current ICG2 may be supplied to the battery device 100. Therefore, the number of ICs, the number of transistors, and circuit area are reduced compared to the conventional structure, and the high battery voltage VBAT of the battery device 100 including the series-connected batteries 110 and 120 is charged and the system voltage VSYS ), it is possible to effectively implement a charging method for stably supplying.

FIG. 3 is a diagram illustrating a specific example of the charger integrated circuit of FIG. 1 and an electronic device including the same. Descriptions overlapping those of FIG. 1 will be omitted.

Referring to FIG. 3 , the electronic device 10a includes a battery device 100, a charger integrated circuit 200a, and a system load 300, and may further include an input terminal 20.

The input terminal 20 , the battery device 100 , and the system load 300 may be substantially the same as the input terminal 20 , the battery device 100 , and the system load 300 of FIG. 1 , respectively.

The charger integrated circuit 200a may include a direct charger 210a, a buck converter 220a, a switched capacitor 230, and a linear charger 240a.

The direct charger 210a corresponds to the direct charger 210 of FIG. 1 and may include a first switch SW1 and a second switch SW2. The first switch SW1 and the second switch SW2 are connected in series between the input terminal 20 and the control node NCON, and have an input voltage VIN (ie, a first charging current based on the input voltage VIN). (ICG1) and the first current IS1 may be provided to the control node NCON.

In one embodiment, each of the first and second switches SW1 and SW2 may include one transistor and one diode. For example, the first switch SW1 includes a first transistor Q1 and a first diode D1, and the second switch SW2 includes a second transistor Q2 and a second diode D2. can do.

Each of the first transistor Q1 and the second transistor Q2 may be an n-type metal oxide semiconductor (NMOS) transistor. For example, the first transistor Q1 includes a first electrode (eg, drain) connected to the input terminal 20, a second electrode (eg, source) connected to the second transistor Q2, and a control electrode (eg, gate). The second transistor Q2 includes a first electrode (eg, source) connected to the first transistor Q1, a second electrode (eg, drain) connected to the control node NCON, and a control electrode (eg, a drain). For example, a gate) may be included. A control signal may be applied to the control electrode of each of the first and second transistors Q1 and Q2.

The first diode D1 includes a first electrode (eg, a cathode) connected to the first electrode of the first transistor Q1 and a second electrode (eg, a cathode) connected to the second electrode of the first transistor Q1. For example, an anode). For example, the first diode D1 is a parasitic diode of the first transistor Q1, and the second transistor Q2 is directed by the first diode D1 even when the first transistor Q1 is turned off. This can prevent unintended leakage current from flowing.

The second diode D2 includes a first electrode (eg, anode) connected to the first electrode of the second transistor Q2 and a second electrode (eg, anode) connected to the second electrode of the second transistor Q2. For example, a cathode) may be included. For example, the second diode D2 is a parasitic diode of the second transistor Q2, and the second diode D2 directs the first transistor Q1 even when the second transistor Q2 is turned off. This can prevent unintended leakage current from flowing.

The buck converter 220a corresponds to the buck converter 220 of FIG. 1 and may include a third switch SW3, a fourth switch SW4, a fifth switch SW5, and a first inductor L1. . The third switch SW3 , the fourth switch SW4 , and the fifth switch SW5 may be connected in series between the input terminal 20 and the ground voltage GND. The third switch SW3 and the fourth switch SW4 are connected in series between the input terminal 20 and the switching node NSW, and generate an input voltage VIN (ie, a second current based on the input voltage VIN ( IC2) and the second system current ISYS2) may be provided to the switching node NSW. The fifth switch SW5 is connected between the switching node NSW and the ground voltage GND, and may provide the ground voltage GND to the switching node NSW. For example, the third switch SW3 may be turned on in the charging mode, and thus the third switch SW3 may be referred to as a charging switch. The fourth switch SW4 and the fifth switch SW5 may be alternately turned on. The first inductor L1 may be connected between the switching node NSW between the fourth switch SW4 and the fifth switch SW5 and the system node NSYS.

In one embodiment, each of the third switch SW3 , the fourth switch SW4 , and the fifth switch SW5 may include one transistor and one diode. For example, the third switch SW3 includes a third transistor Q3 and a third diode D3, and the fourth switch SW4 includes a fourth transistor Q4 and a fourth diode D4. And, the fifth switch SW5 may include a fifth transistor Q5 and a fifth diode D5.

Each of the third transistor Q3, fourth transistor Q4, and fifth transistor Q5 may be an NMOS transistor. For example, the third transistor Q3 includes a first electrode (eg, source) connected to the input terminal 20, a second electrode (eg, drain) connected to the fourth transistor Q4, and a control electrode (eg, gate). The fourth transistor Q4 includes a first electrode (eg, drain) connected to the third transistor Q3, a second electrode (eg, source) connected to the switching node NSW, and a control electrode (eg, drain). For example, a gate) may be included. The fifth transistor Q5 includes a first electrode (eg, drain) connected to the switching node NSW, a second electrode (eg, source) connected to the ground voltage GND, and a control electrode (eg, drain). For example, a gate) may be included. A control signal may be applied to the control electrode of each of the third to fifth transistors Q3, Q4, and Q5.

The third diode D3 includes a first electrode (eg, anode) connected to the first electrode of the third transistor Q3 and a second electrode (eg, anode) connected to the second electrode of the third transistor Q3. For example, a cathode) may be included. For example, the third diode D3 is a parasitic diode of the third transistor Q3, and is directed toward the input terminal 20 by the third diode D3 even when the third transistor Q3 is turned off. Unintended leakage current can be prevented from flowing.

The fourth diode D4 includes a first electrode (eg, a cathode) connected to the first electrode of the fourth transistor Q4 and a second electrode (eg, a cathode) connected to the second electrode of the fourth transistor Q4. For example, an anode). For example, the fourth diode D4 is a parasitic diode of the fourth transistor Q4, and is directed toward the switching node NSW by the fourth diode D4 even when the fourth transistor Q4 is turned off. Unintended leakage current can be prevented from flowing.

The fifth diode D5 includes a first electrode (eg, a cathode) connected to the first electrode of the fifth transistor Q5 and a second electrode (eg, a cathode) connected to the second electrode of the fifth transistor Q5. For example, an anode). For example, the fifth diode D5 is a parasitic diode of the fifth transistor Q5, and is directed toward the ground voltage GND by the fifth diode D5 even when the fifth transistor Q5 is turned off. Unintended leakage current can be prevented from flowing.

The linear charger 240a corresponds to the linear charger 240 of FIG. 1 and may include a sixth switch SW6. The sixth switch SW6 is connected between the control node NCON and the battery device 100, and controls the control voltage VCON (ie, the first charge current ICG1 and the second charge current based on the control voltage VCON). (ICG2) may be provided to the battery device 100 or the battery voltage VBAT (ie, the battery current IBAT based on the battery voltage VBAT) may be provided to the switched capacitor 230 .

In one embodiment, the sixth switch SW6 may include one transistor and one diode. For example, the sixth switch SW6 may include a sixth transistor Q6 and a sixth diode D6.

The sixth transistor Q6 may be a p-type metal oxide semiconductor (PMOS) transistor. For example, the sixth transistor Q6 includes a first electrode (eg, drain) connected to the control node NCON, a second electrode (eg, source) connected to the battery device 100, and A control electrode (eg, gate) may be included. A control signal may be applied to the control electrode of the sixth transistor Q6.

The sixth diode D6 includes a first electrode (eg, anode) connected to the first electrode of the sixth transistor Q6 and a second electrode (eg, anode) connected to the second electrode of the sixth transistor Q6. For example, a cathode) may be included. For example, the sixth diode D6 is a parasitic diode of the sixth transistor Q6, and is directed toward the control node NCON by the sixth diode D6 even when the sixth transistor Q6 is turned off. Unintended leakage current can be prevented from flowing.

In one embodiment, at least one of the first to sixth switches SW1 , SW2 , SW3 , SW4 , SW5 , and SW6 is implemented to have a current control function and can be used as a variable resistor. For example, the first switch SW1 and the second switch SW2 control the current flowing through the direct charger 210a in the fast charging mode (ie, the first charging current ICG1 and the first current IS1). It may have a current control function to control. For example, the third switch SW3 has a current control function to control the current flowing through the buck converter 220a in the normal charging mode (ie, the second current IC2 and the second system current ISYS2). can For example, the sixth switch SW6 controls the current supplied to the battery device 100 (ie, the first charging current ICG1 and the second charging current ICG2) in the fast charging mode and the normal charging mode. It may have a current control function to control. The current control function will be described later with reference to FIG. 7 and the like.

In one embodiment, the first to sixth switches SW1 , SW2 , SW3 , SW4 , SW5 , and SW6 and the first to sixth transistors Q1 , Q2 , Q3 , Q4 , Q5 , and Q6 included therein are It can be driven by a control circuit. For example, the control circuit may correspond to the current control circuit 260 of FIG. 7 and may be implemented in a charger integrated circuit. In another example, the control circuit may correspond to the control circuit 1300 of FIG. 15 and may be implemented outside the charger IC.

Although not shown, according to an embodiment, each of the first to sixth switches SW1 , SW2 , SW3 , SW4 , SW5 , and SW6 uses a body switch instead of the diodes D1 , D2 , D3 , D4 , D5 , and D6 . may also include Each of the first to sixth switches SW1 , SW2 , SW3 , SW4 , SW5 , and SW6 may reduce leakage current by using a body switching technique.

In one embodiment, as shown, direct charger 210a includes two transistors Q1 and Q2, buck converter 220a includes three transistors Q3, Q4, and Q5, and a linear charger 240a includes one transistor Q6, and thus, the number of transistors included in direct charger 210a, buck converter 220a, and linear charger 240a may be six.

However, the present invention is not limited thereto, and according to embodiments, a direct charger may include three or more transistors or only one of the transistors Q1 and Q2, and a buck converter may include four or more transistors or transistors ( less than two of Q3, Q4, and Q5) may be included, and the linear charger may include two or more transistors. However, as described above, the present invention has a structure in which the buck-boost converter is replaced with a buck converter and an additional buck converter is omitted compared to the conventional structure, and thus, the number of ICs, the number of transistors, and the circuit area are reduced compared to the conventional structure. Can have a structure .

The switched capacitor 230 may correspond to the switched capacitor 230 of FIG. 1 . An exemplary configuration of the switched capacitor 230 will be described later with reference to FIG. 5 and the like.

4A, 4B, and 4C are diagrams for explaining the operation of the charger integrated circuit of FIG. 3 and an electronic device including the same. Descriptions overlapping those of FIGS. 2A, 2B, and 2C will be omitted.

Referring to FIG. 4A , when the input voltage VIN is received from the input terminal 20 and the input voltage VIN has a variable voltage level VVL, the direct charger 210a is activated to generate a first and the first and second transistors Q1 and Q2 included in the second switches SW1 and SW2 are turned on, and the buck converter 220a is inactivated so that the third, fourth and fifth switches SW3, The third, fourth, and fifth transistors Q3, Q4, and Q5 included in SW4 and SW5 may be turned off. The switched capacitor 230 and the linear charger 240a are also activated, and the sixth transistor Q6 included in the sixth switch SW6 can be turned on. The first charge current ICG1 is supplied to the battery device 100 through the first, second, and sixth transistors Q1, Q2, and Q6, and the first current IS1 is supplied to the first and second transistors. It may be provided to the switched capacitor 230 through (Q1, Q2). The switched capacitor 230 may generate and supply the first system current ISYS1 and the system voltage VSYS to the system load 300 .

Referring to FIG. 4B , when the input voltage VIN is received from the input terminal 20 and the input voltage VIN has a fixed voltage level VFL, the buck converter 220a is activated to generate a third , the third, fourth, and fifth transistors Q3, Q4, and Q5 included in the fourth and fifth switches SW3, SW4, and SW5 are turned on, and the direct charger 210a is deactivated so that the first and fourth transistors 210a are inactivated. The first and second transistors Q1 and Q2 included in the second switches SW1 and SW2 may be turned off. The switched capacitor 230 and the linear charger 240a are also activated, and the sixth transistor Q6 included in the sixth switch SW6 can be turned on. The second current IC2 is provided to the switched capacitor 230 through the third and fourth transistors Q3 and Q4 and the first inductor L1, and the second system current ISYS2 is the third and fourth The system load 300 may be supplied through the transistors Q3 and Q4 and the first inductor L1. The switched capacitor 230 may generate the second charging current ICG2 and the control voltage VCON and supply them to the battery device 100 through the sixth transistor Q6.

Referring to FIG. 4C , when the input voltage VIN is not received from the input terminal 20, both the direct charger 210a and the buck converter 220a are deactivated, and the first to fifth switches SW1 and SW2 The first to fifth transistors Q1, Q2, Q3, Q4, and Q5 included in , SW3, SW4, and SW5 may all be turned off. The switched capacitor 230 and the linear charger 240a are activated, and the sixth transistor Q6 included in the sixth switch SW6 can be turned on. The battery current IBAT is provided to the switched capacitor 230 through the sixth transistor Q6, and the switched capacitor 230 generates a third system current ISYS3 and a system voltage VSYS to generate a system load 300. can supply to

5 is a block diagram illustrating an example of a switched capacitor included in the charger integrated circuit of FIGS. 1 and 3 .

Referring to FIG. 5 , a switched capacitor 230a may include a first switched capacitor circuit 232 and a second switched capacitor circuit 234 .

The first switched capacitor circuit 232 and the second switched capacitor circuit 234 may be connected in parallel between the control node NCON and the system node NSYS. The first switched capacitor circuit 232 and the second switched capacitor circuit 234 may have substantially the same structure. A detailed configuration of the first switched capacitor circuit 232 will be described later with reference to FIG. 6 .

As described above with reference to FIGS. 2A and 4A , when the input voltage VIN has the variable voltage level VVL, the control node NCON and the system node NSYS are respectively input terminals of the switched capacitor 230a and It can correspond to the output terminal. For example, the switched capacitor 230a receives the first current IS1 through the control node NCON, generates the first system current ISYS1 based on the first current IS1, and the system node ( The first system current ISYS1 may be output through NSYS.

As described above with reference to FIGS. 2B and 4B , when the input voltage VIN has a fixed voltage level VFL, the system node NSYS and the control node NCON are respectively input terminals of the switched capacitor 230a and It can correspond to the output terminal. For example, the switched capacitor 230a receives the second current IC2 through the system node NSYS, generates the second charging current ICG2 based on the second current IC2, and the control node ( The second charging current ICG2 may be output through NCON.

Accordingly, when the input voltage VIN has the variable voltage level VVL, the direction of the current flowing through the switched capacitor 230a (ie, the direction from the control node NCON to the system node NSYS) is When the voltage VIN has the fixed voltage level VFL, the direction of the current flowing through the switched capacitor 230a (ie, the direction from the system node NSYS to the control node NCON) may be opposite to each other.

In one embodiment, the voltage level of the control node NCON may be about twice the voltage level of the system node NSYS. For example, when the input voltage VIN has the variable voltage level VVL, the voltage obtained by reducing the control voltage VCON (or the battery voltage VBAT) by about half through the switched capacitor 230a is the system voltage. (VSYS). When the input voltage VIN has a fixed voltage level VFL, the voltage obtained by boosting the system voltage VSYS by about two times through the switched capacitor 230a is the control voltage VCON (or battery voltage VBAT). can be created with

FIG. 6 is a circuit diagram illustrating an example of a first switched capacitor circuit included in the switched capacitor of FIG. 5 .

Referring to FIG. 6 , the first switched capacitor circuit 232a includes a first switch SW11, a second switch SW12, a third switch SW13, a fourth switch SW14, and a first capacitor C11. can include

The first switch SW11 and the second switch SW12 may be connected in series between the control node NCON and the system node NSYS. The third switch SW13 and the fourth switch SW14 may be connected in series between the system node NSYS and the ground voltage GND. The first capacitor (C11) is a first node (N11) between the first switch (SW11) and the second switch (SW12) and a second node (N12) between the third switch (SW13) and the fourth switch (SW14) can be connected between them.

In one embodiment, each of the first switch SW11, the second switch SW12, the third switch SW13, and the fourth switch SW14 may include one transistor and one diode. For example, the first switch SW11 includes a first transistor Q11 and a first diode D11, and the second switch SW12 includes a second transistor Q12 and a second diode D12. The third switch SW13 may include a third transistor Q13 and a third diode D13, and the fourth switch SW14 may include a fourth transistor Q14 and a fourth diode D14. there is.

Each of the first transistor Q11, second transistor Q12, third transistor Q13, and fourth transistor Q14 may be an NMOS transistor. For example, the first transistor Q11 includes a first electrode (eg, drain) connected to the control node NCON, a second electrode (eg, source) connected to the first node N11, and a control electrode (eg, gate). The second transistor Q12 includes a first electrode (eg, drain) connected to the first node N11, a second electrode (eg, source) connected to the system node NSYS, and a control electrode (eg, drain). For example, a gate) may be included. The third transistor Q13 includes a first electrode (eg, drain) connected to the system node NSYS, a second electrode (eg, source) connected to the second node N12, and a control electrode (eg, drain). For example, a gate) may be included. The fourth transistor Q14 includes a first electrode (eg, drain) connected to the second node N12, a second electrode (eg, source) connected to the ground voltage GND, and a control electrode (eg, drain). For example, a gate) may be included. A control signal may be applied to the control electrode of each of the first to fourth transistors Q11, Q12, Q13, and Q14.

The first diode D11 includes a first electrode (eg, a cathode) connected to the first electrode of the first transistor Q11 and a second electrode (eg, a cathode) connected to the second electrode of the first transistor Q11. For example, an anode). The second diode D12 includes a first electrode (eg, a cathode) connected to the first electrode of the second transistor Q12 and a second electrode (eg, a cathode) connected to the second electrode of the second transistor Q12. For example, an anode). The third diode D13 includes a first electrode (eg, a cathode) connected to the first electrode of the third transistor Q13 and a second electrode (eg, a cathode) connected to the second electrode of the third transistor Q13. For example, an anode). The fourth diode D14 includes a first electrode (eg, cathode) connected to the first electrode of the fourth transistor Q14 and a second electrode (eg, cathode) connected to the second electrode of the fourth transistor Q14. For example, an anode). For example, the first to fourth diodes D1 , D2 , D3 , and D4 are parasitic diodes of the first to fourth transistors Q11 , Q12 , Q13 , and Q14 , and the first to fourth transistors ( Even when Q11, Q12, Q13, and Q14) are turned off, leakage current can be prevented from flowing.

In one embodiment, the first to fourth switches SW11, SW12, SW13, and SW14 and the first to fourth transistors Q11, Q12, Q13, and Q14 included therein may be driven by a control circuit. .

Although not shown in detail, the second switched capacitor circuit 234 included in the switched capacitor 230a of FIG. 5 may also have the structure shown in FIG. 6 .

7 is a block diagram illustrating a charger integrated circuit and an electronic device including the same according to example embodiments. Descriptions overlapping those of FIG. 1 will be omitted.

Referring to FIG. 7 , the electronic device 12 includes a battery device 100 , a charger integrated circuit 202 , and a system load 300 , and may further include an input terminal 20 . The charge integrated circuit 202 includes a direct charger 210, a buck converter 220, a switched capacitor 230 and a linear charger 240, and further includes a current sensing circuit 250 and a current control circuit 260 can do.

Except that the charger integrated circuit 202 further includes a current sensing circuit 250 and a current control circuit 260, the charger integrated circuit 202 and the electronic device 12 are the charger integrated circuit 200 of FIG. and may be substantially the same as that of the electronic device 10 .

The current sensing circuit 250 senses the current I1 flowing through the direct charger 210 to generate a first sensing signal SEN1, and senses the current I2 flowing through the buck converter 220 to generate a second sensing signal. SEN2 is generated, and the third sensing signal SEN3 may be generated by sensing the current I3 flowing through the linear charger 240 . For example, current I1 includes a first charge current ICG1 and a first current IS1, current I2 includes a second current IC2 and a second system current ISYS2, The current I3 may include one of the first charging current ICG1 , the second charging current ICG2 , and the battery current IBAT.

The current control circuit 260 controls the first current control signal CS1 for controlling the direct charger 210, the second current control signal CS2 for controlling the buck converter 220, and the linear charger 240 It is possible to generate a third current control signal CS3 for For example, the first, second, and third current control signals CS1 , CS2 , and CS3 may be generated based on the first, second, and third sensing signals SEN1 , SEN2 , and SEN3 .

The direct charger 210 performs a current control function based on the first current control signal CS1, the buck converter 220 performs a current control function based on the second current control signal CS2, and the linear charger 240 may perform a current control function based on the third current control signal CS3.

8A, 8B, and 8C are diagrams illustrating specific examples of the charger integrated circuit of FIG. 7 and an electronic device including the same. Descriptions overlapping those of FIGS. 3, 4a, 4b, 4c, and 7 will be omitted.

Referring to FIGS. 8A, 8B, and 8C, the electronic device 12a includes a battery device 100, a charger integrated circuit 202a, and a system load 300, and may further include an input terminal 20. The charger integrated circuit 202a includes a direct charger 210a, a buck converter 220a, a switched capacitor 230 and a linear charger 240a, and the current sensing circuit 250 and the current control circuit 260 of FIG. 7 may further include. For convenience of illustration, the current sensing circuit 250 and the current control circuit 260 are omitted.

As shown in FIG. 8A, when the input voltage VIN has a variable voltage level VVL, the first switch SW1, the first transistor Q1, and the second switch ( included in the direct charger 210a) SW2) and the second transistor Q2 perform an input current control function, and the sixth switch SW6 and the sixth transistor Q6 included in the linear charger 240a perform a charging current control function ( charging current regulation).

Specifically, the current I1 flowing through the direct charger 210a (that is, flowing through the first and second switches SW1 and SW2) is sensed by the current sensing circuit 250, and the current control circuit 260 The first current control signal CS1 generated by may be applied to the control electrode (ie, gate) of the first transistor Q1. When the current I1 exceeds the first reference value, the resistance value of the first transistor Q1 is changed based on the first current control signal CS1 to reduce the current I1 to the first reference value or less. can be limited

Similarly, the current I31 flowing through the linear charger 240a (that is, flowing through the sixth switch SW6) is sensed by the current sensing circuit 250 and the current generated by the current control circuit 260. The control signal CS31 may be applied to the control electrode (ie, gate) of the sixth transistor Q6. The current I31 and the current control signal CS31 may be included in the current I3 and the third current control signal CS3 of FIG. 7 , respectively. When the current I31 exceeds the second reference value, the resistance value of the sixth transistor Q6 is changed based on the current control signal CS31 to limit the current I31 to the second reference value or less. can For example, the second reference value may be different from the first reference value.

In the example of FIG. 8A , current I1 may correspond to the sum of first charging current ICG1 and first current IS1 , and current I31 may correspond to first charging current ICG1 . Therefore, the first charging current ICG1 can be identified by sensing the current I31, and the first current IS1 ( That is, the first system current (ISYS1) can be checked.

As shown in FIG. 8B, when the input voltage VIN has a fixed voltage level VFL, the third switch SW3 and the third transistor Q3 included in the buck converter 220a have an input current control function. , and the sixth switch SW6 and the sixth transistor Q6 included in the linear charger 240a may perform a charging current control function.

Specifically, the current I2 flowing through the buck converter 220a (that is, flowing through the third switch SW3) is sensed by the current sensing circuit 250, and the second current I2 generated by the current control circuit 260 is sensed. The current control signal CS2 may be applied to the control electrode (ie, gate) of the third transistor Q3. When the current I2 exceeds the third reference value, the resistance value of the third transistor Q3 is changed based on the second current control signal CS2 to reduce the current I2 to the third reference value or less. can be limited Alternatively, the current I2 may be limited to the third reference value or less by controlling the fourth transistor Q4 and the fifth transistor Q5. For example, the third reference value may be the same as or different from the first reference value.

Similarly, the current I32 flowing through the linear charger 240a (that is, flowing through the sixth switch SW6) is sensed by the current sensing circuit 250, and the current generated by the current control circuit 260 The control signal CS32 may be applied to the control electrode (ie, gate) of the sixth transistor Q6. The current I32 and the current control signal CS32 may be included in the current I3 and the third current control signal CS3 of FIG. 7 , respectively. When the current I32 exceeds the fourth reference value, the resistance value of the sixth transistor Q6 is changed based on the current control signal CS32 to limit the current I32 to the fourth reference value or less. can For example, the fourth reference value may be different from the third reference value and may be the same as or different from the second reference value.

In the example of FIG. 8B , current I2 may correspond to the sum of second current IC2 and second charging current ICG2 , and current I32 may correspond to second charging current ICG2 . Accordingly, the second charging current ICG2 may be identified by sensing the current I32, and the second current IC2 ( That is, the second system current (ISYS2) can be checked.

As shown in FIG. 8C , when the input voltage VIN is not received, the sixth switch SW6 and the sixth transistor Q6 included in the linear charger 240a may perform a charging current control function. .

Specifically, the current I33 flowing through the linear charger 240a (that is, flowing through the sixth switch SW6) is sensed by the current sensing circuit 250, and the current control circuit 260 controls the current generated. Signal CS33 may be applied to the control electrode (ie, gate) of the sixth transistor Q6. The current I33 and the current control signal CS33 may be included in the current I3 and the third current control signal CS3 of FIG. 7 , respectively. When the current I33 exceeds the fifth reference value, the resistance value of the sixth transistor Q6 is changed based on the current control signal CS33 to limit the current I33 to the fifth reference value or less. can For example, the fifth reference value may be the same as or different from the second and fourth reference values.

In the example of FIG. 8C , current I33 may correspond to battery current IBAT. Accordingly, the battery current IBAT may be checked by sensing the current I33.

9 and 10 are block diagrams illustrating a charger integrated circuit and an electronic device including the same according to embodiments of the present invention. Descriptions overlapping those of FIG. 1 will be omitted.

Referring to FIG. 9 , the electronic device 14 includes a battery device 100 , a charger integrated circuit 204 , and a system load 300 , and may further include an input terminal 20 . The charger integrated circuit 204 includes a direct charger 210, a buck converter 220, a switched capacitor 230, and a linear charger 240, and may further include a functional circuit 270.

Except that the charger integrated circuit 204 further includes a functional circuit 270, the charger integrated circuit 204 and the electronic device 14 are substantially the same as the charger integrated circuit 200 and the electronic device 10 of FIG. can be the same as

The function circuit 270 is connected to the input terminal 20 and may support or perform at least one of various functions to properly operate even under a power saving condition. For example, the various functions include an under-voltage lockout (UVLO) function, an over-current protection (OCP) function, an over-voltage protection (OVP) function, and a soft -Can include soft-start function, foldback current limit function, hiccup mode function for short circuit protection, over-temperature protection (OTP) function, etc. .

Referring to FIG. 10 , the electronic device 16 includes a battery device 106, a charger integrated circuit 200, and a system load 300, and may further include an input terminal 20. The charger integrated circuit 200 may include a direct charger 210 , a buck converter 220 , a switched capacitor 230 and a linear charger 240 .

Except for some changes in the configuration of the battery device 106 , the electronic device 16 may be substantially the same as the electronic device 10 of FIG. 1 .

The battery device 106 may include first to Nth (N is a natural number equal to or greater than 3) batteries 110 , 120 , and 130 connected in series.

Depending on the embodiment, two or more of the embodiments of FIGS. 7, 9 and 10 may be combined. For example, the electronic device 12 and the charger integrated circuit 202 of FIG. 7 may further include at least one of the functional circuit 270 of FIG. 9 and the battery device 106 of FIG. 10 .

11 is a flowchart illustrating an operating method of a charger integrated circuit according to example embodiments.

Referring to FIGS. 1, 2a, 2b, 2c and 11 , in the method of operating the charger according to the embodiments of the present invention, it is checked whether the input voltage VIN is received from the input terminal 20 (step S100). . When the input voltage VIN is received from the input terminal 20 (step S100: Yes), it is checked whether the input voltage VIN has a variable voltage level VVL or a fixed voltage level VFL ( Step S200).

When the input voltage VIN is received from the input terminal 20 (Step S100: Yes), and when the input voltage VIN has a variable voltage level (VVL) (Step S200: Yes), the direct charger 210 ) and the switched capacitor 230 to generate the first charging current ICG1 and the first system current ISYS1 (step S300).

When the input voltage VIN is received from the input terminal 20 (step S100: Yes), and when the input voltage VIN does not have a variable voltage level VVL, that is, when it has a fixed voltage level VFL In (step S200: No), the second charging current ICG2 and the second system current ISYS2 are generated using the buck converter 220 and the switched capacitor 230 (step S400).

When the input voltage VIN is not received from the input terminal 20 (step S100: No), the third system current ISYS3 is generated using the switched capacitor 230 (step S500).

FIG. 12 is a flowchart illustrating an example of generating the first charging current and the first system current of FIG. 11 .

2A, 11 and 12, in generating the first charging current ICG1 and the first system current ISYS1 (step S300), the direct charger 210 is activated and the buck converter 220 is deactivated. It can (step S310). The direct charger 210 may generate the first charging current ICG1 and the first current IS1 based on the input voltage VIN (step S320). The first charging current ICG1 may be supplied to the battery device 100 through the linear charger 240 . The switched capacitor 230 may generate the first system current ISYS1 based on the first current IS1 (step S330). The first system current ISYS1 may be supplied to the system load 300 .

13 is a flowchart illustrating an example of generating the second charging current and the second system current of FIG. 11 .

2b, 11 and 13, in generating the second charge current ICG2 and the second system current ISYS2 (step S400), the buck converter 220 is activated and the direct charger 210 is deactivated. It can (step S410). The buck converter 220 may generate the second current IC2 and the second system current ISYS2 based on the input voltage VIN (step S420). The second system current ISYS2 may be supplied to the system load 300 . The switched capacitor 230 may generate the second charging current ICG2 based on the second current IC2 (step S430). The second charging current ICG2 may be supplied to the battery device 100 through the linear charger 240 .

FIG. 14 is a flowchart illustrating an example of generating a third system current of FIG. 11 .

Referring to FIGS. 2C, 11, and 14 , in generating the third system current ISYS3 (step S500), the switched capacitor 230 uses the battery current IBAT supplied from the battery device 100 to generate the third system current ISYS3. The system current ISYS3 may be generated (step S510). The third system current ISYS3 may be supplied to the system load 300 . At this time, both the direct charger 210 and the buck converter 220 may be deactivated.

15 and 16 are block diagrams illustrating electronic devices according to embodiments of the present invention.

Referring to FIG. 15 , the electronic device 1000 may include a Power Management Integrated Circuit (PMIC) 1100, and a battery device 100 may be installed in the electronic device 1000. The PMIC 1100 may include a charger integrated circuit 200b, a wireless power receiver 1200, a control circuit 1300, and a fuel gauge 1400. Although not shown in detail, the PMIC 1100 may further include an LED driver, a USB Type-C circuit, and the like.

The battery device 100 and the charger integrated circuit 200b may be substantially the same as the battery device 100 and the charger integrated circuit 200 of FIG. 1 , respectively. The charger integrated circuit 200b is implemented according to the embodiments of the present invention, and the number of ICs, the number of transistors, and circuit area are reduced compared to the conventional structure, and the battery device 100 including the batteries 110 and 120 connected in series. It is possible to effectively implement a charging method for stably supplying the system voltage (VSYS) while charging the high battery voltage (VBAT) of .

In one embodiment, the charger integrated circuit 200b may support a wired charging mode and a wireless charging mode. In the wired charging mode, the charger integrated circuit 200b may receive the input voltage VIN from the output terminal of the TA through the input terminal 20 . In the wireless charging mode, the direct charger 210 may be deactivated and the charger integrated circuit 200b may receive wireless power from the wireless power receiver 1200 . The wireless power receiver 1200 may generate power according to a wireless charging method, and the wireless charging method may be one of various wireless charging methods such as magnetic induction, magnetic resonance, electromagnetic induction, and non-radiative wireless charging (WiTricity). For example, the wireless power receiver 1200 may be implemented as a wireless rectifier.

In one embodiment, the wireless power receiver 1200 may be implemented as a unit for both wireless charging and magnetic secure transmission (MST). In this case, the charger integrated circuit 200b may further support the MST mode. When the electronic device 1000 containing credit card information directly or indirectly contacts a credit card payment terminal (for example, a POS terminal), the MST determines the credit card information embedded in the electronic device 1000. is a technology that automatically loads and proceeds with payment. With the MST technology, credit card information can be transmitted to a credit card payment terminal through a magnetic signal. In the MST mode, the direct charger 210 may be deactivated, and the charger integrated circuit 200b may be electrically connected to the wireless power receiver 1200.

The control circuit 1300 may control the operation of the charger integrated circuit 200b. For example, the control circuit 1300 may drive switches or transistors included in the charger integrated circuit 200b according to at least one of a fast charging mode, a normal charging mode, and a discharging mode. Also, the control circuit 1300 may control the voltage level of the input voltage VIN applied to the charger integrated circuit 200b. However, the present invention is not limited thereto, and the function of the control circuit 1300 may be performed in a Micro Controller Unit (MCU), and the MCU may be disposed outside the PMIC 1100.

The fuel gauge 1400 may monitor remaining capacity, voltage, current, or temperature of the battery device 100 and may be referred to as a battery gauge. In one embodiment, the fuel gauge 1400 may be connected to at least one sensing resistor connected to at least one of the first and second batteries 110 and 120 included in the battery device 100, whereby the first and second batteries 110 and 120 may be connected. A battery current flowing in at least one of the second batteries 110 and 120 may be monitored. However, the present invention is not limited thereto, and the fuel gauge 1400 may be disposed outside the PMIC 1100 or may be included in the battery device 100.

Referring to FIG. 16 , an electronic device 2000 may include a battery device 100 , a charger integrated circuit 200 , an application processor (AP) 2100 , and a PMIC 2200 . The electronic device 2000 may include a charger integrated circuit 200 for receiving power from the outside and charging the battery device 100 .

The battery device 100 and the charger integrated circuit 200 may be substantially the same as the battery device 100 and the charger integrated circuit 200 of FIG. 1 , respectively. The charger integrated circuit 200 is implemented according to the embodiments of the present invention, and the number of ICs, the number of transistors, and circuit area are reduced compared to the conventional structure, and the battery device 100 including the batteries 110 and 120 connected in series. It is possible to effectively implement a charging method for stably supplying the system voltage (VSYS) while charging the high battery voltage (VBAT) of .

The AP 2100 may control the electronic device 2000 as a whole. In one embodiment, the AP 2100 may control the charger IC 200, and may control the charger IC 200 in a fast charging mode, a normal charging mode, or a discharging mode, for example. In one embodiment, when the electronic device 2000 is connected to the TA, the AP 2100 may communicate with the TA to adjust the input voltage VIN output from the TA.

In one embodiment, the AP 2100 may be implemented as a System-on-Chip (SoC) that includes one or more modules or IPs. For example, the AP 2100 includes a communication module (eg, code division multiple access (CDMA) module, long term evolution (LTE) module, 5G module, radio frequency (RF) module, UWB module) for performing a communication function. (ultra wideband) module, wireless local area network (WLAN) module, worldwide interoperability for microwave access (WIMAX) module, etc.), camera module to perform camera function, display module to perform display function, touch input function It may include a touch panel module for doing so. For example, the AP 2100 may further include a global positioning system (GPS) module, a microphone module, a speaker module, and a gyroscope module. However, the type of module or IP provided in the AP 2100 may not be limited thereto.

The PMIC 2200 may receive a battery voltage and manage power required for driving the AP 2100 . Also, the PMIC 2200 may be implemented to generate or manage voltages required for internal components of the electronic device 2000 . According to embodiments, the electronic device 2000 may include a plurality of PMICs including the PMIC 2200. In one embodiment, the PMIC 2200 may receive a battery voltage from the battery device 100 . In one embodiment, the PMIC 2200 may receive a system voltage through the charger integrated circuit 200 . In one embodiment, PMIC 2200 may directly receive the input voltage VIN.

Embodiments of the present invention may be usefully used in any electronic device and system including a charger integrated circuit and a battery device. For example, embodiments of the present invention may be used in personal computers (PCs), server computers, data centers, workstations, laptops, cellular phones, and smart phones. phone), MP3 player, PDA (Personal Digital Assistant), PMP (Portable Multimedia Player), digital TV, digital camera, portable game console, navigation device, wearable device, IoT (Internet Electronic systems such as Things of Things (IoT) devices, IoE (Internet of Everything) devices, e-books, VR (Virtual Reality) devices, AR (Augmented Reality) devices, drones, automotive, etc. may be more useful.

Although the above has been described with reference to preferred embodiments of the present invention, those skilled in the art can variously modify and change the present invention without departing from the spirit and scope of the present invention described in the claims below. you will understand that you can

Claims (20)

A charger integrated circuit for charging a battery device including a first battery and a second battery connected in series,
a direct charger for generating a first charging current for charging the battery device and a first system current for generating a first system current provided to a system load, based on an input voltage received from an input terminal;
a buck converter generating a second current for generating a second charging current for charging the battery device and a second system current provided to the system load, based on the input voltage;
a switched capacitor generating the first system current based on the first current and generating the second charging current based on the second current; and
and a linear charger providing the first charging current and the second charging current to the battery device. According to claim 1,
When the input voltage has a variable voltage level, the direct charger is activated to generate the first charge current and the first current based on the input voltage, the buck converter is deactivated, and the switched capacitor and generating the first system current based on the first current. According to claim 1,
When the input voltage has a fixed voltage level, the buck converter is activated to generate the second current and the second system current based on the input voltage, the direct charger is deactivated, and the switched capacitor and generating the second charging current based on the second current. The method of claim 1, wherein the buck converter,
first, second and third switches connected in series between the input terminal and a ground voltage; and
and a first inductor connected between a switching node between the second switch and the third switch and a system node connected to the system load. According to claim 4,
wherein the first switch has a current control function to control the second current and the second system current. The method of claim 1, wherein the switched capacitor,
and first and second switched capacitor circuits connected in parallel between a control node connected to the direct charger and the linear charger and a system node connected to the system load. 7. The method of claim 6, wherein the first switched capacitor circuit,
first and second switches connected in series between the control node and the system node;
third and fourth switches connected in series between the system node and a ground voltage; and
and a first capacitor connected between a first node between the first switch and the second switch and a second node between the third switch and the fourth switch. According to claim 6,
When the input voltage has a variable voltage level, the switched capacitor receives the first current through the control node, generates the first system current based on the first current, and generates the first system current through the system node. outputting the first system current;
When the input voltage has a fixed voltage level, the switched capacitor receives the second current through the system node, generates the second charging current based on the second current, and generates the second charging current through the control node. and outputting the second charging current. According to claim 8,
The direction of the current flowing through the switched capacitor when the input voltage has a variable voltage level is opposite to the direction of the current flowing through the switched capacitor when the input voltage has a fixed voltage level. Circuit. According to claim 6,
The voltage level of the control node is twice the voltage level of the system node. The method of claim 1, wherein the direct charger,
and first and second switches connected in series between the input terminal and a control node connected to the switched capacitor and the linear charger. According to claim 11,
wherein the first switch has the first charging current and a current control function to control the first current. The method of claim 1, wherein the linear charger,
and a first switch connected between a control node connected to the direct charger and the switched capacitor and the battery device. According to claim 13,
The first switch has a current control function to control the first charging current and the second charging current. According to claim 1,
The charger integrated circuit, characterized in that the number of transistors included in the direct charger, the buck converter and the linear charger is six. According to claim 1,
Further comprising a current control circuit for generating a first current control signal for controlling the direct charger, a second current control signal for controlling the buck converter, and a third current control signal for controlling the linear charger. A charger integrated circuit made of. 17. The method of claim 16,
Generating a first sensing signal by sensing the first charging current and the first current flowing through the direct charger, and generating a second sensing signal by sensing the second current and the second system current flowing through the buck converter and a current sensing circuit generating a third sensing signal by sensing the first charging current and the second charging current flowing through the linear charger,
The current control circuit generates the first, second and third current control signals based on the first, second and third sensing signals. According to claim 1,
When the input voltage is not received from the input terminal, the switched capacitor generates a third system current provided to the system load based on the battery current supplied from the battery device. a battery device including a first battery and a second battery connected in series;
a charging integrated circuit for charging the battery device; and
A system load operating based on an input voltage received from an input terminal and a battery voltage received from the battery device;
The charging integrated circuit,
a direct charger configured to generate a first charging current for charging the battery device and a first current for generating a first system current provided to the system load, based on the input voltage;
a buck converter generating a second current for generating a second charging current for charging the battery device and a second system current provided to the system load, based on the input voltage;
a switched capacitor generating the first system current based on the first current and generating the second charging current based on the second current; and
An electronic device comprising a linear charger providing the first charging current and the second charging current to the battery device. A charger integrated circuit for charging a battery device including a first battery and a second battery connected in series,
It is activated when an input voltage received from an input terminal has a variable voltage level, and generates a first charging current for charging the battery device and a first system current provided to a system load based on the input voltage. 1 A direct charger that generates current and is deactivated when the input voltage has a fixed voltage level;
Activated when the input voltage has the fixed voltage level, a second current for generating a second charging current for charging the battery device based on the input voltage and a second system current provided to the system load a buck converter that generates a buck converter that is deactivated when the input voltage has the variable voltage level;
The first system current is generated based on the first current when the input voltage has the variable voltage level, and the second system current is generated based on the second current when the input voltage has the fixed voltage level. a switched capacitor that generates a charging current; and
Providing the first charging current to the battery device when the input voltage has the variable voltage level and providing the second charging current to the battery device when the input voltage has the fixed voltage level Includes a linear charger,
The direct charger,
Including first and second switches connected in series between the input terminal and the control node,
The buck converter,
third, fourth and fifth switches connected in series between the input terminal and a ground voltage; and
A first inductor connected between a switching node between the fourth switch and the fifth switch and a system node connected to the system load,
The linear charger,
And a sixth switch connected between the control node and the battery device,
Each of the first, second, third, fourth, fifth and sixth switches includes one transistor and one diode.

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