KR20230026202A - Complementary structed opamp with common mode feedback gain and method for operating the same - Google Patents

Abstract

Disclosed are a complementary structured operational amplifier with common mode negative feedback gain and a method for operating the same. The complementary structured operational amplifier with common mode negative feedback gain according to an embodiment of the present invention comprises: an input unit which generates a plurality of reference signals for generating a pair of output signals according to a pair of input signals, based on the pair of input signals; a feedback unit which generates a pair of common mode signals based on a feedback signal corresponding to the pair of output signals and a common mode voltage; and an output unit which generates the pair of output signals based on the plurality of reference signals and the pair of common mode signals.

Description

Complementary operational amplifier with common mode negative feedback gain and its driving method

The present invention relates to an operational amplifier having a complementary structure having a common mode negative feedback gain and a method for driving the same. For example, the present disclosure relates to a wideband operational amplifier having a complementary structure having a high OP1dB and a common mode negative feedback gain, and a driving method thereof.

Operational amplifier (op-amp) is an integrated circuit designed to have a function of amplifying a signal and a function of performing an operation. Such an operational amplifier is composed of a negative feedback system to obtain a more accurate gain. and can be used

In this regard, it is important for an operational amplifier to have a wide input range, fast operating speed, and high gain in order to have an accurate gain. In addition, these design requirements require a minimum change rate due to process issues and a common mode negative feedback system having a high gain that prevents saturation of the output DC level.

In particular, these operational amplifiers can be usefully applied to applications requiring a wide input and high gain, and a negative feedback system in such an electronic system is very important to obtain accurate gain. Specifically, operational amplifiers are used for signal transmission in the baseband stage for signal processing of transceivers and sensors, and can be used for miniaturized and broadband devices required for low-voltage design, which has recently become increasingly important.

The background technology of the present application is disclosed in Korean Patent Registration No. 10-2070394.

The present application is to solve the problems of the prior art described above, and by designing a structure in which an N-type MOSFET device (NMOS) and a P-type MOSFET device (PMOS) are mutually symmetrical, a wide input range, fast operating speed, high gain, and output An object of the present invention is to provide an operational amplifier of a complementary structure having a common mode negative feedback gain having a performance improvement effect such as preventing DC level saturation and a driving method thereof.

However, the technical problem to be achieved by the embodiments of the present application is not limited to the technical problems described above, and other technical problems may exist.

As a technical means for achieving the above technical problem, an operational amplifier having a complementary structure having a common mode negative feedback gain according to an embodiment of the present invention is for generating a pair of output signals according to a pair of input signals. An input unit for generating a plurality of reference signals based on the pair of input signals, a feedback unit for generating a pair of common mode signals based on a feedback signal and a common mode voltage corresponding to the pair of output signals, and the plurality of reference signals. and an output unit configured to generate the pair of output signals based on the reference signal of and the pair of common mode signals.

Also, the pair of input signals may include a first input that is an N-type input signal and a second input that is a P-type input signal.

In addition, the input unit includes a first input unit including a pair of NMOS devices outputting a first reference signal and a second reference signal among the plurality of reference signals based on the first input and the second input, and the first input unit and the second input unit. and a second input unit including a pair of PMOS devices outputting a third reference signal and a fourth reference signal among the plurality of reference signals based on one input and the second input.

In addition, the first input is applied to the gate of any one of the pair of NMOS devices, and the second input is applied to the gate of the other one of the pair of NMOS devices to form an N-type signal path. .

In addition, the first input is applied to the gate of any one of the pair of PMOS devices, and the second input is applied to the gate of the other one of the pair of PMOS devices to form a P-type signal path. .

In addition, a first current source may be disposed between a common source node and a ground voltage node of the pair of NMOS devices.

In addition, a second current source may be disposed between a common source node and a power voltage node of the pair of PMOS devices.

The feedback unit may include a first feedback unit including a pair of PMOS devices to generate a first common mode signal from among the pair of common mode signals based on the feedback signal and the common mode voltage, and the feedback signal and and a second feedback unit including a pair of NMOS devices to generate a second common mode signal from among the pair of common mode signals based on the common mode voltage.

The output unit forms the N-type signal path based on the second common mode signal, the first bias voltage, the first reference signal, and the second reference signal, or the first common mode signal and the second bias voltage. A first stage including a plurality of elements forming the P-type signal path based on a voltage, the third reference signal, and the fourth reference signal, and the pair of output signals based on the output signal of the first stage It may include a second stage to generate.

In addition, the first stage may have a complementary structure in which a plurality of PMOS devices involved in the N-type signal path and a plurality of NMOS devices involved in the P-type signal path are symmetrically arranged.

In addition, the second stage may have a complementary structure in which a pair of PMOS devices having a source node connected to a power supply voltage node and a pair of NMOS devices having a source node connected to a ground voltage node are symmetrically arranged. .

Also, some of the plurality of devices of the first stage connected to gate nodes of the pair of NMOS devices of the second stage may form an N-type feedback path associated with the first feedback unit.

Also, some of the plurality of devices of the first stage connected to the gate node of the pair of PMOS devices of the second stage may form a P-type feedback path associated with the second feedback unit.

Meanwhile, a method of driving an operational amplifier having a complementary structure having a common mode negative feedback gain according to an embodiment of the present invention includes: (a) a plurality of input units for generating a pair of output signals according to a pair of input signals; generating a reference signal based on the pair of input signals; (b) generating, by an output unit, the pair of output signals based on the plurality of reference signals and a pair of common mode signals; and (c) The method may include generating, by a feedback unit, the pair of common mode signals based on a feedback signal corresponding to the pair of output signals and a common mode voltage.

The above-described problem solving means are merely exemplary and should not be construed as limiting the present disclosure. In addition to the exemplary embodiments described above, additional embodiments may exist in the drawings and detailed description of the invention.

According to the above-described problem solving means of the present application, the N-type MOSFET device (NMOS) and the P-type MOSFET device (PMOS) are designed in a mutually symmetrical structure, resulting in a wide input range, fast operating speed, high gain, and prevention of output DC level saturation It is possible to provide an operational amplifier of a complementary structure having a common mode negative feedback gain having performance improvement effects such as and the like, and a driving method thereof.

According to the above-described problem solving means of the present application, the input DC level can be extended to a wide range from the power supply voltage to the ground voltage through a structure in which NMOS and PMOS are symmetrical.

According to the above-described problem solving means of the present application, the common mode negative feedback system for preventing saturation of the output DC level is designed in a structure in which NMOS and PMOS are symmetrical, so that the output DC level is changed from the power supply voltage to the ground voltage according to the common mode input voltage. can be adjusted within a wide range.

According to the above-mentioned problem solving means of the present invention, as the level of the common mode voltage and the output direct current level become equal due to the high common mode negative feedback gain, the DC offset on the output side caused by the current error between the NMOS device and the PMOS device is reduced. can be corrected.

However, the effects obtainable herein are not limited to the effects described above, and other effects may exist.

1 is an overall circuit diagram of an operational amplifier having a complementary structure having a common mode negative feedback gain according to an embodiment of the present invention.
2A and 2B are diagrams illustrating an input unit provided in a complementary structure including a first input unit and a second input unit and different signal paths corresponding thereto.
3A and 3B are diagrams illustrating a feedback unit provided in a complementary structure including a first feedback unit and a second feedback unit and different feedback paths corresponding thereto.
4A and 4B are diagrams illustrating a stage structure of an output unit.
5 is a diagram showing a small signal equivalent circuit of a main path of an operational amplifier having a complementary structure having a common mode negative feedback gain according to an embodiment of the present invention.
6A and 6B are diagrams illustrating a small signal equivalent circuit of a common mode feedback (CMFB) part by a feedback unit.
7 is a graph showing an output voltage according to a common mode input voltage.
8 is a graph showing a transconductance value according to an input voltage.
9 is a graph showing a frequency transfer function according to an input voltage.
10 is a graph showing common mode negative feedback stability according to common mode input voltage.
11 is a graph showing a phase margin according to an input voltage and a common mode voltage.
12 is an operation flowchart of a method of driving an operational amplifier having a complementary structure having a common mode negative feedback gain according to an embodiment of the present invention.

Hereinafter, embodiments of the present application will be described in detail so that those skilled in the art can easily practice with reference to the accompanying drawings. However, the present disclosure may be implemented in many different forms and is not limited to the embodiments described herein. And in order to clearly describe the present application in the drawings, parts irrelevant to the description are omitted, and similar reference numerals are attached to similar parts throughout the specification.

Throughout the present specification, when a part is said to be “connected” to another part, it is not only “directly connected”, but also “electrically connected” or “indirectly connected” with another element in between. "Including cases where

Throughout the present specification, when a member is referred to as being “on,” “above,” “on top of,” “below,” “below,” or “below” another member, this means that a member is located in relation to another member. This includes not only the case of contact but also the case of another member between the two members.

Throughout the present specification, when a certain component is said to "include", it means that it may further include other components without excluding other components unless otherwise stated.

The present invention relates to an operational amplifier having a complementary structure having a common mode negative feedback gain and a method for driving the same. For example, the present disclosure relates to a wideband operational amplifier having a complementary structure having a high OP1dB and a common mode negative feedback gain, and a driving method thereof.

1 is an overall circuit diagram of an operational amplifier having a complementary structure having a common mode negative feedback gain according to an embodiment of the present invention.

Referring to FIG. 1, an operational amplifier 10 having a complementary structure having a common mode negative feedback gain according to an embodiment of the present invention (hereinafter, referred to as 'operational amplifier 10') includes an input unit 100, feedback It may include a unit 200 and an output unit 300 .

Referring to FIG. 1, the operational amplifier 10 disclosed herein is designed with a structure in which signals are simultaneously input to the gates of an NMOS (N-MOSFET) device and a P-MOSFET (PMOSFET) device and transmit the signal. In the case of a conventional general operational amplifier designed to include only a type of MOSFET, the input range is structurally limited, but the operational amplifier 10 according to an embodiment of _the present invention provides a It is possible to apply an input DC level with a wide range, and through the symmetric (complementary) structure of the NMOS part and the PMOS part, the common mode negative feedback gain is also reduced from the power supply voltage (V _DD ) to the ground voltage (GND) can be used.

Meanwhile, in the operational amplifier 100 disclosed herein, the level of the common mode voltage and the output direct current level can be equal to each other due to such a high common mode negative feedback gain, and accordingly, an NMOS (N-MOSFET) device and a PMOS (P-MOSFET) device ) can operate to correct the output direct current offset (DC offset) due to the current error occurring between the elements.

Hereinafter, the function and operation of the input unit 100 of the operational amplifier 10 will be described with reference to FIGS. 2A and 2B.

2A and 2B are diagrams illustrating an input unit provided in a complementary structure including a first input unit and a second input unit and different signal paths corresponding thereto.

2A and 2B, the input unit 100 includes a plurality of reference signals ( NOUTN , NOUTP , POUTN ) for generating a pair of output signals ( OUTN , OUTP ) according to a pair of input signals ( INN , INP ). , POUTP ) can be generated based on a pair of input signals ( INN , INP ).

Here, the pair of input signals may include a first input INN that is an N-type input signal and a second input INP that is a P-type input signal.

In other words, unlike the typical structure of a conventional operational amplifier, the operational amplifier 10 disclosed herein has an input unit 100 having a complementary (symmetrical) structure of NMOS and PMOS, and the V of the NMOS device by the input voltage. _{The gs} voltage and the voltage of V _sg of the PMOS can be amplified at the same time.

Specifically, referring to FIG. 2A , the input unit 100 outputs a first reference signal NOUTN and a second reference signal NOUTP among a plurality of reference signals based on the first input INN and the second input INP . A first input unit 110 including a pair of NMOS devices 111 and 112 outputting may be provided.

In addition, referring to FIG. 2A , a first current source 113 is disposed between a common source node of the pair of NMOS devices 111 and 112 of the first input unit 110 and the ground voltage node GND . can

Referring to FIG. 2B , the input unit 100 outputs a third reference signal POUTN and a fourth reference signal POUTP among a plurality of reference signals based on the first input INN and the second input INP . A second input unit 120 including a pair of PMOS devices 121 and 122 may be provided.

In addition, referring to FIG. 2B , a second current source 123 is disposed between a common source node of the pair of PMOS devices 121 and 122 of the second input unit 120 and the power voltage node VDD . can

According to one embodiment of the present application, the operational amplifier 10 is designed in a structure including current sources 113 and 123 connected to the source node of each MOSFET element in the input unit 100, and thus the current source disposed at the input terminal. (In other words, the tail current source) can determine the size of the current, so the transconductance can be increased without additional current consumption, and thus the range of input power can be relatively widened.

In addition, referring to FIGS. 2A and 2B, due to the complementary (symmetrical) structures of the first input unit 110 and the second input unit 120, mutually distinguished N-type signal paths and P-type signal paths can be formed. there is.

In this regard, FIG. 2A shows an N-type signal path including a part of the output unit 300 interlocking with the first input unit 110 as a relatively thick line, distinguishing it from the rest of the path. FIG. A P-type signal path made to include the part of the output unit 30 interlocking with the second input unit 120 is shown as a relatively dark line to distinguish it from the rest of the path.

Specifically, the first input INN in the first input unit 110 is any one of the pair of NMOS elements 111 and 112 of the first input unit 110 (for example, referring to FIG. 2A, reference numeral 111), and the second input ( INP ) is the other one of the pair of NMOS devices 111 and 112 of the first input unit 110 (see, for example, FIG. 2A). , NMOS device of reference numeral 112) may be applied to the gate (Gate) to form an N-type signal path.

In contrast, the first input ( INN ) of the second input unit 120 is any one of the pair of PMOS elements 121 and 122 of the second input unit 120 (for example, referring to FIG. 2B, FIG. PMOS device of reference numeral 121), and the second input ( INP ) is the other one of the pair of PMOS devices 121 and 122 of the second input unit 120 (for example, see FIG. 2B). Referring to, a P-type signal path may be formed by being applied to a gate of a PMOS device (reference numeral 122).

In addition, referring to FIG. 2A, a plurality of PMOS devices provided in the output unit 300 are involved in the N-type signal path, and referring to FIG. 2B, a plurality of PMOS devices provided in the output unit 300 are involved in the P-type signal path. The output unit 300 may participate in each path in a complementary (symmetrical) manner in which the NMOS device participates, and this will be described later with reference to FIGS. 4A and 4B.

Hereinafter, the function and operation of the feedback unit 200 of the operational amplifier 10 will be described with reference to FIGS. 3A and 3B.

3A and 3B are diagrams illustrating a feedback unit provided in a complementary structure including a first feedback unit and a second feedback unit and different feedback paths corresponding thereto.

Referring to FIGS. 3A and 3B , the feedback unit 200 generates a pair of common mode signals (VCM) based on a feedback signal ( VCMFB ) corresponding to the pair of output signals ( OUTN and OUTP ) and a common mode voltage ( VCM ). NVCM , PVCM ) can be created.

Specifically, referring to FIG. 3A , the feedback unit 200 generates a first common mode signal NVCM among a pair of common mode signals based on the feedback signal VCMFB and the common mode voltage VCM . A first feedback unit 210 including PMOS devices 211 and 212 of may be provided.

Also, referring to FIG. 3B , the feedback unit 200 generates a second common mode signal PVCM among the pair of common mode signals based on the feedback signal VCMFB and the common mode voltage VCM . A second feedback unit 220 including NMOS devices 221 and 222 may be provided.

In this regard, the feedback unit 200 is a common mode in which an N-type structure and a P-type structure are complementary (symmetrically) formed in order to prevent saturation of the output DC level due to the high gain of the operational amplifier 10. It can be understood that it is implemented so that the output of the operational amplifier 10 can be equal to the common mode voltage ( VCM ) by forming a common mode negative feedback (Common Mode Negative Feedback) system.

On the other hand, the first feedback unit 210 forms an N-type feedback path (N-type CMFB Line) in which some of the plurality of elements included in the output unit 300, which will be described later, participate, and the second feedback unit 220 ) may form a P-type feedback path (P-type CMFB Line) in which the remaining elements among the plurality of elements of the output unit 300 participate. That is, the output unit 300 may participate in each feedback path in a complementary (symmetrical) manner in association with the feedback unit 200 .

Hereinafter, the function and operation of the output unit 300 of the operational amplifier 10 will be described with reference to FIGS. 4A and 4B.

4A and 4B are diagrams illustrating a stage structure of an output unit.

Referring to FIG. 4A , the output unit 300 may have a hierarchical structure including a first stage ( ^1st Stage) and a second stage ( ^2nd Stage).

Specifically, referring to FIG. 4A , the first stage of the output unit 300 includes a second common mode signal ( PVCM ), a first bias voltage ( BIAS1 ), a first reference signal ( NOUTN ), and a second reference signal ( NOUTP) . ) to form the above-described N-type signal line (N-type signal line) based on the first common mode signal ( NVCM ), the second bias voltage ( BIAS2 ), the third reference signal ( POUTN ) and the fourth reference signal ( It may include a plurality of elements forming the aforementioned P-type signal line based on POUTP .

In other words, the first stage of the output unit 300 may have a complementary structure in which a plurality of PMOS devices involved in an N-type signal path and a plurality of NMOS devices involved in a P-type signal path are symmetrically arranged.

In this regard, referring to FIG. 4B , the plurality of PMOS devices participating in the N-type signal path of the first stage may refer to MOSFET devices arranged in regions indicated in FIG. 4B by reference numerals S ₁₁ and S ₁₂ . there is. Similarly, referring to FIG. 4B , the plurality of NMOS devices participating in the P-type signal path of the first stage may refer to MOSFET devices arranged in regions indicated in FIG. 4B by reference numerals S ₁₃ and S ₁₄ .

Also, referring to FIG. 4A , the second stage of the output unit 300 may generate a pair of output signals OUTN and OUTP based on the output signal of the first stage.

Specifically, in the second stage of the output unit 300, a pair of PMOS elements (S ₂₁ in FIG. 4B) having a source node connected to a power supply voltage node ( VDD ) and a source node having a ground voltage node A pair of NMOS devices (S ₂₂ in FIG. 4B ) connected to ( GND ) may be provided in a complementary structure in which they are symmetrically arranged.

Meanwhile, referring again to FIG. 3A described above, some of the plurality of devices of the first stage connected to the gate node of the pair of NMOS devices (S ₂₂ of FIG. 4B) of the second stage (FIG. 4B). S ₁₂ and S ₁₄ of ) may form an N-type feedback path associated with the first feedback unit 210 .

In addition, referring again to FIG. 3B described above, some of the plurality of devices of the first stage connected to the gate node of the pair of PMOS devices (S ₂₁ of FIG. 4B) of the second stage (FIG. 4B). S ₁₁ and S ₁₃ of ) may form a P-type feedback path associated with the second feedback unit 220 .

5 is a diagram showing a small signal equivalent circuit of a main path of an operational amplifier having a complementary structure having a common mode negative feedback gain according to an embodiment of the present invention.

Referring to FIG. 5, calculating the total transfer function (A _v = V _out /V _in , Total Transfer function) of the operational amplifier 10 disclosed herein through the small signal equivalent circuit of the main path is the following formula Same as 1.

[Equation 1]

In addition, the following formula 2 can be obtained by approximating the above formula 1.

[Equation 2]

6A and 6B are diagrams illustrating a small signal equivalent circuit of a common mode feedback (CMFB) part by a feedback unit.

Referring to FIGS. 6A and 6B , the total gain of the negative feedback feedback system is calculated through the small signal equivalent circuit of the common mode feedback part as shown in Equation 3 below.

[Equation 3]

On the other hand, in relation to the above transfer function of the negative feedback feedback system of the operational amplifier 10, there may be three poles and two zeros, and the second zero is the phase of the effect of reducing the RHP zero-phase, at this time Since it is 10 times larger than GBW, the effect on loop stability may be insignificant.

7 is a graph showing an output voltage according to a common mode input voltage.

Referring to FIG. 7 , it can be confirmed that the output DC voltage is linearly changed according to the common mode voltage (VCM) when the operational amplifier 10 is used, and through this, the above-described complementary (symmetrical, complementary) It can be seen that the operational amplifier 10 can stably operate in a wide range from the ground voltage ( GND ) to the power supply voltage ( VDD ) due to a high common mode negative feedback gain due to the structure.

8 is a graph showing a transconductance value according to an input voltage.

Referring to FIG. 8, in the case of a conventional general operational amplifier, when the input is close to the ground voltage ( GND ) or the power supply voltage ( VDD ) with a single input of NMOS or PMOS, the transconductance value approaches 0, making it difficult to operate normally. Alternatively, it can be seen that the operational amplifier 10 disclosed herein tends to maintain a relatively high transconductance even when the input voltage is close to the ground voltage ( GND ) or the power supply voltage ( VDD ), and through this, the operational amplifier ( 10) can have a wide input range.

9 is a graph showing a frequency transfer function according to an input voltage.

Referring to FIG. 9, when using the operational amplifier 10 disclosed herein, a change in gain (see (a) in FIG. 9) and a change in phase (see (b) in FIG. 9) according to an input voltage It can be seen that relatively few

10 is a graph showing common mode negative feedback stability (CMFB Stability) according to common mode input voltage.

Referring to FIG. 10 , when using the operational amplifier 10 disclosed herein, a change in gain (see (a) of FIG. 10 ) and a change in phase (see (b) in FIG. 10 ) according to the common mode voltage ( VCM ) ) reference) appears relatively less.

11 is a graph showing a phase margin according to an input voltage and a common mode voltage.

Referring to FIG. 11 , it can be reasonably inferred that the circuit of the operational amplifier 10 operates stably through the fact that the operational amplifier 10 disclosed herein shows a phase margin of about 70 degrees or more.

Hereinafter, based on the details described above, the operation flow of the present application will be briefly reviewed.

12 is an operation flowchart of a method of driving an operational amplifier having a complementary structure having a common mode negative feedback gain according to an embodiment of the present invention.

The driving method of the operational amplifier of the complementary structure having the common mode negative feedback gain shown in FIG. 12 can be performed by the operational amplifier 10 described above. Therefore, even if the details are omitted below, the description of the operational amplifier 10 can be equally applied to the description of the driving method of the operational amplifier having a complementary structure having a common mode negative feedback gain.

Referring to FIG. 12, in step S11 (a) the input unit 100 generates a pair of output signals ( OUTN , OUTP ) according to the pair of input signals ( INN , INP ), a plurality of reference signals ( NOUTN , NOUTP , POUTN , POUTP ) can be generated based on a pair of input signals ( INN , INP ).

Next, in step S12 (b) the output unit 300 outputs a pair of output signals ( OUTN ) based on a plurality of reference signals ( NOUTN , NOUTP , POUTN , POUTP ) and a pair of common mode signals ( NVCM , PVCM ). , OUTP ) can be created.

Next, in step S13 (c) the feedback unit 200 generates a pair of feedback signals corresponding to the pair of output signals OUTN and OUTP based on the feedback signal VCMFB and the common mode voltage common mode voltage VCM . Common mode signals ( NVCM , PVCM ) of can be generated.

In the foregoing description, steps S11 to S13 may be further divided into additional steps or combined into fewer steps, depending on an embodiment of the present invention. Also, some steps may be omitted if necessary, and the order of steps may be changed.

A method of driving an operational amplifier having a complementary structure having a common mode negative feedback gain according to an embodiment of the present disclosure may be implemented in the form of program instructions that can be executed by various computer means and recorded on a computer readable medium. The computer readable medium may include program instructions, data files, data structures, etc. alone or in combination. Program instructions recorded on the medium may be those specially designed and configured for the present invention or those known and usable to those skilled in computer software. Examples of computer-readable recording media include magnetic media such as hard disks, floppy disks and magnetic tapes, optical media such as CD-ROMs and DVDs, and magnetic media such as floptical disks. - includes hardware devices specially configured to store and execute program instructions, such as magneto-optical media, and ROM, RAM, flash memory, and the like. Examples of program instructions include high-level language codes that can be executed by a computer using an interpreter, as well as machine language codes such as those produced by a compiler. The hardware devices described above may be configured to act as one or more software modules to perform the operations of the present invention, and vice versa.

In addition, the above-described method of driving an operational amplifier having a complementary structure having a common mode negative feedback gain may be implemented in the form of a computer program or application stored in a recording medium and executed by a computer.

The above description of the present application is for illustrative purposes, and those skilled in the art will understand that it can be easily modified into other specific forms without changing the technical spirit or essential features of the present application. Therefore, the embodiments described above should be understood as illustrative in all respects and not limiting. For example, each component described as a single type may be implemented in a distributed manner, and similarly, components described as distributed may be implemented in a combined form.

The scope of the present application is indicated by the following claims rather than the detailed description above, and all changes or modifications derived from the meaning and scope of the claims and equivalent concepts thereof should be construed as being included in the scope of the present application.

10: Complementary structure operational amplifier with common mode negative feedback gain
100: input unit
200: feedback unit
300: output unit

Claims (10)

An operational amplifier with a complementary structure having a common mode negative feedback gain,
an input unit configured to generate a plurality of reference signals for generating a pair of output signals according to the pair of input signals based on the pair of input signals;
a feedback unit generating a pair of common mode signals based on a feedback signal corresponding to the pair of output signals and a common mode voltage; and
an output unit configured to generate the pair of output signals based on the plurality of reference signals and the pair of common mode signals;
Including, operational amplifier. According to claim 1,
The pair of input signals include a first input that is an N-type input signal and a second input that is a P-type input signal,
The input unit,
a first input unit including a pair of NMOS devices outputting a first reference signal and a second reference signal among the plurality of reference signals based on the first input and the second input; and
A second input unit including a pair of PMOS devices outputting a third reference signal and a fourth reference signal among the plurality of reference signals based on the first input and the second input;
Which is provided with a complementary structure comprising a, operational amplifier. According to claim 2,
The first input is applied to the gate of any one of the pair of NMOS devices, and the second input is applied to the gate of the other of the pair of NMOS devices to form an N-type signal path;
The first input is applied to a gate of any one of the pair of PMOS devices, and the second input is applied to a gate of the other one of the pair of PMOS devices to form a P-type signal path. amplifier. According to claim 3,
A first current source is disposed between a common source node and a ground voltage node of the pair of NMOS devices,
An operational amplifier, characterized in that a second current source is disposed between a common source node and a power supply voltage node of the pair of PMOS devices. According to claim 3,
The feedback unit,
a first feedback unit including a pair of PMOS devices to generate a first common mode signal from among the pair of common mode signals based on the feedback signal and the common mode voltage; and
a second feedback unit including a pair of NMOS devices to generate a second common mode signal from among the pair of common mode signals based on the feedback signal and the common mode voltage;
An operational amplifier comprising: According to claim 5,
the output unit,
The N-type signal path is formed based on the second common mode signal, the first bias voltage, the first reference signal, and the second reference signal, or the first common mode signal, the second bias voltage, and the third reference signal. a first stage including a plurality of elements forming the P-type signal path based on a signal and the fourth reference signal; and
a second stage generating the pair of output signals based on the output signals of the first stage;
An operational amplifier comprising: According to claim 6,
The first stage,
The operational amplifier having a complementary structure in which a plurality of PMOS elements involved in the N-type signal path and a plurality of NMOS elements involved in the P-type signal path are symmetrically arranged. According to claim 6,
The second stage,
An operational amplifier having a complementary structure in which a pair of PMOS elements having a source node connected to a power supply voltage node and a pair of NMOS elements having a source node connected to a ground voltage node are symmetrically arranged. According to claim 8,
Some of the plurality of elements of the first stage connected to gate nodes of a pair of NMOS elements of the second stage form an N-type feedback path associated with the first feedback unit;
Wherein some of the plurality of elements of the first stage connected to gate nodes of the pair of PMOS elements of the second stage form a P-type feedback path associated with the second feedback unit. A driving method of an operational amplifier having a complementary structure having a common mode negative feedback gain,
(a) generating a plurality of reference signals for generating a pair of output signals according to the pair of input signals by an input unit based on the pair of input signals;
(b) generating, by an output unit, the pair of output signals based on the plurality of reference signals and the pair of common mode signals; and
(c) generating the pair of common mode signals by a feedback unit based on a feedback signal corresponding to the pair of output signals and a common mode voltage;
A driving method of an operational amplifier comprising a.

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