KR20220099412A - Wireless network apparatus and operating method thereof - Google Patents

Abstract

Disclosed is a wireless network device. According to one embodiment of the present invention, the wireless network device comprises: a receiver; a transmitter; and a processor for controlling a switch between the transmitter and the receiver to form a loopback path in the transmitter and the receiver, and performing a check procedure for checking whether an IQ mismatch exists in the formed loopback path. In the check procedure, the processor outputs a training sequence signal to the transmitter, captures the training sequence signal looped back from the transmitter to the receiver through the formed loopback path, determines first and second correlation information using the captured training sequence signal and the output training sequence signal, calculates the ratio between first and second signals in the captured training sequence signal using the first and second correlation information, and compares the calculated ratio with a threshold value to check whether the IQ mismatch exists in the formed loopback path. Therefore, a failure or damage of a hardware of a transceiver is monitored.

Description

Wireless network device and its operation method {WIRELESS NETWORK APPARATUS AND OPERATING METHOD THEREOF}

The following disclosure relates to a wireless network device and an operating method thereof.

A radio unit (RU), which is a type of base station equipment, may include a transceiver (eg, a transceiver using a zero intermediate frequency). A phase error and a gain error may exist in such a transceiver, and an unwanted image signal may be generated by the phase error and the gain error.

An in-phase (I) sample and a quadrature (Q) sample may be misaligned due to clock instability within the transceiver. Also, hardware failures within the transceiver can occur. Phase errors and gain errors can be large due to misalignment between I and Q samples or hardware failure in the transceiver. In other words, an IQ mismatch outside the transceiver's IQ mismatch compensation range may occur. When such an IQ mismatch occurs, the power of an image signal may become strong, thereby reducing error vector magnitude (EVM) performance of the transceiver, and a desired data throughput may not be obtained.

According to various embodiments, it is possible to provide a wireless network device and system that notifies an administrator of an alarm when hardware failure or hardware damage of the transceiver is detected by checking the IQ mismatch of the transceiver.

According to various embodiments, it is possible to provide a wireless network device and system for monitoring hardware failure or hardware damage of a transceiver by checking IQ mismatch of the transceiver.

A wireless network device according to various embodiments includes a receiver; telautograph; and a processor that controls a switch between the transmitter and the receiver so that a loopback path is formed between the transmitter and the receiver, and performs a check procedure to determine whether there is an IQ mismatch in the formed loopback path. In the check procedure, the processor outputs a training sequence signal to the transmitter, captures a training sequence signal looped back from the transmitter to the receiver through the formed loopback path, and includes the captured training sequence signal and the output training sequence. determine first correlation information and second correlation information by using the signal, and use the first correlation information and the second correlation information between the first signal and the second signal in the captured training sequence signal It is possible to determine whether there is the IQ mismatch in the formed loopback path by calculating a ratio and comparing the calculated ratio with a threshold.

A wireless network apparatus according to various embodiments includes a plurality of transceivers; and a processor that checks each of the transceivers in a preset time interval. The processor controls a switch between the transmitter and the receiver to form a loopback path in the transmitter and the receiver of a first transceiver among the transceivers, generates a training sequence signal and outputs it to the transmitter, through the formed loopback path Capturing a training sequence signal looped back from the transmitter to the receiver, determining first correlation information and second correlation information using the captured training sequence signal and the output training sequence signal, and the first correlation information and Calculate the ratio between the first signal and the second signal in the captured training sequence signal using the second correlation information, and compare the calculated ratio with a threshold to determine whether there is an IQ mismatch in the formed loopback path check, and if there is no IQ mismatch, it may be determined that the first transceiver is not defective.

A method of operating a wireless network device according to various embodiments includes: controlling a switch between the transmitter and the receiver so that a loopback path is formed between the transmitter and the receiver; and checking whether there is an IQ mismatch in the formed loopback path. The checking operation may include outputting a training sequence signal to the transmitter; capturing a training sequence signal looped back from the transmitter to the receiver through the formed loopback path; determining first correlation information and second correlation information using the captured training sequence signal and the output training sequence signal; calculating a ratio between a first signal and a second signal in the captured training sequence signal using the first correlation information and the second correlation information; and comparing the calculated ratio with a threshold to determine whether there is the IQ mismatch in the formed loopback path.

According to various embodiments, it is possible to prevent or prevent data throughput degradation due to hardware failure or hardware damage of the transceiver in advance.

According to various embodiments, by monitoring hardware failure or hardware damage of the transceiver, maintenance and repair of the wireless network device may be facilitated.

In addition, various effects directly or indirectly identified through this document may be provided.

1 is a diagram illustrating an example of a wireless communication system according to various embodiments.
2 is an exemplary diagram for describing an RU of a wireless communication system according to various embodiments.
3 is an exemplary diagram for explaining an uplink operation of an RU of a wireless communication system according to various embodiments.
4 is an exemplary diagram for explaining a downlink operation of an RU of a wireless communication system according to various embodiments.
5 to 10 are exemplary diagrams for explaining HW failure determination of an RU of a wireless communication system according to various embodiments.
11 to 12B are diagrams for explaining an example of a check method for confirming IQ mismatch of an RU of a wireless communication system according to various embodiments.
13 is an exemplary diagram for describing a wireless network device according to various embodiments.
14 is another exemplary diagram for describing a wireless network device according to various embodiments.
15 is a block diagram of an electronic device in a network environment, according to various embodiments of the present disclosure;

Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. In the description with reference to the accompanying drawings, the same components are assigned the same reference numerals regardless of the reference numerals, and the overlapping description thereof will be omitted.

1 is a diagram illustrating an example of a wireless communication system according to various embodiments.

1 shows a radio unit (RU) 110 , a distributed unit (DU) 120 , and an electronic device 130 .

According to an embodiment, the RU 110 and the DU 120 may be physically separated. The RU 110 may be located in a base station of a cell site, and the DU 120 may be located in a server. The RU 110 and the DU 120 may be connected through a fronthaul.

According to another embodiment, the RU 110 and the DU 120 may be located in one base station.

The RU 110 may receive a baseband digital in-phase (I) Q (quadrature phase) stream from the DU 120 and may convert the received baseband digital IQ stream into a radio frequency (RF) signal. . The RU 110 may transmit the converted RF signal to the electronic device 130 . The RU 110 may perform downlink (DL) communication with the electronic device 130 .

The RU 110 may receive an RF signal from the electronic device 130 . The RU 110 may perform uplink (UL) communication with the electronic device 130 . The RU 110 may convert the received RF signal into a baseband digital IQ stream, and may transmit the converted baseband digital IQ stream to the DU 120 .

According to an embodiment, a time division duplex (TDD) scheme may be used for DL communication and UL communication. According to another embodiment, a frequency division duplex (FDD) scheme may be used for DL communication and UL communication. According to another embodiment, a mixed scheme of the TDD scheme and the FDD scheme may be used for DL communication and UL communication.

2 is an exemplary diagram for describing an RU of a wireless communication system according to various embodiments.

2, the RU 110 is a plurality of antennas (210-1 to 210-n), TX (transmit) and RX (receive) switches for switching between (220-1 to 220-n), A plurality of low noise amplifiers (LNAs) 230-1 to 230-n, a plurality of power amplifiers (PAs) 240-1 to 240-n, a plurality of receivers 250-1 to 250-n , a plurality of transmitters 260-1 to 260-n, switches 270-1 to 270-n for forming a loopback path, and a processor 280 may be included.

According to an embodiment, the plurality of antennas 210 - 1 to 210 - n may form an array structure.

According to an embodiment, each of the plurality of receivers 250-1 to 250-n may be a receiver using a zero intermediate frequency (IF), but is not limited thereto. Each of the plurality of transmitters 260-1 to 260-n may be a transmitter using a zero IF, but is not limited thereto.

According to an embodiment, the RU 110 may perform TDD. In TDD, a time slot, which is a basic unit of a time axis, may include a plurality of symbols (eg, 14 symbols). As an example, referring to Table 1 below, time slot 50 may include DL symbols for DL communication, time slot 53 may include flexible symbols for which a purpose is not determined, and time slot 54 may include UL It may include UL symbols for communication.

time slot … 50 51 52 53 54 55 … symbol … DL DL DL F UL DL …

3 is an exemplary diagram illustrating an UL operation of an RU of a wireless communication system according to various embodiments.

Referring to FIG. 3 , an example of a detailed configuration of a first transmitter 260-1 and a first receiver 250-1 is illustrated.

According to an embodiment, the first receiver 250-1 includes a down converter 310, a filter/amplifier 311, an analog to digital converter (ADC) 312, an RX digital IQ block 313, and a DDC ( digital down converter) 314 .

According to an embodiment, the first transmitter 260-1 is a digital up converter (DUC) 320, a MUX 321, a TX digital IQ block 322, a digital to analog converter (DAC) 323, a filter. /amplifier 324, and up-converter 325 may be included.

According to an embodiment, the TX digital IQ block 322 of the first transmitter 260-1 and the RX digital IQ block 313 of the first receiver 250-1 may correspond to digital parts, and the first The filter/amplifier 324 of the transmitter 260-1, the up-converter 325, the down-converter 310 of the first receiver 250-1, and the filter/amplifier 311 may correspond to analog parts.

According to an embodiment, the switch 270-1 may be positioned between the up-converter 325 of the first transmitter 260-1 and the down-converter 310 of the receiver. The switch 270-1 may be turned on under the control of the processor 280 . When the RU 110 performs an uplink operation and a downlink operation, the switch 270-1 may be turned off. When the RU 110 performs a hardware (hardware) failure determination operation to be described later, the switch 270-1 may be turned on, and the first transmitter 260-1 and the first receiver 250-1 are A loopback path may be formed.

According to an embodiment, the configuration of each of the remaining receivers 250 - 2 to 250 - n may be the same as that of the first receiver 250 - 1 . The description of the first receiver 250-1, which will be described later, may be applied to the remaining receivers 250-2 to 250-n. In addition, the configuration of each of the remaining transmitters 260-2 to 260-n may be the same as that of the first transmitter 260-1. The description of the first transmitter 260-1, which will be described later, may be applied to the remaining transmitters 260-2 to 260-n.

According to an embodiment, in a time slot including UL symbols, the RU 110 may perform a UL operation.

An antenna controller (not shown) may control the switch 220-1 so that the LNA 230-1 and the antenna 210-1 are connected. In other words, the antenna controller may control the switch 220 - 1 to form a reception path. The antenna 210-1 may receive an RF signal from the electronic device 130 . The received RF signal may be transmitted to the down converter 310 through a band pass filter (not shown) and the LNA 230-1. The down converter 310 may perform frequency down conversion on the input RF signal. The output signal of the down converter 310 may be input to the filter/amplifier 311 .

The filter/amplifier 311 may include one or more variable amplifiers and a low pass filter. The filter/amplifier 311 may perform amplification and filtering (eg, low-pass filtering) on an input signal (eg, an output signal of the down converter 310 ). An output signal of the filter/amplifier 311 may be input to the ADC 312 .

The ADC 312 may convert an input signal (eg, an output signal of the filter/amplifier 310 - 3 ) into a digital signal. The output signal of the ADC 312 may be input to the RX digital IQ block 313 .

The RX digital IQ block 313 may perform digital processing on an input signal (eg, an output signal of the ADC 312 ). Digital processing may include, but is not limited to, IQ compensation, for example. An output signal of the RX digital IQ block 313 may be input to the DDC 314 . The DDC 314 may perform down-converting to convert an input signal (eg, an output signal of the RX digital IQ block 313 ) into a baseband digital IQ stream, and transmit the baseband digital IQ stream to the DU 120 . can

4 is an exemplary diagram for explaining a DL operation of an RU of a wireless communication system according to various embodiments.

Referring to FIG. 4 , the RU 110 may perform a DL operation in a time slot including DL symbols.

The antenna controller (not shown) may control the switch 220 - 1 so that the PA 240 - 1 and the antenna 21 - 1 are connected. In other words, the antenna controller may control the switch 220 - 1 to form a transmission path.

The DUC 320 may receive the baseband digital IQ stream from the DU 120 and may perform up-converting on the baseband digital IQ stream. According to one embodiment, the DUC 320 may increase the sample rate of the baseband digital IQ stream.

The processor 280 may control the MUX 321 so that an output signal of the DUC 320 is input to the TX digital IQ block 322 . The output signal of the DUC 320 may be input to the TX digital IQ block 322 via the MUX 321 .

The TX digital IQ block 322 may perform digital processing on the input signal. The digital processing may include, but is not limited to, one or more of, for example, crest factor reduction (CFR), digital pre-distortion (DPD), and IQ compensation. The output signal of the TX digital IQ block 322 may be input to the DAC 323 .

The DAC 323 may convert an input signal (eg, an output signal of the TX digital IQ block 322) into an analog signal. The converted analog signal may be input to the filter/amplifier 324 .

The filter/amplifier 324 may include one or more variable amplifiers and filters (eg, low-pass filters). The filter/amplifier 324 may perform amplification and filtering (eg, low-pass filtering) on an input signal (eg, an analog signal converted by the DAC 323 ). An output signal of the filter/amplifier 324 may be input to the up-converter 325 .

The up-converter 325 may perform frequency up-conversion on an input signal (eg, an output signal of the filter/amplifier 324 ). The output signal of the up-converter 325 may be filtered through a band-pass filter (not shown), the power of the band-pass filtered signal may be amplified through the PA 240-1, and the amplified signal may be transmitted through an antenna ( 210-1) through the electronic device 130 may be transmitted.

5 to 10 are exemplary diagrams for explaining HW failure determination of an RU of a wireless communication system according to various embodiments.

According to an embodiment, the processor 280 may set one or more time slots among a plurality of time slots of the TDD as a time slot for an HW defect (or HW defect) determination operation. For example, the processor 280 performs HW failure determination on a time slot not used by the modem of the DU 120 (eg, time slot 53 in Table 1 above) and/or a time slot with the lowest throughput degradation. It can be set as a time slot for

5 and 6 show an example of HW failure determination operations for the first receiver 250-1 and the first transmitter 260-1.

Referring to FIG. 5 , in operation 510 , the processor 280 may form a loopback path between the first receiver 250-1 and the first transmitter 260-1. For example, in the example shown in FIG. 6 , the switch 270-1 may be controlled by a field programmable gate array (FPGA)-based controller (not shown). The processor 280 may transmit a turn-on control signal of the switch 270-1 to the FPGA-based controller, and the FPGA-based controller may turn on the switch 270-1 according to the received control signal. As another example, the processor 280 may directly control the switch 270-1 to turn on the switch 270-1.

In the example shown in FIG. 6 , a loopback path may be formed in the transmitter 260-1 and the receiver 250-1 by turning on the switch 270-1. For example, "TX digital IQ block 322 → DAC 323 → filter/amplifier 324 → up converter 325 → turned on switch 270-1 → down converter 310 → filter/amplifier 311 ) → ADC (312) → RX digital IQ block (313) "loopback path can be formed.

According to an embodiment, the processor 280 may initialize clocks for the TX digital IQ block 322 and the RX digital IQ block 313 .

Returning again to FIG. 5 , in operation 520 , the processor 280 may determine whether there is an IQ mismatch in the loopback path between the first receiver 250 - 1 and the first transmitter 26 - 1 .

In the example shown in FIG. 6 , the processor 280 may control the MUX 321 such that a training sequence (TS) signal x(t) is input to the TX digital IQ block 322 . The processor 280 may transfer the TS signal x(t) to the MUX 321 , and the MUX 320-3 may transfer the TS signal x(t) to the TX digital IQ block 322 . .

"TX digital IQ block (322) → DAC (323) → Filter/amplifier (324) → Up converter (325) → Turned on switch (270-1) → Down converter (310) → Filter/amplifier (311) → ADC The TS signal (x(t)) may be processed (or looped back) through the loopback path of (312) → RX digital IQ block 313”.

The processor 280 may capture the processed (or looped-back) TS signal x(t) through the loopback path to the dump memory 610 . The processor 280 performs an IQ miss in the loopback path of the first receiver 250-1 and the first transmitter 260-1 based on the captured TS signal (y_1(t)) and the TS signal (x(t)). A check procedure can be performed to see if there is a match. According to an embodiment, the captured TS signal y_1(t) may include a first signal (eg, a desired signal) and a second signal (eg, an image signal). The processor 280 may calculate a ratio between the first signal and the second signal based on the captured TS signal (y_1(t)) and the TS signal (x(t)), and the calculated ratio and a threshold value (eg: 3) may be compared, and if the calculated ratio is less than the threshold, it may be determined that there is an IQ mismatch in the loopback path of the first receiver 250-1 and the first transmitter 260-1. If the calculated ratio is equal to or greater than the threshold, the processor 280 may determine that there is no IQ mismatch in the loopback path between the first receiver 250-1 and the first transmitter 260-1. A check procedure for determining whether there is an IQ mismatch will be described later with reference to FIG. 11 .

In operation 520, the processor 280 may determine that there is no IQ mismatch in the loopback path between the first receiver 250-1 and the first transmitter 260-1. In this case, the processor 280 may perform a HW failure determination procedure for the second receiver and the second transmitter. The HW failure determination procedure for the second receiver and the second transmitter will be described later with reference to FIGS. 7 and 8 .

In operation 520, the processor 280 may determine that there is an IQ mismatch in the loopback path between the first receiver 250-1 and the first transmitter 260-1. In this case, in operation 530 , the processor 280 may initialize a clock used for a device in the loopback path. For example, in operation 530 , the processor 280 may initialize a clock used for a device (eg, the TX digital IQ block 322 and the RX digital IQ block 313 ) of the loopback path for clock stabilization. In operation 540 , the processor 280 may update the number of clock initializations performed in operation 530 from 0 to 1.

In operation 550, the processor 280 may determine whether there is an IQ mismatch in the loopback path between the first receiver 250-1 and the first transmitter 260-1. In other words, the processor 280 may check again whether there is an IQ mismatch in the loopback path between the first receiver 250-1 and the first transmitter 260-1.

In operation 550, the processor 280 may determine that there is no IQ mismatch in the loopback path between the first receiver 250-1 and the first transmitter 260-1. In this case, the processor 280 may perform a HW failure determination procedure for the second receiver and the second transmitter.

In operation 550, the processor 280 may determine that there is an IQ mismatch in the loopback path between the first receiver 250-1 and the first transmitter 260-1. In this case, in operation 570 , the processor 280 may check whether the number of clock initialization times in operation 540 is the same as a predetermined number (eg, three times).

In operation 540, the number of clock initialization times may be 1. In operation 560, the processor 280 may confirm that the number of clock initialization times through operation 540 is less than a predetermined number. In this case, in operation 530 , the processor 280 may initialize the clock for clock stabilization, and in operation 540 , update the clock initialization number from 1 to 2.

When the number of clock initializations is updated from 1 to 2, the processor 280 determines whether there is an IQ mismatch in the loopback path between the first receiver 250-1 and the first transmitter 260-1 in operation 550. can check again. In operation 550, the processor 280 may determine again that there is an IQ mismatch in the loopback path between the first receiver 250-1 and the first transmitter 260-1. In this case, in operation 570 , the processor 280 may check whether the number of clock initialization times in operation 540 is the same as a predetermined number. The number of clock initializations through operation 540 may be 2, so the processor 280 may confirm that the number of clock initializations through operation 540 is less than a predetermined number of times, and may initialize the clock in operation 530, , in operation 540 , the number of clock initializations may be updated from 2 to 3.

When the number of clock initializations is updated from 2 to 3, the processor 280 determines whether there is an IQ mismatch in the loopback path between the first receiver 250-1 and the first transmitter 260-1 in operation 550. can check again. In operation 550, the processor 280 may determine again that there is an IQ mismatch in the loopback path of the first receiver 250-1 and the first transmitter 260-1, and in operation 570, the processor 280 ) may check whether the number of clock initialization times through operation 540 is the same as a predetermined number (eg, three times).

Since the number of clock initialization times in operation 540 may be 3, the processor 280 may confirm that the number of clock initialization times in operation 540 is the same as the predetermined number. In this case, in operation 570 , the processor 280 may determine that there is a HW defect in the loopback paths of the first receiver 250 - 1 and the first transmitter 26 - 1 . HW is, for example, blocks 322, 323, 324, 325, 310, 311, 312, 313, RLC element in the loopback path of the first receiver 250-1 and the first transmitter 260-1. , and a pattern of a printed circuit board (PCB).

When it is determined that there is a HW defect in the loopback path of the first receiver 250-1 and the first transmitter 260-1, the processor 280 may transmit an alarm to the terminal of the manager.

The manager can check that there is an abnormality in the first receiver 250-1 and the first transmitter 260-1 through the alarm, and the first receiver 250-1 and/or the first transmitter 260 -1) can be repaired. The DL/UL throughput of the RU 110 may not decrease.

The processor 280 may perform a HW failure determination procedure for the second receiver and the second transmitter. An example of the HW failure determination operation for the second receiver and the second transmitter will be described with reference to FIGS. 7 and 8 .

Referring to FIG. 7 , the processor 280 determines that there is no IQ mismatch in the loopback path between the first receiver 250-1 and the first transmitter 260-1 in operation 520 or in operation 550 It may be determined that there is no IQ mismatch in the loopback path of the first receiver 250-1 and the first transmitter 260-1. Alternatively, the processor 280 may determine that there is a defective HW in the loopback path of the first receiver 250 - 1 and the first transmitter 26 - 1 in operation 570 .

In operation 710 , the processor 280 may form a loopback path between the second transmitter and the second receiver. 8 shows an example of the second transmitter 260 - 2 and the second receiver 250 - 2 . In the example shown in FIG. 8 , the second receiver 250 - 2 includes a down converter 810 , a filter/amplifier 811 , an ADC 812 , an RX digital IQ block 813 , and a DDC 814 . The second transmitter 260-2 includes a DUC 820, a MUX 821, a TX digital IQ block 822, a DAC 823, a filter/amplifier 824, and an up-converter 825. may include

In the example shown in FIG. 8 , the processor 280 may transmit a control signal for turning on the switch 270 - 2 to an FPGA-based controller (not shown), and the FPGA-based controller switches according to the received control signal. (270-2) may be turned on. As another example, the processor 280 may directly control the switch 270 - 2 to turn on the switch 270 - 2 .

When the switch 270 - 2 is turned on, a loopback path between the second transmitter 260 - 2 and the second receiver 250 - 2 may be formed. For example, "TX digital IQ block 822 → DAC 823 → filter/amplifier 824 → up converter 825 → turned on switch 270-2 → down converter 810 → filter/amplifier 811 ) → ADC 812 → RX digital IQ block 813", a loopback path can be formed.

According to an embodiment, the processor 280 may initialize clocks for the TX digital IQ block 822 and the RX digital IQ block 813 .

In operation 720 , the processor 280 may determine whether there is an IQ mismatch in the loopback path between the second receiver 250 - 2 and the second transmitter 260 - 2 . For example, the processor 280 may control the MUX 821 such that the TS signal x(t) is transmitted to the TX digital IQ block 822 . When the MUX 820 receives the TS signal x(t) from the processor 280 , the MUX 820 may transmit the TS signal x(t) to the TX digital IQ block 821 .

The TS signal x(t) may be processed (or looped back) through the loopback path of the second receiver 250-2 and the second transmitter 260-2. The processor 280 may capture the TS signal output from the RX digital IQ block 813 in the dump memory 830 . The processor 280 performs an IQ miss in the loopback path of the second receiver 250-2 and the second transmitter 260-2 based on the TS signal (x(t)) and the captured TS signal (y_2(t)). You can check whether there is a match or not.

In operation 720 , the processor 280 may determine that there is no IQ mismatch in the loopback path between the second receiver 250 - 2 and the second transmitter 260 - 2 . In this case, in operation 780 , the processor 280 may perform a HW failure determination procedure for the third receiver and the third transmitter.

In operation 720 , the processor 280 may determine that there is an IQ mismatch in the loopback path between the second receiver 250 - 2 and the second transmitter 260 - 2 . In this case, the processor 280 may initialize the clock in operation 730 . In operation 740 , the processor 280 may update the number of clock initializations performed in operation 730 .

When the clock initialization number is updated, the processor may check again whether there is an IQ mismatch in the loopback path of the second receiver 250 - 2 and the second transmitter 260 - 2 in operation 750 . As a result of re-checking, if there is no IQ mismatch in the loopback path between the second receiver 250-2 and the second transmitter 260-2, in operation 780, the processor 280 performs HW for the third receiver and the third transmitter. A defect determination procedure can be performed. As a result of re-checking, if there is an IQ mismatch in the loopback path between the second receiver 250-2 and the second transmitter 260-2, in operation 760, the processor 280 determines the number of clock initializations through operation 740. It can be checked whether or not it is the same as a predetermined number of times.

When the number of clock initialization times in operation 740 is less than the predetermined number, the processor 280 may perform operations 730 to 750 again. If the number of clock initialization times in operation 740 is the same as the predetermined number, in operation 770 , the processor 280 detects a HW failure in the loopback path of the second receiver 250-2 and the second transmitter 260-2. It can be determined that there is The processor 280 may transmit an alarm indicating that there is a HW defect in the loopback path of the second receiver 250 - 2 and the second transmitter 260 - 2 to the manager's terminal. The manager can check that there is an abnormality in the second receiver 250-2 and the second transmitter 260-2 through the alarm, and the second receiver 250-2 and/or the second transmitter 260 -2) can be repaired. The DL/UL throughput of the RU 110 may not decrease.

In operation 780, the processor 280 may perform a HW failure determination procedure for the third receiver and the third transmitter. Also, the processor 280 may perform a HW failure determination procedure for the remaining receivers and transmitters. In operation 790, the processor 280 may perform a HW failure determination procedure for the n-1 th receiver and the n-1 th transmitter. The n-th receiver 250 - n and the n th transmitter 260 - n may be the last receiver and the last transmitter. HW failure determination operations for the n-th receiver 250-n and the n-th transmitter 260-n will be described with reference to FIGS. 9 and 10 .

The processor 280 may determine that there is no IQ mismatch in the loopback paths of the n-1 th receiver and the n-1 th transmitter, or determine that there is a HW defect in the loopback paths of the n-1 th receiver and the n-1 th transmitter. have. In operation 910 , the processor 280 may form a loopback path to the n-th receiver 250 - n and the n th transmitter 260 - n . 10 shows an example of an n-th transmitter 260-n and an n-th receiver 250-n. In the example shown in FIG. 10 , the nth receiver 250 - n includes a down converter 1010 , a filter/amplifier 1011 , an ADC 1012 , an RX digital IQ block 1013 , and a DDC 1014 . The n-th transmitter 260-n includes a DUC 1020, a MUX 1021, a TX digital IQ block 1022, a DAC 1023, a filter/amplifier 1024, and an up-converter 1025. may include

In the example shown in FIG. 10 , the processor 280 may transmit a control signal of turn-on of the switch 270-n to an FPGA-based controller (not shown), and the FPGA-based controller may transmit the control signal to the switch ( ) according to the received control signal. 270-n) can be turned on. As another example, the processor 280 may directly control the switch 270 - n to turn on the switch 270 - n.

In the example shown in FIG. 10 , a loopback path between the n-th transmitter 260-n and the n-th receiver 250-n may be formed by turning on the switch 270-n. For example, "TX digital IQ block (1022) → DAC (1023) → filter/amplifier (1024) → up-converter (1025) → turned on switch (270-n) → down-converter (1010) → filter/amplifier (1011) ) → ADC 1012 → RX digital IQ block 1013” a loopback path can be formed.

According to an embodiment, the processor 280 may initialize clocks for the TX digital IQ block 1022 and the RX digital IQ block 1013 .

In operation 920, the processor 280 may determine whether there is an IQ mismatch in the loopback path of the n-th receiver 250-n and the n-th transmitter 260-n. For example, the processor 280 may transmit the TS signal to the MUX 1020 , and the MUX 1020 may transmit the TS signal x(t) to the TX digital IQ block 1021 . The TS signal may be processed (or looped back) through the loopback path of the n-th receiver 250-n and the n-th transmitter 260-n, and the processor 280 receives the TS output from the RX digital IQ block 1013 . A signal may be captured in the dump memory 1030 . The processor 280 is IQ miss in the loopback path of the n-th receiver 250-n and the n-th transmitter 260-n based on the TS signal (x(t)) and the captured TS signal (y_n(t)) You can check whether there is a match or not.

In operation 920, the processor 280 may determine that there is an IQ mismatch in the loopback path of the n-th receiver 250-n and the n-th transmitter 260-n. In this case, the processor 280 may initialize the clock in operation 930 . In operation 940 , the processor 280 may update the number of clock initializations performed in operation 930 .

In operation 950 , the processor 280 may check again whether there is an IQ mismatch in the loopback path of the n th receiver 250 - n and the n th transmitter 260 - n . As a result of rechecking, if there is an IQ mismatch in the loopback path of the n-th receiver 250-n and the n-th transmitter 260-n, in operation 960, the processor 280 determines the number of clock initializations through operation 1040. It can be checked whether or not it is the same as a predetermined number of times.

When the number of clock initialization times in operation 940 is less than the predetermined number, the processor 280 may perform operations 930 to 950 again. If the number of clock initialization times in operation 940 is the same as the predetermined number, in operation 970, the processor 280 determines that there is a HW failure in the loopback path of the n-th receiver 250-n and the n-th transmitter 260-n. It can be determined that there is The processor 280 may transmit an alarm indicating that there is a HW defect in the loopback path of the n-th receiver 250-n and the n-th transmitter 260-n to the terminal of the manager. The manager can confirm that there is an abnormality in the n-th receiver 250-n and the n-th transmitter 260-n through the alarm, and the n-th receiver 250-n and/or the n-th transmitter 260 -n) can be repaired. The DL/UL throughput of the RU 110 may not decrease.

11 to 12B are diagrams for explaining an example of a check method for confirming IQ mismatch of an RU of a wireless communication system according to various embodiments.

11 shows an example of an operation in which the processor 280 checks whether there is an IQ mismatch in the loopback path between the first receiver 250-1 and the first transmitter 260-1. Operations 1110 to 1170, which will be described with reference to FIG. 11 , may be included in each of operations 520 and 550 of determining whether there is an IQ mismatch illustrated in FIG. 5 .

Referring to FIG. 11 , in operation 1110 , the processor 280 may output a TS signal x(t). The output TS signal x(t) may be transferred to the MUX 321 , and the MUX 321 may transfer the TS signal x(t) to the TX digital IQ block 322 . The TS signal x(t) may be processed (or looped back) through the loopback path of the first receiver 250-1 and the first transmitter 260-1.

In operation 1120 , the processor 280 captures the TS signal processed (or looped back) through the loopback path of the first receiver 250-1 and the first transmitter 260-1 to the dump memory 610. can

In operation 1130 , the processor 280 performs first correlation information (eg, first cross correlation) using the TS signal x(t) and the captured TS signal y_1(t). ) information) and second correlation information (eg, second cross-correlation information) may be determined. Equation 1 below shows an equation for determining the first cross-correlation information as an example of the first correlation information, and Equation 2 below shows an equation for determining the second cross-correlation information as an example of the second correlation information shows

In Equations 1 and 2 above, E[] represents an expected value operation, and * represents a complex conjugate.

According to Equation 1 above, the processor 280 may multiply the complex conjugate (y_1*(t)) of the captured TS signal (y_1(t)) and the TS signal (x(t)), and the multiplied result is An expected value operation may be performed, and the first cross-correlation information may be determined by applying an absolute value to a result of the expected value operation.

According to Equation 2 above, the processor 280 may perform an expected value operation on the result of multiplying the captured TS signal (y_1(t)) and the TS signal (x(t)). The second cross-correlation information may be determined by applying an absolute value.

According to an embodiment, the captured TS signal y_1(t) includes a first signal and a second signal. The first signal may be a desired signal, and the second signal may be an undesired image signal. The second signal may be caused by a signal distortion component present on the loopback path. Signal distortion factors may include, but are not limited to, gain error and phase error, for example. The first correlation information may be determined based on the multiplication result of the TS signal (x(t)) and the complex conjugate (y_1*(t)) of the captured TS signal (y_1(t)), so that the power of the first signal can represent power. Equation 1 above may be expressed differently as an equation for calculating the power of the first signal. The second correlation information may be determined based on a result of multiplying the TS signal x(t) and the captured TS signal y_1(t), thereby indicating the power of the second signal. Equation 2 above may be expressed differently as an equation for calculating the power of the second signal.

An example of having an IQ mismatch is shown in FIG. 12A , and an example of no IQ mismatch is shown in FIG. 12B . 12A and 12B , CCF may indicate first cross-correlation information and CCCF may indicate second cross-correlation information. In FIG. 12A , the upper figure may represent the first cross-correlation information (CCF) when there is an IQ mismatch, and the lower figure may represent the second cross-correlation information (CCF) when there is an IQ mismatch. can In FIG. 12B , the upper figure may represent the first cross-correlation information (CCF) when there is no IQ mismatch, and the lower figure represents the second cross-correlation information (CCF) when there is no IQ mismatch. can According to an embodiment, the difference between the first cross-correlation information and the second cross-correlation information when there is an IQ mismatch may be small and the difference between the first cross-correlation information and the second cross-correlation information when there is no IQ mismatch. can be large.

Returning to FIG. 11 , in operation 1140 , the processor 280 may calculate a ratio between the first signal and the second signal using the first correlation information and the second correlation information. For example, the processor 280 may calculate a result of dividing the maximum value of the first cross-correlation information by the maximum value of the second cross-correlation information as a ratio between the first signal and the second signal. In other words, the processor 280 may calculate max (first cross-correlation information)/max (second cross-correlation information) as a ratio between the first signal and the second signal.

In operation 1150 , the processor 280 may determine whether a ratio between the first signal and the second signal is less than a threshold (eg, 3). In other words, the processor 280 may compare the ratio between the first signal and the second signal with a threshold (eg, 3).

In operation 1150 , the processor 280 may determine that the ratio between the first signal and the second signal is equal to or greater than a threshold. In this case, in operation 1160 , the processor 280 may determine that there is no IQ mismatch in the loopback path between the first transmitter 260-1 and the first receiver 250-1.

In operation 1150 , the processor 280 may determine that the ratio between the first signal and the second signal is less than a threshold value. In this case, in operation 1170 , the processor 280 may determine that there is an IQ mismatch in the loopback path between the first transmitter 260-1 and the first receiver 250-1.

According to an embodiment, the processor 280 performs the same as operations 1110 to 1170 in operations 720 and 750 of FIG. 7 to obtain the second transmitter 260 - 2 and the second receiver. It can be checked whether there is an IQ mismatch in the loopback path of (250-2). In addition, the processor 280 performs the same as operations 1110 to 1170 in operations 920 and 950 of FIG. ), you can check whether there is an IQ mismatch in the loopback path.

13 is an exemplary diagram for describing a wireless network device according to various embodiments.

Referring to FIG. 13 , a wireless network device 1300 (eg, RU 110 ) includes a transmitter 1310 (eg, a first transmitter 260-1), a processor 1320 (eg, a processor 280). , and a receiver 1330 (eg, a first receiver 250-1).

The wireless network device 1300 may be expressed differently as a base station device or as a communication device installed in the base station.

According to an embodiment, the processor 1320 controls a switch (eg, switch 270-1) between the transmitter 1310 and the receiver 1330 so that a loopback path is formed between the transmitter 1310 and the receiver 1330. and a check procedure for checking whether there is an IQ mismatch in the loopback path of the transmitter 1310 and the receiver 1330 may be performed.

According to an embodiment, in the check procedure, the processor 1320 may output a TS signal to the transmitter 1310, and the TS signal looped back from the transmitter 1310 to the receiver 1330 through the formed loopback path. have. The processor 1320 generates first correlation information (eg, first cross-correlation information according to Equation 1) and second correlation information (eg, according to Equation 2 above) using the captured TS signal and the output TS signal. second cross-correlation information) may be determined. The processor 1320 may calculate a ratio between the first signal and the second signal in the captured TS signal using the first correlation information and the second correlation information. The processor 1320 compares the calculated ratio (eg, max (first cross-correlation information)/max (second cross-correlation information)) with a threshold (eg, 3) to loop back the transmitter 1310 and the receiver 1330 . You can check whether there is an IQ mismatch in the path.

According to an embodiment, the processor 1320 may determine a cross-correlation between the complex conjugate of the captured TS signal and the output TS signal as the first correlation information, and the cross-correlation between the captured TS signal and the output TS signal. The correlation may be determined as the second correlation information.

According to an embodiment, the processor 1320 may calculate a result of dividing the maximum value of the first correlation information by the maximum value of the second correlation information as a ratio between the first signal and the second signal.

According to an embodiment, the processor 1320 may set a time slot satisfying a predetermined condition among a plurality of time slots of TDD as a time slot in which a loopback path formation and check procedure is performed.

According to an embodiment, the time slot satisfying the predetermined condition may include at least one of a time slot not used by the modem of the DU 120 and a time slot having the lowest throughput degradation.

According to an embodiment, the processor 1320 may determine that there is an IQ mismatch in the loopback path formed in the transmitter 1310 and the receiver 1330 when the ratio between the first signal and the second signal is less than a threshold, When the ratio between the first signal and the second signal is equal to or greater than the threshold, it may be determined that there is no IQ mismatch in the loopback path formed in the transmitter 1310 and the receiver 1330 .

According to an embodiment, when there is an IQ mismatch in the loopback path formed in the transmitter 1310 and the receiver 1330, the processor 1320 may initialize the clock and update the number of clock initialization, as described above. The check procedure may be re-performed.

According to an embodiment, when it is determined that there is an IQ mismatch by re-performing the above-described check procedure, the processor 1320 may check whether the updated clock initialization number is the same as a preset number (eg, 3 times). . When the number of updated clock initialization times is the same as the preset number, the processor 1320 may determine that there is a defect in the loopback path formed in the transmitter 1310 and the receiver 1330, and the manager's terminal determines that there is a defect. An alarm can be sent.

According to an embodiment, when there is no IQ mismatch on the loopback path formed in the transmitter 1310 and the receiver 1330 , the processor 1320 is configured to another transmitter in the wireless network device 1300 (eg, a second transmitter 260 ). -2)) and the other receiver (eg, the second transmitter 250-2) can form a loopback path, and it is possible to check whether there is an IQ mismatch in the loopback path formed in the other transmitter and the other receiver.

According to an embodiment, the operating method of the wireless network device 1400 controls the switch 270-1 between the transmitter 1310 and the receiver 1330 so that a loopback path is formed in the transmitter 1310 and the receiver 1330. and checking whether there is an IQ mismatch in the formed loopback path.

According to an embodiment, the operation of determining whether there is an IQ mismatch is an operation of outputting a TS signal to the transmitter 1310, and capturing the TS signal looped back from the transmitter 1310 to the receiver 1330 through the formed loopback path. operation, determining the first correlation information and the second correlation information using the captured TS signal and the output training sequence signal, and determining the ratio between the first signal and the second signal in the captured TS signal as the first correlation information and an operation of calculating using the second correlation information, and an operation of determining whether there is an IQ mismatch in the formed loopback path by comparing the calculated ratio with a threshold value.

According to an embodiment, the operation of determining the first correlation information and the second correlation information includes the operation of determining the cross-correlation between the complex conjugate of the captured TS signal and the output TS signal as the first correlation information and and determining a cross-correlation between the TS signal and the output TS signal as the second correlation information.

According to an embodiment, the calculating of the ratio between the first signal and the second signal may include dividing the maximum value of the first correlation information by the maximum value of the second correlation information to obtain a ratio between the first signal and the second signal. It may include an operation of calculating .

The matters described with reference to FIGS. 1 to 12 may be applied to the matters described with reference to FIG. 13 , and thus a detailed description thereof will be omitted.

14 is another exemplary diagram for describing a wireless network device according to various embodiments.

Referring to FIG. 14 , a wireless network device 1400 (eg, RU 110 ) may include a plurality of transceivers 1410-1 to 1410-n and a processor (eg, processor 280) 1420 . can

The wireless network device 1400 may be expressed differently as a base station device or as a communication device installed in the base station.

According to an embodiment, each of the plurality of transceivers 1410-1 to 1410-n may include each of the receivers 250-1 and each of the transmitters 260-1. The first transceiver 1410-1 may include a first receiver 250-1 and a first transmitter 260-1, and the second transceiver 1410-2 may include a second receiver 250-2 and A second transmitter 260 - 2 may be included, and the n th transceiver 1410 - n may include an n th receiver 250 - n and an n th transmitter 260 - n.

According to an embodiment, the processor 1420 is configured to operate the transceivers 1410-1 to 1420 in a preset time interval (eg, at least one of a time slot not used by the modem of the DU 120 and a time slot having the lowest throughput degradation). 1410-n), an inspection (eg, HW failure determination operation) may be performed for each.

According to an embodiment, the processor 1420 includes a transmitter (eg, a first transmitter 260-1) and a receiver (eg: A switch (eg, switch 270-1) between the transmitter and the receiver may be controlled to form a loopback path in the first receiver 250-1). The processor 1420 may generate a TS signal and output it to the transmitter of the first transceiver 1410-1, and the first transceiver 1410-1 from the transmitter of the first transceiver 1410-1 through the formed loopback path. The loopback TS signal can be captured by the receiver of The processor 1420 may determine the first correlation information and the second correlation information by using the captured TS signal and the output TS signal. The processor 1420 may calculate a ratio between the first signal and the second signal in the captured TS signal using the first correlation information and the second correlation information. The processor 1420 may check whether there is an IQ mismatch in the loopback path formed in the transmitter and the receiver of the first transceiver 1410 - 1 by comparing the calculated ratio with the threshold. If there is no IQ mismatch, the processor 1420 may determine that the first transceiver 1410-1 is not defective.

The matters described with reference to FIGS. 1 to 13 may be applied to the matters described with reference to FIG. 14 , and thus a detailed description thereof will be omitted.

15 is a block diagram of an electronic device 1501 in a network environment 1500 , according to various embodiments. Referring to FIG. 15 , in a network environment 1500 , an electronic device 1501 (eg, the electronic device 130 of FIG. 1 ) communicates with an electronic device 1502 through a first network 1598 (eg, a short-range wireless communication network). ), or communicate with at least one of the electronic device 1504 or the server 1508 through the second network 1599 (eg, a remote wireless communication network). According to an embodiment, the electronic device 1501 may communicate with the RU 110 . According to an embodiment, the electronic device 1501 may communicate with the wireless network device 1300 . According to an embodiment, the electronic device 1501 may communicate with the wireless network device 1400 . According to an embodiment, the electronic device 1501 may communicate with the electronic device 1504 through the server 1508 . According to an embodiment, the electronic device 1501 includes a processor 1520 , a memory 1530 , an input module 1550 , a sound output module 1555 , a display module 1560 , an audio module 1570 , and a sensor module ( 1576), interface 1577, connection terminal 1578, haptic module 1579, camera module 1580, power management module 1588, battery 1589, communication module 1590, subscriber identification module 1596 , or an antenna module 1597 . In some embodiments, at least one of these components (eg, the connection terminal 1578 ) may be omitted or one or more other components may be added to the electronic device 1501 . In some embodiments, some of these components (eg, sensor module 1576 , camera module 1580 , or antenna module 1597 ) are integrated into one component (eg, display module 1560 ). can be

The processor 1520, for example, executes software (eg, a program 1540) to execute at least one other component (eg, hardware or software component) of the electronic device 1501 connected to the processor 1520. It can control and perform various data processing or operations. According to one embodiment, as at least part of data processing or computation, the processor 1520 converts commands or data received from other components (eg, the sensor module 1576 or the communication module 1590 ) to the volatile memory 1532 . may store the command or data stored in the volatile memory 1532 , and store the result data in the non-volatile memory 1534 . According to an embodiment, the processor 1520 is the main processor 1521 (eg, a central processing unit or an application processor) or a secondary processor 1523 (eg, a graphics processing unit, a neural network processing unit) a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor). For example, when the electronic device 1501 includes a main processor 1521 and a sub-processor 1523 , the sub-processor 1523 uses less power than the main processor 1521 or is set to be specialized for a specified function. can The auxiliary processor 1523 may be implemented separately from or as part of the main processor 1521 .

The coprocessor 1523 may be, for example, on behalf of the main processor 1521 while the main processor 1521 is in an inactive (eg, sleep) state, or when the main processor 1521 is active (eg, executing an application). ), together with the main processor 1521, at least one of the components of the electronic device 1501 (eg, the display module 1560, the sensor module 1576, or the communication module 1590) It is possible to control at least some of the related functions or states. According to one embodiment, the coprocessor 1523 (eg, an image signal processor or communication processor) may be implemented as part of another functionally related component (eg, the camera module 1580 or the communication module 1590). have. According to an embodiment, the auxiliary processor 1523 (eg, a neural network processing device) may include a hardware structure specialized for processing an artificial intelligence model. Artificial intelligence models can be created through machine learning. Such learning may be performed, for example, in the electronic device 1501 itself on which the artificial intelligence model is performed, or may be performed through a separate server (eg, the server 1508). The learning algorithm may include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but in the above example not limited The artificial intelligence model may include a plurality of artificial neural network layers. Artificial neural networks include deep neural networks (DNNs), convolutional neural networks (CNNs), recurrent neural networks (RNNs), restricted boltzmann machines (RBMs), deep belief networks (DBNs), bidirectional recurrent deep neural networks (BRDNNs), It may be one of deep Q-networks or a combination of two or more of the above, but is not limited to the above example. The artificial intelligence model may include, in addition to, or alternatively, a software structure in addition to the hardware structure.

The memory 1530 may store various data used by at least one component (eg, the processor 1520 or the sensor module 1576) of the electronic device 1501 . The data may include, for example, input data or output data for software (eg, a program 1540 ) and instructions related thereto. The memory 1530 may include a volatile memory 1532 or a non-volatile memory 1534 .

The program 1540 may be stored as software in the memory 1530 , and may include, for example, an operating system 1542 , middleware 1544 , or an application 1546 .

The input module 1550 may receive a command or data to be used by a component (eg, the processor 1520 ) of the electronic device 1501 from the outside (eg, a user) of the electronic device 1501 . The input module 1550 may include, for example, a microphone, a mouse, a keyboard, a key (eg, a button), or a digital pen (eg, a stylus pen).

The sound output module 1555 may output a sound signal to the outside of the electronic device 1501 . The sound output module 1555 may include, for example, a speaker or a receiver. The speaker can be used for general purposes such as multimedia playback or recording playback. The receiver can be used to receive incoming calls. According to one embodiment, the receiver may be implemented separately from or as part of the speaker.

The display module 1560 may visually provide information to the outside (eg, a user) of the electronic device 1501 . The display module 1560 may include, for example, a control circuit for controlling a display, a hologram device, or a projector and a corresponding device. According to an embodiment, the display module 1560 may include a touch sensor configured to sense a touch or a pressure sensor configured to measure the intensity of a force generated by the touch.

The audio module 1570 may convert a sound into an electric signal or, conversely, convert an electric signal into a sound. According to an embodiment, the audio module 1570 acquires a sound through the input module 1550 or an external electronic device (eg, a sound output module 1555 ) directly or wirelessly connected to the electronic device 1501 . The electronic device 1502) (eg, a speaker or headphones) may output sound.

The sensor module 1576 detects an operating state (eg, power or temperature) of the electronic device 1501 or an external environmental state (eg, user state), and generates an electrical signal or data value corresponding to the sensed state. can do. According to an embodiment, the sensor module 1576 may include, for example, a gesture sensor, a gyro sensor, a barometric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, It may include a temperature sensor, a humidity sensor, or an illuminance sensor.

The interface 1577 may support one or more specified protocols that may be used for the electronic device 1501 to directly or wirelessly connect with an external electronic device (eg, the electronic device 1502 ). According to an embodiment, the interface 1577 may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

The connection terminal 1578 may include a connector through which the electronic device 1501 can be physically connected to an external electronic device (eg, the electronic device 1502 ). According to an embodiment, the connection terminal 1578 may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (eg, a headphone connector).

The haptic module 1579 may convert an electrical signal into a mechanical stimulus (eg, vibration or movement) or an electrical stimulus that the user can perceive through tactile or kinesthetic sense. According to an embodiment, the haptic module 1579 may include, for example, a motor, a piezoelectric element, or an electrical stimulation device.

The camera module 1580 may capture still images and moving images. According to one embodiment, the camera module 1580 may include one or more lenses, image sensors, image signal processors, or flashes.

The power management module 1588 may manage power supplied to the electronic device 1501 . According to an embodiment, the power management module 1588 may be implemented as, for example, at least a part of a power management integrated circuit (PMIC).

The battery 1589 may supply power to at least one component of the electronic device 1501 . According to one embodiment, battery 1589 may include, for example, a non-rechargeable primary cell, a rechargeable secondary cell, or a fuel cell.

The communication module 1590 is a direct (eg, wired) communication channel or a wireless communication channel between the electronic device 1501 and an external electronic device (eg, the electronic device 1502 , the electronic device 1504 , or the server 1508 ). It can support establishment and communication performance through the established communication channel. The communication module 1590 operates independently of the processor 1520 (eg, an application processor) and may include one or more communication processors supporting direct (eg, wired) communication or wireless communication. According to one embodiment, the communication module 1590 may include a wireless communication module 1592 (eg, a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module 1594 (eg, : It may include a local area network (LAN) communication module, or a power line communication module). A corresponding communication module among these communication modules is a first network 1598 (eg, a short-range communication network such as Bluetooth, wireless fidelity (WiFi) direct, or infrared data association (IrDA)) or a second network 1599 (eg, legacy). It may communicate with the external electronic device 1504 through a cellular network, a 5G network, a next-generation communication network, the Internet, or a telecommunication network such as a computer network (eg, LAN or WAN). These various types of communication modules may be integrated into one component (eg, a single chip) or may be implemented as a plurality of components (eg, multiple chips) separate from each other. The wireless communication module 1592 uses subscriber information (eg, International Mobile Subscriber Identifier (IMSI)) stored in the subscriber identification module 1596 within a communication network, such as the first network 1598 or the second network 1599 . The electronic device 1501 may be identified or authenticated.

The wireless communication module 1592 may support a 5G network after a 4G network and a next-generation communication technology, for example, a new radio access technology (NR). NR access technology includes high-speed transmission of high-capacity data (eMBB (enhanced mobile broadband)), minimization of terminal power and access to multiple terminals (mMTC (massive machine type communications)), or high reliability and low latency (URLLC (ultra-reliable and low-latency) -latency communications)). The wireless communication module 1592 may support a high frequency band (eg, mmWave band) to achieve a high data rate, for example. The wireless communication module 1592 uses various technologies for securing performance in a high-frequency band, for example, beamforming, massive multiple-input and multiple-output (MIMO), all-dimensional multiplexing. It may support technologies such as full dimensional MIMO (FD-MIMO), an array antenna, analog beam-forming, or a large scale antenna. The wireless communication module 1592 may support various requirements specified in the electronic device 1501 , an external electronic device (eg, the electronic device 1504 ), or a network system (eg, the second network 1599 ). According to an embodiment, the wireless communication module 1592 provides a peak data rate (eg, 20 Gbps or more) for realization of eMBB, loss coverage for realization of mMTC (eg, 164 dB or less), or U-plane latency (for URLLC realization) ( Example: Downlink (DL) and uplink (UL) each 0.5 ms or less, or round trip 1 ms or less) can be supported.

The antenna module 1597 may transmit or receive a signal or power to the outside (eg, an external electronic device). According to an embodiment, the antenna module 1597 may include an antenna including a conductor formed on a substrate (eg, a PCB) or a radiator formed of a conductive pattern. According to an embodiment, the antenna module 1597 may include a plurality of antennas (eg, an array antenna). In this case, at least one antenna suitable for a communication scheme used in a communication network such as the first network 1598 or the second network 1599 is connected from the plurality of antennas by, for example, the communication module 1590 . can be selected. A signal or power may be transmitted or received between the communication module 1590 and an external electronic device through the selected at least one antenna. According to some embodiments, other components (eg, a radio frequency integrated circuit (RFIC)) other than the radiator may be additionally formed as a part of the antenna module 1597 .

According to various embodiments, the antenna module 1597 may form a mmWave antenna module. According to one embodiment, the mmWave antenna module comprises a printed circuit board, an RFIC disposed on or adjacent to a first side (eg, bottom side) of the printed circuit board and capable of supporting a designated high frequency band (eg, mmWave band); and a plurality of antennas (eg, an array antenna) disposed on or adjacent to a second side (eg, top or side) of the printed circuit board and capable of transmitting or receiving signals of the designated high frequency band. can do.

At least some of the components are connected to each other through a communication method between peripheral devices (eg, a bus, general purpose input and output (GPIO), serial peripheral interface (SPI), or mobile industry processor interface (MIPI)) and a signal ( e.g. commands or data) can be exchanged with each other.

According to an embodiment, the command or data may be transmitted or received between the electronic device 1501 and the external electronic device 1504 through the server 1508 connected to the second network 1599 . Each of the external electronic devices 1502 or 1504 may be the same or a different type of the electronic device 1501 . According to an embodiment, all or part of the operations executed in the electronic device 1501 may be executed in one or more external electronic devices 1502 , 1504 , or 1508 . For example, when the electronic device 1501 needs to perform a function or service automatically or in response to a request from a user or other device, the electronic device 1501 may perform the function or service itself instead of executing the function or service itself. Alternatively or additionally, one or more external electronic devices may be requested to perform at least a part of the function or the service. One or more external electronic devices receiving the request may execute at least a part of the requested function or service, or an additional function or service related to the request, and transmit a result of the execution to the electronic device 1501 . The electronic device 1501 may process the result as it is or additionally and provide it as at least a part of a response to the request. For this purpose, for example, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used. The electronic device 1501 may provide an ultra-low latency service using, for example, distributed computing or mobile edge computing. In another embodiment, the external electronic device 1504 may include an Internet of things (IoT) device. Server 1508 may be an intelligent server using machine learning and/or neural networks. According to an embodiment, the external electronic device 1504 or the server 1508 may be included in the second network 1599 . The electronic device 1501 may be applied to an intelligent service (eg, smart home, smart city, smart car, or health care) based on 5G communication technology and IoT-related technology.

The electronic device according to various embodiments disclosed in this document may have various types of devices. The electronic device may include, for example, a portable communication device (eg, a smart phone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, or a home appliance device. The electronic device according to the embodiment of the present document is not limited to the above-described devices.

The various embodiments of this document and the terms used therein are not intended to limit the technical features described in this document to specific embodiments, and should be understood to include various modifications, equivalents, or substitutions of the embodiments. In connection with the description of the drawings, like reference numerals may be used for similar or related components. The singular form of the noun corresponding to the item may include one or more of the item, unless the relevant context clearly dictates otherwise. As used herein, "A or B", "at least one of A and B", "at least one of A or B", "A, B or C", "at least one of A, B and C", and "A , B, or C," each of which may include any one of the items listed together in the corresponding one of the phrases, or all possible combinations thereof. Terms such as "first", "second", or "first" or "second" may simply be used to distinguish an element from other elements in question, and may refer elements to other aspects (e.g., importance or order) is not limited. It is said that one (eg, first) component is “coupled” or “connected” to another (eg, second) component, with or without the terms “functionally” or “communicatively”. When referenced, it means that one component can be connected to the other component directly (eg by wire), wirelessly, or through a third component.

The term “module” used in various embodiments of this document may include a unit implemented in hardware, software, or firmware, and is interchangeable with terms such as, for example, logic, logic block, component, or circuit. can be used as A module may be an integrally formed part or a minimum unit or a part of the part that performs one or more functions. For example, according to an embodiment, the module may be implemented in the form of an application-specific integrated circuit (ASIC).

Various embodiments of the present document include one or more instructions stored in a storage medium (eg, internal memory 1536 or external memory 1538) readable by a machine (eg, electronic device 1501). may be implemented as software (eg, a program 1540) including For example, a processor (eg, processor 1520 ) of a device (eg, electronic device 1501 ) may call at least one command among one or more commands stored from a storage medium and execute it. This makes it possible for the device to be operated to perform at least one function according to the called at least one command. The one or more instructions may include code generated by a compiler or code executable by an interpreter. The device-readable storage medium may be provided in the form of a non-transitory storage medium. Here, 'non-transitory' only means that the storage medium is a tangible device and does not contain a signal (eg, electromagnetic wave), and this term is used in cases where data is semi-permanently stored in the storage medium and It does not distinguish between temporary storage cases.

According to one embodiment, the method according to various embodiments disclosed in this document may be provided in a computer program product (computer program product). Computer program products may be traded between sellers and buyers as commodities. The computer program product is distributed in the form of a machine-readable storage medium (eg compact disc read only memory (CD-ROM)), or through an application store (eg Play Store™) or on two user devices ( It can be distributed (eg downloaded or uploaded) directly, online between smartphones (eg: smartphones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily generated in a machine-readable storage medium such as a memory of a server of a manufacturer, a server of an application store, or a memory of a relay server.

According to various embodiments, each component (eg, a module or a program) of the above-described components may include a singular or a plurality of entities, and some of the plurality of entities may be separately disposed in other components. have. According to various embodiments, one or more components or operations among the above-described corresponding components may be omitted, or one or more other components or operations may be added. Alternatively or additionally, a plurality of components (eg, a module or a program) may be integrated into one component. In this case, the integrated component may perform one or more functions of each component of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to the integration. . According to various embodiments, operations performed by a module, program, or other component are executed sequentially, in parallel, repeatedly, or heuristically, or one or more of the operations are executed in a different order, or omitted. , or one or more other operations may be added.

110: RU
120: DU
1300: wireless network device
1400: wireless network device

Claims (20)

A wireless network device comprising:
receiving set;
telautograph; and
A processor that controls a switch between the transmitter and the receiver so that a loopback path is formed in the transmitter and the receiver, and performs a check procedure to check whether there is an IQ mismatch in the formed loopback path
including,
In the check procedure, the processor,
output a training sequence signal to the transmitter, capture a training sequence signal looped back from the transmitter to the receiver through the formed loopback path, and use the captured training sequence signal and the output training sequence signal to perform a first correlation (correlation) information and second correlation information are determined, and a ratio between a first signal and a second signal in the captured training sequence signal is calculated using the first correlation information and the second correlation information, and the calculation comparing the ratio with a threshold to determine whether there is the IQ mismatch in the formed loopback path,
wireless network device.
According to claim 1,
The processor is
A cross correlation between a complex conjugate of the captured training sequence signal and the output training sequence signal is determined as the first correlation information, and the captured training sequence signal and the output training sequence signal are determined as the first correlation information. determining the cross-correlation between the sequence signals as the second correlation information,
wireless network device.
According to claim 1,
The processor is
calculating a result of dividing the maximum value of the first correlation information by the maximum value of the second correlation information as the ratio,
wireless network device.
According to claim 1,
The processor is
Setting a time slot that meets a certain condition among a plurality of time division duplexing (TDD) time slots as a time slot in which the loopback path is formed and the check procedure is performed,
wireless network device.
5. The method of claim 4,
The time slot meeting the predetermined condition includes at least one of a time slot not used by the modem and a time slot with the lowest throughput degradation.
wireless network device.
According to claim 1,
The processor is
determining that there is the IQ mismatch if the calculated ratio is less than the threshold, and determining that there is no IQ mismatch if the calculated ratio is greater than or equal to the threshold,
wireless network device.
According to claim 1,
The processor is
If there is the IQ mismatch, initialize a clock, update the number of clock initialization, and re-perform the check procedure,
wireless network device.
8. The method of claim 7,
The processor is
If it is determined that there is the IQ mismatch by re-performing the check procedure, it is checked whether the updated clock initialization number is equal to a preset number, and if the updated clock initialization number is the same as the preset number, the It is determined that there is a defect on the formed loopback path, and an alarm indicating that there is a defect is transmitted to the terminal of the manager,
wireless network device.
According to claim 1,
The processor is
If there is no IQ mismatch, causing a loopback path to be formed in another transmitter and another receiver in the wireless network device, and checking whether there is an IQ mismatch in the loopback path formed in the other transmitter and the other receiver,
wireless network device.
A wireless network device comprising:
a plurality of transceivers; and
A processor that checks each of the transceivers in a preset time interval
including,
The processor is
A switch between the transmitter and the receiver is controlled so that a loopback path is formed in the transmitter and the receiver of a first transceiver among the transceivers, a training sequence signal is generated and output to the transmitter, and the transmitter through the formed loopback path capture a training sequence signal looped back to the receiver, determine first correlation information and second correlation information using the captured training sequence signal and the output training sequence signal, and determine the first correlation information and the second correlation information Calculate the ratio between the first signal and the second signal in the captured training sequence signal using the correlation information, and compare the calculated ratio with a threshold to determine whether there is an IQ mismatch in the formed loopback path, determining that the first transceiver is not defective if there is no IQ mismatch;
wireless network device.
11. The method of claim 10,
The processor is
A cross correlation between a complex conjugate of the captured training sequence signal and the output training sequence signal is determined as the first correlation information, and the captured training sequence signal and the output training sequence signal are determined as the first correlation information. determining the cross-correlation between the sequence signals as the second correlation information,
wireless network device.
11. The method of claim 10,
The processor is
calculating a result of dividing the maximum value of the first correlation information by the maximum value of the second correlation information as the ratio,
wireless network device.
11. The method of claim 10,
The preset time interval is,
at least one of a time slot unused by a modem of the wireless network device and a time slot with the lowest throughput degradation.
wireless network device.
11. The method of claim 10,
The processor is
determining that there is the IQ mismatch if the calculated ratio is less than the threshold, and determining that there is no IQ mismatch if the calculated ratio is greater than or equal to the threshold,
wireless network device.
11. The method of claim 10,
The processor is
If there is the IQ mismatch, initialize a clock, update the number of clock initialization, and recheck whether there is the IQ mismatch in the formed loopback path,
wireless network device.
16. The method of claim 15,
The processor is
When it is reconfirmed that there is the IQ mismatch, it is checked whether the updated clock initialization number is the same as a preset number, and when the updated clock initialization number is the same as the preset number, on the formed loopback path Determining that there is a defect, and delivering an alarm indicating that there is a defect to the terminal of the manager,
wireless network device.
11. The method of claim 10,
The processor is
If there is no IQ mismatch, a loopback path is formed between the transmitter and the receiver of a second transceiver among the transceivers, and it is checked whether there is an IQ mismatch between the loopback path formed in the transmitter and the receiver of the second transceiver,
wireless network device.
A method of operating a wireless network device, comprising:
controlling a switch between the transmitter and the receiver to form a loopback path between the transmitter and the receiver; and
Checking whether there is an IQ mismatch in the formed loopback path
including,
The checking operation is
outputting a training sequence signal to the transmitter;
capturing a training sequence signal looped back from the transmitter to the receiver through the formed loopback path;
determining first correlation information and second correlation information using the captured training sequence signal and the output training sequence signal;
calculating a ratio between a first signal and a second signal in the captured training sequence signal using the first correlation information and the second correlation information; and
Comparing the calculated ratio with a threshold to determine whether there is the IQ mismatch in the formed loopback path
containing,
A method of operation of a wireless network device.
19. The method of claim 18,
The operation of determining the first correlation information and the second correlation information includes:
determining a cross correlation between a complex conjugate of the captured training sequence signal and the output training sequence signal as the first correlation information; and
Determining a cross-correlation between the captured training sequence signal and the output training sequence signal as the second correlation information
comprising,
How a wireless network device works.
11. The method of claim 10,
The operation of calculating the ratio is
calculating a result of dividing the maximum value of the first correlation information by the maximum value of the second correlation information as the ratio
containing,
A method of operation of a wireless network device.

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