KR20220097839A - Display panel and display device - Google Patents

Abstract

Disclosed in one embodiment of the present invention is a display panel comprising: a first display area, a second display area having a through portion, and a third display area disposed between the first and second display areas, The display panel includes: a substrate extending from the first display area to the third display area and separated from the second display area with the through portion interposed therebetween; a plurality of display elements disposed on the substrate and having a first display element disposed in the first display area, a second display element disposed in the second display area and a plurality of third display elements disposed in the third display area; and an organic insulating layer disposed between the substrate and the plurality of display elements and having a second display area hole disposed between the second display element and the through portion, and the third display area hole disposed between the plurality of adjacent third display elements. The display panel and the display device can prevent or reduce an occurrence of a crack when moving along a curved surface of a roller.

Description

DISPLAY PANEL AND DISPLAY DEVICE

The present invention relates to a display panel and a display device.

As display devices that visually display electrical signals develop, various display devices having excellent characteristics such as thinness, weight reduction, and low power consumption have been introduced. For example, flexible display devices that can be folded, rolled into a roll shape using a roller, or slidable have been introduced.

A stress applied to a portion of the display panel in contact with the roller may be high. Also, as the display panel moves along the curved surface, the display panel may be stretched. In such a display panel, a crack may be highly likely to occur in a portion in contact with the roller.

SUMMARY An aspect of the present invention is to provide a display panel and a display device capable of preventing or reducing the occurrence of cracks when moving along a curved surface of a roller.

According to an embodiment of the present invention, there is provided a display panel including a first display area, a second display area having a penetrating portion, and a third display area disposed between the first display area and the second display area, a substrate extending from the first display area to the third display area and separated from the second display area with the through part interposed therebetween; a first display element disposed on the substrate, a first display element disposed on the first display area, a second display element disposed on the second display area, and a plurality of third display elements disposed on the third display area; a plurality of display elements; and a second display area hole disposed between the substrate and the plurality of display elements, the second display area hole disposed between the second display element and the through portion, and a third display disposed between the plurality of adjacent third display elements. Disclosed is a display panel comprising; an organic insulating layer having a region hole.

In an embodiment, the method further includes an inorganic insulating layer disposed between the substrate and the organic insulating layer, wherein the inorganic insulating layer extends from the first display area to the third display area, and the second display area The region may be separated with the through portion interposed therebetween.

In an embodiment, the method further includes a pattern layer disposed on the organic insulating layer, wherein the pattern layer includes one of the plurality of third display elements facing the first display element and the first display It can be placed between elements.

In an embodiment, the method further includes an encapsulation layer disposed on the plurality of display elements, the encapsulation layer including at least one inorganic encapsulation layer and at least one organic encapsulation layer, wherein the at least one organic encapsulation layer comprises the It may be separated based on the pattern layer.

In one embodiment, a pixel circuit electrically connected to any one of the plurality of display elements; and a wiring disposed between the substrate and the pattern layer, wherein the wiring may be electrically connected to the pixel circuit.

In an embodiment, the method may further include an intermediate pattern layer disposed on the organic insulating layer, wherein the intermediate pattern layer may be disposed between the plurality of adjacent third display elements.

In an embodiment, the method may further include an inorganic layer disposed between the organic insulating layer and any one of the plurality of third display elements, wherein the inorganic layer protrudes toward a center of the third display area hole. Tips may be provided.

In an embodiment, the second display area includes a first pixel area, a second pixel area, and a connection area extending from the first pixel area to the second pixel area, and an edge of the first pixel area , an edge of the connection region, and an edge of the second pixel region may define at least a portion of the through portion.

In an embodiment, the second display area includes a first sub display area and a second sub display area, and the through portion overlaps the first sub display area with a first through portion and the second sub display area and a second through-portion overlapping therewith, wherein the size of the first through-portion may be larger than the size of the second through-portion.

In an embodiment, the third display area includes a first intermediate display area and a second intermediate display area, wherein the first intermediate display area is disposed closer to the first display area than the second intermediate display area , a density of the plurality of third display elements disposed in the first intermediate display area may be greater than a density of the plurality of third display elements disposed in the second intermediate display area.

Another embodiment of the present invention provides a display device, comprising: a display panel including a first display area and a second display area; and a roller that winds up the second display area, wherein the second display area includes a penetrating portion penetrating the display panel.

In an embodiment, the second display area includes a first pixel area, a second pixel area, and a connection area extending from the first pixel area to the second pixel area, and an edge of the first pixel area , an edge of the connection region, and an edge of the second pixel region may define at least a portion of the through portion.

In an embodiment, the display panel includes a substrate, an organic insulating layer disposed on the substrate, the organic insulating layer having a second display region hole overlapping the second display region, and the organic insulating layer; a plurality of display elements including a first display element disposed on the first display area and a second display element disposed on the second display area, and overlapping the second display area, the organic insulating layer and the second display area It may include an inorganic layer disposed between the two display elements and having a protruding tip protruding toward the center of the second display area hole.

In an embodiment, the display panel is disposed between the first display area and the second display area, and includes a third display area, and the display panel includes the third display area from the first display area a substrate extending to and separated from the second display area with the penetrating portion interposed therebetween, a first display element disposed on the substrate, a first display element disposed in the first display area, and a second display element disposed in the second display area A plurality of display elements including a display element and a plurality of third display elements disposed in the third display area, disposed on the plurality of display elements, at least one inorganic encapsulation layer and at least one organic encapsulation layer an encapsulation layer including a layer, and a pattern layer disposed between the first display element and any one of the plurality of third display elements facing the first display element and separating the at least one organic encapsulation layer may include

In an embodiment, the display panel includes a pixel circuit electrically connected to any one of the plurality of display elements and a wiring disposed between the substrate and the pattern layer, wherein the wiring is electrically connected to the pixel circuit can be connected to

In an embodiment, the display panel includes a third display area disposed between the first display area and the second display area, wherein the third display area includes a first intermediate display area and a second intermediate display area wherein the first intermediate display area is disposed closer to the first display area than the second intermediate display area, and the density of sub-pixels disposed in the first intermediate display area is disposed in the second intermediate display area It may be greater than the density of the sub-pixel.

In an embodiment, the display device includes a first state in which the second display area is rolled on the roller and a second state in which the second display area is at least partially unrolled from the roller. can do.

In an embodiment, the second display area includes a first sub display area in contact with the roller in the first state and a second sub display area extending from the first sub display area, and the penetrating portion includes the It includes a first through portion overlapping the first sub display area and a second through portion overlapping with the second sub display area, wherein a size of the first through portion may be greater than a size of the second through portion.

In an exemplary embodiment, in the first state, at least a portion of the second sub display area may be disposed below the first display area.

In an embodiment, the second display area includes a first area and a second area disposed with the first display area interposed therebetween, wherein the rollers include a first roller and a second roller, and the second display area is disposed therebetween. The first roller may wind the first area, and the second roller may wind the second area.

As described above, the display panel according to the embodiments of the present invention may include a first display area and a second display area having a penetrating portion. Accordingly, it is possible to prevent or reduce the occurrence of cracks when the second display area moves along the curved surface of the roller.

1A and 1B are perspective views schematically illustrating a display device according to an exemplary embodiment.
2A and 2B are cross-sectional views schematically illustrating a portion of a display device according to an exemplary embodiment.
3 is a schematic plan view of a display panel according to an exemplary embodiment of the present invention.
4 is an equivalent circuit diagram schematically illustrating a pixel circuit applicable to a display panel.
5 is a cross-sectional view taken along line A-A' of the display panel of FIG. 3 according to an exemplary embodiment of the present invention.
6 is an enlarged view of a portion B of the display panel of FIG. 3 according to an exemplary embodiment of the present invention.
7 is an enlarged view of a portion C of the display panel of FIG. 3 according to an exemplary embodiment.
8 is a cross-sectional view taken along line D-D' of the display panel of FIG. 6 according to an exemplary embodiment.
9 is a cross-sectional view taken along line E-E′ of the display panel of FIG. 3 according to an exemplary embodiment of the present invention.
10 is an enlarged view of a portion F of the display panel of FIG. 3 according to an exemplary embodiment of the present invention.
11 is a cross-sectional view taken along line E-E′ of the display panel of FIG. 3 according to another exemplary embodiment of the present invention.
12A and 12B are perspective views schematically illustrating a display device according to another exemplary embodiment.

Since the present invention can apply various transformations and can have various embodiments, specific embodiments are illustrated in the drawings and described in detail in the detailed description. Effects and features of the present invention, and a method for achieving them will become apparent with reference to the embodiments described below in detail in conjunction with the drawings. However, the present invention is not limited to the embodiments disclosed below and may be implemented in various forms.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings, and when described with reference to the drawings, the same or corresponding components are given the same reference numerals, and the overlapping description thereof will be omitted. .

In the following embodiments, terms such as first, second, etc. are used for the purpose of distinguishing one component from another, not in a limiting sense.

In the following examples, the singular expression includes the plural expression unless the context clearly dictates otherwise.

In the following embodiments, terms such as include or have means that the features or components described in the specification are present, and the possibility of adding one or more other features or components is not excluded in advance.

In the following embodiments, when it is said that a part such as a film, region, or component is on or on another part, not only when it is directly on the other part, but also another film, region, component, etc. is interposed therebetween. Including cases where

In the drawings, the size of the components may be exaggerated or reduced for convenience of description. For example, since the size and thickness of each component shown in the drawings are arbitrarily indicated for convenience of description, the present invention is not necessarily limited to the illustrated bar.

Where certain embodiments are otherwise feasible, a specific process sequence may be performed different from the described sequence. For example, two processes described in succession may be performed substantially simultaneously, or may be performed in an order opposite to the order described.

In the following embodiments, when a film, a region, or a component is connected, it is not only the case that the film, the region, and the components are directly connected, but also other films, regions, and components are interposed between the films, regions, and components. It includes the case of intervening and indirectly connected. For example, in the present specification, when it is said that a film, a region, a component, etc. are electrically connected, not only the case where the film, a region, a component, etc. are directly electrically connected, other films, regions, components, etc. are interposed therebetween. Indirect electrical connection is also included.

A display device is a device that displays a moving image or still image, and includes a mobile phone, a smart phone, a tablet personal computer (PC), a mobile communication terminal, an electronic notebook, an e-book, and a portable multimedia player (PMP). ), navigation, and portable electronic devices such as UMPC (Ultra Mobile PC), etc., as well as televisions, laptops, monitors, billboards, and can be used as display screens of various products such as Internet of Things (IOT). Also, the display device according to an embodiment may be used in a wearable device such as a smart watch, a watch phone, a glasses display, and a head mounted display (HMD). . In addition, a display device according to an exemplary embodiment includes a vehicle dashboard, a center information display (CID) disposed on a center fascia or dashboard of a vehicle, and a room mirror display instead of a side mirror of the vehicle. ), as entertainment for the rear seat of a car, it can be used as a display placed on the back of the front seat.

1A and 1B are perspective views schematically illustrating a display device 1 according to an exemplary embodiment. 2A and 2B are cross-sectional views schematically illustrating a part of the display device 1 according to an exemplary embodiment.

1A and 2A are perspective and cross-sectional views, respectively, illustrating a first state in which the second display area DA2 is rolled, and FIGS. 1B and 2B are respectively, in which the second display area DA2 is unrolled. It is a perspective view and a cross-sectional view showing the second state.

1A, 1B, 2A, and 2B , the display device 1 may include a display panel 10 , a roller 20 , and a cover 30 .

The display panel 10 may display an image. The display panel 10 may include a first display area DA1 , a second display area DA2 , and a third display area DA3 . The first display area DA1 , the second display area DA2 , and the third display area DA3 may be an image display area, and may include a plurality of pixels each emitting light.

In an embodiment, the first display area DA1 may be a main display area. In an exemplary embodiment, the first display area DA1 may be flat, and most images may be displayed on the display panel 10 .

The second display area DA2 may be wound around the roller 20 . The second display area DA2 may be wound along the outer peripheral surface of the roller 20 . The second display area DA2 may be rolled or unrolled by the roller 20 . That is, the second display area DA2 may be rolled or spread by the roller 20 . In this specification, the meaning of the second display area DA2 being rolled around the roller 20 includes the meaning of the second display area DA2 being rolled along the outer circumferential surface of the roller 20 like a conveyor belt. can do. In addition, the meaning that the second display area DA2 is rolled around the roller 20 means that the second display area DA2 is wound in a scroll shape along the outer circumferential surface of the roller 20 . may include

In an embodiment, a portion of the second display area DA2 may overlap at least one of the first display area DA1 and the third display area DA3. In this case, a portion of the second display area DA2 may be disposed under at least one of the first display area DA1 and the third display area DA3 .

In an embodiment, the second display area DA2 may include a first sub display area SDA1 and a second sub display area SDA2. The first sub display area SDA1 may be disposed closer to the first display area DA1 than the second sub display area SDA2 .

The third display area DA3 may be disposed between the first display area DA1 and the second display area DA2 . The third display area DA3 may extend from the first display area DA1 to the second display area DA2 . In some embodiments, the third display area DA3 may be omitted.

The roller 20 may wind up the second display area DA2 . In one embodiment, the roller 20 may be connected to the driving unit. The driving unit may include a motor or the like, and may rotate the roller 20 . In another embodiment, the roller 20 may manually wind or unwind the second display area DA2.

The cover 30 may accommodate the roller 20 . Accordingly, a portion of the display panel 10 may be accommodated in the cover 30 . A portion of the display panel 10 may be brought into the cover 30 or taken out of the cover 30 .

The display device 1 may include a first state and a second state. The first state may be a state in which the second display area DA2 is wound around the roller 20 . The second state may be a state in which the second display area DA2 is at least partially unwound from the roller 20 .

1A and 2A , in the first state, the second display area DA2 may be wound around the roller 20 . In this case, at least a portion of the second display area DA2 may be accommodated in the cover 30 . In the first state, the first display area DA1 and the third display area DA3 may display an image. The user may not be able to visually recognize the second display area DA2 in the first state.

The first sub display area SDA1 may be wound around the roller 20 in the first state. The second sub display area SDA2 may extend from the first sub display area SDA1 . In an exemplary embodiment, the second sub display area SDA2 may extend from the roller 20 in the first state. That is, the second sub display area SDA2 may not be wound around the roller 20 in the first state. Accordingly, the second sub display area SDA2 may not contact the roller 20 .

The second sub display area SDA2 may be disposed under at least one of the first display area DA1 and the third display area DA3 . The second sub display area SDA2 may overlap at least one of the first display area DA1 and the third display area DA3 in the z direction.

In another exemplary embodiment, the second sub display area SDA2 may be wound around the roller 20 in the first state. In this case, the second display area DA2 may be rolled up on the roller 20 in a scroll shape.

1B and 2B , in the second state, the second display area DA2 may be unwound from the roller 20 . In this case, the first display area DA1 , the second display area DA2 , and the third display area DA3 may be exposed to the outside, and the first display area DA1 and the second display area DA2 may be exposed. , and the third display area DA3 may display an image. The display device 1 may provide a wide display area to the user in the second state.

The first sub display area SDA1 may be unwound from the roller 20 in the second state. In an exemplary embodiment, the first sub display area SDA1 may be entirely unwound from the roller 20 in the second state. In another exemplary embodiment, at least a portion of the first sub display area SDA1 may be unwound from the roller 20 in the second state.

The second sub display area SDA2 may be wound around the roller 20 in the second state. In an exemplary embodiment, at least a portion of the second sub display area SDA2 may be wound around the roller 20 in the second state.

A part of the second sub display area SDA2 may be wound around the roller 20 in the second state, and another part of the second sub display area SDA2 may be unwound from the roller 20 in the second state. In this case, at least a portion of the second sub display area SDA2 may be exposed together with the first display area DA1 , the third display area DA3 , and the first sub display area SDA1 .

3 is a schematic plan view of the display panel 10 according to an exemplary embodiment of the present invention. 3 schematically illustrates a state in which the display panel 10 is unrolled.

Referring to FIG. 3 , the display panel 10 may include a first display area DA1 , a second display area DA2 , and a third display area DA3 . The first display area DA1 , the second display area DA2 , and the third display area DA3 may be an image display area, and may include a plurality of pixels each emitting light.

Each of the plurality of pixels may include a display element. In an embodiment, the display panel 10 may include a plurality of display elements. In an embodiment, a first display element may be disposed in the first display area DA1. A plurality of the first display elements may be provided in the first display area DA1. A second display element may be disposed in the second display area DA2 . The second display element may be provided in plurality in the second display area DA2. A third display element may be disposed in the third display area DA3 . The third display element may be provided in plurality in the third display area DA3.

The display panel 10 may be an organic light emitting display panel using an organic light emitting diode including an organic light emitting layer as a display element. Alternatively, it may be a light emitting diode display panel using a light emitting diode (LED) as a display element. The size of the light emitting diode (LED) may be on a micro scale or a nano scale. For example, the light emitting diode may be a micro light emitting diode. Alternatively, the light emitting diode may be a nanorod light emitting diode. The nanorod light emitting diode may include gallium nitrogen (GaN). In an embodiment, a color conversion layer may be disposed on the nanorod light emitting diode. The color conversion layer may include quantum dots. Alternatively, it may be a quantum dot light emitting display panel using a quantum dot light emitting diode including a quantum dot light emitting layer as a display element. Alternatively, it may be an inorganic light emitting display panel using an inorganic light emitting device including an inorganic semiconductor as a display element. Hereinafter, the case in which the display panel 10 is an organic light emitting display panel using an organic light emitting diode as a display element will be described in detail.

The second display area DA2 may include a first sub display area SDA1 and a second sub display area SDA2 . The first sub display area SDA1 may be a second display area DA2 disposed closer to the first display area DA1 than to the second sub display area SDA2 . That is, the first sub display area SDA1 may be disposed between the second sub display area SDA2 and the first display area DA1 . In an exemplary embodiment, the first sub display area SDA1 may be the second display area DA2 wound on the roller 20 (refer to FIG. 2A ) in the first state.

The second sub display area SDA2 may extend from the first sub display area SDA1 . The second sub display area SDA2 may be a second display area DA2 extending from the roller 20 (refer to FIG. 2A ) in the first state. The second sub display area SDA2 may be a second display area DA2 overlapping at least one of the first display area DA1 and the third display area DA3 in the first state.

The third display area DA3 may be disposed between the first display area DA1 and the second display area DA2 . The third display area DA3 may extend from the first display area DA1 to the second display area DA2 .

In an exemplary embodiment, the resolution of the third display area DA3 may be greater than the resolution of the second display area DA2 . In an embodiment, the resolution of the third display area DA3 may be smaller than the resolution of the first display area DA1 .

4 is an equivalent circuit diagram schematically illustrating a pixel circuit PC applicable to a display panel.

Referring to FIG. 4 , the pixel circuit PC may be connected to a display element, for example, an organic light emitting diode (OLED).

The pixel circuit PC may include a driving thin film transistor T1 , a switching thin film transistor T2 , and a storage capacitor Cst. In addition, the organic light emitting diode (OLED) may emit red, green, or blue light, or may emit red, green, blue, or white light.

The switching thin film transistor T2 is connected to the scan line SL and the data line DL, and a data signal or data inputted from the data line DL based on a scan signal or a switching voltage inputted from the scan line SL. A voltage may be transferred to the driving thin film transistor T1. The storage capacitor Cst is connected to the switching thin film transistor T2 and the driving voltage line PL, and the difference between the voltage received from the switching thin film transistor T2 and the first power voltage ELVDD supplied to the driving voltage line PL. voltage corresponding to .

The driving thin film transistor T1 is connected to the driving voltage line PL and the storage capacitor Cst, and a driving current flowing from the driving voltage line PL to the organic light emitting diode OLED in response to the voltage value stored in the storage capacitor Cst. can control The organic light emitting diode (OLED) may emit light having a predetermined luminance by a driving current. The opposite electrode of the organic light emitting diode OLED may receive the second power voltage ELVSS.

Although FIG. 4 illustrates that the pixel circuit PC includes two thin film transistors and one storage capacitor, the pixel circuit PC may include three, four, five or more thin film transistors. .

5 is a cross-sectional view taken along line A-A' of the display panel of FIG. 3 according to an exemplary embodiment of the present invention.

Referring to FIG. 5 , the display panel 10 may include a substrate 100 , a pixel circuit layer PCL, a display element layer DEL, and an encapsulation layer ENL.

In an embodiment, the substrate 100 may include a first base layer 100a, a first barrier layer 100b, a second base layer 100c, and a second barrier layer 100d. In an embodiment, the first base layer 100a , the first barrier layer 100b , the second base layer 100c , and the second barrier layer 100d may be sequentially stacked and provided on the substrate 100 . . In another embodiment, the substrate 100 may include glass.

At least one of the first base layer 100a and the second base layer 100c may include polyethersulfone, polyarylate, polyetherimide, polyethylene naphthalate, and polyethylene. It may include a polymer resin such as polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate, cellulose triacetate, cellulose acetate propionate, and the like. have.

The first barrier layer 100b and the second barrier layer 100d are barrier layers for preventing the penetration of foreign substances, silicon nitride (SiN _X ), silicon oxide (SiO ₂ ), and/or silicon oxynitride (SiON) It may be a single layer or a multi-layer including an inorganic material, such as.

The pixel circuit layer PCL may be disposed on the substrate 100 . The pixel circuit layer PCL may include a pixel circuit. In an embodiment, the pixel circuit layer PCL may include a plurality of pixel circuits. Among the plurality of pixel circuits, the first pixel circuit PC1 may include a driving thin film transistor T1 , a switching thin film transistor T2 , and a storage capacitor Cst.

The pixel circuit layer PCL may include an inorganic insulating layer IIL and an organic insulating layer OIL disposed below and/or above the components of the driving thin film transistor T1 . The inorganic insulating layer IIL may include a buffer layer 111 , a first gate insulating layer 112 , a second gate insulating layer 113 , and an interlayer insulating layer 114 . The organic insulating layer OIL may include a first organic insulating layer 115 and a second organic insulating layer 116 . The driving thin film transistor T1 may include a first semiconductor layer Act1 , a first gate electrode GE1 , a first source electrode SE1 , and a first drain electrode DE1 .

The buffer layer 111 may be disposed on the substrate 100 . The buffer layer 111 may include an inorganic insulating material such as silicon nitride (SiN _X ), silicon oxynitride (SiON), and silicon oxide (SiO ₂ ), and may be a single layer or a multi-layer including the above-described inorganic insulating material.

The first semiconductor layer Act1 may be disposed on the buffer layer 111 . The first semiconductor layer Act1 may include polysilicon. Alternatively, the first semiconductor layer Act1 may include amorphous silicon, an oxide semiconductor, or an organic semiconductor. The first semiconductor layer Act1 may include a channel region and a drain region and a source region respectively disposed on both sides of the channel region.

The first gate electrode GE1 may overlap the channel region. The first gate electrode GE1 may include a low-resistance metal material. The first gate electrode GE1 may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), and the like, and is formed as a multilayer or single layer including the above material. can be

The first gate insulating layer 112 between the first semiconductor layer Act1 and the first gate electrode GE1 is formed of silicon oxide (SiO ₂ ), silicon nitride (SiN _X ), silicon oxynitride (SiON), aluminum oxide ( Al ₂ O ₃ ), titanium oxide (TiO ₂ ), tantalum oxide (Ta ₂ O ₅ ), hafnium oxide (HfO ₂ ), and/or may include an inorganic insulating material such as zinc oxide (ZnO).

The second gate insulating layer 113 may be provided to cover the first gate electrode GE1 . The second gate insulating layer 113 is similar to the first gate insulating layer 112, silicon oxide (SiO ₂ ), silicon nitride (SiN _X ), silicon oxynitride (SiON), aluminum oxide (Al ₂ O ₃ ), It may include an inorganic insulating material such as titanium oxide (TiO ₂ ), tantalum oxide (Ta ₂ O ₅ ), hafnium oxide (HfO ₂ ), and/or zinc oxide (ZnO).

An upper electrode CE2 of the storage capacitor Cst may be disposed on the second gate insulating layer 113 . The upper electrode CE2 may overlap the first gate electrode GE1 below it. In this case, the first gate electrode GE1 and the upper electrode CE2 of the driving thin film transistor T1 overlapping with the second gate insulating layer 113 therebetween may form the storage capacitor Cst. That is, the first gate electrode GE1 of the driving thin film transistor T1 may function as the lower electrode CE1 of the storage capacitor Cst.

As described above, the storage capacitor Cst and the driving thin film transistor T1 may be formed to overlap each other. In some embodiments, the storage capacitor Cst may be formed not to overlap the driving thin film transistor T1.

The upper electrode CE2 includes aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), and iridium (Ir). , chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and/or copper (Cu), and may be a single layer or multiple layers of the aforementioned materials. .

The interlayer insulating layer 114 may cover the upper electrode CE2 . The interlayer insulating layer 114 is silicon oxide (SiO ₂ ), silicon nitride (SiN _X ), silicon oxynitride (SiON), aluminum oxide (Al ₂ O ₃ ), titanium oxide (TiO ₂ ), tantalum oxide (Ta ₂ O) ₅ ), hafnium oxide (HfO ₂ ), or zinc oxide (ZnO), and the like. The interlayer insulating layer 114 may be a single layer or a multilayer including the aforementioned inorganic insulating material.

The first drain electrode DE1 and the first source electrode SE1 may be respectively positioned on the interlayer insulating layer 114 . The first drain electrode DE1 and the first source electrode SE1 may include a material having good conductivity. The first drain electrode DE1 and the first source electrode SE1 may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc. It may be formed as a multi-layer or a single layer comprising a. In an embodiment, the first drain electrode DE1 and the first source electrode SE1 may have a multilayer structure of Ti/Al/Ti.

The switching thin film transistor T2 may include a second semiconductor layer Act2 , a second gate electrode GE2 , a second drain electrode DE2 , and a second source electrode SE2 . The second semiconductor layer Act2, the second gate electrode GE2, the second drain electrode DE2, and the second source electrode SE2 include the first semiconductor layer Act1, the first gate electrode GE1, Since it is similar to the first drain electrode DE1 and the first source electrode SE1, a detailed description thereof will be omitted.

The first organic insulating layer 115 may be disposed to cover the first drain electrode DE1 and the first source electrode SE1 . The first organic insulating layer 115 may include an organic material. For example, the first organic insulating layer 115 is a general general-purpose polymer such as Polymethylmethacrylate (PMMA) or Polystyrene (PS), a polymer derivative having a phenol-based group, an acrylic polymer, an imide-based polymer, an arylether-based polymer, and an amide-based polymer. It may include an organic insulating material such as a polymer, a fluorine-based polymer, a p-xylene-based polymer, a vinyl alcohol-based polymer, and blends thereof.

The connection electrode CML may be disposed on the first organic insulating layer 115 . In this case, the connection electrode CML may be electrically connected to the first drain electrode DE1 or the first source electrode SE1 through the contact hole of the first organic insulating layer 115 , respectively. The connection electrode CML may include a material having good conductivity. The connection electrode CML may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), and the like, and may be formed as a multilayer or single layer including the above material. have. In an embodiment, the connection electrode CML may have a multilayer structure of Ti/Al/Ti.

The second organic insulating layer 116 may be disposed to cover the connection electrode CML. The second organic insulating layer 116 may include an organic material. The second organic insulating layer 116 is a general-purpose polymer such as Polymethylmethacrylate (PMMA) or Polystyrene (PS), a polymer derivative having a phenolic group, an acrylic polymer, an imide-based polymer, an arylether-based polymer, an amide-based polymer, and a fluorine-based polymer. , p-xylene-based polymers, vinyl alcohol-based polymers, and organic insulating materials such as blends thereof.

The display element layer DEL may be disposed on the pixel circuit layer PCL. The display element layer DEL may include a display element. In an embodiment, the display element layer DEL may include a plurality of display elements. A first organic light emitting diode OLED1 may be disposed as a first display element in the first display area DA1 .

The pixel electrode 211 of the first organic light emitting diode OLED1 may be electrically connected to the connection electrode CML through a contact hole of the second organic insulating layer 116 . Accordingly, the first organic light emitting diode OLED1 may be electrically connected to the first pixel circuit PC1 .

The pixel electrode 211 includes indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In ₂ O ₃ : indium oxide), and indium. It may include a conductive oxide such as indium gallium oxide (IGO) or aluminum zinc oxide (AZO). In another embodiment, the pixel electrode 211 may include silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), or neodymium (Nd). , iridium (Ir), chromium (Cr), or a reflective layer including a compound thereof may be included. In another embodiment, the pixel electrode 211 may further include a layer formed of ITO, IZO, ZnO, or In ₂ O ₃ above/under the above-described reflective layer.

A pixel defining layer 118 having an opening 118OP exposing a central portion of the pixel electrode 211 may be disposed on the pixel electrode 211 . The pixel defining layer 118 may include an organic insulating material and/or an inorganic insulating material. The opening 118OP may define a light emitting area of light emitted from the first organic light emitting diode OLED1 . For example, the width of the opening 118OP may correspond to the width of the light emitting area.

A spacer 119 may be disposed on the pixel defining layer 118 . In the case of the method of manufacturing the display panel 10 , a mask sheet may be used. In this case, the mask sheet may enter the opening 118OP of the pixel defining layer 118 or may be in close contact with the pixel defining layer 118 . have. The spacer 119 may prevent a defect in which the substrate 100 and a part of the multilayer film on the substrate 100 are damaged or damaged by the mask sheet when the deposition material is deposited on the substrate 100 .

The spacer 119 may include an organic material such as polyimide. Alternatively, the spacer 119 may include an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiO ₂ ), or may include an organic insulating material and an inorganic insulating material.

In an embodiment, the spacer 119 may include a material different from that of the pixel defining layer 118 . Alternatively, in another embodiment, the spacer 119 may include the same material as the pixel defining layer 118 . In this case, the pixel defining layer 118 and the spacer 119 are combined together in a mask process using a halftone mask or the like. can be formed.

An intermediate layer 212 may be disposed on the pixel defining layer 118 . The intermediate layer 212 may include an emission layer 212b disposed in the opening 118OP of the pixel defining layer 118 . The light emitting layer 212b may include a polymer or a low molecular weight organic material that emits light of a predetermined color.

A first functional layer 212a and a second functional layer 212c may be disposed below and above the emission layer 212b, respectively. The first functional layer 212a may include, for example, a hole transport layer (HTL) or a hole transport layer and a hole injection layer (HIL). The second functional layer 212c is a component disposed on the emission layer 212b and may be optional. The second functional layer 212c may include an electron transport layer (ETL) and/or an electron injection layer (EIL). The first functional layer 212a and/or the second functional layer 212c may be a common layer formed to cover the entire substrate 100 like the counter electrode 213 to be described later.

The counter electrode 213 may be made of a conductive material having a low work function. For example, the counter electrode 213 may include silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium ( Ir), chromium (Cr), lithium (Li), calcium (Ca), or an alloy thereof may include a (semi) transparent layer. Alternatively, the counter electrode 213 may further include a layer such as ITO, IZO, ZnO, or In ₂ O ₃ on the (semi)transparent layer including the above-described material.

In some embodiments, a capping layer (not shown) may be further disposed on the counter electrode 213 . The capping layer may include LiF, an inorganic material, and/or an organic material.

The encapsulation layer ENL may be disposed on the counter electrode 213 . In an embodiment, the encapsulation layer ENL may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. 5 illustrates that the encapsulation layer ENL includes a first inorganic encapsulation layer 310 , an organic encapsulation layer 320 , and a second inorganic encapsulation layer 330 sequentially stacked.

The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 are aluminum oxide (Al ₂ O ₃ ), titanium oxide (TiO ₂ ), tantalum oxide (Ta ₂ O ₅ ), hafnium oxide (HfO ₂ ), It may include one or more inorganic materials of zinc oxide (ZnO), silicon oxide (SiO ₂ ), silicon nitride (SiN _X ), and silicon oxynitride (SiON). The organic encapsulation layer 320 may include a polymer-based material. The polymer-based material may include an acrylic resin, an epoxy-based resin, polyimide, polyethylene, and the like. In an embodiment, the organic encapsulation layer 320 may include an acrylate.

Although not shown, a touch electrode layer may be disposed on the encapsulation layer ENL, and an optical function layer may be disposed on the touch electrode layer. The touch electrode layer may acquire coordinate information according to an external input, for example, a touch event. The optical function layer may reduce the reflectance of light (external light) incident from the outside toward the display device, and/or may improve color purity of light emitted from the display device. In an embodiment, the optical functional layer may include a retarder and/or a polarizer. The phase retarder may be a film type or liquid crystal coating type, and may include a λ/2 phase delay and/or a λ/4 phase delay. The polarizer may also be a film type or a liquid crystal coating type. The film type may include a stretched synthetic resin film, and the liquid crystal coating type may include liquid crystals arranged in a predetermined arrangement. The phase retarder and the polarizer may further include a protective film.

In another embodiment, the optical functional layer may include a black matrix and color filters. The color filters may be arranged in consideration of the color of light emitted from each of the pixels of the display panel. Each of the color filters may include a red, green, or blue pigment or dye. Alternatively, each of the color filters may further include quantum dots in addition to the aforementioned pigments or dyes. Alternatively, some of the color filters may not include the aforementioned pigment or dye, and may include scattering particles such as titanium oxide.

In another embodiment, the optical functional layer may include a destructive interference structure. The destructive interference structure may include a first reflective layer and a second reflective layer disposed on different layers. The first reflected light and the second reflected light respectively reflected from the first and second reflective layers may destructively interfere, and thus external light reflectance may be reduced.

An adhesive member may be disposed between the touch electrode layer and the optical function layer. As the adhesive member, a general one known in the art may be employed without limitation. The adhesive member may be a pressure sensitive adhesive (PSA).

6 is an enlarged view of a portion B of the display panel of FIG. 3 according to an exemplary embodiment of the present invention. 7 is an enlarged view of a portion C of the display panel of FIG. 3 according to an exemplary embodiment.

6 and 7 , the second display area DA2 may include a first pixel area PA1 , a second pixel area PA2 , and a connection area CA. Pixels may be respectively disposed in the first pixel area PA1 and the second pixel area PA2 . In an embodiment, the connection area CA may include a first connection area CA1 , a second connection area CA2 , a third connection area CA3 , and a fourth connection area CA4 .

The plurality of pixel areas PA may be spaced apart from each other in a first direction (eg, an x direction or a -x direction) and/or a second direction (eg, a y direction or a -y direction). For example, the first pixel area PA1 and the second pixel area PA2 may be aligned in a first direction (eg, an x direction or a -x direction) and/or a second direction (eg, a y direction or a -x direction). y direction). A pixel may be disposed in each of the pixel areas PA.

The pixels may be disposed in the first pixel area PA1 and the second pixel area PA2 . For example, the first pixel may overlap the first pixel area PA1 . The second pixel may overlap the second pixel area PA2 . The first pixel and the second pixel may include a red sub-pixel, a green sub-pixel, and a blue sub-pixel, respectively. In another embodiment, each of the first pixel and the second pixel may include a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel.

The connection area CA may extend between neighboring pixel areas PA. In an embodiment, each pixel area PA may be connected to four connection areas CA. For example, the first pixel area PA1 may be connected to the first connection area CA1 , the second connection area CA2 , the third connection area CA3 , and the fourth connection area CA4 . The four connection areas CA connected to one pixel area PA extend in different directions, and each connection area CA is adjacent to the one pixel area PA and is disposed adjacent to another pixel area (CA). PA) can be connected. A wiring for transmitting a signal and/or a power voltage to the pixel disposed in the pixel area PA may be disposed in the connection area CA.

In an embodiment, the first connection area CA1 may extend from the first pixel area PA1 to the second pixel area PA2 . Accordingly, the first pixel area PA1 and the second pixel area PA2 may be connected by the first connection area CA1 , and the first pixel area PA1 , the second pixel area PA2 , and the first pixel area PA2 may be connected to each other. The connection area CA1 may be provided integrally.

A penetrating portion may be defined in the second display area DA2 . In an exemplary embodiment, a first through portion TP1 may be defined in the first sub display area SDA1 . A second through portion TP2 may be defined in the second sub display area SDA2 . The first pixel area PA1 and the second pixel area PA2 may be spaced apart from each other with a penetrating portion therebetween. The penetrating portion may pass through the display panel. Accordingly, components of the display panel may not be disposed in the through portion.

At least a portion of the through portion may be defined as an edge PAE1 of the first pixel area PA1 , an edge PAE2 of the second pixel area PA2 , and an edge of the connection area CA. In an embodiment, at least a portion of the penetrating portion extends to the edge PAE1 of the first pixel area PA1 , the edge PAE2 of the second pixel area PA2 , and the edge CAE1 of the first connection area CA1 . can be defined. In an embodiment, at least a portion of the through portion may include an edge PAE1 of the first pixel area PA1 , an edge PAE2 of the second pixel area PA2 , and an edge CAE1 of the first connection area CA1 ; and an edge CAE2 of the second connection area CA2.

One pixel area PA and a portion of the connection areas CA extending therefrom may be defined as one basic unit (U). The basic unit U may be repeatedly disposed along the first direction (eg, the x direction or the -x direction) and the second direction (eg, the y direction or the -y direction), and the second display area (DA2) may be understood as provided in which the repeatedly arranged basic units (U) are connected to each other. Two basic units (U) adjacent to each other may be symmetrical to each other. For example, in FIGS. 6 and 7 , two basic units (U) adjacent in the left and right directions are located between them and are symmetrical with respect to a symmetry axis parallel to the second direction (eg, y direction or -y direction). can be Similarly, in FIGS. 6 and 7 , the two basic units (U) adjacent in the vertical direction are positioned between them and are vertically symmetrical with respect to an axis of symmetry parallel to the first direction (eg, the x direction or the -x direction). can

Among the plurality of basic units (U), adjacent basic units (U), for example, four basic units (U) shown in FIGS. 6 and 7, form a closed curve (CL) therebetween. (CL) may define a spaced area V that is an empty space. The separation area V may be defined as a closed curve CL formed of edges of the plurality of pixel areas PA and edges of the plurality of connection areas CA. Each separation region V may pass through the upper and lower surfaces of the display panel, respectively. The separation region V may overlap the penetrating portion of the display panel.

When an external force pulling the display panel 10 is applied, the stress may be concentrated on the edge CAE1 of the first connection area CA1 and the edge PAE2 of the second pixel area PA2, In order to prevent damage to the display panel 10 , the closed curve CL defining the separation region V may include a curve.

In the present exemplary embodiment, a through portion may be provided in the second display area DA2. When an external force is applied to the second display area DA2 in the first direction (eg, the x-direction or the -x direction) and/or the second direction (eg, the y-direction or the -y direction), the second display area DA2 The display area DA2 may extend in the first direction (eg, the x direction or the -x direction) and/or the second direction (eg, the y direction or the -y direction). Accordingly, the amount of stress generated in the second display area DA2 may be reduced, and cracks may be prevented or reduced in the second display area DA2 .

The through portion may include a first through portion TP1 overlapping the first sub display area SDA1 and a second through portion TP2 overlapping with the second sub display area SDA2 . In an exemplary embodiment, the size of the first through portion TP1 may be greater than the size of the second through portion TP2. The size of the first through portion TP1 may be defined as an area occupied by the first through portion TP1 in the first sub display area SDA1 . The size of the second through portion TP2 may be defined as an area occupied by the second through portion TP2 in the second sub display area SDA2 .

In the first state, the first sub display area SDA1 may be wound with the roller 20 (refer to FIG. 1A ). In the first state, the second sub display area SDA2 may not be wound with the roller 20 . In this case, the first sub display area SDA1 may be wound around a roller to generate stress. Also, in the first state, the magnitude of the stress generated in the first sub display area SDA1 may be greater than the magnitude of the stress generated in the second sub display area SDA2 .

In the present embodiment, the size of the first through portion TP1 provided in the first sub display area SDA1 may be larger than the size of the second through portion TP2 provided in the second sub display area SDA2. have. Accordingly, the first sub display area SDA1 may be stretched better than the second sub display area SDA2 , and stress generated in the first sub display area SDA1 may be minimized. Accordingly, the embodiment of the present invention can prevent or reduce the occurrence of cracks in the first sub display area SDA1 even when the first sub display area SDA1 is wound with the roller 20 in the first state. have.

In some embodiments, the size of the penetrating portion of the second display area DA2 may gradually decrease in a direction away from the first display area. In some embodiments, the size of the penetrating portion of the second display area may gradually increase in a direction away from the first display area.

In some embodiments, the size of the first through portion TP1 provided in the first sub display area SDA1 may be the same as the size of the second through portion TP2 provided in the second sub display area SDA2. have. In an embodiment, the shape of the first through part TP1 may be the same as the shape of the second through part TP2 . For example, the shape of the first through portion TP1 and the shape of the second through portion TP2 may be the shapes of the through portion described with reference to FIG. 6 , respectively. As another example, the shape of the first through portion TP1 and the shape of the second through portion TP2 may be the shapes of the through portions described with reference to FIG. 7 , respectively.

8 is a cross-sectional view taken along line D-D' of the display panel of FIG. 6 according to an exemplary embodiment. In FIG. 8 , the same reference numerals as those of FIG. 5 denote the same members, and thus duplicate descriptions will be omitted.

Referring to FIG. 8 , the display panel 10 may include a second display area DA2 . The second display area DA2 may include a first pixel area PA1 and a second pixel area PA2 that are spaced apart from each other, and the edge of the first pixel area PA1 and the second pixel area PA2 are separated from each other. The edge may define at least a part of the penetrating portion TP of the display panel 10 .

The display panel 10 may include a substrate 100 , a pixel circuit layer PCL, a display element layer DEL, and an encapsulation layer ENL. In an embodiment, the pixel circuit layer PCL may further include a first inorganic layer PVX1. In an embodiment, the display element layer DEL may further include a second inorganic layer PVX2. In some embodiments, the first inorganic layer PVX1 may be omitted.

Hereinafter, the stacked structure of the display panel 10 including the through portion TP will be described in detail. However, the stacked structure of the display panel 10 having the through portion TP is not limited thereto, and various embodiments may be possible.

The substrate 100 may be separated from the second display area DA2 with the through portion TP interposed therebetween. That is, the substrate 100 may be spaced apart from each other with the through portion TP interposed therebetween in the second display area DA2 . In an embodiment, the substrate 100 may include a first base layer 100a, a first barrier layer 100b, a second base layer 100c, and a second barrier layer 100d.

The pixel circuit layer PCL may be disposed on the substrate 100 . The pixel circuit layer PCL may be separated with the through portion TP interposed therebetween. The pixel circuit layer PCL may include a pixel circuit. In an embodiment, the pixel circuit layer PCL may include a plurality of pixel circuits. Among the plurality of pixel circuits, the second pixel circuit PC2 may include a driving thin film transistor T1 , a switching thin film transistor T2 , and a storage capacitor Cst.

The pixel circuit layer PCL may include an inorganic insulating layer IIL and an organic insulating layer OIL disposed below and/or above the components of the driving thin film transistor T1 . The inorganic insulating layer IIL and the organic insulating layer OIL may be disposed between the substrate 100 and the second organic light emitting diode OLED2 .

The inorganic insulating layer IIL may be separated from the second display area DA2 with the through portion TP interposed therebetween. That is, the inorganic insulating layer IIL may be spaced apart from each other in the second display area DA2 with the through portion TP interposed therebetween. In an embodiment, the inorganic insulating layer IIL may include a buffer layer 111 , a first gate insulating layer 112 , a second gate insulating layer 113 , and an interlayer insulating layer 114 .

The organic insulating layer OIL may include a second display area hole HL2 in the second display area DA2 . The second display area hole HL2 may be disposed between the second organic light emitting diode OLED2 and the through portion TP. In an embodiment, the second display area hole HL2 may pass through the organic insulating layer OIL.

In an embodiment, in the second display area hole HL2 , the hole of the first organic insulating layer 115 and the hole of the second organic insulating layer 116 may overlap each other. In another embodiment, the second display area hole HL2 may be provided in the second organic insulating layer 116 . In this case, the upper surface of the first organic insulating layer 115 may be exposed through the second display area hole HL2 of the second organic insulating layer 116 . Hereinafter, the case in which the second display area hole HL2 is provided in the first organic insulating layer 115 and the second organic insulating layer 116 will be described in detail.

In some embodiments, the organic insulating layer OIL may include a groove formed in the thickness direction of the organic insulating layer OIL in the second display area DA2 instead of the second display area hole HL2 .

In an embodiment, the first inorganic layer PVX1 may be disposed between the interlayer insulating layer 114 and the first organic insulating layer 115 . The first inorganic layer PVX1 may cover the first source electrode SE1 , the first drain electrode DE1 , the second source electrode SE2 , and the second drain electrode DE2 . In an embodiment, the first inorganic layer PVX1 may include a contact hole such that the first source electrode SE1 or the first drain electrode DE1 is electrically connected to the connection electrode CML.

In another embodiment, the first inorganic layer PVX1 may be disposed between the first organic insulating layer 115 and the second organic insulating layer 116 . In this case, the first inorganic layer PVX1 may cover the connection electrode CML.

At least a portion of the first inorganic layer PVX1 may be exposed through the second display area hole HL2 . The first inorganic layer PVX1 may be a single layer or a multilayer layer including an inorganic material such as silicon nitride (SiN _X ) and/or silicon oxide (SiO ₂ ). In some embodiments, the first inorganic layer PVX1 may be omitted.

The display element layer DEL may be disposed on the pixel circuit layer PCL. The display element layer DEL may include a second organic light emitting diode OLED2 as a second display element. A plurality of second organic light emitting diodes OLED2 may be provided on the second display area DA2 . The plurality of second organic light emitting diodes OLED2 may be disposed in the first pixel area PA1 and the second pixel area PA2 . The plurality of second organic light emitting diodes OLED2 may be spaced apart from each other with the through portion TP interposed therebetween.

The second organic light emitting diode OLED2 may include a pixel electrode 211 , an intermediate layer 212 , and a counter electrode 213 . The second organic light emitting diode OLED2 may be electrically connected to the second pixel circuit PC2 .

A second inorganic layer PVX2 may be disposed between the second organic light emitting diode OLED2 and the second organic insulating layer 116 . That is, the second organic light emitting diode OLED2 may be disposed on the second inorganic layer PVX2 . The second inorganic layer PVX2 may include a plurality of inorganic patterns spaced apart from each other on the second organic insulating layer 116 . The second inorganic layer PVX2 may have a protruding tip PT protruding toward the center of the second display area hole HL2 . Accordingly, the lower surface of the protruding tip PT may be exposed in the second display area hole HL2. That is, the second display area hole HL2 may have an undercut structure. The second inorganic layer PVX2 may be a single layer or a multilayer layer including an inorganic material such as silicon nitride (SiN _X ) and/or silicon oxide (SiO ₂ ).

In an embodiment, the first inorganic layer PVX1 , the second display area hole HL2 , and the second inorganic layer PVX2 may define a second groove Gv2 in the second display area DA2 . . In another embodiment, when the organic insulating layer OIL includes a groove, the groove and the second inorganic layer PVX2 may define a second groove Gv2 in the second display area DA2 .

The second display area hole HL2 and the protruding tip PT of the second inorganic layer PVX2 may have a structure for isolating the first functional layer 212a and the second functional layer 212c. In an embodiment, the first functional layer 212a, the second functional layer 212c, and the counter electrode 213 may be formed on the entire surface of the substrate 100 . In this case, the first functional layer 212a and the second functional layer 212c may include an organic material, and external oxygen is passed through at least one of the first functional layer 212a and the second functional layer 212c. Alternatively, moisture or the like may flow into the second organic light emitting diode OLED2 from the through portion TP. Such oxygen or moisture may damage the second organic light emitting diode OLED2. The second display area hole HL2 and the protruding tip PT of the second inorganic layer PVX2 may disconnect the first functional layer 212a and the second functional layer 212c, and the separated first functional layer The pattern and the second functional layer pattern may be disposed inside the second display area hole HL2. Accordingly, it is possible to prevent moisture or oxygen from flowing into the second organic light emitting diode OLED2 from the through portion TP, and to prevent or reduce damage to the second organic light emitting diode OLED2 . However, the structure for disconnecting the first functional layer 212a and the second functional layer 212c is not limited thereto, and various structures for disconnecting the first functional layer 212a and the second functional layer 212c may be used in the display panel. (10) can be applied.

The first dam part DAM1 and the second dam part DAM2 may be disposed on the second inorganic layer PVX2 . The first dam part DAM1 and the second dam part DAM2 may protrude from the second inorganic layer PVX2 in the thickness direction of the substrate 100 . The first dam part DAM1 and the second dam part DAM2 may be disposed adjacent to the through part TP.

The first dam part DAM1 may be disposed on the first pixel area PA1 . In an embodiment, the first dam part DAM1 may surround the second organic light emitting diode OLED2 disposed in the first pixel area PA1 . The first dam part DAM1 may be disposed closer to the through part TP than the second display area hole HL2. The first dam part DAM1 may include a first pattern layer 118D1 and a first upper pattern layer 119D1. In an embodiment, the first pattern layer 118D1 may include the same material as the pixel defining layer 118 . The first upper pattern layer 119D1 may include an organic insulating material and/or an inorganic insulating material.

The second dam part DAM2 may be disposed on the second pixel area PA2 . In an embodiment, the second dam part DAM2 may surround the second organic light emitting diode OLED2 disposed in the second pixel area PA2 . The second dam part DAM2 may be disposed closer to the through part TP than the second display area hole HL2 . The second dam part DAM2 may include a second pattern layer 118D2 and a second upper pattern layer 119D2. In an embodiment, the second pattern layer 118D2 may include the same material as the pixel defining layer 118 and the first pattern layer 118D1 . The pixel defining layer 118 , the first pattern layer 118D1 , and the second pattern layer 118D2 may be simultaneously formed. The second upper pattern layer 119D2 may include an organic insulating material and/or an inorganic insulating material. The second upper pattern layer 119D2 may include the same material as the first upper pattern layer 119D1. The first upper pattern layer 119D1 and the second upper pattern layer 119D2 may be simultaneously formed.

The encapsulation layer ENL may cover the second organic light emitting diode OLED2 . The encapsulation layer ENL may be disposed on the counter electrode 213 . The encapsulation layer ENL may be separated with the through portion TP interposed therebetween. In an embodiment, the encapsulation layer ENL may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. 8 illustrates that the encapsulation layer ENL includes a first inorganic encapsulation layer 310 , an organic encapsulation layer 320 , and a second inorganic encapsulation layer 330 sequentially stacked.

The first inorganic encapsulation layer 310 may cover the second organic light emitting diode OLED2 . The first inorganic encapsulation layer 310 may completely and continuously cover the substrate 100 . The first inorganic encapsulation layer 310 may cover the plurality of second organic light emitting diodes OLED2 , the second display area hole HL2 , the first dam part DAM1 , and the second dam part DAM2 . The first inorganic encapsulation layer 310 may be in contact with the protruding tip PT of the second inorganic layer PVX2 . The first inorganic encapsulation layer 310 may be in contact with the first inorganic layer PVX1 . Accordingly, it is possible to prevent moisture or oxygen from flowing into the second organic light emitting diode OLED2 from the through portion TP through the layer including the organic material. Also, the first inorganic encapsulation layer 310 may be separated based on the penetrating portion TP.

The organic encapsulation layer 320 may be disposed on the first inorganic encapsulation layer 310 . The organic encapsulation layer 320 may overlap the second organic light emitting diode OLED2 , and the organic encapsulation layer 320 may fill the second display area hole HL2 . In an embodiment, the organic encapsulation layer 320 may be separated based on the through portion TP. For example, the organic encapsulation layer 320 overlapping the second organic light emitting diode OLED2 disposed in the first pixel area PA1 may extend to the first dam part DAM1 . The organic encapsulation layer 320 overlapping the second organic light emitting diode OLED2 disposed in the second pixel area PA2 may extend to the second dam part DAM2 . Since the first dam part DAM1 and the second dam part DAM2 protrude from the upper surface of the second inorganic layer PVX2 in the thickness direction of the substrate 100 , the flow of the organic encapsulation layer 320 may be controlled.

The second inorganic encapsulation layer 330 may cover the organic encapsulation layer 320 . The second inorganic encapsulation layer 330 may completely and continuously cover the substrate 100 . The second inorganic encapsulation layer 330 may be in contact with the first inorganic encapsulation layer 310 on the first dam unit DAM1 and the second dam unit DAM2 . Accordingly, the organic encapsulation layer 320 may be separated by the first dam part DAM1 and the second dam part DAM2 . Also, the second inorganic encapsulation layer 330 may be separated based on the penetrating portion TP.

In the present exemplary embodiment, the second display area DA2 may include a first pixel area PA1 and a second pixel area PA2 that are separated from each other. In this case, even if a crack occurs in any one of the first pixel area PA1 and the second pixel area PA2 , the crack propagates to the other one of the first pixel area PA1 and the second pixel area PA2 . can be prevented or reduced. Accordingly, the reliability of the display panel may be improved.

9 is a cross-sectional view taken along line E-E′ of the display panel of FIG. 3 according to an exemplary embodiment of the present invention. In FIG. 9 , the same reference numerals as those of FIG. 5 denote the same members, and thus duplicate descriptions will be omitted.

Referring to FIG. 9 , the display panel 10 may include a first display area DA1 , a second display area (not shown), and a third display area DA3 . The third display area DA3 may be disposed between the first display area DA1 and the second display area. In an embodiment, the first display area DA1 and the third display area DA3 may not include a through part.

The display panel 10 may include a substrate 100 , a pixel circuit layer PCL, a display element layer DEL, and an encapsulation layer ENL. In an embodiment, the pixel circuit layer PCL may further include a first inorganic layer PVX1. In an embodiment, the display element layer DEL may further include a second inorganic layer PVX2.

The substrate 100 may extend from the first display area DA1 to the third display area DA3 . In an exemplary embodiment, the substrate 100 may be continuously disposed in the first display area DA1 and the third display area DA3 . In an embodiment, the substrate 100 may include a first base layer 100a, a first barrier layer 100b, a second base layer 100c, and a second barrier layer 100d.

The pixel circuit layer PCL may include a pixel circuit. In an embodiment, the pixel circuit layer PCL may include a plurality of pixel circuits. Among the plurality of pixel circuits, the first pixel circuit PC1 and the third pixel circuit PC3 may each include a driving thin film transistor T1 , a switching thin film transistor T2 , and a storage capacitor Cst.

The pixel circuit layer PCL may include an inorganic insulating layer IIL and an organic insulating layer OIL disposed below and/or above the components of the driving thin film transistor T1 .

The inorganic insulating layer IIL may extend from the first display area DA1 to the third display area DA3 . In an exemplary embodiment, the inorganic insulating layer IIL may be continuously disposed in the first display area DA1 and the third display area DA3 .

The organic insulating layer OIL may include a third display area hole HL3 in the third display area DA3 . The third display area hole HL3 may overlap the third display area DA3. In an embodiment, the organic insulating layer OIL may include a first display area hole HL1 in the first display area DA1 adjacent to the third display area DA3.

In an embodiment, the third display area hole HL3 may be provided in plurality in the third display area DA3 similarly to the second display area hole. Accordingly, the third display area DA3 may prevent or reduce the visibility of the boundary between the first display area DA1 and the second display area (not shown).

The display element layer DEL may be disposed on the pixel circuit layer PCL. The display element layer DEL may include a plurality of display elements. In an embodiment, the plurality of display elements are a first display element disposed in the first display area DA1 and a first organic light emitting diode OLED1 and a third display element disposed in the third display area DA3. A third organic light emitting diode OLED3 may be included.

The first organic light emitting diode OLED1 and the third organic light emitting diode OLED3 may each include a pixel electrode 211 , an intermediate layer 212 , and a counter electrode 213 . The first organic light emitting diode OLED1 and the third organic light emitting diode OLED3 may be electrically connected to the first pixel circuit PC1 and the third pixel circuit PC3 , respectively.

The first organic light emitting diode OLED1 may be disposed on the second organic insulating layer 116 . In an embodiment, a second space is provided between the first organic light emitting diode OLED1 and the second organic insulating layer 116 disposed adjacent to the third display area DA3 among the plurality of first organic light emitting diodes OLED1 . An inorganic layer PVX2 may be disposed. In other words, a second inorganic layer ( PVX2) can be deployed.

The third organic light emitting diode OLED3 may be disposed in the third display area DA3 . A second inorganic layer PVX2 may be disposed between the third organic light emitting diode OLED3 and the second organic insulating layer 116 . That is, the third organic light emitting diode OLED3 may be disposed on the second inorganic layer PVX2 . The second inorganic layer PVX2 may include a plurality of inorganic patterns spaced apart from each other on the second organic insulating layer 116 . The second inorganic layer PVX2 may have a protruding tip PT protruding toward the center of the third display area hole HL3 . Accordingly, the lower surface of the protruding tip PT may be exposed through the third display area hole HL3. That is, the third display area hole HL3 may have an undercut structure.

In an embodiment, the first inorganic layer PVX1 , the third display area hole HL3 , and the second inorganic layer PVX2 may define a third groove Gv3 in the third display area DA3 . . The first inorganic layer PVX1 , the first display area hole HL1 , and the second inorganic layer PVX2 may define a first groove Gv1 in the first display area DA1 .

In another embodiment, when the organic insulating layer OIL has a groove instead of the third display area hole HL3 , the groove and the second inorganic layer PVX2 are formed in the third display area DA3 in the third display area DA3 . A groove (Gv3) can be defined. In addition, when the organic insulating layer OIL has a groove instead of the first display area hole HL1 , the groove and the second inorganic layer PVX2 are formed in the first groove Gv1 in the first display area DA1 . ) can be defined.

The dam part DAM may be disposed on the second inorganic layer PVX2 . The dam part DAM may protrude in the thickness direction of the substrate 100 . The dam portion DAM may define a boundary between the first display area DA1 and the third display area DA3 . That is, the dam part DAM may be disposed between the first organic light emitting diode OLED1 and the third organic light emitting diode OLED3 . In an embodiment, the dam part DAM may be disposed between the first organic light emitting diode OLED1 and any one of the plurality of third organic light emitting diodes OLED3 facing the first organic light emitting diode OLED1. .

The dam part DAM may include a pattern layer 118D and an upper pattern layer 119D. In this case, the pattern layer 118D and/or the upper pattern layer 119D may be disposed between the first organic light emitting diode OLED1 and the third organic light emitting diode OLED3 . The pattern layer 118D may include the same material as the pixel defining layer 118 . The upper pattern layer 119D may include an organic insulating material and/or an inorganic insulating material.

The intermediate dam part MDAM may be disposed on the second inorganic layer PVX2 . The intermediate dam part MDAM may protrude in the thickness direction of the substrate 100 . The middle dam part MDAM may be disposed on the third display area DA3 . The intermediate dam part MDAM may be disposed between a plurality of adjacent third organic light emitting diodes OLED3 .

The middle dam part MDAM may include an intermediate pattern layer 118MD and an upper intermediate pattern layer 119MD. In this case, the intermediate pattern layer 118MD and/or the upper intermediate pattern layer 119MD may be disposed between the plurality of third organic light emitting diodes OLED3 . The intermediate pattern layer 118MD may include the same material as the pixel defining layer 118 . The upper intermediate pattern layer 119MD may include an organic insulating material and/or an inorganic insulating material.

The encapsulation layer ENL may be disposed on the plurality of display elements. In an embodiment, the encapsulation layer ENL may be disposed on the first organic light emitting diode OLED1 and the third organic light emitting diode OLED3 . In an embodiment, the encapsulation layer ENL may include at least one inorganic encapsulation layer and at least one organic encapsulation layer.

The first inorganic encapsulation layer 310 may cover the first organic light emitting diode OLED1 and the third organic light emitting diode OLED3 . The first inorganic encapsulation layer 310 may completely and continuously cover the substrate 100 . The first inorganic encapsulation layer 310 includes a first organic light emitting diode OLED1, a first display area hole HL1, a dam portion DAM, a third display area hole HL3, and a plurality of third organic light emitting diodes OLED3. ), and the intermediate dam part MDAM may be covered. The first inorganic encapsulation layer 310 may be in contact with the protruding tip PT of the second inorganic layer PVX2 . The first inorganic encapsulation layer 310 may be in contact with the first inorganic layer PVX1 . Accordingly, it is possible to prevent or reduce moisture or oxygen from flowing into the first organic light emitting diode OLED1 and/or the third organic light emitting diode OLED3 through the layer including the organic material.

The organic encapsulation layer 320 may be disposed on the first inorganic encapsulation layer 310 . The organic encapsulation layer 320 may overlap the first organic light emitting diode OLED1 and the second organic light emitting diode OLED2 , and the organic encapsulation layer 320 includes the first display area hole HL1 and the third display area. The hole (HL3) can be filled.

The organic encapsulation layer 320 may be separated based on the dam portion DAM. For example, the organic encapsulation layer 320 overlapping the first organic light emitting diode OLED1 may extend to the dam portion DAM. The organic encapsulation layer 320 overlapping the third organic light emitting diode OLED3 may extend to the dam portion DAM. Since the dam part DAM protrudes from the upper surface of the second inorganic layer PVX2 in the thickness direction of the substrate 100 , the flow of the organic encapsulation layer 320 may be controlled.

In an embodiment, the organic encapsulation layer 320 may be separated based on the intermediate dam part MDAM. In this case, the organic encapsulation layer 320 disposed in the third display area DA3 may be spaced apart from each other with respect to the middle dam part MDAM. In another embodiment, the organic encapsulation layer 320 may not be separated based on the intermediate dam portion MDAM.

The second inorganic encapsulation layer 330 may cover the organic encapsulation layer 320 . The second inorganic encapsulation layer 330 may completely and continuously cover the substrate 100 . The second inorganic encapsulation layer 330 may be in contact with the first inorganic encapsulation layer 310 on the dam portion DAM. Accordingly, the organic encapsulation layer 320 may be separated by the dam portion DAM.

In the present exemplary embodiment, the third display area DA3 includes the third display area hole HL3 and the middle between the plurality of third organic light emitting diodes OLED3 similar to the second display area DA2 (refer to FIG. 7 ). A dam unit MDAM may be provided. Unlike the second display area DA2 , the third display area DA3 may not include a penetrating portion. The third display area DA3 is disposed between the first display area DA1 and the second display area to prevent or reduce visibility of a boundary between the first display area DA1 and the second display area. That is, the third display area DA3 may be an area for gradually changing the resolution from the first display area DA1 to the second display area.

10 is an enlarged view of a portion F of the display panel of FIG. 3 according to an exemplary embodiment of the present invention.

Referring to FIG. 10 , the third display area DA3 may include a first intermediate display area MDA1 and a second intermediate display area MDA2 . In an exemplary embodiment, the first intermediate display area MDA1 may be disposed closer to the first display area (not shown) than the second intermediate display area MDA2 .

In an embodiment, a plurality of first intermediate pixels MPX1 may be disposed in the first intermediate display area MDA1 . A plurality of second intermediate pixels MPX2 may be disposed in the second intermediate display area MDA2 . The plurality of first intermediate pixels MPX1 may be distinguished from each other by the intermediate dam part MDAM and the third display area hole HL3 described with reference to FIG. 9 . The plurality of second intermediate pixels MPX2 may be distinguished from each other by the intermediate dam part MDAM and the third display area hole HL3 described with reference to FIG. 9 .

In an embodiment, the first intermediate pixel MPX1 and the second intermediate pixel MPX2 may include a red sub-pixel Pr, a green sub-pixel Pg, and a blue sub-pixel Pb, respectively. In another embodiment, at least one of the first intermediate pixel MPX1 and the second intermediate pixel MPX2 may include a red subpixel Pr, a green subpixel Pg, a blue subpixel Pb, and a white subpixel. may include Sub-pixels such as a red sub-pixel (Pr), a green sub-pixel (Pg), a blue sub-pixel (Pb), and a white sub-pixel may be implemented by a display element. For example, the sub-pixel is a third display element disposed in the third display area DA3 and may be implemented by a third organic light emitting diode.

In an exemplary embodiment, a density of sub-pixels disposed in the first intermediate display area MDA1 may be greater than a density of sub-pixels disposed in the second intermediate display area MDA2. In an embodiment, the number of sub-pixels included in the first intermediate pixel MPX1 may be greater than the number of sub-pixels included in the second intermediate pixel MPX2. For example, the first intermediate pixel MPX1 may include two red sub-pixels Pr, two green sub-pixels Pg, and two blue sub-pixels Pb. The second intermediate pixel MPX2 may include one red sub-pixel Pr, one green sub-pixel Pg, and one blue sub-pixel Pb. Although not illustrated, the density of the sub-pixels disposed in the first display area may be greater than or equal to the density of the sub-pixels disposed in the first intermediate display area MDA1. The density of the sub-pixels disposed in the second display area may be less than or equal to the density of the sub-pixels disposed in the second intermediate display area MDA2.

In other words, the density of the third organic light emitting diodes disposed in the first intermediate display area MDA1 may be greater than the density of the third organic light emitting diodes disposed in the second intermediate display area MDA2 . In an embodiment, the number of third organic light emitting diodes included in the first intermediate pixel MPX1 may be greater than the number of third organic light emitting diodes included in the second intermediate pixel MPX2. Although not shown, the density of the first organic light emitting diodes disposed in the first display area may be greater than or equal to the density of the third organic light emitting diodes disposed in the first intermediate display area MDA1. The density of the second organic light emitting diodes disposed in the second display area may be less than or equal to the density of the third organic light emitting diodes disposed in the second intermediate display area MDA2.

In the present exemplary embodiment, the resolution of the first intermediate display area MDA1 may be greater than the resolution of the second intermediate display area MDA2. Although not shown, the resolution of the first display area may be greater than or equal to the resolution of the first intermediate display area MDA1. The resolution of the second display area may be less than or equal to the resolution of the second intermediate display area MDA2. In this case, the third display area DA3 may gradually reduce the difference in resolution between the first display area and the second display area. Accordingly, it is possible to prevent the boundary between the first display area and the second display area from being viewed.

11 is a cross-sectional view taken along line E-E′ of the display panel of FIG. 3 according to another exemplary embodiment of the present invention. In FIG. 11 , the same reference numerals as those of FIG. 9 mean the same members, and thus a duplicate description will be omitted.

Referring to FIG. 11 , a wiring WL may be disposed between the substrate 100 and the pattern layer 118D. The wiring WL may transmit a power voltage and/or a signal to the pixel circuit PC. The wiring WL may overlap the dam portion DAM.

The wiring WL may be electrically connected to a pixel circuit electrically connected to any one of the plurality of display elements. In an embodiment, the wiring WL may be electrically connected to at least one of the first pixel circuit PC1 and the third pixel circuit PC3 .

In an embodiment, the wiring WL may include a first wiring WL1 , a second wiring WL2 , a third wiring WL3 , a fourth wiring WL4 , and a fifth wiring WL5 . . In some embodiments, at least one of the first wiring WL1 , the second wiring WL2 , the third wiring WL3 , the fourth wiring WL4 , and the fifth wiring WL5 may be omitted.

The first wiring WL1 may be disposed between the first gate insulating layer 112 and the second gate insulating layer 113 . The first wiring WL1 may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), and the like, and may be formed as a multilayer or single layer including the above material. can

The second wiring WL2 may be disposed between the second gate insulating layer 113 and the interlayer insulating layer 114 . The second wiring WL2 may be electrically connected to the first wiring WL1 through a contact hole of the second gate insulating layer 113 . The second wiring WL2 includes aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), and iridium (Ir). ), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and/or copper (Cu), and may be a single layer or multiple layers of the aforementioned materials. have.

The third wiring WL3 may be disposed between the interlayer insulating layer 114 and the first organic insulating layer 115 . The third wiring WL3 may be electrically connected to the second wiring WL2 through a contact hole of the interlayer insulating layer 114 . In an embodiment, the third wiring WL3 may extend toward the first pixel circuit PC1 , and the third wiring WL3 may be electrically connected to the first pixel circuit PC1 .

In an embodiment, the third wiring WL3 may be covered by the first inorganic layer PVX1 . The third wiring WL3 may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), and the like, and may be formed as a multilayer or single layer including the above material. can In an embodiment, the third wiring WL3 may have a multi-layered structure of Ti/Al/Ti.

The fourth wiring WL4 may be disposed between the first organic insulating layer 115 and the second organic insulating layer 116 . The fourth wiring WL4 may be electrically connected to the third wiring WL3 through a contact hole of the first organic insulating layer 115 and/or a contact hole of the first inorganic layer PVX1 . The fourth wiring WL4 may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc. can In an embodiment, the fourth wiring WL4 may have a multilayer structure of Ti/Al/Ti.

The fifth wiring WL5 may be disposed between the second organic insulating layer 116 and the pattern layer 118D. In an embodiment, the fifth wiring WL5 may be disposed between the second inorganic layer PVX2 and the pattern layer 118D. The fifth wiring WL5 may be electrically connected to the fourth wiring WL4 through a contact hole of the second organic insulating layer 116 and/or a contact hole of the second inorganic layer PVX2 . The fifth wiring WL5 includes indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In ₂ O ₃ : indium oxide), It may include a conductive oxide such as indium gallium oxide (IGO) or aluminum zinc oxide (AZO). In another embodiment, the fifth wiring WL5 may include silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), and neodymium (Nd). ), iridium (Ir), chromium (Cr), or a reflective layer including a compound thereof may be included. In another embodiment, the fifth wiring WL5 may further include a layer formed of ITO, IZO, ZnO, or In ₂ O ₃ above/under the aforementioned reflective layer.

As described above, in the embodiment of the present invention, the wiring WL overlapping the dam portion DAM may be provided. The wiring WL may include first wirings WL1 to WL5 electrically connected through contact holes of insulating layers. Accordingly, the resistance of the wiring WL may be reduced without increasing the width of the wiring WL. In addition, visibility between the first display area DA1 and the third display area DA3 may be prevented or reduced.

In an exemplary embodiment, the wiring WL may extend from the connection area CA of the second display area described with reference to FIGS. 6 and 7 to the first display area DA1 . In this case, the width of the connection area CA may be set to be small in order to increase the size of the through part. An embodiment of the present invention may include first wirings WL1 to WL5 electrically connected through contact holes of insulating layers. Accordingly, the width of the connection area CA may be kept small.

In an exemplary embodiment, an intermediate wiring MWL overlapping the intermediate dam portion MDAM may be disposed in the third display area DA3 similar to the wiring WL. The intermediate line MWL may transmit a power voltage and/or a signal to the pixel circuit. In an embodiment, the intermediate wiring MWL may include first to fifth intermediate wirings electrically connected through contact holes of insulating layers. Accordingly, the resistance of the intermediate line MWL may be reduced without increasing the width of the intermediate line MWL. In addition, visibility between the plurality of third organic light emitting diodes OLED3 may be prevented or reduced.

12A and 12B are perspective views schematically illustrating a display device 1 according to another exemplary embodiment. 12A is a perspective view illustrating a first state in which the second display area DA2 is wound. 12B is a perspective view illustrating a second state in which the second display area DA2 is unwound. In FIGS. 12A and 12B , the same reference numerals as those of FIGS. 1A and 1B mean the same member, and thus a redundant description will be omitted.

12A and 12B , the display device 1 may include a display panel 10 , a roller 20 , and a cover 30 .

The display panel 10 may display an image. The display panel 10 may include a first display area DA1 , a second display area DA2 , and a third display area DA3 .

The second display area DA2 may include a first area R1 and a second area R2 . The first area R1 and the second area R2 may be disposed with the first display area DA1 interposed therebetween. The first area R1 may extend from the first display area DA1 to one side. The second area R2 may extend from the second display area DA2 to the other side.

The roller 20 may wind up the second display area DA2 . In one embodiment, the roller 20 may include a first roller 20A and a second roller 20B. The first roller 20A and the second roller 20B may be spaced apart from each other with the first display area DA1 interposed therebetween. In one embodiment, the first roller 20A may wind the first region R1. The second roller 20B may wind the second region R2.

The cover 30 may accommodate the roller 20 . In one embodiment, the cover 30 may include a first cover 30A and a second cover 30B. The first cover 30A and the second cover 30B may be spaced apart from each other with the first display area DA1 interposed therebetween. The first cover 30A may accommodate the first roller 20A. The second cover 30B may accommodate the second roller 20B.

The display device 1 may include a first state and a second state. The first state may be a state in which the second display area DA2 is wound around the roller 20 . The second state may be a state in which the second display area DA2 is at least partially unwound from the roller 20 .

Referring to FIG. 12A , in the first state, the first region R1 may be wound around the first roller 20A. In this case, the first region R1 may be accommodated in the first cover 30A. In one embodiment, in the first state, the second region R2 may be wound around the second roller 20B. In this case, the second region R2 may be accommodated in the second cover 30B. In the first state, the first display area DA1 and the third display area DA3 may display an image. The user may not be able to visually recognize at least one of the first region R1 and the second region R2 in the first state.

Referring to FIG. 12B , in the second state, the first region R1 may be unwound from the first roller 20A. In this case, the first region R1 may be exposed to the outside. In an embodiment, in the second state, the second region R2 may be unwound from the second roller 20B. In this case, the second region R2 may be exposed to the outside. Accordingly, the display device 1 may provide a wide display area to the user in the second state.

Although FIG. 12B illustrates that both the first region R1 and the second region R2 are exposed to the outside, in another embodiment, any one of the first region R1 and the second region R2 is exposed to the outside. may be exposed, and the other one of the first region R1 and the second region R2 may not be exposed to the outside.

Although the present invention has been described with reference to one embodiment shown in the drawings, it will be understood that this is merely exemplary, and that those of ordinary skill in the art can make various modifications and variations therefrom. Accordingly, the true technical protection scope of the present invention should be determined by the technical spirit of the appended claims.

1: display device
10: display panel
100: substrate
118D, 118MD: pattern layer, intermediate pattern layer
20, 20A, 20B: roller, first roller, second roller
CA: Connection area
DA1, DA2, DA3: first display area, second display area, third display area
ENL: encapsulation layer
HL1, HL2, HL3: 1st display area hole, 2nd display area hole, 3rd display area hole
IIL, OIL: inorganic insulating layer, organic insulating layer
MDA1, MDA2: first intermediate display area, second intermediate display area
MPX1, MPX2: first intermediate pixel, second intermediate pixel
PA, PA1, PA2: pixel area, first pixel area, second pixel area
R1, R2: first region, second region
SDA1, SDA2: first sub display area, second sub display area
TP, TP1, TP2: penetration part, first penetration part, second penetration part
WL, MWL: wiring, intermediate wiring

Claims (20)

A display panel comprising: a first display area; a second display area having a penetration part; and a third display area disposed between the first display area and the second display area;
a substrate extending from the first display area to the third display area and separated from the second display area with the through part interposed therebetween;
a first display element disposed on the substrate, a first display element disposed on the first display area, a second display element disposed on the second display area, and a plurality of third display elements disposed on the third display area; a plurality of display elements; and
A second display area hole disposed between the substrate and the plurality of display elements, a second display area hole disposed between the second display element and the through portion, and a third display area disposed between the plurality of adjacent third display elements A display panel comprising; an organic insulating layer having a hole. According to claim 1,
Further comprising; an inorganic insulating layer disposed between the substrate and the organic insulating layer,
The inorganic insulating layer extends from the first display area to the third display area and is separated from the second display area with the through portion interposed therebetween. According to claim 1,
A pattern layer disposed on the organic insulating layer; further comprising,
The pattern layer is disposed between the first display element and any one of the plurality of third display elements facing the first display element. 4. The method of claim 3,
an encapsulation layer disposed on the plurality of display elements, the encapsulation layer including at least one inorganic encapsulation layer and at least one organic encapsulation layer;
and the at least one organic encapsulation layer is separated based on the pattern layer. 4. The method of claim 3,
a pixel circuit electrically connected to any one of the plurality of display elements; and
Further comprising; a wiring disposed between the substrate and the pattern layer;
and the wiring is electrically connected to the pixel circuit. According to claim 1,
It further comprises; an intermediate pattern layer disposed on the organic insulating layer,
The intermediate pattern layer is disposed between the plurality of adjacent third display elements. According to claim 1,
Further comprising; an inorganic layer disposed between the organic insulating layer and any one of the plurality of third display elements;
and the inorganic layer has a protruding tip protruding toward a center of the third display area hole. According to claim 1,
the second display area includes a first pixel area, a second pixel area, and a connection area extending from the first pixel area to the second pixel area;
an edge of the first pixel area, an edge of the connection area, and an edge of the second pixel area define at least a part of the through part. According to claim 1,
the second display area includes a first sub-display area and a second sub-display area;
The through portion includes a first through portion overlapping the first sub display area and a second through portion overlapping with the second sub display area;
The size of the first through portion is larger than the size of the second through portion, the display panel. According to claim 1,
the third display area includes a first intermediate display area and a second intermediate display area;
the first intermediate display area is disposed closer to the first display area than the second intermediate display area;
and a density of the plurality of third display elements disposed in the first intermediate display area is greater than a density of the plurality of third display elements disposed in the second intermediate display area. A display device comprising:
a display panel including a first display area and a second display area; and
a roller for winding the second display area;
and the second display area includes a penetrating portion penetrating the display panel. 12. The method of claim 11,
the second display area includes a first pixel area, a second pixel area, and a connection area extending from the first pixel area to the second pixel area;
An edge of the first pixel region, an edge of the connection region, and an edge of the second pixel region define at least a portion of the through portion. 12. The method of claim 11,
The display panel is
Board,
an organic insulating layer disposed on the substrate and having a second display area hole overlapping the second display area;
a plurality of display elements disposed on the organic insulating layer and including a first display element disposed in the first display area and a second display element disposed in the second display area; and
and an inorganic layer overlapping the second display area and disposed between the organic insulating layer and the second display element, the inorganic layer having a protruding tip protruding in a central direction of the hole in the second display area. 12. The method of claim 11,
the display panel is disposed between the first display area and the second display area and includes a third display area;
The display panel is
a substrate extending from the first display area to the third display area and separated from the second display area with the through part interposed therebetween;
a first display element disposed on the substrate, a first display element disposed on the first display area, a second display element disposed on the second display area, and a plurality of third display elements disposed on the third display area; a plurality of display elements that
an encapsulation layer disposed on the plurality of display elements and including at least one inorganic encapsulation layer and at least one organic encapsulation layer; and
and a pattern layer disposed between the first display element and any one of the plurality of third display elements facing the first display element and separating the at least one organic encapsulation layer. 15. The method of claim 14,
The display panel is
a pixel circuit electrically connected to any one of the plurality of display elements; and
and a wiring disposed between the substrate and the pattern layer,
and the wiring is electrically connected to the pixel circuit. 12. The method of claim 11,
the display panel includes a third display area disposed between the first display area and the second display area;
The third display area includes a first intermediate display area and a second intermediate display area,
the first intermediate display area is disposed closer to the first display area than the second intermediate display area;
and a density of sub-pixels disposed in the first intermediate display area is greater than a density of sub-pixels disposed in the second intermediate display area. 12. The method of claim 11,
The display device is
a first state in which the second display area is rolled on the roller; and
and a second state in which the second display area is at least partially unrolled from the roller. 18. The method of claim 17,
the second display area includes a first sub display area in contact with the roller in the first state and a second sub display area extending from the first sub display area;
The through portion includes a first through portion overlapping the first sub display area and a second through portion overlapping with the second sub display area;
A size of the first through-portion is larger than a size of the second through-portion. 19. The method of claim 18,
In the first state, at least a portion of the second sub display area is disposed below the first display area. 12. The method of claim 11,
The second display area includes a first area and a second area disposed with the first display area interposed therebetween;
The roller includes a first roller and a second roller,
The first roller winds up the first area,
and the second roller winds up the second area.

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