KR20220085578A - System and method of linking core in muti-core environment - Google Patents

Abstract

The core interworking system in a multi-core environment according to a preferred embodiment of the present invention performs the current function in the API unit that generates an interrupt to any one of the multi-core cores when the interworking of the multi-cores is requested, and then performs the current function in the core where the interrupt occurred. An interrupt service routine unit that checks whether there is a function to be performed, generates an interrupt to the core to perform the next function or terminates interworking of the multi-cores according to the presence or absence of the function to be performed next, and the order of performing the functions of the multi-cores, and and a scheduling table unit in which a scheduling table including core information to perform a function is stored.

Description

Core interlocking system and method in a multi-core environment {SYSTEM AND METHOD OF LINKING CORE IN MUTI-CORE ENVIRONMENT}

The present invention relates to a core interworking system and method in a multi-core environment.

In general, in a multi-core environment of a vehicle, the logic of each core operates individually, and each of the cores is assigned a role to perform a specific function according to the characteristics of the vehicle control system.

In such a multi-core environment, each core may be required to perform a specific function in correlation with each other.

For example, in a multi-core environment in which three cores exist, after the first core performs a first function, the second core performs a second function, and after the first core performs a third function, Finally, there may be a case where the third core is required to perform the fourth function.

In the case of an example of the order of performing these functions, there is a problem that it is impossible to implement without a special mechanism as the logic of each core operates individually in a multi-core environment.

In the case of the conventional multi-core technology, scheduling of each logic operation was supported using a general multi-core scheduler. does not support

That is, in the case of the conventional multi-core technology, it is impossible to implement the above-described example of the function execution sequence, and even if it is implemented with a detailed design, there is a limit in securing its robustness.

Republic of Korea Patent Publication No. 10-2016-0076270

Accordingly, the present invention has been devised in view of the above circumstances, and an object of the present invention is to provide a core interworking system and method in a multi-core environment that provides a mechanism to support the function of each core to be interlocked in a multi-core environment. .

In order to achieve the above object, a core interworking system in a multi-core environment according to a preferred embodiment of the present invention includes: an API unit for generating an interrupt to any one of the multi-core cores when the interworking of the multi-cores is requested; Interrupt service routine unit that performs the current function in the interrupted core, checks if there is a function to be performed next, and generates an interrupt in the core that will perform the next function or terminates the interworking of multi-cores depending on whether there is a function to be performed next. ; and a scheduling table unit in which a scheduling table including information on a core to perform a function and a function execution order of the multi-core is stored.

The API unit may include a busy check API for checking whether multi-core interworking is in progress based on the scheduling table.

The API unit may include a modification prevention API for changing the state of the modification prevention flag of the scheduling table so that interworking of the multi-cores is not required at the same time when it is confirmed that the interworking of the multi-cores is not in progress.

The API unit may include a function information addition API for storing a core ID and a function execution order used for interworking of multi-cores in the scheduling table.

The API unit may include an execution request API for changing a state of a busy flag of the scheduling table to notify that multi-core interworking is in progress when a multi-core interworking execution request is received.

The execution request API may identify a core on which a function is to be performed through the scheduling table, and may generate an interrupt in the checked core.

When the interrupt service routine unit is called by the interrupt generating core, it may perform a function according to the function address of the scheduling table and check whether there is a function to be performed next through the regular scheduling table.

When there is a function to be performed next, the interrupt service routine unit may reduce the number of elements in the scheduling table and generate an interrupt to a core that will perform the next function.

The interrupt service routine unit may initialize a pointer of a target element in the scheduling table, change states of a busy flag and a modification prevention flag, and terminate the interworking of the multi-cores, when there is no function to be performed next.

The scheduling table includes a target element pointer corresponding to the function execution order of the core, the number of elements corresponding to the number of function information to be performed, a busy flag indicating that interworking of multi-cores is in progress, and preventing modification of the scheduling table May include anti-modification flags.

In a core interworking method in a multi-core environment according to a preferred embodiment of the present invention for achieving the above object, according to the interworking request of the multi-core, the function execution order of the multi-core and the core information to perform the function are stored in a scheduling table. information correction; an interrupt step of generating an interrupt to a core to perform a current function according to the scheduling table; a function execution step of performing a current function based on the scheduling table in the interrupted core; and an interrupt service routine step of generating an interrupt to the core to perform the next function or terminating the interworking of the multi-cores after the function execution step, depending on whether a function to be performed next is based on the scheduling table. .

The method may further include a busy check step of confirming whether multi-core interworking is in progress based on the scheduling table before the information modification step.

If it is confirmed that the interworking of the multi-cores is not in progress, the method may further include a modification prevention step of changing the state of the modification prevention flag of the scheduling table so that interworking of the multi-cores is not required at the same time.

The information modification step may change the state of the busy flag of the scheduling table to inform that the multi-core interworking is in progress when the multi-core interworking is requested.

According to the core interworking system and method in a multi-core environment according to a preferred embodiment of the present invention, each function of each core can be interlocked in a multi-core environment, and timing control for immediate function execution according to the end of the operation of the core logic is possible. It is possible.

In addition, by enabling handling of logic sensitive to timing or function execution order in a vehicle control system requiring interworking of multi-cores, control efficiency is improved and logic robustness is secured.

1 is a block diagram of a core interworking system in a multi-core environment according to a preferred embodiment of the present invention.
FIG. 2 is a diagram illustrating an operation sequence of a multi-core according to a function execution sequence of the scheduling table unit of FIG. 1 .
FIG. 3 is a diagram illustrating an example of an operation sequence of the API unit of FIG. 1 and data of a scheduling table according to the operation sequence;
FIG. 4 is a diagram illustrating an operation sequence of the first interrupt generated core of FIG. 3 and an example of data of a scheduling table according to the operation sequence;
FIG. 5 is a diagram illustrating an example of an operation sequence of a core that has generated a second interrupt of FIG. 3 and data of a scheduling table according to the operation sequence;
FIG. 6 is a diagram illustrating an operation sequence of a core in which a third interrupt has occurred in FIG. 3 and an example of data of a scheduling table according to the operation sequence;
FIG. 7 is a diagram illustrating an operation sequence of a core in which a fourth interrupt has occurred in FIG. 3 and an example of data of a scheduling table according to the operation sequence.
FIG. 8 is a diagram for explaining an example of the mechanism of the API unit of FIG. 1 .
FIG. 9 is a diagram for explaining an example of a mechanism of the interrupt service routine unit of FIG. 1 .
10 is a flowchart of a core interworking method in a multi-core environment according to a preferred embodiment of the present invention.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. First of all, it should be noted that in adding reference numerals to the components of each drawing, the same components are given the same reference numerals as much as possible even though they are indicated on different drawings. In addition, preferred embodiments of the present invention will be described below, but the technical spirit of the present invention is not limited thereto and may be variously implemented by those skilled in the art without being limited thereto.

1 is a block diagram of a core interworking system in a multi-core environment according to a preferred embodiment of the present invention.

Referring to FIG. 1 , in a multi-core environment according to a preferred embodiment of the present invention, the core interworking system 100 connects multiple cores through an Interrupt Service Call function so that the sequential functions of the multi-cores can be performed. It is characterized by interworking and scheduling for multi-core functions.

In the multi-core environment, the core interworking system 100 includes an API unit 110 , an interrupt service routine unit 120 , and a scheduling table unit 130 .

When a specific core under a multi-core environment requests multi-core interworking, the API unit 110 may execute multi-core interworking by using a scheduling table.

The API unit 110 includes an Add Function Information API 111 for adding function information by manipulating a scheduling table, a Check Busy API 113 for checking whether multi-core interworking is in progress, Execution Request API 115 for requesting interworking execution of multi-cores, and Protect Modification API 117 for preventing modification of information in the scheduling table so as not to simultaneously request interworking of multi-cores from other cores ) may be included.

The interrupt service routine unit 120 may be provided in each of the multi-cores. The interrupt service routine unit 120 may call a function to be performed through an interrupt service call function when an interrupt is generated by the API unit 110 . After performing the called function, the interrupt service routine unit 120 may check whether there is a function to be performed next. The interrupt service routine unit 120 may generate an interrupt in any one of the multi-core cores or end function execution according to the presence or absence of a function to be performed next. The interrupt service routine unit 120 may have a high priority so that execution can be guaranteed. Here, the level of priority may be appropriately applied according to the requirements of the vehicle control system.

The scheduling table unit 130 stores a scheduling table including information on a multi-core function execution order according to an interrupt service call function, and core information to perform a function. The scheduling table may include a function information array and control data.

The function information array may include a function array having a core ID and a function address.

The control data includes a pointer of a target element indicating the order in which the core functions perform, the number of elements, a busy flag indicating that multi-core interworking is in progress, and modification of the scheduling table. It may include a modification protection flag to prevent it.

The interrupt service routine unit 120 may refer to data of the scheduling table. The scheduling table is stored in a shared memory area to be accessed by the interrupt service routine unit 120 of each multi-core.

Hereinafter, the operation sequence of the multi-core according to an example of the function execution sequence will be described.

FIG. 2 is a diagram illustrating an operation sequence of a multi-core according to a function execution sequence of the scheduling table of FIG. 1 .

Referring to FIG. 2 , a multi-core may include a first core (Core #1), a second core (Core #2), and a third core (Core #3).

Functions are performed in the order of the first function (Function #1), the second function (Function #2), the third function (Function #3), the fourth function (Function #4), and the fifth function (Function #5). A sequence may be provided. Here, the first function (Function #1) and the fifth function (Function #5) may be performed by the first core (Core #1). Also, the second function (Function #2) and the fourth function (Function #4) may be performed by the second core (Core #2). Also, the third function (Function #3) may be performed by the third core (Core #3).

In a multi-core environment, the core interworking system 100 enables the logic of each of the multi-cores to be organically operated with the function execution order and timing of the scheduling table, regardless of task scheduling of each multi-core, when the interworking of the multi-cores is requested in a specific core. can do.

In an embodiment, the first core (Core #1) may set the function execution order of the multi-core, and may use the API unit 110 to modify the function execution order and core information of the scheduling table. The first core (Core #1) may request the multi-core interworking execution from the API unit 110 . When the multi-core interworking is executed by the API unit 110 , the first core Core #1 may perform the first function Function #1 according to the function execution sequence.

When the performance of the first function (Function #1) of the first core (Core #1) is finished, the third core (Core #3) may stop the current work and perform the second function (Function #2).

When the execution of the second function (Function #2) of the third core (Core #3) is finished, the second core (Core #2) may stop the current work and perform the third function (Function #3).

When the execution of the third function (Function #3) of the second core (Core #2) is finished, the third core (Core #3) may stop the current work and perform the fourth function (Function #4).

When the execution of the fourth function (Function #4) of the third core (Core #3) is finished, the first core (Core #1) may stop the current work and perform the fifth function (Function #5).

Hereinafter, the operation of the API unit 110 when a multi-core interworking request is made will be described.

FIG. 3 is a diagram showing an example of an operation sequence of the API unit of FIG. 1 and data of a scheduling table according to the operation sequence;

Referring to FIG. 3 , an operation sequence of the API unit 110 according to a multi-core interworking request in a specific core may be checked.

First, when interworking of multi-cores is required during operation in a specific core, the specific core calls the busy check API 113 to check whether interworking of multi-cores is in progress.

The busy check API 113 checks whether multi-core interworking is in progress through the busy flag of the scheduling table, and transmits whether multi-core interworking is in progress to the specific core. When it is confirmed that the interworking of the multi-core is not in progress, the specific core calls the modification prevention API 117 that prohibits the operation related to the interworking of the multi-core.

The modification protection API 117 changes the state of the modification protection flag of the scheduling table from FALSE to TRUE so that interworking of multiple cores is not required at the same time. Through this, when the state-changed modification prevention flag is checked in a core other than the specific core, interworking of multi-cores is not required.

When this process is completed, the specific core calls the function information addition API 111 to modify the data of the scheduling table. The specific core transmits the function execution order and the core ID on which the function is to be performed to the function information addition API 111 .

The function information addition API 111 stores the received core ID, function execution order, and the number of elements in the scheduling table. Here, the function information addition API 111 may store the number of elements in the scheduling table according to the number of the received function information.

In one embodiment, the function information addition API 111 may store the first function (Function #1) of the first core (Core #1) in the first function address (Function Address [0]) of the function information array. have.

Then, the function information addition API 111 may store the second function (Function #2) of the third core (Core #3) in the second function address (Function Address [1]) of the function information array.

Then, the function information addition API 111 may store the third function (Function #3) of the second core (Core #2) in the third function address (Function Address [2]) of the function information array.

Finally, the function information addition API 111 may store the fourth function (Function #4) of the first core (Core #1) in the fourth function address (Function Address [3]) of the function information array.

When the registration of all information is completed, the specific core requests interworking execution to the execution request API 115 .

When the execution request API 115 receives a request for interworking execution, it changes the state of the busy flag indicating that interworking of multi-cores is in progress from FALSE to TRUE.

The execution request API 115 checks information on the core to be executed first through the scheduling table. The execution request API 115 generates an interrupt to the core in which the function is to be performed.

Hereinafter, the operation of the core in which the interrupt has occurred will be described with reference to FIGS. 4 to 7 .

FIG. 4 is a diagram showing an operation sequence of the first interrupt generated core of FIG. 3 and an example of data of a scheduling table according to the operation sequence;

Referring to FIG. 4 , the operation sequence of the interrupt service routine unit 120 of the first core (Core #1) in which the first interrupt is generated by the execution request API 115 may be checked.

When an interrupt is generated by the execution request API 115 , the first core (Core #1) calls the interrupt service routine unit 120 . The interrupt service routine unit 120 of the first core (Core #1) operates by generating an interrupt and calls the first function address (Function Address [0]) of the scheduling table. At this time, the interrupt service routine unit 120 of the first core (Core #1) increments the target element pointer of the scheduling table by '1' to indicate the next target element, and subtracts the number of elements by '1'.

Then, the interrupt service routine unit 120 of the first core (Core #1) performs the first function (Function #1) according to the first function address (Function Address [0]).

Then, the interrupt service routine unit 120 of the first core (Core #1) checks whether there is a function to be performed next through the scheduling table.

In one embodiment, when there is a function to proceed next, the interrupt service routine unit 120 of the first core (Core #1) generates an interrupt to the third core (Core #3) that will perform the next function and generates the first Terminates the function of the core (Core #1).

FIG. 5 is a diagram illustrating an operation sequence of a core in which a second interrupt occurs in FIG. 3 and an example of data of a scheduling table according to the operation sequence;

Referring to FIG. 5 , the operation sequence of the interrupt service routine unit 120 of the third core (Core #3) in which the second interrupt is generated by the interrupt service routine unit 120 of the first core (Core #1) can be checked. have.

When an interrupt occurs, the third core (Core #3) calls the interrupt service routine unit 120 . The interrupt service routine unit 120 of the third core (Core #3) operates by generating an interrupt and calls the second function address (Function Address [1]) of the scheduling table. At this time, the interrupt service routine unit 120 of the third core (Core #3) increments the target element pointer of the scheduling table by '1' to indicate the next target element, and subtracts the number of elements by '1'.

Then, the interrupt service routine unit 120 of the third core (Core #3) performs the second function (Function #2) according to the second function address (Function Address [1]).

Then, the interrupt service routine unit 120 of the third core (Core #3) checks whether there is a function to be performed next through the scheduling table.

In one embodiment, when there is a function to proceed next, the interrupt service routine unit 120 of the third core (Core #3) generates an interrupt to the second core (Core #2) that will perform the next function and generates a third Terminates the execution of the function of the core (Core #3).

FIG. 6 is a diagram illustrating an operation sequence of a core that has generated a third interrupt of FIG. 3 and an example of data of a scheduling table according to the operation sequence;

Referring to FIG. 6 , the operation sequence of the interrupt service routine unit 120 of the second core (Core #2) in which the third interrupt is generated by the interrupt service routine unit 120 of the third core (Core #3) can be checked. have.

When an interrupt occurs, the second core (Core #2) calls the interrupt service routine unit 120 . The interrupt service routine unit 120 of the second core (Core #2) operates by generating an interrupt and calls the third function address (Function Address [2]) of the scheduling table. At this time, the interrupt service routine unit 120 of the second core (Core #2) increments the target element pointer of the scheduling table by '1' to indicate the next target element, and subtracts the number of elements by '1'.

Then, the interrupt service routine unit 120 of the second core (Core #2) performs a third function (Function #3) according to the third function address (Function Address [2]).

Then, the interrupt service routine unit 120 of the second core (Core #2) checks whether there is a function to be performed next through the scheduling table.

In one embodiment, when there is a function to proceed next, the interrupt service routine unit 120 of the second core (Core #2) generates an interrupt to the first core (Core #1) that will perform the next function and generates a second Terminates the function of the core (Core #2).

FIG. 7 is a diagram illustrating an operation sequence of a core in which a fourth interrupt has occurred in FIG. 3 and an example of data of a scheduling table according to the operation sequence;

Referring to FIG. 7 , the operation sequence of the interrupt service routine unit 120 of the first core (Core #1) in which the fourth interrupt is generated by the interrupt service routine unit 120 of the second core (Core #2) can be checked. have.

When an interrupt occurs, the first core (Core #1) calls the interrupt service routine unit 120 . The interrupt service routine unit 120 of the first core (Core #1) operates by generating an interrupt and calls the fourth function address (Function Address [3]) of the scheduling table. At this time, the interrupt service routine unit 120 of the first core (Core #1) subtracts '1' from the number of elements in the scheduling table. Also, when the number of elements becomes 0, the interrupt service routine unit 120 of the first core (Core #1) may initialize the target element pointer of the scheduling table to '0' without increasing '1'.

Then, the interrupt service routine unit 120 of the first core (Core #1) performs the fourth function (Function #3) according to the fourth function address (Function Address [3]).

Then, the interrupt service routine unit 120 of the first core (Core #1) checks whether there is a function to be performed next through the scheduling table.

In one embodiment, when there is no further function to proceed, the interrupt service routine unit 120 of the first core (Core #1) sets the state of the busy flag from true to inform that the interworking of the multi-core is not in progress. It is converted to false, and the state of the modification prevention flag is changed from true to false so that the information of the scheduling table can be modified, and then the interworking of the multi-core is terminated.

The process described with reference to FIGS. 4 to 7 is repeated until all elements of the scheduling table disappear, and multi-core interworking is performed through this process.

FIG. 8 is a diagram for explaining an example of the mechanism of the API unit of FIG. 1 .

Referring to FIG. 8 , the API unit 110 may be designed in the order of a busy check API 113 , a modification prevention API 117 , a function information addition API 111 , and an execution request API 115 .

The busy check API 113 may confirm that multi-core interworking is in progress through the busy flag of the scheduling table.

The modification protection API 117 may change the state of the modification protection flag of the scheduling table from false (FALSE) to true (TRUE) so that the interworking request of the multi-core is not made in another core.

The function information addition API 111 may add a core ID and a function address to the function information array of the scheduling table. Also, the function information addition API 111 may increase the number of elements according to the number of function information.

When the execution request API 115 is called while the number of elements is '0' and the scheduling table is empty, the state of the modification prevention flag of the scheduling table may be changed from TRUE to FALSE.

When the number of elements is '1' or more and the execution request API 115 is called while the scheduling table is not empty, the state of the busy flag of the scheduling table may be changed from FALSE to TRUE. In addition, the execution request API 115 may generate an interrupt to the corresponding core after calling the ID of the core to which the function is to be performed from the function information array.

FIG. 9 is a diagram for explaining an example of a mechanism of the interrupt service routine unit of FIG. 1 .

Referring to FIG. 9 , the interrupt service routine unit 120 calls a function address to be performed by the corresponding core through the scheduling table. In this case, the interrupt service routine unit 120 may decrease the number of elements by '1'. In an embodiment, when the number of elements reaches '0', the interrupt service routine unit 120 may reset the pointer of the target element to '0'. When the number of elements does not reach '0', the interrupt service routine unit 120 may indicate the next element by increasing the pointer of the target element by '1'. Thereafter, the interrupt service routine unit 120 performs a function according to the function address.

Then, the interrupt service routine unit 120 checks whether there is a function to be performed next through the number of elements.

In one embodiment, when there is a function to be performed next, the interrupt service routine unit 120 generates an interrupt in the core to perform the next function and then ends the operation.

When there is no function to be performed next, the interrupt service routine unit 120 initializes the busy flag and the modification prevention flag and ends the interworking of the multi-cores.

10 is a flowchart of a core interworking method in a multi-core environment according to a preferred embodiment of the present invention.

1 and 10, the core interworking method in a multi-core environment according to a preferred embodiment of the present invention includes an interworking request step (S110), an information modification step (S120), an interrupt step (S130), and a function execution step ( S140), a function determination step (S150), an interrupt generation step (S160), and an interworking end step (S170) may be included.

In the interworking request step ( S110 ), a specific core may call the API unit 110 by requesting interworking of multiple cores.

In the information correction step ( S120 ), the API unit 110 may store, in the scheduling table, the order of performing the functions of the multi-cores and information on the cores to perform the functions according to the interworking request of the multi-cores.

Meanwhile, before the information correction step ( S120 ), the API unit 110 may check whether multi-core interworking is in progress based on the scheduling table. Also, when it is confirmed that the interworking of the multi-cores is not in progress, the API unit 110 may change the state of the modification prevention flag of the scheduling table so that interworking of the multi-cores is not required at the same time. In addition, when receiving a request for interworking of multi-cores, the API unit 110 may change the state of the busy flag of the scheduling table to notify that interworking of multi-cores is in progress.

In the interrupt step (S130) after the government correction step (S120), the API unit 110 may generate an interrupt to the core to perform the current function according to the scheduling table.

In the function execution step S140 , the interrupt service routine unit 120 may perform a current function based on the scheduling table in the core where the interrupt has occurred.

In the function presence determination step ( S150 ), the interrupt service routine unit 120 may check whether a function to be performed next is based on the scheduling table after the current function is performed.

In the interrupt generation step ( S160 ), when the function to be performed next is confirmed from the scheduling table, the interrupt service routine unit 120 may generate an interrupt to the core that will perform the next function.

In the interworking termination step ( S170 ), the interrupt service routine unit 120 may terminate the interworking of the multi-core if a function to be performed next is not confirmed from the scheduling table. In this case, the interrupt service routine unit 120 may initialize the pointer of the target element in the scheduling table and change the states of the busy flag and the modification prevention flag.

The above description is merely illustrative of the technical idea of the present invention, and various modifications, changes, and substitutions are possible within the range that does not depart from the essential characteristics of the present invention by those of ordinary skill in the art to which the present invention pertains. will be. Accordingly, the embodiments disclosed in the present invention and the accompanying drawings are for explaining, not limiting, the technical spirit of the present invention, and the scope of the technical spirit of the present invention is not limited by these embodiments and the accompanying drawings .

Steps and/or operations according to the present invention may occur concurrently in different embodiments, either in a different order, or in parallel, or for different epochs, etc., as would be understood by one of ordinary skill in the art. can

Depending on the embodiment, some or all of the steps and/or operations run instructions, a program, an interactive data structure, a client and/or a server stored in one or more non-transitory computer-readable media. At least some may be implemented or performed using one or more processors. The one or more non-transitory computer-readable media may be illustratively software, firmware, hardware, and/or any combination thereof. Further, the functionality of a “module” discussed herein may be implemented in software, firmware, hardware, and/or any combination thereof.

100: core interlocking system
110: API unit
111: API for adding feature information
113: Busy Check API
115: Execute Request API
117: Anti-Modification API
120: interrupt service routine unit
130: scheduling table unit

Claims (14)

an API unit for generating an interrupt to any one of the multi-cores when requesting interworking of the multi-cores;
Interrupt service routine unit that performs the current function in the interrupted core, checks if there is a function to be performed next, and generates an interrupt to the core that will perform the next function or terminates the interworking of multi-cores depending on whether the next function is to be performed. ; and
a scheduling table unit for storing a scheduling table including information on a core to perform a function and a function execution order of the multi-core;
In a multi-core environment that includes a core interlocking system. The method of claim 1,
The API unit,
The core interworking system in a multi-core environment, characterized in that it includes a busy check API for checking whether interworking of multi-cores is in progress based on the scheduling table. The method of claim 1,
The API unit,
When it is confirmed that the interworking of multi-cores is not in progress, the core interworking system in a multi-core environment, characterized in that it includes a modification prevention API for changing the state of the modification prevention flag of the scheduling table so that interworking of multi-cores is not required at the same time . The method of claim 1,
The API unit,
A core interworking system in a multi-core environment, characterized in that it comprises a function information addition API for storing the core ID and function execution order used for interworking of multi-cores in the scheduling table. The method of claim 1,
The API unit,
and an execution request API for changing the state of the busy flag of the scheduling table to inform that multi-core interworking is in progress when a multi-core interworking execution request is received. 6. The method of claim 5,
The execution request API is
A core interworking system in a multi-core environment, characterized in that by checking a core on which a function is to be performed through the scheduling table, and generating an interrupt to the checked core. The method of claim 1,
The interrupt service routine unit,
A core interworking system in a multi-core environment, characterized in that when a call is made by an interrupt-generated core, a function according to the function address of the scheduling table is performed, and whether there is a next function to be performed through the scheduling table. 8. The method of claim 7,
The interrupt service routine unit,
When there is a function to be performed next, the core interworking system in a multi-core environment, characterized in that by reducing the number of elements in the scheduling table, and generating an interrupt to a core to perform the next function. 9. The method of claim 8,
The interrupt service routine unit,
Core interworking system in a multi-core environment, characterized in that when there is no function to perform next, the pointer of the target element in the scheduling table is initialized, the states of the busy flag and the modification prevention flag are changed, and the interworking of the multi-core is terminated . The method of claim 1,
The scheduling table is
Includes a target element pointer corresponding to the function execution order of the core, the number of elements corresponding to the number of function information to be performed, a busy flag indicating that multi-core interworking is in progress, and a modification prevention flag to prevent modification of the scheduling table A core interlocking system in a multi-core environment, characterized in that an information modification step of storing, in a scheduling table, information on a multi-core function execution order and core to perform a function according to a multi-core interworking request;
an interrupt step of generating an interrupt to a core to perform a current function according to the scheduling table;
a function execution step of performing a current function based on the scheduling table in the interrupted core; and
an interrupt service routine step of generating an interrupt to a core to perform a next function or terminating interworking of multi-cores according to the existence of a function to be performed next based on the scheduling table, after the function execution step;
A core interworking method in a multi-core environment comprising a. 12. The method of claim 11,
Prior to the step of modifying the information, the method of claim 1, further comprising a busy check step of checking whether multi-core interworking is in progress based on the scheduling table. 13. The method of claim 12,
When it is confirmed that the interworking of the multi-cores is not in progress, the method further comprises a modification prevention step of changing the state of the modification prevention flag of the scheduling table so that interworking of the multi-cores is not required at the same time. linkage method. 14. The method of claim 13,
The step of modifying the information is
The core interworking method in a multi-core environment, characterized in that when a request for interworking of the multi-core is received, the state of the busy flag of the scheduling table is changed to inform that interworking of the multi-core is in progress.

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