KR20220071876A - image sensor - Google Patents

Abstract

An image sensor of the present invention includes: a first pixel; a second pixel disposed adjacent to the first pixel; a pixel isolation structure between the first pixel and the second pixel; a back surface anti-reflection layer disposed on the first pixel, the second pixel, and the pixel isolation structure; and a fence disposed on the backside anti-reflection layer to correspond to the pixel isolation structure and having a buried air gap therein.

Description

image sensor

The technical idea of the present invention relates to an image sensor, and more particularly, to a CMOS image sensor.

An image sensor that captures an image (or image) and converts it into an electrical signal, for example, a CMOS image sensor, is a digital camera, a mobile phone camera and a portable camcorder, as well as general consumer electronic devices, automobiles, and security devices. and a camera mounted on a robot.

As image sensors are getting smaller, the size of pixels is also decreasing. In an image sensor, as the size of a pixel decreases, crosstalk between pixels increases and a sensor defect occurs.

SUMMARY OF THE INVENTION An object of the technical spirit of the present invention is to provide an image sensor capable of reducing crosstalk between pixels and reducing sensor defects.

In order to solve the above problems, an image sensor according to an embodiment of the present invention includes a first pixel; a second pixel disposed adjacent to the first pixel; a pixel isolation structure between the first pixel and the second pixel; a back anti-reflective layer disposed on the first pixel, the second pixel, and the pixel isolation structure; and a fence disposed on the rear antireflection layer to correspond to the pixel isolation structure and having a buried air gap therein.

According to an embodiment of the inventive concept, an image sensor includes a first pixel; a second pixel disposed adjacent to the first pixel; a pixel isolation structure between the first pixel and the second pixel; a back anti-reflection layer disposed on the first pixel, the second pixel, and the pixel isolation structure, the back anti-reflection layer including a plurality of sub back anti-reflection layers; and a fence disposed on the backside antireflection layer to correspond to the pixel isolation structure, having a buried air gap therein, and having a penetrating portion penetrating through at least one of the sub backside antireflection layers.

According to an embodiment of the inventive concept, an image sensor includes: a substrate having a first surface and a second surface opposite to the first surface; a first pixel located within the substrate; a second pixel disposed adjacent to the first pixel in the substrate; a pixel separation structure positioned between the second surface and the first surface to separate the first pixel and the second pixel from each other; a back anti-reflection layer disposed on the first pixel on the second side, the second pixel, and the pixel isolation structure, the back anti-reflection layer comprising a plurality of sub back anti-reflection layers; a fence disposed on the backside antireflection layer to correspond to the pixel isolation structure, a fence having a buried air gap therein and a penetrating portion penetrating through at least one of the sub backside antireflection layers; and a color filter disposed on the rear anti-reflection layer on the first pixel and the second pixel and separated by the fence.

The image sensor of the present invention may include a fence having a buried air gap to suppress crosstalk between pixels. In addition, the image sensor of the present invention can suppress electrostatic defects (eg, bruise defects) by including barrier metal layers on both sides of the buried air gap. Accordingly, the image sensor of the present invention can improve resolution, sensitivity, and image quality.

1 is a schematic circuit diagram of an image sensor according to an embodiment of the technical concept of the present invention.
2 is a circuit diagram of a pixel included in an image sensor according to an exemplary embodiment of the inventive concept.
3 is a plan view of an image sensor according to an exemplary embodiment of the inventive concept.
4 is a cross-sectional view of the image sensor taken along line AA′ of FIG. 1 .
Fig. 5 is an enlarged view of the EL region of Fig. 4;
FIG. 6 is a view for explaining in detail the fence including the buried air gap of FIG. 5 .
7 is a plan view illustrating a fence having a buried air gap of an image sensor according to an embodiment of the inventive concept.
8 is a plan view illustrating a fence having a buried air gap of an image sensor according to an embodiment of the inventive concept.
9 is a plan view illustrating a fence having a buried air gap of an image sensor according to an embodiment of the inventive concept.
10 is a plan view illustrating a fence having a buried air gap of an image sensor according to an embodiment of the inventive concept.
11 is a plan view illustrating a fence having a buried air gap of an image sensor according to an embodiment of the inventive concept.
12 is a plan view of a pixel of an image sensor according to an exemplary embodiment of the inventive concept.
13 is a plan view of a pixel of an image sensor according to an exemplary embodiment of the inventive concept.
14A to 14D are cross-sectional views illustrating a method of manufacturing a fence constituting the image sensor of FIGS. 3 to 6 .
15 is a cross-sectional view of an image sensor according to an exemplary embodiment of the inventive concept.
16 is a cross-sectional view of an image sensor according to an exemplary embodiment of the inventive concept.
17 is a cross-sectional view of an image sensor according to an exemplary embodiment of the inventive concept.
Fig. 18 is an enlarged view of the EL region of Fig. 17;
19 is a view for explaining in detail the fence including the buried air gap of FIG. 18 .
20A to 20D are cross-sectional views illustrating a method of manufacturing an image sensor according to an exemplary embodiment of the inventive concept.
21A to 21D are cross-sectional views illustrating a method of manufacturing an image sensor according to an exemplary embodiment of the inventive concept.
22A to 22C are cross-sectional views illustrating a method of manufacturing an image sensor according to an exemplary embodiment of the inventive concept.
23 is a block diagram illustrating a configuration of an image sensor according to an exemplary embodiment of the inventive concept.
24 is a block diagram of a camera using an image sensor according to an embodiment of the technical concept of the present invention.
25 is a block diagram of an imaging system including an image sensor according to an embodiment of the inventive concept.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments of the present invention may be implemented by only one, and also, the following embodiments may be implemented by combining one or more. Accordingly, the technical spirit of the present invention is not construed as being limited to one embodiment.

Also, in this specification, the singular form of the elements may include the plural form unless the context clearly indicates otherwise. In the present specification, the drawings are exaggerated in order to more clearly explain the present invention.

1 is a schematic circuit diagram of an image sensor according to an embodiment of the technical concept of the present invention.

Specifically, the image sensor 100 may be applied to a stacked image sensor including a first substrate 2 and a second substrate 7 . The image sensor 100 may be a CMOS image sensor. The technical idea of the present invention described below can be mainly applied to the first substrate 2 .

The image sensor 100 may include a first substrate 2 and a second substrate 7 . The image sensor 100 may be configured by laminating and bonding the first substrate 2 on the second substrate 7 . The first substrate 2 may be a sensor substrate including a pixel circuit. The second substrate 7 may be a support substrate on which a logic circuit for driving a pixel circuit is formed and supporting the first substrate 2 . The first substrate 2 and the second substrate 7 may be electrically connected.

In more detail, a pixel array region 4 in which unit pixels PX or unit pixels including a photoelectric conversion region are regularly two-dimensionally arranged is provided on the first substrate 2 . In the pixel array region 4 , pixel driving lines 5 are wired in a row direction and vertical signal lines 6 are wired in a column direction.

One unit pixel PX is arranged to be connected to one pixel driving line 5 and one vertical signal line 6 . In each unit pixel PX, a pixel circuit including a photoelectric conversion unit, a charge storage unit, and transistors such as a metal oxide semiconductor (MOS) transistor, and/or a capacitor may be provided.

On the second substrate 7 , a vertical driving circuit 8 for driving each unit pixel PX provided on the first substrate 2 , a column signal processing circuit 9 , a horizontal driving circuit 11 , and a system control circuit are provided. A logic circuit such as circuit 13 may be provided. The image sensor 100 may output a voltage Vout (output voltage) through the horizontal driving circuit 11 .

2 is a circuit diagram of a pixel included in an image sensor according to an exemplary embodiment of the inventive concept.

Specifically, the plurality of pixels PX may be arranged in a matrix form or an array form. Each of the plurality of pixels PX may include a transfer transistor TX and logic transistors RX, SX, and DX.

The logic transistors RX, SX, and DX may include a reset transistor RX, a selection transistor SX, and a drive transistor DX (or a source follower transistor). The reset transistor RX may include a reset gate RG, the selection transistor SX may include a selection gate SG, and the transfer transistor TX may include a transfer gate TG.

Each of the plurality of pixels PX may include a photoelectric conversion element PD and a floating diffusion region FD. The photoelectric conversion element PD may correspond to a photoelectric conversion region described below. The photoelectric conversion device PD may generate and accumulate photocharges in proportion to the amount of externally incident light, and may include a photodiode, a phototransistor, a photogate, and a pinned photodiode (PPD). and combinations thereof may be used.

The transfer transistor TX may be operated by a transfer control signal transmitted to the transfer gate TG. The transfer gate TG may transfer charges generated in the photoelectric conversion device PD to the floating diffusion region FD. The floating diffusion region FD may receive and accumulate charges generated by the photoelectric conversion device PD. Charges generated in the photoelectric conversion element PD may be transferred to and accumulated in the floating diffusion region FD by the transfer transistor TX. The drive transistor DX may be controlled according to the amount of photocharges accumulated in the floating diffusion region FD.

The reset transistor RX may periodically reset charges accumulated in the floating diffusion region FD. The reset transistor RX may operate in response to a reset control signal transmitted through the reset gate RG. The drain electrode of the reset transistor RX is connected to the floating diffusion region FD, and the source electrode is connected to the power supply voltage VDD.

When the reset transistor RX is turned on by the reset control signal, the power voltage VDD connected to the source electrode of the reset transistor RX is transferred to the floating diffusion region FD. When the reset transistor RX is turned on, charges accumulated in the floating diffusion region FD may be discharged to reset the floating diffusion region FD. The reset transistor RX may reset the voltage of the floating diffusion region FD to the power supply voltage VDD.

The drive transistor DX is connected to a current source (not shown) positioned outside the plurality of pixels PX and functions as a source follower buffer amplifier. The drive transistor DX may amplify the charge accumulated in the floating diffusion region FD and transfer it to the selection transistor SX. The drive transistor DX amplifies a potential change in the floating diffusion region FD and outputs it as an output voltage Vout.

The selection transistor SX may select a plurality of pixels PX in a row unit. In the selection transistor SX, a unit pixel may be selected by a selection control signal transmitted to the selection gate SG. When the selection transistor SX is turned on, the power voltage VDD may be transferred to the source electrode of the selection transistor SX. The selection transistor SX may operate in response to a selection control signal, and may perform switching and addressing operations. When the selection control signal is applied to the selection transistor SX, the selection transistor SX may output an output voltage Vout connected to the unit pixel.

3 is a plan view of an image sensor according to an exemplary embodiment of the inventive concept.

Specifically, the image sensor 100 may include a plurality of pixels PX. The plurality of pixels PX may be two-dimensionally arranged. For example, the second pixel PX2 moves away from the first pixel PX1 in a first direction (X-direction), and the third pixel PX3 moves away from the first pixel PX1 in a second direction (Y-direction). can fall

The fourth pixel PX4 falls from the first pixel PX1 in a diagonal direction (D direction), the second pixel PX2 moves away from the second pixel PX2 in a second direction (Y direction), and from the third pixel PX3 in the first direction. (X direction).

In some embodiments, the first direction (X direction) may be perpendicular to the second direction (Y direction). In some embodiments, the diagonal direction (D direction) may be oblique with respect to the first direction (X direction) and the second direction (Y direction). In some embodiments, the diagonal direction (D direction) may form 45 degrees with the first direction (X direction) and the second direction (Y direction). However, in another embodiment, the diagonal direction (D direction) may form a different angle from the first direction (X direction) and the second direction (Y direction).

A pixel separation structure 150 may be positioned between the plurality of pixels PX. The pixel isolation structure 150 may physically and electrically separate one pixel PX from the adjacent pixel PX, for example, the first pixel PX1 from the second pixel PX2 . The pixel separation structure 150 may be arranged in a mesh shape or a grid shape when viewed in a plan view. In some embodiments, the pixel isolation structure 150 may extend between the plurality of pixels PX. For example, the pixel isolation structure 150 may be formed between the first pixel PX1 and the second pixel PX2 , between the first pixel PX1 and the third pixel PX3 , and between the second pixel PX2 and the fourth pixel PX2 . It may extend between the pixel PX4 and between the third pixel PX3 and the fourth pixel PX4 .

A fence 163 may be disposed on the pixel isolation structure 150 . The fence 163 may overlap the pixel isolation structure 150 in a plan view. The fence 163 may extend along between the pixels PX in a plan view. For example, in a plan view, the fence 163 is formed between the first pixel PX1 and the second pixel PX2 , between the first pixel PX1 and the third pixel PX3 , and between the second pixel PX2 and the second pixel PX2 . It may extend between the four pixels PX4 and between the third pixel PX3 and the fourth pixel PX4 .

4 is a cross-sectional view of the image sensor taken along line A-A' of FIG. 1 .

Specifically, the image sensor 100 includes a substrate 110 , a photoelectric conversion region 120 , a transfer gate TG, a pixel isolation structure 150 , a front structure 130 , a support substrate 140 , and a rear anti-reflection layer ( 162 ), fence 163 with buried air gap AG , additional back anti-reflection layer 164 , passivation layer 165 , color filter 170 , microlens 180 , and capping layer 190 . ) may be included.

The substrate 110 may include a first surface 110F1 and a second surface 110F2. The first surface 110F1 may be the front surface of the substrate 110 . The second surface 110F2 may be the back surface of the substrate 110 . In some embodiments, the substrate 110 may include a semiconductor material such as a group IV semiconductor material, a group III-V semiconductor material, or a group II-VI semiconductor material.

The group IV semiconductor material may include silicon (Si), germanium (Ge), or silicon (Si)-germanium (Ge). The III-V semiconductor material may include gallium arsenide (GaAs), indium phosphorus (InP), gallium phosphorus (GaP), indium arsenide (InAs), indium antimony (InSb), or indium gallium arsenide (InGaAs). The II-VI semiconductor material may include zinc telluride (ZnTe), or cadmium sulfide (CdS).

The semiconductor substrate 110 may include a P-type semiconductor substrate. In some embodiments, the semiconductor substrate 110 may be formed of a P-type silicon substrate. In some embodiments, the semiconductor substrate 110 may include a P-type bulk substrate and a P-type or N-type epitaxial layer grown thereon. In some embodiments, the semiconductor substrate 110 may include an N-type bulk substrate and a P-type or N-type epitaxial layer grown thereon.

The photoelectric conversion region 120 may be disposed in the substrate 110 . The photoelectric conversion region 120 may convert an optical signal into an electrical signal. The photoelectric conversion region 120 may include a photodiode region (not shown) and a well region (not shown) formed inside the substrate 110 . The photoelectric conversion region 120 may be impurity regions doped with impurities of a conductivity type opposite to that of the substrate 110 .

The transfer gate TG may be disposed in the substrate 110 . The transfer gate TG may extend into the substrate 110 from the first surface 110F1 of the substrate 110 . The transfer gate TG may be a part of the transfer transistor (TX in FIG. 2 ). The transfer transistor TX, the reset transistor RX, the drive transistor DX, and the selection transistor SX described above with reference to FIG. 2 may be formed on the first surface 110F1 of the substrate 110 .

Although not shown in FIG. 4 , a device isolation layer (not shown) defining an active region (not shown) and a floating diffusion region FD may be further formed on the first surface 110F1 of the substrate 110 . can The photoelectric conversion region 120 , the transfer gate TG, the plurality of transistors, and the floating diffusion region may constitute the aforementioned pixel PX.

The pixel isolation structure 150 penetrates the substrate 110 and physically moves one pixel PX from an adjacent pixel PX, for example, a first pixel PX1 from a second pixel PX2 and can be electrically isolated. The pixel isolation structure 150 may extend from the first surface 110F1 to the second surface 110F2 of the substrate 110 .

In some embodiments, the pixel isolation structure 150 may include a conductive layer 152 and an insulating liner 154 . Each of the conductive layer 152 and the insulating liner 154 may penetrate the substrate 110 from the first surface 110F1 to the second surface 110F2 of the substrate 110 . The insulating liner 154 may be disposed between the substrate 110 and the conductive layer 152 to electrically separate the conductive layer 152 from the substrate 110 .

In some embodiments, the conductive layer 152 may include a conductive material such as polysilicon or metal. The insulating liner 154 may include a metal oxide such as hafnium oxide, aluminum oxide, tantalum oxide, etc., in which case, the insulating liner 154 may act as a negative fixed charge layer. In some embodiments, the insulating liner 154 may include an insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.

A front side structure 130 may be disposed on the first surface 110F1 of the substrate 110 . The front structure 130 may include a wiring layer 134 and an insulating layer 136 . The insulating layer 136 may electrically separate the wiring layer 134 on the first surface 110F1 of the substrate 110 .

The wiring layer 134 may be electrically connected to a transistor on the first surface 110F1 of the substrate 110 . The wiring layer 134 may include tungsten, aluminum, copper, tungsten silicide, titanium silicide, tungsten nitride, titanium nitride, doped polysilicon, or the like. The insulating layer 136 may include an insulating material such as silicon oxide, silicon nitride, silicon oxynitride, or a low-k material.

The low-k material includes, for example, Flowable Oxide (FOX), Torene SilaZene (TOSZ), Undoped Silica Glass (USG), Borosilica Glass (BSG), PhosphoSilica Glass (PSG), BoroPhosphoSilica Glass (BPSG), Plasma Enhanced Tetra (PETEOS). Ethyl Ortho Silicate), FSG(Fluoride Silicate Glass), CDO(Carbon Doped silicon Oxide), Xerogel, Aerogel, Amorphous Fluorinated Carbon, OSG(Organo Silicate Glass), Parylene, BCB(bis-benzocyclobutenes), SiLK, polyimide, porous polymeric It may include at least one of material and combinations thereof, but is not limited thereto. Optionally, the support substrate 140 may be disposed on the front structure 130 .

An adhesive member (not shown) may be further disposed between the support substrate 140 and the front structure 130 . The support substrate 140 may correspond to the second substrate 7 of FIG. 1 . The support substrate 140 may include a logic circuit for driving a pixel circuit, and may be a support substrate that supports the substrate 110 .

The backside anti-reflection layer 162 may be disposed on the second surface 110F2 of the substrate 110 . The back anti-reflection layer 162 may be disposed on all the pixels PX and the pixel isolation structure 150 . In some embodiments, the back anti-reflective layer 162 may include hafnium oxide. In some embodiments, the additional backside anti-reflective layer 164 may include silicon oxide.

In some embodiments, the back anti-reflective layer 162 is silicon nitride (SiN), aluminum oxide (Al ₂ O ₃ ), zirconium oxide (ZrO ₂ ), tantalum oxide (Ta ₂ O ₅ ), titanium oxide (TiO ₂ ), Lanthanum oxide (La ₂ O ₃ ), praseodymium oxide (Pr ₂ O ₃ ), cerium oxide (CeO ₂ ), neodymium oxide (Nd ₂ O ₃ ), promethium oxide (Pm ₂ O ₃ ), samarium oxide (Sm ₂ O ₃ ) ), europium oxide (Eu ₂ O ₃ ), gadolinium oxide (Gd ₂ O ₃ ), terbium oxide (Tb ₂ O ₃ ), dysprosium oxide (Dy ₂ O ₃ ), holmium oxide (Ho ₂ O ₃ ), thulium oxide ( Tm ₂ O ₃ ), ytterbium oxide (Yb ₂ O ₃ ), lutetium oxide (Lu ₂ O ₃ ), or yttrium oxide (Y ₂ O ₃ ) may be included. In some embodiments, the thickness of the back anti-reflective layer 162 may be about 50 nm to about 200 nm.

The fence 163 may be disposed on the back anti-reflection layer 162 . The fence 163 may be referred to as a grid. The fence 163 may overlap the pixel isolation structure 150 in a plan view as described above. In some embodiments, the height of the fence 163 may be between about 300 nm and about 500 nm. In some embodiments, the fence 163 may include a buried air gap AG, a first fence layer 163a , a fence capping layer 163b , and a second fence layer 163c .

In some embodiments, the first fence layer 163a and the second fence layer 163c constituting the fence 163 may include a low refractive index material. In some embodiments, the fence capping layer 163b may include a material having a higher refractive index than that of the first fence layer 163a and the second fence layer 163c. The fence capping layer 163b may be formed of silicon oxide. In some embodiments, the refractive index of the fence capping layer 163b may be 1.45 to 1.55.

In some embodiments, the low refractive index material constituting the first fence layer 163a and the second fence layer 163c may have a refractive index greater than about 1.0 and less than or equal to about 1.4. In some embodiments, the low refractive index material may include polymethylmetacrylate (PMMA), silicon acrylate, cellulose acetate butyrate (CAB), silica, or fluoro-silicon acrylate (FSA). For example, the low refractive index material may include a polymer material in which silica (SiOx) particles are dispersed.

When the fence 163 includes a low-refractive-index material having a relatively low refractive index, light incident toward the fence 163 may be totally reflected and directed toward the center of the pixel PX. The fence 163 may prevent light incident obliquely into the color filter 170 disposed on one pixel PX from entering the color filter 170 disposed on the adjacent pixel PX, , crosstalk between the plurality of pixels PX may be prevented.

The buried air gap AG constituting the fence 163 may have a low refractive index, for example, about 1.0. The buried air gap AG may be referred to as a buried void. When the fence 163 includes the buried air gap AG having a relatively low refractive index, light incident toward the buried air gap AG is totally reflected and directed toward the center of the pixel PX. can The buried air gap AG has an inclination angle into the color filter 170 disposed on one pixel PX and prevents incident light from entering the color filter 170 disposed on the adjacent pixel PX. Accordingly, crosstalk between the plurality of pixels PX may be prevented.

In some embodiments, the fence 163 may include a penetrating portion PT that is connected to the first fence layer 163a and penetrates a portion of the rear anti-reflection layer 162 . The through portion PT may be made of the same material as the first fence layer 163a. When the fence 163 includes the penetrating portion PT having a low refractive index, light incident toward the penetrating portion PT may be totally reflected and directed toward the center of the pixel PX. The penetrating portion PT has an inclination angle into the color filter 170 disposed on one pixel PX and prevents incident light from entering the color filter 170 disposed on the adjacent pixel PX. Accordingly, crosstalk between the plurality of pixels PX may be prevented.

In some embodiments, an additional backside antireflective layer 164 may be disposed on the backside antireflective layer 162 and the fence 163 . The additional anti-reflection layer 164 may cover the anti-reflection layer 162 and the fence 163 . Specifically, the additional rear anti-reflection layer 164 may be disposed on the upper surface of the rear anti-reflection layer 162 , the side surface of the fence 163 , and the upper surface of the fence 163 .

In some embodiments, the additional backside anti-reflective layer 164 may include silicon oxide. In some embodiments, the additional backside anti-reflective layer 164 is silicon nitride (SiN), hafnium oxide (HfO ₂ ), aluminum oxide (Al ₂ O ₃ ), zirconium oxide (ZrO ₂ ), tantalum oxide (Ta ₂ O ₅ ) , titanium oxide (TiO ₂ ), lanthanum oxide (La ₂ O ₃ ), praseodymium oxide (Pr ₂ O ₃ ), cerium oxide (CeO ₂ ), neodymium oxide (Nd ₂ O ₃ ), promethium oxide (Pm ₂ O ₃ ) , samarium oxide (Sm ₂ O ₃ ), europium oxide (Eu ₂ O ₃ ), gadolinium oxide (Gd ₂ O ₃ ), terbium oxide (Tb ₂ O ₃ ), dysprosium oxide (Dy ₂ O ₃ ), holmium oxide (Ho ₂ O ₃ ), thulium oxide (Tm ₂ O ₃ ), ytterbium oxide (Yb ₂ O ₃ ), lutetium oxide (Lu ₂ O ₃ ), or yttrium oxide (Y ₂ O ₃ ) may be included.

A passivation layer 165 may be disposed on the additional backside anti-reflective layer 164 . The passivation layer 165 may protect the additional back anti-reflective layer 164 , the back anti-reflective layer 162 , and the fence 163 . In some embodiments, the passivation layer 165 may include aluminum oxide. In some embodiments, the thickness of the passivation layer 165 may be between about 5 nm and about 20 nm.

The plurality of color filters 170 may be disposed on the passivation layer 165 and may be separated from each other by a fence 163 . In some embodiments, the plurality of color filters 170 may be a combination of a green filter, a blue filter, and a red filter. In some embodiments, the plurality of color filters 170 may be a combination of cyan, magenta, or yellow.

The microlens 180 may be disposed on the color filter 170 and the passivation layer 165 . The microlens 180 may be disposed to correspond to the pixel PX. The microlens 180 may be transparent. In some embodiments, the microlens 180 may have a transmittance of 90% or more with respect to light in a visible ray region. Light in the visible light region may have a wavelength of 380 nm to 770 nm.

In some embodiments, the microlens 180 may be formed of a resin-based material such as a styrene-based resin, an acrylic resin, a styrene-acrylic copolymer-based resin, or a siloxane-based resin. The microlens 180 may collect incident light, and the collected light may be incident on the photoelectric conversion region 120 through the color filter 170 . The capping layer 190 may be disposed on the microlens 180 .

FIG. 5 is an enlarged view of the EL region of FIG. 4 , and FIG. 6 is a view for explaining in detail the fence including the buried air gap of FIG. 5 .

Specifically, as shown in FIG. 5 , a back anti-reflection layer 162 may be formed on the substrate 110 and the pixel isolation structure 150 . The backside antireflection layer 162 may include a plurality of sub backside antireflection layers 162a , 162b , 162c , and 162d . In this embodiment, the rear anti-reflection layer 162 includes four, that is, the first to fourth sub-rear anti-reflection layers 162a, 162b, 162c, and 162d, but may include more or fewer than that. .

The sub-backside anti-reflection layers 162a, 162b, 162c, and 162d may be formed of a combination of materials constituting the above-described back-side anti-reflection layer 162 . The sub-backside anti-reflection layers 162a, 162b, 162c, and 162d may be formed of a plurality of material layers having different thicknesses.

In some embodiments, the first sub backside antireflection layer 162a is made of aluminum oxide (Al ₂ O ₃ ), and the second sub backside antireflection layer 162b and the fourth sub backside antireflection layer 162d are made of hafnium oxide. and the third sub-backside anti-reflection layer 162c may be made of silicon oxide.

A fence 163 may be positioned on the back anti-reflection layer 162 to correspond to or align with the pixel isolation structure 150 in a direction perpendicular to the substrate 110 . The fence 163 may include a plurality of fence layers 163a, 163b, and 163c. In some embodiments, the fence 163 may include a first fence layer 163a, a fence capping layer 163b, and a second fence layer 163c. The fence 163 may include a buried air gap AG formed in the first fence layer 163a.

The first fence layer 163a and the second fence layer 163c may include a low refractive index material. Since the low-refractive-index material has been previously described, a description thereof will be omitted. The fence capping layer 163b may be made of a material having a higher refractive index than that of the first fence layer 163a and the second fence layer 163c, for example, silicon oxide. The buried air gap AG may be formed in the first fence layer 163a.

In some embodiments, the fence 163 is connected to the first fence layer 163a through a through hole OP1 formed in the through hole OP1 passing through at least one of the sub-rear anti-reflection layers 162a, 162b, 162c, and 162d. PT) may be included. In the present embodiment, the penetrating portion PT is illustrated as penetrating the third and fourth sub-rear anti-reflection layers 162c and 162d, but the penetrating portion PT includes the sub-rear anti-reflection layers ( 162a, 162b, 162c, 162d) may pass through.

Here, the fence 163 including the buried air gap AG will be described in more detail with reference to FIG. 6 .

In some embodiments, the penetrating portion PT in the horizontal direction (ie, X direction) parallel to the surface of the back anti-reflection layer 162 has the width X1a of the lower portion on the rear anti-reflection layer 162 equal to the width of the upper portion ( may be smaller than X1b). The through portion PT may have a first thickness TH1 in the vertical direction (ie, the Z direction) perpendicular to the surface of the rear antireflection layer 162 . In some embodiments, the first thickness TH1 may be several hundred nm thick.

The width X4 of the second fence layer 163c in the horizontal direction (ie, the X direction) horizontal to the surface of the back anti-reflection layer 162 may be smaller than the widths X3 and X2 of the first fence layer 163a. . The width X3 of the middle portion of the first fence layer 163a on the rear antireflection layer 162 in the horizontal direction (ie, X direction) horizontal to the surface of the rear antireflection layer 162 is greater than the width X2 of the lower portion. can be small In some embodiments, the widths X2, X3, X4 may be tens of nm.

In some embodiments, the first fence layer 163a may have a second thickness TH2 that is greater than the first thickness TH1 in a vertical direction (ie, the Z direction) perpendicular to the surface of the rear antireflection layer 162 . In some embodiments, the second thickness TH2 may be several hundred nm.

The fence capping layer 163b may have a third thickness TH3 smaller than the first thickness TH1 and the second thickness TH2 in the vertical direction (ie, the Z direction) perpendicular to the surface of the rear antireflection layer 162 . . In some embodiments, the third thickness TH3 may be several nm.

In the vertical direction (ie, Z direction) perpendicular to the surface of the back anti-reflection layer 162 , the second fence layer 163c has a fourth thickness TH4 smaller than the second thickness TH2 and greater than the third thickness TH3 . can be In some embodiments, the fourth thickness TH4 may be several hundred nm.

In some embodiments, the buried air gap AG has a height Z1 in a vertical direction (ie, Z direction) perpendicular to the surface of the rear anti-reflection layer 162 in a horizontal direction parallel to the surface of the rear anti-reflection layer 162 . It may be greater than the widths X5, X6, X7. The height Z1 may be several hundreds of nm, and the widths X5, X6, and X7 may be several tens of nm.

In some embodiments, the buried air gap AG may have a bow-shaped profile PRF in the vertical direction (Z direction) perpendicular to the surface of the back anti-reflection layer 162 . In some embodiments, the buried air gap AG includes a lower portion AG1 , a middle portion AG2 , and an upper portion AG3 in a longitudinal direction (ie, Z direction) perpendicular to the surface of the back anti-reflection layer 162 . can do. In the buried air gap AG, the width X6 of the middle portion AG2 in the horizontal direction (ie, the X direction) horizontal to the surface of the rear antireflection layer 162 is that of the upper portion AG3 and the lower portion AG1 . It may be greater than the widths X5 and X7.

7 is a plan view illustrating a fence having a buried air gap of an image sensor according to an embodiment of the inventive concept.

Specifically, the fence 163 - 1 of the image sensor 100 - 1 may correspond to the fence 163 of the image sensor 100 of FIGS. 3 to 6 . The image sensor 100 - 1 may include a plurality of pixels PX, for example, a first pixel PX1 , a second pixel PX2 , a third pixel PX3 , and a fourth pixel PX4 . The plurality of pixels PX may be two-dimensionally arranged and spaced apart from each other. Since the arrangement of the plurality of pixels PX has been described with reference to FIG. 3 , it is omitted herein.

The fence 163 - 1 may be connected while completely surrounding the pixel PX. For example, the fence 163 - 1 is a first connection line fence portion 163 - 1a and a second connection line fence portion 163 - 1b that are disposed to extend entirely to the left and right sides of the fourth pixel PX4 , respectively. ) may be included.

In addition, the fence 163 - 1 connects the third connection line fence part 163 - 1c and the fourth connection line fence part 163 - 1d which are respectively extended to the upper and lower sides of the fourth pixel PX4 , respectively. may include The first connection line fence part 163-1a, the second connection line fence part 163-1b, the third connection line fence part 163-1c, and the fourth connection line fence part 163-1d are to be connected to each other. can

The fence 163 - 1 may include buried air gaps AGa, AGb, AGc, and AGd. The buried air gaps AGa, AGb, AGc, and AGd may be a connection-type pattern disposed to completely surround the perimeter of the plurality of pixels PX in the fence 163 - 1 . The buried air gaps AGa, AGb, AGc, and AGd may correspond to the buried air gaps AG of FIGS. 4 to 6 . The buried air gaps AGa, AGb, AGc, and AGd are respectively a first connection line fence part 163-1a, a second connection line fence part 163-1b, a third connection line fence part 163-1c and It may be formed in the fourth connection line fence portion 163 - 1d. In FIG. 7 , the buried air gaps AGa, AGb, AGc, and AGd are illustrated as being connected to each other, but they may be located apart from each other if necessary.

As described above, the fence 163-1 configured in this way reduces light interference between the pixels PX, for example, between the first to fourth pixels PX1, PX2, PX3, and PX4 to improve crosstalk. can

8 is a plan view illustrating a fence having a buried air gap of an image sensor according to an embodiment of the inventive concept.

Specifically, the image sensor 100-2 has buried air gaps AGa-1, AGb-1, AGc-1, and AGd-1 in the fence 163-2 compared to the image sensor 100-1 of FIG. 7 . ) are the same except for the different arrangement or shape. In FIG. 8 , the same content as in FIG. 7 will be briefly described or omitted.

The image sensor 100 - 2 may include a plurality of pixels PX, for example, a first pixel PX1 , a second pixel PX2 , a third pixel PX3 , and a fourth pixel PX4 . The image sensor 100 - 2 includes a buried air gap AGa- disposed around each of the first pixel PX1 , the second pixel PX2 , the third pixel PX3 , and the fourth pixel PX4 to be spaced apart from each other. 1, AGb-1, AGc-1, AGd-1). The buried air gaps AGa-1 , AGb-1 , AGc-1 , and AGd-1 may be a separate pattern that partially surrounds the perimeter of the plurality of pixels PX in a plan view within the fence 163 - 2 .

The buried air gaps AGa-1, AGb-1, AGc-1, and AGd-1 are respectively a first connection line fence portion 163-1a, a second connection line fence portion 163-1b, and a third connection line It may be formed in the fence part 163-1c and the fourth connection line fence part 163-1d.

As described above, the fence 163 - 2 configured in this way reduces light interference between the pixels PX, for example, between the first to fourth pixels PX1 , PX2 , PX3 , and PX4 to improve crosstalk. can

9 is a plan view illustrating a fence having a buried air gap of an image sensor according to an embodiment of the inventive concept.

Specifically, the image sensor 100 - 3 has buried air gaps AGa - 2 and AGb - in the fence 163 - 3 as compared to the image sensors 100 - 1 and 100 - 2 of FIGS. 7 and 8 . 2, AGc-2, AGd-2) are the same except for the configuration or shape of the different. In FIG. 9 , the same content as in FIGS. 7 and 8 will be briefly described or omitted.

The image sensor 100 - 3 may include a plurality of pixels PX, for example, a first pixel PX1 , a second pixel PX2 , a third pixel PX3 , and a fourth pixel PX4 . The image sensor 100 - 3 is a buried air gap AGa- disposed around each of the first pixel PX1 , the second pixel PX2 , the third pixel PX3 , and the fourth pixel PX4 to be spaced apart from each other. 2, AGb-2, AGc-2, AGd-2).

The buried air gaps AGa-2, AGb-2, AGc-2, and AGd-2 have a first connection line fence portion 163-1a, a second connection line fence portion 163-1b, and a third connection line, respectively. It may be formed in the fence part 163-1c and the fourth connection line fence part 163-1d. The buried air gaps AGa - 2 , AGb - 2 , AGc - 2 , and AGd - 2 may be a mixed pattern that completely or partially surrounds the perimeter of the plurality of pixels PX in a planar manner within the fence 163 - 3 . .

Here, the buried air gaps AGc-2 and AGd-2 may be disposed to extend in the X direction from the third connection line fence part 163-1c and the fourth connection line fence part 163-1d. The buried air gaps AGc - 2 and AGd - 2 extend in the X direction and are disposed between the first pixel PX1 and the third pixel PX3 and between the second pixel PX2 and the fourth pixel PX4 . can be

As described above, the fence 163 - 3 configured as described above reduces light interference between the pixels PX, for example, between the first to fourth pixels PX1 , PX2 , PX3 and PX4 to improve crosstalk. can

10 is a plan view for explaining a fence having a buried air gap of a sensor of an image sensor according to an embodiment of the technical concept of the present invention.

Specifically, the image sensor 100 - 4 has buried air gaps AGa - 3 and AGb - 3 of the fence 163 - 4 when compared to the image sensors 100 - 1 and 100 - 2 of FIGS. 7 and 8 . , AGc-3, AGd-3) are the same except for the different arrangement or shape. In FIG. 10 , the same content as in FIGS. 7 and 8 will be briefly described or omitted.

The image sensor 100 - 4 may include a plurality of pixels PX, for example, a first pixel PX1 , a second pixel PX2 , a third pixel PX3 , and a fourth pixel PX4 . The image sensor 100 - 4 is a buried air gap AGa- disposed around each of the first pixel PX1 , the second pixel PX2 , the third pixel PX3 , and the fourth pixel PX4 to be spaced apart from each other. 3, AGb-3, AGc-3, AGd-3).

The buried air gaps AGa-3, AGb-3, AGc-3, and AGd-3 have a first connection line fence portion 163-1a, a second connection line fence portion 163-1b, and a third connection line, respectively. It may be formed in the fence part 163-1c and the fourth connection line fence part 163-1d. The buried air gaps AGa-3, AGb-3, AGc-3, and AGd-3 are the fence 163-4. ) may be a mixed pattern that completely or partially surrounds the perimeter of the plurality of pixels PX in a planar manner.

Here, the buried air gaps AGa-3 and AGc-3 may be disposed to extend in the Y direction from the first connection line fence part 163-1a and the second connection line fence part 163-1b. The buried air gaps AGa - 3 and AGc - 3 extend in the Y direction and are disposed between the first pixel PX1 and the second pixel PX2 and between the third pixel PX3 and the fourth pixel PX4 . can be

As described above, the fence 163-4 configured in this way reduces light interference between the pixels PX, for example, between the first to fourth pixels PX1, PX2, PX3, and PX4 to improve crosstalk. can

11 is a plan view illustrating a fence having a buried air gap of a sensor of an image sensor according to an embodiment of the inventive concept;

Specifically, the image sensor 100-5 has buried air gaps AGa-4, AGb-4, AGc-4, AGd-4 of the fence 163-5 compared to the image sensor 100-1 of FIG. 7 . ) are the same except for the different arrangement or shape. In FIG. 11 , the same content as in FIG. 7 will be briefly described or omitted.

The image sensor 100 - 5 may include a plurality of pixels PX, for example, a first pixel PX1 , a second pixel PX2 , a third pixel PX3 , and a fourth pixel PX4 . The image sensor 100 - 4 is a buried air gap AGa- disposed around each of the first pixel PX1 , the second pixel PX2 , the third pixel PX3 , and the fourth pixel PX4 to be spaced apart from each other. 4, AGb-4, AGc-4, AGd-4).

The buried air gaps AGa-4, AGb-4, AGc-4, and AGd-4 have a first connection line fence portion 163-1a, a second connection line fence portion 163-1b, and a third connection line, respectively. It may be formed in the fence part 163-1c and the fourth connection line fence part 163-1d.

Here, the buried air gaps AGa-4, AGb-4, AGc-4, and AGd-4 may have a dot shape surrounding the pixel PX. The buried air gaps AGa-4, AGb-4, AGc-4, and AGd-4 may be a plurality of dots (dot patterns) spaced apart from each other.

As described above, the fence 163 - 2 configured in this way reduces light interference between the pixels PX, for example, between the first to fourth pixels PX1 , PX2 , PX3 , and PX4 to improve crosstalk. can

12 is a plan view of a pixel of an image sensor according to an exemplary embodiment of the inventive concept.

Specifically, the image sensor 100 - 6 is the same as the image sensor 100 of FIGS. 3 to 6 except that it includes two photoelectric conversion elements PD1 and PD2 in the pixel PXa. . In FIG. 12 , the same contents as those of FIGS. 3 to 6 will be briefly described or omitted.

The image sensor 100 - 6 may include a pixel PXa. The pixel PXa may correspond to the pixel PX of FIG. 3 . The pixel PXa may include a first photoelectric conversion element PD1 and a second photoelectric conversion element PD2 .

A color filter 170 of FIG. 4 may be disposed under the microlens 180 , and first and second photoelectric conversion elements PD1 and PD2 may be disposed under the color filter CF. The first and second photoelectric conversion elements PD1 and PD2 may be formed on a substrate 110 (refer to FIG. 4 ). In the present embodiment, the first photoelectric conversion element PD1 and the second photoelectric conversion element PD2 may be disposed side by side under the microlens ML. As described above, the pixel PXa of the image sensor 100 - 6 includes two photoelectric conversion elements PD1 and PD2 and may be used as a focus pixel.

13 is a plan view of a pixel of an image sensor according to an exemplary embodiment of the inventive concept.

Specifically, the image sensor 100 - 7 includes four photoelectric conversion elements PD1 , PD2 , PD4 , and PD4 in the pixel PXb as compared to the image sensor 100 of FIGS. 3 to 6 , except that and the same In FIG. 13 , the same contents as those of FIGS. 3 to 6 will be briefly described or omitted.

The image sensor 100 - 7 may include a pixel PXb. The pixel PXb may correspond to the pixel PX of FIG. 3 . The pixel PXb is a first photoelectric conversion element PD1. It may include a second photoelectric conversion element PD2 , a third photoelectric conversion element PD3 , and a fourth photoelectric conversion element PD4 .

A color filter ( 170 of FIG. 4 ) may be disposed under the microlens 180 , and first to fourth photoelectric conversion elements PD1 , PD2 , PD3 , and PD4 may be disposed under the color filter CF. The first to second photoelectric conversion elements PD1 , PD2 , PD3 , and PD4 may be formed on a substrate 110 of FIG. 4 . In the present embodiment, the first to fourth photoelectric conversion elements PD1 , PD2 , PD3 , and PD4 may be arranged side by side under the microlens ML. As described above, the pixel PXb of the image sensor 100 - 6 includes two photoelectric conversion elements PD1 and PD2 and may be used as a focus pixel.

14A to 14D are cross-sectional views illustrating a method of manufacturing a fence constituting the image sensor of FIGS. 3 to 6 .

Referring to FIG. 14A , a backside anti-reflection material layer 162 ′ is formed on the second surface 110F2 of the substrate 110 including the pixel isolation structure 150 . The backside antireflection material layer 162' may include a plurality of sub backside antireflection material layers 162a', 162b', 162c', and 162d'. The sub-backside anti-reflection material layers 162a', 162b', 162c', and 162d' may include first to fourth sub-backside anti-reflection material layers 162a', 162b', 162c', and 162d'. have.

A first fence material layer 163a ′ and a fence capping material layer 163b ′ are formed on the rear antireflection material layer 162 ′. The first fence material layer 163a' may be formed of a low refractive index material. The fence capping material layer 163b ′ may be a material layer different from that of the first fence material layer 163a ′. The fence capping material layer 163b' is formed to have a smaller thickness than the first fence material layer 163a'.

Referring to FIG. 14B , the third to fourth sub-back reflections which are a part of the fence capping material layer 163b ′, the first fence material layer 163a ′, and the rear anti-reflection material layer 162 ′ using a photolithography process. The prevention material layers 162c' and 162d' are patterned. In the preceding patterning process, the fence capping material layer 163b ′ may be an etch stop layer that prevents the first fence material layer 163a ′ from being excessively etched.

The capping material layer 163b ′ is formed in the first process of forming the first fence material pattern 163ap , for example, in the etching of the first fence material layer 163a ′, ashing of the mask pattern (not shown), and the stripping process. The fence material layer 163a ′ may be a material layer for shrinking the second through-hole ( OP2 of FIG. 14B ) to have a vertical profile of a bowing shape. When the second through hole (OP2 in FIG. 14B) has an arcuate vertical profile, the air gap (AG in FIG. 14C) in the second through hole (OP2 in FIG. 14B) has an optimized size, that is, the maximum size. can

Accordingly, the third to fourth sub backside antireflection patterns 162cp and 162dp, the first fence material pattern 163ap, and the fence capping material pattern 163bp on the second sub backside antireflection material layers 162b ′. ) to form In addition, a first through hole OP1 is formed between the third to fourth sub-backside anti-reflection patterns 162cp and 162dp, and between the first fence material patterns 163ap and the fence capping material patterns 163bp. A second through hole OP2 may be formed in the . The first through hole OP1 and the second through hole OP2 may communicate with each other.

An upper portion of the second through hole OP2 may have a width X8 on the rear antireflection material layer 162 ′. A middle portion of the second through hole OP2 may have a width X9 on the rear antireflection material layer 162 ′. The width X9 of the middle portion of the second through hole OP2 may be greater than the width X9 of the upper portion of the second through hole OP2 .

A lower portion of the second through hole OP2 and an upper portion of the first through hole OP1 may have a width X1b on the rear antireflection material layer 162 ′. A width X1b of a lower portion of the second through hole OP2 may be smaller than a width X9 of a middle portion of the second through hole OP2.

A lower portion of the first through hole OP1 may have a width X1a on the rear antireflection material layer 162 ′. The width X1b of the upper portion of the first through hole OP1 may be greater than the width X1a of the lower portion of the first through hole OP1 .

Referring to FIG. 14C , a second fence material layer 163c ′ filling a portion of the second through hole OP2 and the first through hole OP1 is formed on the fence capping material pattern 163bp. The second fence material layer 163 ′ may be formed of a material having poor step coverage. The second fence material layer 163c ′ may be formed of a low refractive index material. When the step coverage of the second fence material layer 163c ′ is not good, an air gap AG may be formed in the first fence material pattern 163ap.

Referring to FIG. 14D , the second fence material layer 163c ′, the fence capping material pattern 163bp and the first fence material pattern 163ap are patterned using a photolithography process. Accordingly, the second fence layer 163c, the fence capping layer 163b, the first fence layer 163a, and the fence 163 including the air gap AG positioned in the first fence layer 163a are formed. do.

Finally, in FIG. 14D , the first and second sub backside antireflection material layers 162a ′ and 162b′ of FIG. 14C may be referred to as first and second sub backside antireflection layers 162a and 162b . The third to fourth sub-backside anti-reflection patterns 162cp and 162dp of FIG. 14C may be referred to as third and third sub-backside anti-reflection layers 162a and 162b. The back anti-reflection material layer 162 ′ may be referred to as a back anti-reflection layer 162 .

15 is a cross-sectional view of an image sensor according to an exemplary embodiment of the inventive concept.

Specifically, as compared with the image sensor 100 of FIGS. 3 to 6 , in the image sensor 100a , the fence 163-6 includes a penetrating portion (PT in FIG. 4 ) and a fence capping layer (163b in FIG. 4 ). It can be the same except that it doesn't. In FIG. 15 , the same contents as those of FIGS. 3 to 6 will be briefly described or omitted.

In the image sensor 100a, a fence 163 - 6 may be formed on the rear anti-reflection layer 162 . The fence 163 - 6 may include a buried air gap AG, a first fence layer 163a and a second fence layer 163c. The first fence layer 163a and the second fence layer 163c may be formed of the same material. The first fence layer 163a and the second fence layer 163c may be formed of a low refractive index material. An additional backside antireflection layer 164 and a passivation layer 165 may be disposed on the backside antireflection layer 162 and the fence 163 - 6 .

Color filters 170 separated from each other by fences 163 - 6 may be formed on the passivation layer 165 . The microlens 180 and the capping layer 190 may be formed on the color filter 170 and the passivation layer 165 . The image sensor 100a configured as described above can reduce crosstalk between pixels by simplifying the configuration of the fence 163 - 6 .

16 is a cross-sectional view of an image sensor according to an exemplary embodiment of the inventive concept.

Specifically, the image sensor 100b may be the same as the image sensor 100 of FIGS. 3 to 6 , except that it includes a pixel isolation structure 150a and a transmission gate TGa. In FIG. 16 , the same content as in FIGS. 3 to 6 will be briefly described or omitted.

The image sensor 100b may include the pixel separation structure 150a instead of the pixel separation structure 150 in FIG. 4 . The pixel isolation structure 150a may not completely penetrate the substrate 110 . The pixel isolation structure 150a extends into the substrate 110 from the second surface 110F2 of the substrate 110 , but may not reach the first surface 110F1 of the substrate 110 .

In addition, the image sensor 100b may include a transfer gate TGa instead of a transfer gate (TG in FIG. 4 ). The transfer gate TGa is formed on the first surface 110F1 of the substrate 110 and may not be recessed into the substrate 110 . The image sensor 100b configured as described above may reduce crosstalk between pixels while diversifying the configuration of the pixel isolation structure 150a and the transmission gate TGa.

17 is a cross-sectional view of an image sensor according to an exemplary embodiment of the inventive concept.

Specifically, the image sensor 100c has a buried-type air gap AG-1 that is further formed in the through portion PT as compared to the image sensor 100 of FIGS. 3 to 6 and is a buried type on the rear antireflection layer 162 . It may be the same except that the barrier metal layer 163d is further formed on both sides of the air gap AG-1. In Fig. 17, the same or similar reference numerals as in Figs. 3 to 6 denote the same or similar reference numerals. In FIG. 17 , the same or similar contents to those of FIGS. 3 to 6 will be briefly described or omitted.

In the image sensor 100c , a fence 163 - 7 may be formed on the rear anti-reflection layer 162 . The fence 163 - 7 may include a buried air gap AG - 1 , a first fence layer 163a - 1 , a second fence layer 163c - 1 , and a barrier metal layer 163d.

The buried air gap AG - 1 may be disposed both inside the fence 163 - 7 positioned on the rear antireflection layer 162 and inside the through portion PT. The buried air gap AG-1 may be disposed inside the first fence layer 163a-1 and the second fence layer 163c-1. In particular, the buried air gap AG-1 may be disposed inside the second fence layer 163c-1. When the buried air gap AG - 1 is disposed in the through portion PT, the ratio of the buried air gap occupied by the fence 163 - 7 may be increased to further reduce crosstalk between pixels.

The first fence layer 163a - 1 may have an upwardly inclined surface on the through portion PT. The second fence layer 163c - 1 may constitute the through portion PT. The second fence layer 163c-1 may be formed on the first fence layer 163a-1. The first fence layer 163a-1 and the second fence layer 163c-1 may be formed of the same material. The first fence layer 163a-1 and the second fence layer 163c-1 may be formed of a low refractive index material.

The barrier metal layer 163d may be disposed on both sides of the buried air gap AG-1 on the rear antireflection layer 162 . The barrier metal layer 163d may be formed of a metal material, for example, TiN. The barrier metal layer 163d may be disposed on both sides of the through portion PT. The barrier metal layer 163d may be positioned at a lower portion of the fence 163 - 7 , that is, under the first fence layer 163a - 1 . When the barrier metal layer 163d is disposed, an electrostatic defect such as a bruising defect of the image sensor 100c may be reduced.

An additional backside antireflection layer 164 and a passivation layer 165 may be disposed on the backside antireflection layer 162 and the fence 163 - 7 . Color filters 170 separated from each other by fences 163 - 7 may be formed on the passivation layer 165 . The microlens 180 and the capping layer 190 may be formed on the color filter 170 and the passivation layer 165 .

The image sensor 100c configured in this way forms the fence 163 - 7 also in the through portion PT, and includes a barrier metal layer 163d to prevent crosstalk and electrostatic defects (eg, bruises) between pixels. ) can all be reduced.

FIG. 18 is an enlarged view of the EL region of FIG. 17 , and FIG. 19 is a view for explaining in detail the fence including the buried air gap of FIG. 18 .

Specifically, in FIGS. 18 and 19 , the same or similar reference numerals as those of FIGS. 5 and 6 denote the same or similar members. 18 and 19 , the same or similar contents to those of FIGS. 5 and 6 will be briefly described or omitted.

As shown in FIG. 18 , a back anti-reflection layer 162 may be formed on the substrate 110 and the pixel isolation structure 150 . The backside antireflection layer 162 may include a plurality of sub backside antireflection layers 162a , 162b , 162c , and 162d . The sub-backside anti-reflection layers 162a , 162b , 162c , and 162d have been described above with reference to FIGS. 5 and 6 , and thus a description thereof will be omitted.

A fence 163 - 7 may be positioned on the back antireflection layer 162 to be equal to the pixel isolation structure 150 in a direction perpendicular to the substrate 110 . The fence 163 - 7 may include a plurality of fence layers 163a - 1 and 163c - 1 and a barrier metal layer 163d. If necessary, the fence 163-7 includes the barrier metal layer 163d, but the fence 163-7 may include only the fence layers 163a-1 and 163c-1. The fence 163 - 7 may include a buried air gap AG - 7 formed in the first fence layer 163a - 1 and the second fence layer 163c - 1 . The first fence layer 163a - 1 and the second fence layer 163c - 1 may include a low refractive index material. Since the low-refractive-index material has been previously described, a description thereof will be omitted.

The fence 163-7 is connected to the second fence layer 163c-1 and has a through-hole PT formed in the through-hole OP1 passing through at least one of the sub-rear anti-reflection layers 162a, 162b, 162c, and 162d. ) may be included. In the present embodiment, the penetrating portion PT is illustrated as penetrating the third and fourth sub-rear anti-reflection layers 162c and 162d, but the penetrating portion PT includes the sub-rear anti-reflection layers ( 162a, 162b, 162c, 162d) may pass through.

Here, the fence 163-7 including the buried air gap AG-1 will be described in more detail with reference to FIG. 19 .

Specifically, it may include a through portion PT formed in the through hole OP1 inside the rear antireflection layer 162 . The penetrating portion PT may have a first thickness TH1 in a vertical direction (ie, Z direction) perpendicular to the surface of the rear anti-reflection layer 162 . In some embodiments, the first thickness TH1 may be several hundred nm thick.

A barrier metal layer 163d may be formed on the rear anti-reflection layer 162 on both sides of the through portion PT. The barrier metal layer 163d may have a fifth thickness TH5 in the vertical direction (ie, the Z direction) perpendicular to the surface of the rear antireflection layer 162 . In some embodiments, the fifth thickness TH5 may be several hundred nm smaller than the first thickness TH1 .

A first fence layer 163a - 1 may be formed on the barrier metal layer 163d. The first fence layer 163a - 1 may have an upwardly inclined surface SL on the through portion PT. The first fence layer 163a - 1 may have a sixth thickness TH6 in the vertical direction (ie, the Z direction) perpendicular to the surface of the rear antireflection layer 162 . In some embodiments, the sixth thickness TH6 may be several hundred nm greater than the first thickness TH1 and the fifth thickness TH5 .

A second fence layer 163c - 1 may be formed above the first fence layer 163a - 1 and in the through hole OP1 . The second fence layer 163c - 1 may have a seventh thickness in the vertical direction (ie, the Z direction) perpendicular to the surface of the rear antireflection layer 162 . In some embodiments, the seventh thickness TH7 may be several hundred nm.

The buried air gap AG-1 may be disposed in both the inside of the through portion PT and the inside of the second fence layer 163c-1 positioned on the rear anti-reflection layer 162 . In the buried air gap AG-1, a height Z2 in a vertical direction (ie, Z direction) perpendicular to the surface of the rear anti-reflection layer 162 is a width X10 in a horizontal direction horizontal to the surface of the rear anti-reflection layer 162 . ) can be greater than The height Z1 may be several hundreds of nm, and the width X10 may be several tens of nm.

The buried air gap AG-1 may have a candle-shaped profile PRF2 in the vertical direction (Z direction) perpendicular to the surface of the back anti-reflection layer 162 . The buried air gap AG - 1 may include the recess portion REC recessed in the inner direction, that is, in the X direction and the -X direction near the through hole OP1 .

As described later, the buried air gap AG-1 having a candle-shaped profile is formed with a fourth sub-backside anti-reflection layer 162d and a barrier metal layer 163d, a first fence layer 163a-1 and The first fence layer 163a - 1 and the third sub backside anti-reflection layer 162c are further etched according to the difference in the etch rate between the third sub backside antireflection layers 162c . In other words, the candle-shaped buried air gap AG-1 may be formed according to the shape of the inclined surface SL.

20A to 20D are cross-sectional views illustrating a method of manufacturing a fence constituting the image sensor of FIGS. 17 to 19 .

Specifically, in FIGS. 20A to 20D , the same or similar reference numerals as those of FIGS. 14A to 14D denote the same or similar members. In FIGS. 20A to 20D , the same or similar contents to those of FIGS. 14A to 14D will be briefly described or omitted.

Referring to FIG. 14A , a backside anti-reflection material layer 162 ′ is formed on the second surface 110F2 of the substrate 110 including the pixel isolation structure 150 . The backside antireflection material layer 162' may include a plurality of sub backside antireflection material layers 162a', 162b', 162c', and 162d'. The sub-backside anti-reflection material layers 162a', 162b', 162c', and 162d' may include first to fourth sub-backside anti-reflection material layers 162a', 162b', 162c', and 162d'. have.

A barrier metal material layer 163d' and a first fence material layer 163a' are formed on the rear antireflection material layer 162'. The barrier metal material layer 163d' may be formed of a metal material layer, for example, a TiN layer. The barrier metal material layer 163d ′ may be formed to have a smaller thickness than the first fence material layer 63a ′. The first fence material layer 163a' may be a material layer different from that of the barrier metal material layer 163d'. The first fence material layer 63a' may be formed of a low refractive index material.

Referring to FIG. 20B , the third to fourth sub-backside reflections which are a part of the first fence material layer 163a', the barrier metal material layer 163d', and the backside antireflection material layer 162' using a photolithography process. The prevention material layers 162c' and 162d' are patterned.

Accordingly, the third to fourth sub backside antireflection patterns 162cp and 162dp, the barrier metal material pattern 163dp, and the first fence material pattern ( 163ap) is formed. In addition, a first through hole OP1 is formed between the third to fourth sub backside anti-reflection patterns 162cp and 162dp in the X direction, and the barrier metal material patterns 163dp and the first fence material are formed in the X direction. A second through hole OP2 may be formed between the patterns 163ap. The first through hole OP1 and the second through hole OP2 may communicate with each other.

An upper portion of the second through hole OP2 may have a width X11 on the rear antireflection material layer 162 ′. A lower portion of the second through hole OP2 may have a width 12 on the rear antireflection material layer 162 ′. The width 12 of the lower portion of the second through hole OP2 may be smaller than the width X11 of the upper portion of the second through hole OP2 .

The first through hole OP1 may have a width X13 on the rear antireflection material layer 162 ′. A width X13 of the first through hole OP1 may be smaller than a width X12 of a lower portion of the second through hole OP2 .

Accordingly, the width of the second through hole OP2 and the first through hole OP1 may be widened in the vertical direction (Z direction) perpendicular to the surface of the rear antireflection layer 162 . In other words, the second through-hole OP2 and the first through-hole OP1 may have a negative inclined surface SL in the vertical direction (-Z direction) perpendicular to the surface of the rear anti-reflection layer 162 . can

In addition, when the second through-hole OP2 and the first through-hole OP1 are formed, a fourth sub-backside anti-reflection material layer (162d' in FIG. 20A) and a barrier metal material layer (163d' in FIG. 20A), According to the difference in the etch rate between the first fence material layer (163a' in FIG. 20A) and the third sub-backside anti-reflection material layer (162c' in FIG. 20A), the first fence material layer (163a' in FIG. 20A) and the third The sub-backside anti-reflection material layer ( 162c ′ in FIG. 20A ) may be further etched.

Accordingly, one side of the fourth sub-rear anti-reflection pattern 162dp and the barrier metal material pattern 163dp is greater than one side of the first fence material pattern 163ap and the third sub-rear anti-reflection pattern 162cp in the X direction. and protruding in the -X direction.

Referring to FIG. 20C , a second fence material layer 163c ′ filling the second through hole OP2 and the first through hole OP1 is formed on the first fence material pattern 163bp. The second fence material layer 163 ′ may be formed of a material having poor step coverage. The second fence material layer 163c ′ may be formed of a low refractive index material.

When the step coverage of the second fence material layer 163c ′ is not good, a buried air gap AG-1 may be formed in the first fence material pattern 163ap. The buried air gap AG-1 has a candle-shaped profile in the vertical direction (Z direction) perpendicular to the surface of the rear anti-reflection layer 162 according to the shape of the second through hole OP2 and the first through hole OP1 . (PRF2).

The buried air gap AG-1 having the candle-shaped profile PRF2 may include the recess portion REC recessed in the inward direction, that is, in the X direction and the -X direction near the through hole OP1. . One side of the fourth sub backside antireflection pattern 162dp and the barrier metal material pattern 163dp is greater than the one side of the first fence material pattern 163ap and the third sub backside antireflection pattern 162cp in the X direction and -X Since the second fence material layer 163c ′ is formed in a state protruding in the direction, the buried air gap AG-1 having a candle-shaped profile PRF2 may be formed.

Referring to FIG. 20D , the second fence material layer 163c ′, the first fence material pattern 163ap and the barrier metal material pattern 163dp are patterned using a photolithography process. Accordingly, the fence 163-7 including the second fence layer 163c-1, the first fence layer 163a-1, the buried air gap AG-1, and the barrier metal layer 163d is formed.

21A to 21D are cross-sectional views illustrating a method of manufacturing an image sensor according to an exemplary embodiment of the inventive concept.

Specifically, FIGS. 21A to 21D are provided to explain a method of manufacturing the image sensor 100 of FIGS. 3 to 6 . In FIGS. 21A to 21D , the same content as in FIGS. 3 to 6 will be briefly described or omitted.

Referring to FIG. 21A , a substrate 110 having a first surface 110F1 and a second surface 110F2 facing each other is prepared. A mask pattern (not shown) is formed on the first surface 110F1 of the substrate 110 , and a portion of the substrate 110 is removed from the first surface 110F1 of the substrate 110 using the mask pattern. A trench 150T may be formed.

Thereafter, the insulating liner 154 and the conductive layer 152 are sequentially formed in the trench 150T, and the insulating liner 154 and the conductive layer 152 are disposed on the first surface 110F1 of the substrate 110 . The pixel isolation structure 150 may be formed in the trench 150T by removing the portion by a planarization process or the like.

Thereafter, a photoelectric conversion region 120 including a photodiode region (not shown) and a well region (not shown) may be formed from the first surface 110F1 of the substrate 110 by an ion implantation process. For example, the photodiode region may be formed by doping an N-type impurity, and the well region may be formed by doping a P-type impurity.

Referring to FIG. 21B , a transfer gate TG extending from the first surface 110F1 of the substrate 110 to the inside of the substrate 110 is formed, and a partial region on the first surface 110F1 of the substrate 110 is formed. An ion implantation process may be performed thereto to form a floating diffusion region (not shown) and an active region (not shown). Accordingly, pixels PX1 and PX2 may be formed.

Next, the front structure 130 may be formed on the first surface 110F1 of the substrate 110 . Repeat steps of forming a conductive layer (not shown) on the first surface 110F1 of the substrate 110 , patterning the conductive layer, and forming an insulating layer (not shown) to cover the patterned conductive layer As a result, the wiring layer 134 and the insulating layer 136 may be formed on the substrate 110 . Thereafter, the support substrate 140 may be adhered on the insulating layer 136 .

Referring to FIG. 21C , the substrate 110 may be turned over so that the second surface 110F2 of the substrate 110 faces upward. Next, a portion of the substrate 110 may be removed from the second surface 110F2 of the substrate 110 by a planarization process such as a CMP process or an etch-back process until the conductive layer 152 is exposed. As the removal process is performed, the level of the second surface 110F2 of the substrate 110 may be lowered. In this case, one pixel PX surrounded by the pixel isolation structure 150 may be physically and electrically separated from the pixel PX adjacent thereto.

Referring to FIG. 21D , a rear anti-reflection layer 162 is formed on the second surface 110F2 of the substrate 110 . A fence 163 may be formed on the back anti-reflection layer 162 . As described above, the fence 163 may include a buried air gap AG, a first fence layer 163a, a fence capping layer 163b, and a second fence layer 163c.

Subsequently, an additional backside antireflection layer 164 and a passivation layer 165 are formed on the fence 163 and the backside antireflection layer 162 . Next, the color filters 170 separated from each other by the fences 163 - 6 are formed on the passivation layer 165 . Next, as shown in FIG. 4 , the image sensor 100 is manufactured by forming the microlens 180 and the capping layer 190 on the color filter 170 and the passivation layer 165 .

22A to 22C are cross-sectional views illustrating a method of manufacturing an image sensor according to an exemplary embodiment of the inventive concept.

Specifically, FIGS. 22A to 22C are provided to explain a method of manufacturing the image sensor 100b of FIG. 16 . In FIGS. 22A to 22C , the same content as in FIGS. 3 to 6 and FIG. 16 will be briefly described or omitted.

Referring to FIG. 22A , a photoelectric conversion region 120 including a photodiode region (not shown) and a well region (not shown) may be formed from the first surface 110F1 of the substrate 110 by an ion implantation process. have. For example, the photodiode region may be formed by doping an N-type impurity, and the well region may be formed by doping a P-type impurity.

A floating diffusion region (not shown) is formed by forming a transfer gate TGa on the first surface 110F1 of the substrate 110 , and performing an ion implantation process on a partial region on the first surface 110F1 of the substrate 110 . and an active region (not shown). Accordingly, pixels PX1 and PX2 may be formed.

Next, the front structure 130 may be formed on the first surface 110F1 of the substrate 110 . Repeat steps of forming a conductive layer (not shown) on the first surface 110F1 of the substrate 110 , patterning the conductive layer, and forming an insulating layer (not shown) to cover the patterned conductive layer As a result, the wiring layer 134 and the insulating layer 136 may be formed on the substrate 110 . Thereafter, the support substrate 140 may be adhered on the insulating layer 136 .

Referring to FIG. 22B , the substrate 110 may be turned over so that the second surface 110F2 of the substrate 110 faces upward. A mask pattern (not shown) is formed on the second surface 110F2 of the substrate 110 , and a portion of the substrate 110 is removed from the second surface 110F2 of the substrate 110 using the mask pattern. A trench 150Ta may be formed.

Thereafter, the insulating liner 154 and the conductive layer 152 are sequentially formed in the trench 150Ta, and the insulating liner 154 and the conductive layer 152 are disposed on the second surface 110F2 of the substrate 110 . The pixel isolation structure 150a may be formed in the trench 150Ta by removing the portion by a planarization process or the like.

Referring to FIG. 22C , a rear anti-reflection layer 162 is formed on the second surface 110F2 of the substrate 110 . A fence 163 may be formed on the back anti-reflection layer 162 . As described above, the fence 163 may include a buried air gap AG, a first fence layer 163a, a fence capping layer 163b, and a second fence layer 163c.

Subsequently, an additional backside antireflection layer 164 and a passivation layer 165 are formed on the fence 163 and the backside antireflection layer 162 . Next, the color filters 170 separated from each other by the fences 163 - 6 are formed on the passivation layer 165 . Next, as shown in FIG. 6 , the image sensor 100b is manufactured by forming the microlens 180 and the capping layer 190 on the color filter 170 and the passivation layer 165 .

23 is a block diagram illustrating the configuration of an image sensor according to an embodiment of the technical idea of the present invention.

Specifically, the image sensor 210 may include a pixel array 211 , a controller 213 , a row driver 212 , and a pixel signal processor 214 . The image sensor 210 may include at least one of the image sensors 100, 100-1 to 100-5, 100a, and 100b described above.

The pixel array 211 may include a plurality of two-dimensionally arranged unit pixels, and each unit pixel may include a photoelectric conversion element. The photoelectric conversion element may absorb light to generate electric charge, and an electric signal (output voltage) according to the generated electric charge may be provided to the pixel signal processing unit 214 through a vertical signal line. The unit pixels included in the pixel array 211 may provide an output voltage one at a time in a row unit.

Accordingly, unit pixels belonging to one row of the pixel array 211 may be simultaneously activated by a selection signal output from the row driver 212 . The unit pixels belonging to the selected row may provide an output voltage according to the absorbed light to an output line of a corresponding column.

The controller 213 causes the pixel array 211 to absorb light to accumulate electric charges, to temporarily store the accumulated electric charges, and to output an electrical signal according to the stored electric charges to the outside of the pixel array 211; The row driver 212 may be controlled. Also, the controller 213 may control the pixel signal processor 214 to measure an output voltage provided by the pixel array 211 .

The pixel signal processing unit 214 may include a correlated double sampler (CDS) 216 , an analog-to-digital converter (ADC) 218 , and a buffer 220 . The correlated double sampler 216 may sample and hold the output voltage provided by the pixel array 211 . The correlated double sampler 216 may double-sample a level according to a specific noise level and the generated output voltage, and output a level corresponding to the difference. Also, the correlated double sampler 216 may receive the ramp signal generated by the ramp signal generator 222 , compare it with each other, and output a comparison result. The analog-to-digital converter 218 may convert an analog signal corresponding to a level received from the correlated double sampler 216 into a digital signal. The buffer 220 may latch a digital signal, and the latched signal may be sequentially output to the outside of the image sensor 210 and transmitted to an image processor (not shown).

24 is a configuration diagram of a camera using an image sensor according to an embodiment of the technical concept of the present invention.

Specifically, the camera 230 includes an image sensor 210 , an optical system 231 for inducing incident light to a light receiving sensor unit of the image sensor 210 , and a driving device for driving the shutter device 232 and the image sensor 210 . It has a circuit 234 and a signal processing circuit 236 for processing an output signal of the image sensor 210 .

The image sensor 210 may include at least one of the image sensors 100, 100-1 to 100-5, 100a, and 100b described above. The optical system 231 including an optical lens forms image light from a subject, ie, incident light, on the imaging surface of the image sensor 210 . Accordingly, signal charges are accumulated in the image sensor 210 for a certain period of time.

Such an optical system 231 may be an optical lens system composed of a plurality of optical lenses. The shutter device 232 controls the light irradiation period and the light blocking period to the image sensor 210 . The driving circuit 234 supplies a driving signal to the image sensor 210 and the shutter device 232 and outputs a signal to the signal processing circuit 236 of the image sensor 210 by the supplied driving signal or timing signal. control, and a shutter operation of the shutter device 232 is controlled.

The driving circuit 234 performs a signal transmission operation from the image sensor 210 to the signal processing circuit 236 by supplying a driving signal or a timing signal. The signal processing circuit 236 performs various signal processing on the signal transmitted from the image sensor 210 . A video (video) signal subjected to signal processing is stored in a storage medium such as a memory or output to a monitor.

25 is a block diagram of an imaging system including an image sensor according to an embodiment of the inventive concept.

Specifically, the imaging system 310 is a system that processes an output image of the image sensor 210 . The image sensor 210 may include at least one of the image sensors 100, 100-1 to 100-5, 100a, and 100b described above. The imaging system 300 may be any type of electrical/electronic system in which the image sensor 210 is mounted, such as a computer system, a camera system, a scanner, and an image safety system.

A processor-based imaging system 310 , such as a computer system, may include a processor 320 , such as a microprocessor or central processing unit (CPU), capable of communicating with input/output I/O devices 330 via a bus 305 . can The CD ROM drive 350 , the port 360 , and the RAM 340 are connected to the processor 320 through the bus 305 to exchange data and reproduce an output image for the data of the image sensor 210 . can

The port 360 may be a port capable of coupling a video card, a sound card, a memory card, a USB device, or the like, or communicating data with another system. The image sensor 210 may be integrated together with processors such as a CPU, a digital signal processing device (DSP), or a microprocessor, and may also be integrated with a memory. Of course, in some cases, it may be integrated into a chip separate from the processor. The imaging system 310 may be a system block diagram of a camera phone or a digital camera among digital devices.

Above, the present invention has been described with reference to the embodiment shown in the drawings, but this is only exemplary, and it will be understood by those skilled in the art that various modifications, substitutions and equivalent other embodiments are possible therefrom. will be. It should be understood that the embodiments described above are illustrative in all respects and not restrictive. The true technical protection scope of the present invention should be defined by the technical spirit of the appended claims.

100: image sensor, 162: back anti-reflection layer, 163: fence, AG: air gap, 164: additional back anti-reflection layer, 165: passivation layer, 170: color filter, 180: microlens, 190: capping layer

Claims (10)

a first pixel;
a second pixel disposed adjacent to the first pixel;
a pixel separation structure between the first pixel and the second pixel;
a back anti-reflective layer disposed on the first pixel, the second pixel, and the pixel isolation structure; and
and a fence disposed on the rear antireflection layer to correspond to the pixel isolation structure and having a buried air gap therein. The image sensor according to claim 1, wherein the fence further includes a barrier metal layer disposed on both sides of the buried air gap on the back anti-reflection layer. The method of claim 1 , wherein the buried air gap comprises: a connection-type pattern disposed to completely surround the perimeter of the first pixel and the second pixel in a planar manner within the fence;
a detachable pattern partially surrounding the perimeter of the first pixel and the second pixel planarly within the fence; and
The image sensor according to claim 1, characterized in that it is any one of a mixed pattern that completely and partially surrounds the perimeters of the first pixel and the second pixel in a plane within the fence. The image sensor of claim 1 , wherein the buried air gap is a dot-shaped pattern surrounding the first pixel and the second pixel in a dot shape in a planar manner within the fence. The method of claim 1, wherein the buried air gap has a width in a vertical direction perpendicular to the surface of the rear anti-reflection layer is greater than a width in a horizontal direction horizontal to the surface of the rear anti-reflection layer, and
The buried air gap is an image sensor, characterized in that it has a profile in the shape of a bow or candle in a vertical direction perpendicular to the surface of the rear anti-reflection layer. a first pixel;
a second pixel disposed adjacent to the first pixel;
a pixel separation structure between the first pixel and the second pixel;
a back anti-reflection layer disposed on the first pixel, the second pixel, and the pixel isolation structure, the back anti-reflection layer including a plurality of sub back anti-reflection layers; and
An image comprising a fence disposed on the backside antireflection layer to correspond to the pixel isolation structure, having a buried air gap therein, and having a penetrating portion penetrating through at least one of the sub backside antireflection layers. sensor. 7. The method of claim 6, wherein the buried air gap is disposed inside the fence positioned on the rear anti-reflection layer, or the buried air gap is positioned inside the fence positioned on the rear anti-reflection layer and inside the through portion Image sensor, characterized in that all disposed on. The image sensor of claim 6 , wherein the fence further comprises barrier metal layers disposed on both sides of the through portion on the rear antireflection layer. a substrate having a first surface and a second surface opposite to the first surface;
a first pixel located within the substrate;
a second pixel disposed adjacent to the first pixel in the substrate;
a pixel separation structure positioned between the second surface and the first surface to separate the first pixel and the second pixel from each other;
a back anti-reflection layer disposed on the first pixel, the second pixel, and the pixel isolation structure on the second side, the back anti-reflection layer comprising a plurality of sub back anti-reflection layers;
a fence disposed on the backside antireflection layer to correspond to the pixel isolation structure, a fence having a buried air gap therein and a penetrating portion penetrating through at least one of the sub backside antireflection layers; and
and a color filter disposed on the back anti-reflection layer on the first pixel and the second pixel and separated by the fence. 10. The image sensor of claim 9, wherein the pixel isolation structure is embedded in a trench formed wholly or partially between the second surface and the first surface of the substrate.

Images