KR20220062163A - Semiconductor device including high dielectric constant aluminium oxide layer - Google Patents

Abstract

Provided is a method for manufacturing a semiconductor device having an aluminum oxide layer with a high dielectric constant. To this end, firstly, a gate electrode may be formed on a substrate. The present invention further comprises: an aluminum precursor pressurized dosing step of inserting the substrate with the gate electrode into a chamber, and supplying an aluminum precursor on the substrate in a state in which a gas outlet of the chamber is closed in order to increase a reaction pressure within the chamber, thereby allowing the aluminum precursor to be absorbed over the surface of the substrate; an aluminum precursor purging step of purging the chamber after the aluminum precursor pressurized dosing step; and an oxidizing agent supply step of, after the aluminum precursor purging step, supplying an oxidizing agent into the chamber to allow the same to react with the aluminum precursor absorbed on the substrate, wherein, after the oxidizing agent supply step, a unit cycle, including an oxidizing agent purging step for purging the chamber, may be performed by multiple times so as to form a gate insulating film over the substrate, which is an aluminum oxide film. A channel layer is formed on the gate insulating film. Source/drain electrodes are formed to be connected to both side end portions of the channel layer.

Description

{Semiconductor device including high dielectric constant aluminum oxide layer}

The present invention relates to a semiconductor device, and more particularly, to a transistor.

A thin film transistor (TFT) is a switching element that operates each pixel in a display device such as an organic light emitting display (OLED) or a liquid crystal display (LCD). It is used extensively. Accordingly, much attention is paid to the manufacture of thin film transistors, and more efficient thin film transistors and manufacturing methods thereof have been devised.

In particular, as the resolution of the display device is increased and the degree of integration is accelerated, it is required to reduce the driving voltage of the thin film transistor. To this end, it is possible to respond by reducing the thickness of the gate insulating film of the thin film transistor. However, in this case, there may be disadvantages such as an increase in leakage current. Accordingly, there is an attempt to replace the gate insulating film of the thin film transistor with a high dielectric constant insulating film such as a hafnium oxide film. However, in the case of the hafnium oxide layer, since it is reactive with the channel layer of the thin film transistor, an unstable interface may be formed between the gate insulating layer and the channel layer.

In particular, thin film transistors used in display devices require a low process temperature as the manufacturing process proceeds on a substrate with low heat resistance due to the characteristics of the display device. situation that should be

An object of the present invention is to provide a method for manufacturing an aluminum oxide film having a high dielectric constant while growing at a low temperature and a method for manufacturing a semiconductor device using the same.

The technical problems of the present invention are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description.

In order to achieve the above technical problem, an aspect of the present invention provides a method of manufacturing a semiconductor device. The semiconductor device manufacturing method includes forming a gate electrode, a gate insulating layer, a channel layer, and source/drain electrodes connected to both ends of the channel layer on a substrate. In the forming of the gate insulating film, a substrate is put into a chamber, and an aluminum precursor is supplied to the substrate in a state in which the gas outlet of the chamber is closed to increase the reaction pressure in the chamber to apply the aluminum precursor to the surface of the substrate. A pressure dosing step of adsorbing the aluminum precursor to the; an aluminum precursor purging step of purging the chamber after the aluminum precursor pressurized dosing step; after the aluminum precursor purging step, an oxidizing agent supply step of supplying an oxidizing agent into the chamber to react with the aluminum precursor adsorbed on the substrate; and a plurality of unit cycles including an oxidizer purge step of purging the chamber after the oxidizing agent supply step to form a gate insulating layer, which is an aluminum oxide layer, on the substrate.

The gate insulating layer may be formed on the gate electrode after the gate electrode is formed on the substrate, and the channel layer may be formed on the gate insulating layer. In another example, the gate insulating layer may be formed on the channel layer after the channel layer is formed on the substrate, and the gate electrode may be formed on the gate insulating layer.

The channel layer may be a metal oxide channel layer. Also, an interface may be formed between the metal oxide channel layer and the aluminum oxide layer.

The aluminum precursor may be supplied without a carrier gas. However, even in this case, the reaction pressure may be very high, such as 100 mTorr to 10 Torr.

The aluminum precursor pressure dosing step and the aluminum precursor purge step are included in the aluminum precursor subcycle, and before the oxidizing agent supply step, the aluminum precursor subcycle is repeated a plurality of times, and as the number of repetitions of the aluminum precursor subcycle increases The reaction pressure in the aluminum precursor pressurized dosing step may be gradually increased.

The oxidizing agent supplying step may proceed to the oxidizing agent pressurized dosing step in which the reaction pressure in the chamber is increased by supplying the oxidizing agent in a state in which the gas outlet of the chamber is closed. In this case, the oxidant pressurized dosing step and the oxidant purge step are included in the oxidizer subcycle, and the unit cycle includes repeating the oxidizer subcycle a plurality of times in succession, and as the number of repetitions of the oxidant subcycle increases Accordingly, the reaction pressure in the oxidizing agent pressurized dosing step may be gradually increased.

The aluminum precursor may be trimethylaluminium (TMA), and the oxidizing agent may be H ₂ O. The temperature of the chamber may be in the range of 50 to 150 °C. As such, despite being deposited at a very low chamber temperature, the aluminum oxide film may exhibit a very high dielectric constant of 8 to 9.5.

Another aspect of the present invention provides a method of manufacturing a vertical type nonvolatile memory device in order to achieve the above technical object. First, a plurality of interlayer insulating films and a plurality of control gate films are alternately stacked on a substrate. An opening penetrating the alternately stacked interlayer insulating layers and the control gate layers is formed. A blocking insulating film and a charge trapping layer are sequentially formed on the sidewall of the opening. Putting the substrate on which the charge trapping layer is formed into a chamber, supplying an aluminum precursor to the substrate in a state in which the gas outlet of the chamber is closed, increasing the reaction pressure in the chamber to adsorb the aluminum precursor onto the surface of the substrate aluminum precursor pressure dosing; an aluminum precursor purging step of purging the chamber after the aluminum precursor pressurized dosing step; after the aluminum precursor purging step, an oxidizing agent supply step of supplying an oxidizing agent into the chamber to react with the aluminum precursor adsorbed on the substrate; and a plurality of unit cycles including an oxidizer purge step of purging the chamber after the oxidizing agent supply step to form a tunnel insulating layer, which is an aluminum oxide layer, on the substrate on which the charge trapping layer is formed. A channel layer is formed on a sidewall of the opening in which the tunnel insulating layer is formed. An insulating pillar is formed to fill the opening in which the channel layer is formed.

The channel layer may be a metal oxide channel layer. Also, an interface may be formed between the metal oxide channel layer and the aluminum oxide layer.

The aluminum precursor may be supplied without a carrier gas. However, even in this case, the reaction pressure may be very high, such as 100 mTorr to 10 Torr.

The aluminum precursor pressure dosing step and the aluminum precursor purge step are included in the aluminum precursor subcycle, and before the oxidizing agent supply step, the aluminum precursor subcycle is repeated a plurality of times, and as the number of repetitions of the aluminum precursor subcycle increases The reaction pressure in the aluminum precursor pressurized dosing step may be gradually increased.

The oxidizing agent supplying step may proceed to the oxidizing agent pressurized dosing step in which the reaction pressure in the chamber is increased by supplying the oxidizing agent in a state in which the gas outlet of the chamber is closed. In this case, the oxidant pressurized dosing step and the oxidant purge step are included in the oxidizer subcycle, and the unit cycle includes repeating the oxidizer subcycle a plurality of times in succession, and as the number of repetitions of the oxidant subcycle increases Accordingly, the reaction pressure in the oxidizing agent pressurized dosing step may be gradually increased.

The aluminum precursor may be trimethylaluminium (TMA), and the oxidizing agent may be H ₂ O. The temperature of the chamber may be in the range of 50 to 150 °C. As such, despite being deposited at a very low chamber temperature, the aluminum oxide film may exhibit a very high dielectric constant of 8 to 9.5.

As described above, according to an embodiment of the present invention, it is possible to provide a semiconductor device having an improved on/off current ratio and improved charge mobility by providing an aluminum oxide film having a high dielectric constant and low roughness while growing at a low temperature.

In particular, the aluminum oxide film according to an embodiment of the present invention may have a high dielectric constant without reacting with the metal oxide semiconductor, and thus excellent device performance without using a conventional high dielectric constant insulating film such as HfO ₂ or ZrO ₂ in the semiconductor device. can indicate

However, the effects of the present invention are not limited to the above-mentioned effects, and other effects not mentioned will be clearly understood by those skilled in the art from the following description.

1 is a cross-sectional view showing a thin film transistor according to an embodiment of the present invention.
2 is a timing diagram illustrating injection of an aluminum precursor gas, injection of a purge gas, and injection of a reactive gas for manufacturing an aluminum oxide film according to an embodiment of the present invention.
3 is a timing diagram of injection of an aluminum precursor gas, injection of a purge gas, and injection of a reactive gas for manufacturing an aluminum oxide film according to another embodiment of the present invention.
4 is a schematic diagram showing an apparatus for manufacturing a thin film according to an embodiment of the present invention.
5 is a cross-sectional view showing a method of manufacturing a thin film transistor according to another embodiment of the present invention.
6 is a cross-sectional view showing a method of manufacturing a thin film transistor according to another embodiment of the present invention.
7A to 7F are cross-sectional views illustrating a method of manufacturing a vertical nonvolatile memory device according to another exemplary embodiment of the present invention.
8A to 8D are cross-sectional views illustrating a method of manufacturing a vertical nonvolatile memory device according to another embodiment of the present invention.
9 is a table summarizing parameters of a unit cycle for manufacturing an aluminum oxide film according to the present preparation example.
10A is a graph showing the thickness of the aluminum oxide film according to the number of times of unit cycles according to the aluminum oxide film preparation example, and FIG. 10B is a graph showing the thickness of the aluminum oxide film according to the number of times of performing unit cycles according to the comparative example of the aluminum oxide film. am.
11A is an atomic force microscope (AFM) image of an aluminum oxide film obtained by performing 200 unit cycles according to an aluminum oxide film preparation example, and FIG. 11B is an AFM of an aluminum oxide film obtained by performing 200 unit cycles according to an aluminum oxide film Comparative Example. It is an image.
12A is an ID-VG graph showing the transmission characteristics of the TFT according to the TFT Preparation Example, and FIG. 12B is an ID-VG graph showing the transmission characteristics of the TFT according to the TFT Comparative Example.

Hereinafter, preferred embodiments according to the present invention will be described in more detail with reference to the accompanying drawings in order to explain the present invention in more detail. However, the present invention is not limited to the embodiments described herein and may be embodied in other forms. In the drawings, when it is said that a layer is “on” another layer or substrate, it may be formed directly on the other layer or substrate, or a third layer may be interposed therebetween. In the present embodiments, "first", "second", or "third" is not intended to impose any limitation on the components, but should be understood as terms for distinguishing the components.

1 is a cross-sectional view showing a thin film transistor according to an embodiment of the present invention.

Referring to FIG. 1 , a substrate 10 may be provided. The substrate S may be a semiconductor substrate, a metal substrate, a glass substrate, or a flexible substrate. For example, the flexible substrate may be a polymer substrate, for example, a PET (polyethylene terephthalate) or PI (polyimide) substrate. A gate electrode 20 extending in one direction may be formed on the substrate 10 . The gate electrode 20 may be formed using Al, Cr, Cu, Ta, Ti, Mo, W, or an alloy thereof. A gate insulating layer 30 may be formed on the gate electrode (the gate electrode 20 ).

The gate insulating layer 30 may be formed using the method described with reference to FIGS. 2 to 4 below.

2 is a timing diagram illustrating injection of an aluminum precursor gas, injection of a purge gas, and injection of a reactive gas for manufacturing an aluminum oxide film according to an embodiment of the present invention. 3 is a timing diagram of injection of an aluminum precursor gas, injection of a purge gas, and injection of a reactive gas for manufacturing an aluminum oxide film according to another embodiment of the present invention. 4 is a schematic diagram showing an apparatus for manufacturing a thin film according to an embodiment of the present invention.

2 , 3 , and 4 , the substrate 10 of FIG. 1 may be loaded on a stage 102 in a chamber 100 having a gas inlet 120 and a gas outlet 140 . . As described with reference to FIG. 1 , a gate electrode 20 may be formed on the substrate 10 . As an example of the upper surface of the substrate 10 , hydroxyl groups may be exposed on the upper surface of the gate electrode 20 . To this end, before loading into the chamber 100 , as an example of the upper surface of the substrate 10 , the upper surface of the gate electrode 20 may be surface-treated.

Before loading the substrate 10 , the chamber 100 may be heated and maintained at a deposition temperature by the controller 150 . The deposition temperature may be 50 to 150 °C, 60 to 140 °C, 70 to 130 °C, 80 to 120 °C, 90 to 110 °C, or 95 to 105 °C. The gas outlet 140 may be connected to a vacuum pump (not shown).

First, close all the gas control valves 130 , 132 , 134 connected to the gas inlet 120 and open the gas outlet valve 142 connected to the gas outlet 140 to create a vacuum inside the chamber 100 . there is. Thereafter, while the aluminum precursor gas control valve 130 is opened and the gas outlet valve 142 is closed, the aluminum precursor gas may be supplied from the aluminum precursor storage unit 110 into the chamber 100 .

The aluminum precursor may include tri(C1-C5 alkyl)aluminum, for example, trimethylaluminium (TMA). The aluminum precursor may be stored in a liquid state in the aluminum precursor storage unit 110 .

The aluminum precursor storage unit 110 is heated below the thermal decomposition temperature of the aluminum precursor, and accordingly, the aluminum precursor may be supplied into the chamber 100 at a predetermined vapor pressure. At this time, the supplied aluminum precursor may be supplied without a carrier gas. Since the aluminum precursor is supplied while the gas outlet valve 142 is closed, the pressure in the chamber 100 may be increased while accumulating in the chamber 100 . The aluminum precursor may be supplied until the pressure of the chamber 100 reaches the reaction pressure P _M (aluminum precursor supply step, MD ₁ ). The reaction pressure, that is, the pressure of the aluminum precursor gas may be in the range of several hundred mTorr to several Torr, for example, 100 mTorr to 10 Torr. The reaction pressure, that is, the pressure of the aluminum precursor gas may be specifically 500 mTorr to 7 Torr, 800 mTorr to 6 Torr, or 1 Torr to 5 Torr.

When the pressure in the chamber 100 reaches the reaction pressure P _M , the aluminum precursor gas control valve 130 may be closed, and the chamber may be closed for a predetermined time (aluminum precursor exposure step, ME ₁ ). The aluminum precursor supply step (MD ₁ ) and the aluminum precursor exposure step (ME ₁ ) may be referred to as an aluminum precursor pressure dosing step. However, the aluminum precursor exposure step (ME ₁ ) may be omitted in some cases.

As an example of an aluminum precursor gas in the aluminum precursor pressurized dosing step, that is, the aluminum precursor supply step (MD ₁ ) and the aluminum precursor exposure step (ME ₁ ), TMA is formed on the surface of the substrate or on the substrate as shown in Formula 1 below. It can be deposited on the surface of the layer by chemisorption and self-saturated reaction.

[Formula 1]

M-OH + Al(CH ₃ ) ₃ → MO-Al-(CH ₃ ) ₂ + CH ₄

In Formula 1, M denotes a surface of a substrate or a gate electrode.

Since the chemical adsorption and self-saturation reaction of the aluminum precursor gas proceed in a pressurized environment, specifically, in a pressurized stagnant environment, the rate of chemisorption of the aluminum precursor gas on the substrate or the surface of a layer already formed on the substrate Alternatively, the surface coverage may be greatly improved. The pressurized stagnant environment is distinguished from the conventional atomic layer deposition method in which the aluminum precursor gas flows in a laminar flow within the chamber.

Thereafter, the chamber may be purged (aluminum precursor purge step, MP ₁ ). Specifically, the purge gas control valve 132 and the gas outlet valve 142 are opened to flow the purge gas in the purge gas storage unit 112 onto the surface of the substrate in the chamber, so that the excess aluminum precursor gas that is not adsorbed to the surface of the substrate and reaction by-products (ex. CH ₄ ) generated by the reaction between the aluminum precursor gas and the substrate surface may be removed. In this case, the purge gas is an inert gas, and the inert gas may include, for example, argon (Ar), nitrogen (N ₂ ), or a combination thereof.

The aluminum precursor pressurized dosing step (MD ₁ , ME ₁ ) and the aluminum precursor purge step (MP ₁ ) may constitute an aluminum precursor sub-cycle (M-SC ₁ ), and the aluminum precursor sub-cycle (M-SC _n ) 1 to multiple times, specifically 1 to 10 times (n=1 to 10), 3 to 7 times (n=3 to 7), or 4 to 6 times (n=4 to 6) may be repeated. The plurality of aluminum precursor subcycles M-SC _n may constitute an aluminum precursor unit cycle M-UC. When performing the aluminum precursor sub-cycles multiple times (M-SC ₁ , M-SC ₂ , ... M-SC _n , n≥2), in an embodiment such as that shown in FIG. 2 , the aluminum precursor pressure dosing steps ( The reaction pressures (P _M ) at MD ₁ , MD ₂ , … MD _n , ME1 , ME2 , … MEn, n≥2) may be substantially the same, and in an embodiment such as that shown in FIG. 3 , the aluminum precursor is pressed The reaction pressures P _M1 , P _M2 , P _Mn in the dosing steps MD ₁ , MD ₂ , ... MD _n , ME1 , ME2 , ... MEn, n≥2 may be different from each other. In FIG. 3, as the number of aluminum precursor pressurized dosing steps (MD ₁ , MD ₂ , … MD _n , ME1, ME2, … MEn, n≥2) increases, the reaction pressure (P _M1 , P _M2 , P _Mn ) is gradually increased. Although illustrated as increasing, the reaction pressure is not limited thereto and the reaction pressure may be gradually decreased.

After the aluminum precursor unit cycle (M-UC) is performed, an aluminum precursor layer chemically bonded to the upper surface of the substrate 10 or the gate electrode 20 on the substrate 10, for example, -Al(CH ₃ ) ₂ A monolayer may be formed.

After performing the aluminum precursor unit cycle (M-UC), a reaction gas supply step (reactive gas supply step, OD ₁ ) of supplying a reaction gas into the chamber may be performed. The reaction gas may react with the aluminum precursor adsorbed on the substrate. The reaction gas may be an oxidizing agent that specifically oxidizes the aluminum precursor to form an aluminum oxide unit layer. The oxidizing agent may include, but is not limited to, H ₂ O, H ₂ O ₂ , O ₂ , or O ₃ . In one embodiment, the oxidizing agent may be H ₂ O.

In an embodiment, in a state in which the reaction gas control valve 134 is opened and the gas outlet valve 142 is closed, the reaction gas may be supplied from the reaction gas storage unit 114 into the chamber 100 . Since the reaction gas is supplied while the gas outlet valve 142 is closed, the pressure in the chamber 100 may be increased while accumulating in the chamber 100 . The reaction gas may be supplied until the pressure of the chamber 100 reaches the reaction pressure P _OX . The reaction pressure, that is, the pressure of the reaction gas may be in the range of mTorr to several Torr, for example, 100 mTorr to 10 Torr. The reaction pressure, that is, the pressure of the aluminum precursor gas may be specifically 500 mTorr to 7 Torr, 800 mTorr to 6 Torr, or 1 Torr to 5 Torr. In one embodiment, the supplied reactant gas may be supplied without a carrier gas. The reaction gas may be stored in a liquid or gaseous state in the reaction gas storage unit 114 . The reaction gas storage unit 114 may be heated and the reaction gas may be supplied into the chamber 100 at a predetermined vapor pressure.

When the reaction pressure P _OX is reached, the reaction gas control valve 134 may be closed, and the chamber may be sealed for a predetermined time (reaction gas exposure step, OE ₁ ). The reaction gas supply step (OD ₁ ) and the reaction gas exposure step (OE ₁ ) may be referred to as a reaction gas pressurization dosing step. However, the reaction gas exposure step (OE ₁ ) may be omitted in some cases.

In the reaction gas pressurization dosing step, that is, the reaction gas supply step (OD ₁ ) and the reaction gas exposure step (OE ₁ ), the reaction gas reacts with the aluminum precursor layer formed on the substrate as shown in Formula 2 below to react with the aluminum The precursor layer may be changed to an aluminum oxide unit layer.

[Formula 2]

MO-Al-(CH ₃ ) ₂ + 2H ₂ O → MO-Al-(OH) ₂ + 2CH ₄

As described above, the reaction between the reaction gas and the aluminum precursor layer may be performed in a pressurized environment, specifically, in a pressurized stagnant environment, not in a lamina flow environment. However, the present invention is not limited thereto, and the reaction gas may be supplied with the gas outlet valve 142 open to react with the aluminum precursor layer while forming a lamina flow in the chamber.

After that, the chamber may be purged (reactant gas purging step, OP ₁ ). Specifically, the purge gas control valve 132 and the gas outlet valve 142 are opened to flow the purge gas in the purge gas storage unit 112 onto the surface of the substrate, so that the excess reactive gas and reactive gas that did not react with the aluminum precursor layer A reaction by-product generated by the reaction between the aluminum precursor and the aluminum precursor may be removed. In this case, the purge gas is an inert gas, and the inert gas may include, for example, argon (Ar), nitrogen (N ₂ ), or a combination thereof.

The reaction gas pressurization dosing step (OD ₁ , OE ₁ ), and the reaction gas purge step (OP ₁ ) may constitute a reaction gas sub-cycle (O-SC ₁ ), and the reaction gas sub-cycle (O-SC _n ) 1 to multiple times, specifically 1 to 10 times (n = 1 to 10), for example 2 to 8 times (n = 2 to 8), 3 to 7 times (n = 3 to 7), or 4 It can be repeated to 6 times (n = 4 to 6). The plurality of reactive gas sub-cycles O-SC _n may constitute a reactive gas unit cycle O-UC. When performing the reaction gas sub-cycles a plurality of times (O-SC ₁ , O-SC ₂ , ... O-SC _n , n≥2), in the embodiment as shown in FIG. 2, the reaction gas pressurization dosing steps ( OD ₁ , OD ₂ , … OD _n , OE ₁ , OE ₂ , … OE _n , n≥2), the reaction pressure ( _{PO OX} ) may be substantially the same, and in the embodiment as shown in FIG. 3 , The reaction pressures (P _OX1 , P _OX2 , P _OXn ) in the reaction gas pressurized dosing steps (OD ₁ , OD ₂ , … OD _n , OE ₁ , OE ₂ , … OE _n , n≥2) may be different from each other . In FIG. 2, as the number of reaction gas pressurization dosing steps (OD ₁ , OD ₂ , ... OD _n , OE ₁ , OE ₂ , ... OE _n , n≥2) increases, the reaction pressure (P _OX1 , P _OX2 , P _OXn) ) is shown to be gradually increased, but the present invention is not limited thereto and the reaction pressure may be gradually decreased.

The thickness of the unit layer, which is the aluminum oxide film, obtained when the aluminum precursor unit cycle (M-UC) is performed once and the reaction gas unit cycle (O-UC) is performed once, that is, the thickness per unit cycle is about 1 to 2 Å. as 1.2 to 1.9 Å, 1.4 to 1.8 Å, or 1.5 to 1.7 Å. Thereafter, the aluminum precursor unit cycle (M-UC) and the reaction gas unit cycle (O-UC) may be alternately repeated. The number of repetitions may determine the final thickness of the aluminum oxide film. In addition, the aluminum oxide film obtained by using the method according to the present embodiment has very good thickness uniformity and has a surface roughness RMS (Root Mean Square) value of less than 3 Å, for example, less than 2.5 Å in one embodiment, 1.5 to 2.3 Å or Excellent surface morphology can be exhibited, such as showing a very low value of 2 to 2.2 Å.

As the aluminum precursor adsorption proceeds in a pressurized stagnant environment in which the reaction pressure is increased as described above, an aluminum oxide film having excellent thickness uniformity at a very low temperature of 150 degrees C or less can be manufactured. Manufacturing the aluminum oxide film at a low temperature can be advantageous for highly integrated devices as it can suppress the diffusion of impurities in the semiconductor layer already formed underneath by reducing the thermal budget, and the lower substrate is a plastic substrate or When the device component already formed on the substrate is an organic material such as an organic semiconductor, damage to the organic material can be suppressed.

In addition, the aluminum oxide film 30 exhibits a high dielectric constant of 8 or more, specifically 8 to 9.5, for example, 8.5 to 9 even though it is deposited at a very low temperature of 150 degrees or less. This is a very high value compared to an aluminum oxide film formed using a general atomic layer deposition method using a laminar flow at a very low temperature of about 150°C, showing a dielectric constant of less than 7.

A metal oxide channel layer 45 patterned to cross the upper portion of the gate electrode 20 may be formed on the aluminum oxide layer 30 . The metal oxide channel layer 45 may be, for example, an oxide layer of one or more transition metals selected from the group consisting of In, Ga, Zn, Sn, and Cu. As an example, the metal oxide channel layer 45 may be a ZnO, In ₂ O ₃ , SnO, InGaO, InGaZnO, or InZnO layer. The metal oxide channel layer 45 may be formed using various methods used in the art, and as an example, a physical vapor deposition method such as sputtering or a chemical vapor deposition method such as chemical vapor deposition or atomic layer deposition It can be formed using and may be patterned using various methods used in the art. The metal oxide channel layer 45 may be formed to a thickness of several to several tens of nm, for example, 5 to 50 nm, for example, 10 to 30 nm.

A source electrode 50S and a drain electrode 50D are formed on both ends of the metal oxide channel layer 45 , and the metal oxide channel layer 45 is disposed between the source electrode 50S and the drain electrode 50D. ), specifically, a region where the metal oxide channel layer 45 overlaps the gate electrode 20 may be exposed. The source electrode 50S and the drain electrode 50D may include at least one of aluminum (Al), neodymium (Nd), silver (Ag), chromium (Cr), titanium (Ti), tantalum (Ta), and molybdenum (Mo). As an example of a metal of or an alloy containing them, or a metal oxide conductive film, it may be formed using Indium Tin Oxide (ITO).

Although the aluminum oxide film 30 is deposited at a low temperature as described above, it has a high dielectric constant, so that it is possible to reduce an equivalent oxide thickness and also a leakage current. In addition, as the aluminum oxide film 30 has a very low surface roughness, electric charges flowing through the metal oxide channel layer 45 are transferred to the surface at the interface between the metal oxide channel layer 45 and the aluminum oxide film 30 . By suppressing scattering, charge mobility can be improved.

Meanwhile, as the high-k insulating layer, HfO ₂ or ZrO ₂ is representative, but HfO ₂ or ZrO ₂ has a high reactivity, so that it may cause an interface reaction and interdiffusion with the metal oxide channel layer 45 to deteriorate the device. However, in this embodiment, while using the aluminum oxide film 30 with little risk of interfacial reaction and interdiffusion with the metal oxide channel layer 45, the aluminum oxide film 30 is shown in Figs. As it is manufactured using the pressurized atomic layer deposition method described with reference to 4, a high dielectric constant can be exhibited, and excellent device performance such as a high on/off current ratio can be exhibited without a high dielectric constant insulating film such as HfO ₂ or ZrO ₂ . However, in some cases, a high dielectric constant insulating layer such as HfO ₂ or ZrO ₂ , which has a higher dielectric constant than that of the aluminum oxide layer 30 , may be formed between the gate electrode 20 and the aluminum oxide layer 30 .

5 is a cross-sectional view showing a method of manufacturing a thin film transistor according to another embodiment of the present invention. The thin film transistor manufacturing method according to the present embodiment may be similar to the thin film transistor manufacturing method described with reference to FIG. 1 except for the following description.

Referring to FIG. 5 , a gate electrode 20 extending in one direction may be formed on a substrate 10 , and an aluminum oxide film 30 may be formed on the gate electrode 20 as a gate insulating film. A source electrode 50S and a drain electrode 50D may be formed on the gate insulating layer 30 . At least a portion of a portion of the gate insulating layer 30 overlapping the gate electrode 20 may be exposed between the source electrode 50S and the drain electrode 50D. A metal oxide channel layer 45 covering the exposed gate insulating layer 30 and the source electrode 50S and the drain electrode 50D may be formed.

The aluminum oxide film 30 as the gate insulating film may be manufactured using the pressurized atomic layer deposition method described with reference to FIGS. 2, 3, and 4 .

6 is a cross-sectional view showing a method of manufacturing a thin film transistor according to another embodiment of the present invention. The thin film transistor manufacturing method according to the present embodiment may be similar to the thin film transistor manufacturing method described with reference to FIG. 1 except for the following description.

Referring to FIG. 6 , a buffer layer 15 may be formed on the substrate 10 . The buffer layer 15 may be a silicon oxide film, a silicon oxynitride film, a silicon nitride film, or a composite film thereof.

A patterned metal oxide channel layer 45 may be formed on the buffer layer 15 by sequentially forming and patterning a metal oxide channel layer on the buffer layer 15 . Thereafter, an aluminum oxide layer 30 serving as a gate insulating layer may be formed on the metal oxide channel layer 45 by using the method described with reference to FIGS. 1, 2, and 3 . A gate electrode 20 crossing an upper portion of the metal oxide channel layer 45 may be formed on the gate insulating layer 30 . An interlayer insulating layer 35 covering the gate electrode 20 may be formed on the gate electrode 20 . The interlayer insulating film 35 may be a silicon oxide film, a silicon oxynitride film, a silicon nitride film, or a composite film thereof.

Contact holes exposing both ends of the metal oxide channel layer 45 are respectively formed in the interlayer insulating layer 35 and the gate insulating layer 30 thereunder, and the metal oxide channel layer 45 is formed in the contact holes. It is possible to form a source electrode 50S and a drain electrode 50D respectively connected to both ends of the .

7A to 7F are cross-sectional views illustrating a method of manufacturing a vertical nonvolatile memory device according to another exemplary embodiment of the present invention. The vertical nonvolatile memory device may be a NAND flash memory device.

Referring to FIG. 7A , a lower insulating layer 113 may be formed on the substrate 100 . A stack S in which a plurality of control gate layers 115 and a plurality of interlayer insulating layers 117 are alternately stacked may be formed on the lower insulating layer 113 . As an example, n pairs of the control gate layer 115 and the interlayer insulating layer 117 may be stacked to form a stack including unit layers L1, L2, ..., Ln. The substrate 100 may include an impurity region 105 that is doped with impurities and has improved conductivity compared to the bulk substrate. The impurity region 105 may be a common source line. Alternatively, a separate semiconductor layer including the impurity region 105 may be formed on the substrate 100 .

The substrate 100 is a semiconductor substrate, for example, an IV-IV compound, III-V compound, or II-VI compound substrate such as monocrystalline silicon, silicon-germanium or silicon carbide, or on any such substrate. The semiconductor layer may be formed. The control gate layer 115 may include a semiconductor material, for example, doped polysilicon; Alternatively, as an example of a metal, it may include tungsten, copper, aluminum, tantalum, titanium, cobalt, titanium nitride, or alloys thereof. The lower insulating film 113 and the interlayer insulating film 117 may be a silicon oxide film, a silicon oxynitride film, a silicon nitride film, or a composite film thereof.

Referring to FIG. 7B , the substrate 100 passes through the stack, that is, the plurality of alternately stacked control gate layers 115 , the plurality of interlayer insulating layers 117 , and the lower insulating layer 113 . Specifically, An opening H exposing the impurity region 105 may be formed.

Thereafter, the control gate layer 115 exposed in the sidewall of the opening H is selectively recessed to form the control gate patterns 115a disposed between the interlayer insulating layers 117 , and at the same time, the control gate layer 115 is formed on the sidewall of the opening H. Grooves Ha in which the pattern 115a is exposed and the insulating layers 117 and 113 are exposed at upper and lower portions may be formed.

Referring to FIG. 7C , a blocking insulating layer 122 is conformally formed on the inner surface of the grooves Ha and a sidewall of the opening H, and a charge trapping layer 125 is formed on the blocking insulating layer 122 . After conformally formed, the charge trapping layer 125 and the blocking insulating layer 122 may be anisotropically etched sequentially. As a result, a blocking insulating layer 122 conformally coating the inner surfaces of the grooves Ha and a charge trapping layer 125 filling the grooves Ha surface-coated with the blocking insulating layer 122 may be formed. . In this case, the blocking insulating layer 122 , the phone trapping layer 125 , and the insulating layers 117 and 113 may be exposed in the sidewall of the opening H . In this embodiment, the blocking insulating layer 122 may be referred to as an inter gate dielectric (IGD) layer, and may be, for example, a silicon oxide layer, a silicon oxynitride layer, or an aluminum oxide layer. In this embodiment, the charge trap layer 125 may be referred to as a floating gate, and may be, for example, polysilicon, but is not limited thereto.

Referring to FIG. 7D , a tunnel insulating layer is conformally formed on the surface of the resultant product including the sidewall of the opening H, and then the charge trapping layer 125 is formed on the sidewall of the opening H by anisotropic etching. A covering tunnel insulating layer 133 may be formed. The tunnel insulating layer 133 is an example of an aluminum oxide layer formed by using the pressure atomic layer deposition method as described with reference to FIGS. 2 , 3 , and 4 , and may be an Al ₂ O ₃ layer. The tunnel insulating layer 133 may be formed to a thickness of 5 nm to 10 nm.

A metal oxide channel layer 135 may be conformally formed on the sidewall of the opening H in which the tunnel insulating layer 133 is formed and on the common source line 105 . The metal oxide channel layer 135 may be, for example, an oxide layer of one or more transition metals selected from the group consisting of In, Ga, Zn, Sn, and Cu. As an example, the metal oxide channel layer 135 may be a ZnO, In2O3, SnO, InGaO, InGaZnO, or InZnO layer. The metal oxide channel layer 135 may be formed using various methods used in the art, and may be formed using, for example, a physical vapor deposition method such as sputtering, a chemical vapor deposition method, or a chemical vapor deposition method such as an atomic layer deposition method. and may be patterned using various methods used in the art. The metal oxide channel layer 135 may have a thickness of several to several tens of nm, for example, 5 to 50 nm, for example, 10 to 30 nm.

Referring to FIG. 7E , the metal oxide channel layer 135 is anisotropically etched to form a patterned metal oxide channel layer 135 ′ stacked on the tunnel insulating layer 133 formed on the sidewall of the opening H. At the same time, the common source line 105 may be exposed in the opening H.

Referring to FIG. 7F , the opening H in which the metal oxide channel layer 135' is formed is filled with a buried insulating film, and the buried insulating film is planarized and etched to expose the top surface of the stack S and at the same time as the insulating pillar ( 141a) and an upper cross-section of the metal oxide channel layer 135 ′ surrounding the same may be exposed. An upper electrode 155 covering the insulating pillar 141a and the metal oxide channel layer 135 ′ surrounding the insulating pillar 141a may be formed. The upper electrode 155 may be a bit line or a conductive pad connected to the bit line.

Referring again to FIG. 7F, the structure of the vertical nonvolatile memory device according to the present embodiment will be described. The vertical nonvolatile memory device according to the present embodiment may include an insulating pillar 141a extending upwardly of the substrate 100 . Interlayer insulating layers 117 and control gate patterns 115a alternately stacked on the side of the insulating pillar 141a may be disposed. A metal oxide channel layer 135 ′ stacked on the insulating pillar 141a between the insulating pillar 141a and the control gate patterns 115a and extending along the insulating pillar 141a may be sequentially disposed. can Specifically, the metal oxide channel layer 135 ′ may be disposed to surround the sidewall of the insulating pillar 141a. A tunnel insulating layer 133 , a charge trapping layer 125 , and a blocking insulating layer 122 are sequentially disposed between the metal oxide channel layer 135 ′ and each of the control gate patterns 115a . Specifically, the width of the control gate pattern 115a parallel to the substrate surface is narrower than the width of the interlayer insulating layers 117 positioned above and below the control gate pattern 115a. Grooves Ha in which the pattern 115a is exposed and the interlayer insulating film 117 is exposed at upper and lower portions may be defined, and the blocking insulating film 122 may conformally coat the inner surface of the grooves Ha, The charge trap layer 125 may fill the grooves Ha surface-coated with the blocking insulating layer 122 . The tunnel insulating layer 133 may cover the charge trapping layer 125 .

The aluminum oxide film 133, which is the tunnel insulating film, has a high dielectric constant despite being deposited at a low temperature as described with reference to FIGS. can be reduced In addition, as the aluminum oxide layer 133 has a very low surface roughness, charges flowing through the metal oxide channel layer 135 ′ are transferred to the interface between the metal oxide channel layer 135 ′ and the aluminum oxide layer 133 . It is possible to improve the charge mobility by suppressing surface scattering.

On the other hand, HfO ₂ or ZrO ₂ is a representative high-k insulating layer, but HfO ₂ or ZrO ₂ has a high reactivity, which may cause interfacial reaction and interdiffusion with the metal oxide channel layer 135 ′ to deteriorate the device. However, in the present embodiment, while the aluminum oxide film 133, which is unlikely to cause an interfacial reaction and interdiffusion with the metal oxide channel layer 135', is used as a tunnel insulating film, the aluminum oxide film 133 is shown in Figs. 3, and as it is manufactured using the pressurized atomic layer deposition method described with reference to FIG. 4, it can exhibit a high dielectric constant, and thus exhibit excellent device performance such as a high on/off current ratio without a high dielectric constant insulating film such as HfO ₂ or ZrO ₂ can However, in some cases, a high dielectric constant insulating layer, such as HfO ₂ or ZrO ₂ , having a higher dielectric constant than that of the aluminum oxide layer 133 may be formed between the charge trapping layer 125 and the aluminum oxide layer 133 .

8A to 8D are cross-sectional views illustrating a method of manufacturing a vertical nonvolatile memory device according to another embodiment of the present invention. The device manufacturing method according to the present exemplary embodiment may be similar to the device manufacturing method described with reference to FIGS. 7A to 7F , except as will be described later.

Referring to FIG. 8A , a lower insulating layer 113 may be formed on the substrate 100 . A stack S in which a plurality of control gate layers and a plurality of interlayer insulating layers 117 are alternately stacked may be formed on the lower insulating layer 113 . As an example, n pairs of the control gate layer 115 and the interlayer insulating layer 117 may be stacked to form a stack including unit layers L1, L2, ..., Ln. The substrate 100 may include an impurity region 105 that is doped with impurities and has improved conductivity compared to the bulk substrate. The impurity region 105 may be a common source line. Alternatively, a separate semiconductor layer including the impurity region 105 may be formed on the substrate 100 .

The stack, that is, the plurality of control gate layers, the plurality of interlayer insulating layers 117 , and the lower insulating layer 113 that are alternately stacked to pass through the substrate 100 , specifically, the impurity region 105 , is formed on a bottom surface of the substrate 100 . An opening (H) to be exposed inside may be formed. A control gate pattern 115a interposed between the insulating layers 117 and 113 may be defined by the formation of the opening H, and the control gate pattern 115a may be exposed in a sidewall of the opening H. can

Referring to FIG. 8B , the blocking insulating layer 123 , the charge trapping layer 126 , and the tunnel insulating layer conformally along the surface profile on the substrate having the control gate pattern 115a exposed in the sidewall of the opening H. After forming (133) sequentially, they can be anisotropically etched. As a result, the blocking insulating layer 123 , the charge trapping layer 126 , and the tunnel insulating layer 133 sequentially stacked on the sidewall of the opening H may be formed. In the present embodiment, the charge trap layer 126 may be a silicon nitride film, but is not limited thereto. The blocking insulating film 123 may be a silicon oxide film, a silicon oxynitride film, or an aluminum oxide film having a high dielectric constant. The tunnel insulating layer 133 is an example of an aluminum oxide layer formed by using the pressure atomic layer deposition method as described with reference to FIGS. 2 , 3 , and 4 , and may be an Al ₂ O ₃ layer. The tunnel insulating layer 133 may be formed to a thickness of 5 nm to 10 nm.

A metal oxide channel layer 135 may be conformally formed on the sidewall of the opening H in which the tunnel insulating layer 133 is formed and on the common source line 105 .

Referring to FIG. 8C , the metal oxide channel layer 135 is anisotropically etched to form a patterned metal oxide channel layer 135 ′ stacked on the tunnel insulating layer 133 formed on the sidewall of the opening H. At the same time, the common source line 105 may be exposed in the opening H.

Referring to FIG. 8D , the opening H in which the metal oxide channel layer 135' is formed is filled with a buried insulating film, and the buried insulating film is planarized and etched to expose the top surface of the stack S and at the same time as the insulating pillar ( 141a) and an upper cross-section of the metal oxide channel layer 135 ′ surrounding the same may be exposed. An upper electrode 155 may be formed to cover the insulating pillar 141a and the metal oxide channel layer 135 ′ having an exposed top surface while surrounding the insulating pillar 141a. The upper electrode 155 may be a bit line or a conductive pad connected to the bit line.

Referring again to FIG. 8D, the structure of the vertical nonvolatile memory device according to the present embodiment will be described. The vertical nonvolatile memory device according to the present embodiment may include an insulating pillar 141a extending upwardly of the substrate 100 . Interlayer insulating layers 117 and control gate patterns 115a alternately stacked on the side of the insulating pillar 141a may be disposed. A metal oxide channel layer 135 ′ sequentially stacked on the insulating pillar 141a between the insulating pillar 141a and the control gate patterns 115a and extending along the insulating pillar 141a is disposed. can Specifically, the metal oxide channel layer 135 ′ may be disposed to surround the sidewall of the insulating pillar 141a. A tunnel insulating layer 133 , a charge trapping layer 126 , and a blocking insulating layer 123 are sequentially disposed between the metal oxide channel layer 135 ′ and each of the control gate patterns 115a . The tunnel insulating layer 133 , the charge trapping layer 126 , and the blocking insulating layer 123 may extend to a region between the metal oxide channel layer 135 ′ and the interlayer insulating layers 117 . In other words, the tunnel insulating layer 133 , the charge trapping layer 126 , and the blocking insulating layer 123 may be disposed on the metal oxide channel layer 135 ′ to surround the sidewall of the insulating pillar 141a.

The aluminum oxide film 133, which is the tunnel insulating film, has a high dielectric constant despite being deposited at a low temperature as described with reference to FIGS. can be reduced In addition, as the aluminum oxide layer 133 has a very low surface roughness, charges flowing through the metal oxide channel layer 135 ′ are transferred to the interface between the metal oxide channel layer 135 ′ and the aluminum oxide layer 133 . It is possible to improve the charge mobility by suppressing surface scattering.

On the other hand, HfO ₂ or ZrO ₂ is a representative high-k insulating layer, but HfO ₂ or ZrO ₂ has a high reactivity, which may cause interfacial reaction and interdiffusion with the metal oxide channel layer 135 ′ to deteriorate the device. However, in the present embodiment, while the aluminum oxide film 133, which is unlikely to cause an interfacial reaction and interdiffusion with the metal oxide channel layer 135', is used as a tunnel insulating film, the aluminum oxide film 133 is shown in Figs. 3, and as it is manufactured using the pressurized atomic layer deposition method described with reference to FIG. 4, it can exhibit a high dielectric constant, and thus exhibit excellent device performance such as a high on/off current ratio without a high dielectric constant insulating film such as HfO ₂ or ZrO ₂ can However, in some cases, a high dielectric constant insulating layer, such as HfO ₂ or ZrO ₂ , having a higher dielectric constant than that of the aluminum oxide layer 133 may be formed between the charge trapping layer 126 and the aluminum oxide layer 133 .

Hereinafter, a preferred experimental example (example) is presented to help the understanding of the present invention. However, the following experimental examples are only for helping understanding of the present invention, and the present invention is not limited by the following experimental examples.

Aluminum oxide film production example

9 is a table summarizing parameters of a unit cycle for manufacturing an aluminum oxide film according to the present preparation example.

A silicon substrate was loaded into a chamber having a gas inlet and a gas outlet, and the chamber was heated to 100°C. In a state in which the gas outlet was closed, trimethyl aluminum (TMA), an aluminum precursor, was supplied to the substrate through the gas inlet (aluminum precursor supply step). At this time, the aluminum precursor was supplied without a carrier gas, and was supplied until the pressure in the chamber reached 1 Torr. Thereafter, the aluminum precursor was reacted on the substrate surface for 5 seconds while the chamber inlet was also closed and the chamber pressure was maintained at 1 Torr (aluminum precursor exposure step). Thereafter, argon as a purge gas was supplied to the gas inlet for 30 seconds while both the gas inlet and the gas outlet were opened to purify the reaction byproducts and the remaining aluminum precursor (aluminum precursor purging step). The aluminum precursor supply step, the aluminum precursor exposure step, and the aluminum precursor purge step constitute an aluminum precursor subcycle, and the aluminum precursor subcycle is repeated 5 times, but 2, 3, 4, and 5 times the aluminum precursor In the supply steps, the aluminum precursor was supplied until the pressure in the chamber reached 2, 3, 4, and 5 Torr, respectively, and the corresponding pressure was maintained for 5 seconds in each subsequent aluminum precursor exposure step.

Thereafter, in a state in which the gas outlet was closed, H ₂ O as a reaction gas was supplied on the aluminum precursor layer through the gas inlet. At this time, the reaction gas was supplied without a carrier gas, and was supplied until the pressure in the chamber reached 1 Torr (reaction gas supply step). Thereafter, the surface of the aluminum precursor layer and H ₂ O were reacted for 5 seconds while maintaining the chamber pressure at 1 Torr by closing the chamber inlet (reaction gas exposure step). After that, argon as a purge gas was supplied to the gas inlet for 30 seconds while both the gas inlet and the gas outlet were opened to purify the reaction byproducts and the residual reaction gas (reaction gas purge step). The reaction gas supply step, the reaction gas exposure step, and the reaction gas purge step constitute a reaction gas subcycle, and the reaction gas subcycle was repeated 5 times to form an aluminum oxide unit layer. When the reaction gas subcycle is repeated 5 times, in the 2nd, 3rd, 4th, and 5th reaction gas supply steps, H ₂ O is added until the pressure in the chamber reaches 2, 3, 4, and 5 Torr, respectively. was supplied, and the corresponding pressure was maintained for 5 seconds in each subsequent reaction gas exposure step.

The aluminum precursor subcycles repeated 5 times and the reaction gas subcycles repeated 5 times thereafter constituted a unit cycle, and the unit cycle was repeated N times to form an aluminum oxide layer.

Comparative Example of Aluminum Oxide Film

A silicon substrate was loaded into a chamber having a gas inlet and a gas outlet, and the chamber was heated to 100°C. A mixed gas of TMA, which is an aluminum precursor, and argon, which is a carrier gas, was supplied for 2 seconds, but the gas outlet of the chamber was supplied in an open state so that the TMA and argon mixed gas maintained a lamina flow state in the chamber. At this time, the partial pressure of TMA was 100 mTorr. Thereafter, argon, which is a purge gas, is supplied for 20 seconds to purge the reaction by-products and the remaining aluminum precursor, and a mixed gas of H2O, a reaction gas, and argon, a carrier gas, is supplied while maintaining the lamina flow state for 2 seconds, but at this time, H The partial pressure of ₂ O was 100 mTorr. Thereafter, argon, which is a purge gas, was supplied for 40 seconds to purify the reaction by-products and the remaining reaction gas. This unit cycle was repeated N times to form an aluminum oxide film.

10A is a graph showing the thickness of the aluminum oxide film according to the number of times of unit cycle according to the aluminum oxide film preparation example, and FIG. 10B is a graph showing the thickness of the aluminum oxide film according to the number of times of performing the unit cycle according to the comparative example of the aluminum oxide film. am.

Referring to FIG. 10B , the aluminum oxide film according to Comparative Example of the aluminum oxide film is formed to have a thickness of about 0.8 Å per unit cycle, while referring to FIG. It can be seen that a thicker aluminum oxide film can be formed per unit cycle in the case of the preparation example of the aluminum oxide film.

11A is an atomic force microscope (AFM) image of an aluminum oxide film obtained by performing 200 unit cycles according to an aluminum oxide film preparation example, and FIG. 11B is an AFM of an aluminum oxide film obtained by performing 200 unit cycles according to a comparative example of an aluminum oxide film. It is an image.

Referring to FIG. 11B , the aluminum oxide film according to the comparative example of the aluminum oxide film exhibited a roughness value of 3.2 Å, while referring to FIG. 11A , the aluminum oxide film according to the preparation example of the aluminum oxide film exhibited a roughness value of 2.1 Å, resulting in a very low surface roughness It can be seen that has

Table 1 below shows the characteristics of an aluminum oxide film obtained by performing a unit cycle according to an aluminum oxide film preparation example 250 times and an aluminum oxide film obtained by performing a unit cycle according to a comparative example of an aluminum oxide film 500 times.

Comparative Example of Aluminum Oxide Film Aluminum oxide film production example thickness 40 nm 40 nm dielectric constant 6.5 8.8 breakdown voltage 25 V 34 V

Referring to Table 1, an aluminum oxide film obtained by performing a unit cycle according to an aluminum oxide film preparation example 250 times and an aluminum oxide film obtained by performing a unit cycle according to a comparative example of an aluminum oxide film 500 times have the same thickness of 40 nm, It can be seen that the aluminum oxide film according to the oxide film preparation example exhibited higher insulation constant values and breakdown voltage values.

TFT manufacturing example

After providing the glass substrate, the glass substrate was subjected to solvent ultrasonic cleaning and UV ozone treatment. The treated glass substrate was placed in a high vacuum (less than 1 Х 10 ^-6 Torr) atmosphere, and an aluminum film having a thickness of 70 nm was deposited on the glass substrate by thermal evaporation using a shadow mask to form a gate electrode. An aluminum oxide film, which is a gate insulating film, was formed on the gate electrode by using the same method as in the aluminum oxide film preparation example except that the glass substrate on which the gate electrode was formed was loaded instead of the silicon substrate. At this time, the unit cycle described in the aluminum oxide film preparation example was repeated 250 times to form an aluminum oxide film having a thickness of about 40 nm. A ZnO layer, which is a channel layer, was formed to a thickness of 10 nm on the aluminum oxide film as the gate insulating film by using a general atomic layer deposition method. Finally, Al source/drain electrodes having a thickness of 70 nm were formed on the channel layer by thermal evaporation.

TFT comparative example

A TFT was manufactured in the same manner as in the TFT Preparation Example except that an aluminum oxide film was formed on the gate electrode using the same method as in Comparative Example of the aluminum oxide film in manufacturing the gate insulating film. At this time, the unit cycle described in Comparative Example of the aluminum oxide film was repeated 400 times to form an aluminum oxide film having a thickness of about 40 nm.

12A is an ID-VG graph showing the transmission characteristics of the TFT according to the TFT Preparation Example, and FIG. 12B is an ID-VG graph showing the transmission characteristics of the TFT according to the TFT Comparative Example. In addition, Table 2 below shows the characteristics of TFTs according to the TFT Preparation Example and the TFT Comparative Example.

TFT comparative example TFT manufacturing example On/Off current ratio 6.67 × 10 ⁷ 3.04 × 10 ⁸ Mobility (cm ² /Vs) 21.5 29.7

Referring to FIGS. 12A, 12B, and Table 2, it was found that the on/off current ratio of the TFT according to the TFT Preparation Example was 3.04 × 10 ⁸ , which was very excellent. As described with reference to Table 1 above, it was estimated that the dielectric constant of the aluminum oxide film, which is a gate insulating film formed using the pressurized atomic layer deposition method according to the aluminum oxide film production example, is superior to that formed using the general atomic layer deposition method. In addition, the mobility of the TFT according to the manufacturing example of the TFT was found to be very excellent as 29.7 cm ² /Vs, which was also formed using the pressurized atomic layer deposition method according to the manufacturing example of the aluminum oxide film as described with reference to FIGS. 11A and 11B. Since the surface roughness of the aluminum oxide film, which is the gate insulating film, is very low compared to that formed using a general atomic layer deposition method, it was estimated that scattering of electrons flowing through the channel layer at the interface between the channel layer and the aluminum oxide film was suppressed.

Above, the present invention has been described in detail with reference to preferred embodiments, but the present invention is not limited to the above embodiments, and various modifications and changes by those skilled in the art within the technical spirit and scope of the present invention This is possible.

Claims (17)

A gate electrode, a gate insulating film, a channel layer, and source/drain electrodes connected to both ends of the channel layer are formed on a substrate,
In the forming of the gate insulating film, a substrate is put into a chamber, and an aluminum precursor is supplied to the substrate in a state in which the gas outlet of the chamber is closed to increase the reaction pressure in the chamber to apply the aluminum precursor to the surface of the substrate. A pressure dosing step of adsorbing the aluminum precursor to the; an aluminum precursor purging step of purging the chamber after the aluminum precursor pressurized dosing step; after the aluminum precursor purging step, an oxidizing agent supply step of supplying an oxidizing agent into the chamber to react with the aluminum precursor adsorbed on the substrate; and performing a unit cycle including an oxidizing agent purge step of purging the chamber after the oxidizing agent supply step a plurality of times to form a gate insulating layer, which is an aluminum oxide layer, on the substrate. The method according to claim 1,
The gate insulating layer is formed on the gate electrode after the gate electrode is formed on the substrate;
wherein the channel layer is formed on the gate insulating layer. 3. The method according to claim 2,
The channel layer is a metal oxide channel layer,
A method of manufacturing a semiconductor device in which an interface is formed between the metal oxide channel layer and the aluminum oxide layer. The method according to claim 1,
The aluminum precursor is supplied without a carrier gas,
The reaction pressure in the chamber increased by the supply of the aluminum precursor is 100 mTorr to 10 Torr. The method according to claim 1,
The aluminum precursor pressurized dosing step and the aluminum precursor purge step are included in an aluminum precursor subcycle,
repeating the aluminum precursor sub-cycle a plurality of times before the oxidizing agent supply step;
A method of manufacturing a semiconductor device in which a reaction pressure in the aluminum precursor pressurized dosing step is gradually increased as the number of repetitions of the aluminum precursor sub-cycle increases. The method according to claim 1,
The oxidizing agent supply step is
A semiconductor device manufacturing method in which the oxidizing agent pressurized dosing step proceeds in a state in which the reaction pressure in the chamber is increased by supplying the oxidizing agent in a state in which the gas outlet of the chamber is closed. 7. The method of claim 6,
The oxidant pressurized dosing step and the oxidant purge step are included in the oxidizer subcycle,
The unit cycle includes repeating the oxidizer sub-cycle a plurality of times in succession,
A method of manufacturing a semiconductor device in which the reaction pressure in the oxidizing agent pressurized dosing step is gradually increased as the number of repetitions of the oxidizing agent subcycle increases. The method according to claim 1,
The aluminum precursor is trimethylaluminium (TMA), and the oxidizing agent is H ₂ O A method of manufacturing a semiconductor device. The method according to claim 1,
The temperature of the chamber for forming the aluminum oxide film is in the range of 20 to 150 ℃,
The method of manufacturing a semiconductor device in which the aluminum oxide film is formed to have a dielectric constant of 8 to 9.5. alternately stacking a plurality of interlayer insulating films and a plurality of control gate films on a substrate;
forming an opening penetrating the alternately stacked interlayer insulating layers and control gate layers;
sequentially forming a blocking insulating film and a charge trapping layer on sidewalls of the opening;
Putting the substrate on which the charge trapping layer is formed into a chamber, supplying an aluminum precursor to the substrate in a state in which the gas outlet of the chamber is closed, increasing the reaction pressure in the chamber to adsorb the aluminum precursor onto the surface of the substrate aluminum precursor pressure dosing; an aluminum precursor purging step of purging the chamber after the aluminum precursor pressurized dosing step; after the aluminum precursor purging step, an oxidizing agent supply step of supplying an oxidizing agent into the chamber to react with the aluminum precursor adsorbed on the substrate; and forming a tunnel insulating film, which is an aluminum oxide film, on the substrate on which the charge trapping layer is formed by performing a unit cycle including a oxidizing agent purge step of purging the chamber after the oxidizing agent supply step;
forming a channel layer on a sidewall of the opening in which the tunnel insulating layer is formed; and
and forming an insulating pillar filling the opening in which the channel layer is formed. 11. The method of claim 10,
The channel layer is a metal oxide channel layer,
A method of manufacturing a vertical nonvolatile memory device in which an interface is formed between the metal oxide channel layer and the aluminum oxide layer. 11. The method of claim 10,
The aluminum precursor is supplied without a carrier gas,
The reaction pressure in the chamber increased by the supply of the aluminum precursor is 100 mTorr to 10 Torr. 11. The method of claim 10,
The aluminum precursor pressurized dosing step and the aluminum precursor purge step are included in an aluminum precursor subcycle,
repeating the aluminum precursor sub-cycle a plurality of times before the oxidizing agent supply step;
A method of manufacturing a vertical nonvolatile memory device in which a reaction pressure in the aluminum precursor pressurized dosing step is gradually increased as the number of repetitions of the aluminum precursor subcycle increases. 11. The method of claim 10,
The oxidizing agent supply step is
A method of manufacturing a vertical nonvolatile memory device in which the oxidizing agent pressurized dosing step proceeds while the reaction pressure in the chamber is increased by supplying the oxidizing agent while the gas outlet of the chamber is closed. 15. The method of claim 14,
The oxidant pressurized dosing step and the oxidant purge step are included in the oxidizer subcycle,
The unit cycle includes repeating the oxidizer sub-cycle a plurality of times in succession,
A method of manufacturing a vertical nonvolatile memory device in which a reaction pressure in the oxidizing agent pressurized dosing step is gradually increased as the number of repetitions of the oxidizer subcycle increases. 11. The method of claim 10,
The aluminum precursor is trimethylaluminium (TMA), and the oxidizing agent is H ₂ O. A method of manufacturing a vertical nonvolatile memory device. 11. The method of claim 10,
The temperature of the chamber for forming the aluminum oxide film is in the range of 20 to 150 ℃,
The method of manufacturing a vertical nonvolatile memory device in which the aluminum oxide layer is formed to have a dielectric constant of 8 to 9.5.

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