KR20210151634A - Display Panel and Display Device - Google Patents

Abstract

According to an embodiment of the present invention, a display panel includes: a substrate including a front display area with a first display element disposed therein, a first side display area connected to the front display area in a first direction, a second side display area connected to the front display area in a second direction crossing the first direction, a corner display area located between the first side display area and the second side display area to at least partially surround the front display area, wherein a second display element is disposed in the corner display area, and an intermediate display area located between the front display area and the corner display area, wherein a third display element is in the intermediate display area; a groove defined on the substrate and concave in a thickness direction of the substrate; and inorganic pattern layers disposed on opposing sides of the groove and including a pair of protruding tips protruding toward the center of the groove. The groove is defined between the second and third display elements. The present invention can reduce a non-display area.

Description

Display Panel and Display Device

The present invention relates to a display panel and a display device in which a display area for displaying an image is expanded.

Electronic devices based on mobility are widely used. In addition to small electronic devices such as mobile phones, tablet PCs have recently been widely used as mobile electronic devices.

Such a mobile electronic device includes a display device to provide a user with various functions, for example, visual information such as an image or an image. Recently, as other components for driving the display device are miniaturized, the proportion of the display device in electronic devices is gradually increasing, and a structure that can be bent to have a predetermined angle in a flat state is being developed.

For example, among the display devices, a display panel displaying an image is connected in a first direction from the front display area, the front display area, and bent in a first side display area, and connected in a second direction from the front display area, and is bent The edge may include various curvatures, such as including the second side display area.

SUMMARY Embodiments of the present invention provide a display panel and a display device including a corner display area that is arranged to correspond to a corner of a front display area and includes a bendable corner display area.

According to an embodiment of the present invention, a front display area in which a first display element is disposed, a first side display area connected to the front display area in a first direction, and a second direction intersecting the front display area and the first direction are provided. a second side display region connected by a a substrate disposed between the area and the corner display area, the substrate including an intermediate display area on which a third display element is disposed; a groove disposed on the substrate and concave in a thickness direction of the substrate; and an inorganic pattern layer disposed on both sides of the groove and having a pair of protruding tips protruding toward the center of the groove, wherein the groove is disposed between the second display element and the third display element, Disclosed is a display panel.

In an embodiment, the corner display area includes a plurality of extension areas extending from the intermediate display area, a through portion is provided between the plurality of adjacent extension areas, and the second display element includes the plurality of extension areas. They may be disposed in extended areas.

In an embodiment, the groove may be disposed to surround the second display element.

In an embodiment, the method further includes a dam portion disposed on the inorganic pattern layer and protruding in a thickness direction of the substrate, wherein the dam portion includes a first dam portion and a second dam portion, and the first dam portion comprises the It is disposed to surround the second display element, and the second dam part may extend along the corner display area.

In an embodiment, each of the plurality of extension areas includes a first extension area and a second extension area disposed between the first extension area and the intermediate display area, and the second extension area of the plurality of extension areas The regions may be integrally provided by being connected to each other, and a groove may be disposed between the first dam portions of the plurality of adjacent extension regions.

In an embodiment, the display device further includes: a first auxiliary dam portion disposed on the inorganic pattern layer and protruding in a thickness direction of the substrate between the second display element and the first dam portion, wherein the first dam portion A thickness may be greater than a thickness of the first auxiliary dam part.

In an embodiment, the method further includes a planarization layer disposed on the substrate, wherein the planarization layer is divided into a corner planarization layer and an intermediate planarization layer based on the groove, and a second display element on the corner planarization layer may be disposed, and a third display element may be disposed on the intermediate planarization layer.

In an embodiment, the third display element includes an internal display element and an external display element adjacent to the groove, the external display element includes a pixel electrode and a counter electrode, and the pixel electrode includes the inorganic pattern layer. may cover at least a portion of

In an embodiment, a planarization layer is further included between the substrate and the third display element, wherein the third display element includes an internal display element and an external display element adjacent to the groove, the planarization layer comprising: A concave portion may be provided between the internal display element and the external display element.

In an embodiment, the display device further includes a connection wiring disposed on the substrate and extending from the intermediate display area to the plurality of extension areas, wherein the second display element includes a pixel electrode, an intermediate layer, and a counter electrode. and the connection wiring and the counter electrode may be connected at distal ends of the plurality of extension regions.

In an embodiment, a planarization layer disposed between the connection wiring and the second display element is further included, wherein the planarization layer has a contact hole exposing the connection wiring, the connection wiring and the counter electrode may be connected through a pixel electrode pattern disposed in the contact hole.

In an embodiment, the display device further includes a connection wiring disposed on the substrate and extending from the intermediate display area to the plurality of extension areas, wherein the second display element is disposed in one of the plurality of extension areas. The plurality of second display elements may include opposing electrodes spaced apart from each other, and each of the opposing electrodes may be connected to the connection wiring.

In an embodiment, the third display element includes a pixel electrode and a counter electrode, and the intermediate display area includes a first intermediate display area and a second intermediate display area disposed between the first intermediate display area and the corner display area. a connection line including a display area and disposed in the intermediate display area; and an intermediate groove disposed between the first intermediate display area and the second intermediate display area, wherein the counter electrode of the third display element and the second intermediate display area are disposed in the first intermediate display area The opposing electrodes of the third display element disposed in the .

In an embodiment, the third display element includes a pixel electrode and a counter electrode, and a plurality of connection wires are provided in the intermediate display area and are disposed in the intermediate display area; and an intermediate groove surrounding the plurality of third display elements, respectively, in the intermediate display area, wherein the opposite electrodes of the plurality of third display elements are spaced apart from each other by the intermediate groove, and are respectively connected to the connection wiring. can be connected

In an exemplary embodiment, the corner display area includes pixel arrangement areas in which the second display element is disposed, respectively, and connection areas connecting the pixel arrangement areas and the intermediate display area, and the adjacent pixel arrangement areas The regions and the adjacent connection regions define a through region, and the connection region may further include a connection line extending from the intermediate display region to the pixel arrangement region.

In an exemplary embodiment, the connection areas may extend serpentinely from the intermediate display area, and the adjacent connection areas may be symmetrically disposed based on a direction in which the pixel arrangement areas are spaced apart.

In an embodiment, the second display element includes a pixel electrode, an intermediate layer including a light emitting layer, and a counter electrode, wherein the intermediate layer includes a first functional layer between the pixel electrode and the light emitting layer, and the counter electrode and the light emitting layer and a second functional layer therebetween, wherein at least one of the first functional layer and the second functional layer and the counter electrode may be cut off by the pair of protruding tips and the groove.

In one embodiment, it is disposed on the inorganic pattern layer, the dam portion protruding in the thickness direction of the substrate; and a thin film encapsulation layer covering the second display element and the third display element, the thin film encapsulation layer including at least one inorganic encapsulation layer and at least one organic encapsulation layer, wherein the thin film encapsulation layer comprises the second display element and extending from the third display element to the dam part, and the at least one organic encapsulation layer may be separated by the dam part.

In one embodiment, the inorganic insulating layer disposed on the substrate; a connection wiring disposed on the inorganic insulating layer and extending from the intermediate display area to the corner display area; a lower inorganic pattern layer disposed on the connection wiring; and a lower layer having a hole corresponding to the lower inorganic pattern layer and covering an edge of the lower inorganic pattern layer, wherein the groove may be defined as a central portion of the lower inorganic pattern layer and the hole.

In one embodiment, the inorganic insulating layer disposed on the substrate; a connection wiring disposed on the inorganic insulating layer and extending from the intermediate display area to the corner display area; a lower inorganic layer disposed on the connection wiring; and a lower layer having a hole exposing a portion of the lower inorganic layer and including a first planarization layer and a second planarization layer, wherein the groove may be defined as the lower inorganic layer and the hole.

In one embodiment, the inorganic insulating layer disposed on the substrate; a connection wiring disposed on the inorganic insulating layer and extending from the intermediate display area to the corner display area; a metal pattern layer disposed on the connection wiring; and a lower layer having a hole corresponding to the metal pattern layer and covering an edge of the metal pattern layer, wherein the groove may be defined as a central portion of the metal pattern layer and the hole.

Another embodiment of the present invention provides a front display area on which the first display element is disposed, a corner display area on which the first display element is disposed and is bent when disposed at a corner of the front display area, and the front display area and the corner display area on which the second display element is disposed a display panel disposed between the areas and including an intermediate display area in which a third display element is disposed; and a cover window covering the display panel, wherein the corner display area includes a plurality of extension areas extending from the intermediate display area, and the second display element is disposed in the plurality of extension areas. Start the device.

In an embodiment, the display panel includes a substrate, a groove disposed on the substrate, a groove concave in a thickness direction of the substrate, and a pair of protruding tips disposed on both sides of the groove and protruding in a center direction of the groove and an inorganic pattern layer with

In an embodiment, the second display element includes a pixel electrode, an intermediate layer including a light emitting layer, and a counter electrode, wherein the intermediate layer includes a first functional layer between the pixel electrode and the light emitting layer, and the counter electrode and the light emitting layer and a second functional layer therebetween, wherein at least one of the first functional layer and the second functional layer and the counter electrode may be cut off by the pair of protruding tips and the groove.

In an embodiment, the groove may be disposed to surround the second display element.

In an embodiment, the display panel is disposed on the inorganic pattern layer and further includes a dam part protruding in a thickness direction of the substrate, wherein the dam part includes a first dam part and a second dam part, and the second dam part A first dam portion may be disposed to surround the second display element, and the second dam portion may extend along the corner display area.

In an embodiment, the display panel further includes a first auxiliary dam portion disposed on the inorganic pattern layer between the second display element and the first dam portion and protruding in a thickness direction of the substrate, and wherein the first A thickness of the dam portion may be greater than a thickness of the first auxiliary dam portion.

In an embodiment, the display panel is disposed on the inorganic pattern layer, covers a dam portion protruding in a thickness direction of the substrate, and the second display element and the third display element, and includes at least one inorganic encapsulation layer and a thin film encapsulation layer including at least one organic encapsulation layer, wherein the thin film encapsulation layer extends from the second display element and the third display element to the dam portion, and the at least one organic encapsulation layer comprises the It can be separated by a dam part.

In an embodiment, the display panel further includes a connection wiring disposed on the substrate and extending from the intermediate display area to the plurality of extension areas, and the second display element includes a pixel electrode, an intermediate layer, and and a counter electrode, wherein the connection wiring and the counter electrode may be connected at distal ends of the plurality of extension regions.

In an embodiment, the display panel comprises:

It is disposed on the substrate and further includes a connection wiring extending from the intermediate display area to the plurality of extension areas, wherein a plurality of the second display elements are disposed in one of the plurality of extension areas, the plurality of Each of the second display elements may include opposing electrodes spaced apart from each other, and the opposing electrodes may be respectively connected to the connection wiring.

In an embodiment, the display panel includes a first side display area that is connected to the front display area in a first direction, has a first radius of curvature and is bent, and a first side display area that crosses the front display area and the first direction. and a second side display area connected in two directions and having a second radius of curvature different from the first radius of curvature and bent, wherein the corner display area is disposed between the first side display area and the second side display area. can be placed.

Another embodiment of the present invention provides a front display area in which a first display element is disposed, a corner display area in which the first display element is disposed and is bent at a corner of the front display area, and a corner display area in which the second display element is disposed, and the front display area and the a display panel disposed between the corner display areas and including an intermediate display area in which a third display element is disposed; and a cover window covering the display panel, wherein the corner display area includes pixel arrangement areas in which the second display element is disposed, respectively, and connection areas connecting the pixel arrangement areas and the intermediate display area. and wherein the adjacent pixel arrangement areas and the adjacent connection areas define a through area, and a connection line extending from the intermediate display area to the pixel arrangement areas is disposed in the connection areas. do.

In an exemplary embodiment, the connection regions may extend in a serpentine manner from the intermediate display region, and the adjacent connection regions may be symmetrically arranged with respect to a direction in which the pixel arrangement regions are spaced apart from each other.

In an embodiment, the display panel includes a substrate, a groove disposed on the substrate, a groove concave in a thickness direction of the substrate, and a pair of protruding tips disposed on both sides of the groove and protruding in a center direction of the groove and an inorganic pattern layer with

In an embodiment, the second display element includes a pixel electrode, an intermediate layer including a light emitting layer, and a counter electrode, wherein the intermediate layer includes a first functional layer between the pixel electrode and the light emitting layer, and the counter electrode and the light emitting layer and a second functional layer therebetween, wherein at least one of the first functional layer and the second functional layer and the counter electrode may be cut off by the pair of protruding tips and the groove.

In an embodiment, the display panel includes a first side display area that is connected to the front display area in a first direction, has a first radius of curvature and is bent, and a first side display area that crosses the front display area and the first direction. and a second side display area connected in two directions and having a second radius of curvature different from the first radius of curvature and bent, wherein the corner display area is disposed between the first side display area and the second side display area. can be placed.

As described above, embodiments of the present invention may provide a display panel and a display device having improved reliability while including a corner display area that can be stretched and/or contracted.

In addition, embodiments of the present invention may reduce the non-display area including the corner display area for displaying an image.

1 is a perspective view schematically illustrating a display device according to an exemplary embodiment.
2A, 2B, and 2C are cross-sectional views schematically illustrating a display device according to an exemplary embodiment.
3 is an equivalent circuit diagram schematically illustrating a pixel circuit applicable to a display panel.
4 is a plan view schematically illustrating a display panel according to an exemplary embodiment.
5A to 5C are enlarged views illustrating a part of a display panel according to an exemplary embodiment of the present invention.
6A and 6B are plan views illustrating any one of the extended areas according to an embodiment of the present invention.
7A and 7B are plan views illustrating an arrangement structure of sub-pixels in an extended area according to an embodiment of the present invention.
8 is a cross-sectional view schematically illustrating a front display area according to an embodiment of the present invention.
9 is a cross-sectional view illustrating a groove provided in a display panel according to an exemplary embodiment.
FIG. 10A is a cross-sectional view taken along line XX′ of FIG. 6A .
10B is an enlarged view of the groove and the dam portion of FIG. 10A.
10c is an enlarged view of a groove and a dam unit according to another embodiment of the present invention.
11A is a cross-sectional view taken along line XX′ of FIG. 6A according to another embodiment of the present invention.
11B is an enlarged view of the groove and the dam portion of FIG. 11A.
12A, 12B, and 12C are enlarged views of a groove and a dam unit according to various embodiments of the present disclosure.
13 is a cross-sectional view taken along line XIII-XIII' of FIG. 6A.
14 is a plan view illustrating any one of extended areas according to another embodiment of the present invention.
15 is a plan view schematically illustrating a corner display area and an intermediate display area according to an embodiment of the present invention.
16A is a cross-sectional view taken along line XVI-XVI' of FIG. 15 .
16B is an enlarged view of the groove and the dam portion of FIG. 16A.
17 is a cross-sectional view taken along line XVII-XVII' of FIG. 15 .
18 is a cross-sectional view taken along line XVIII-XVIII' of FIG. 15 .
19 is a cross-sectional view taken along line XIX-XIX' of FIG. 15 .
20A is a simulation result of deformation of the thin film encapsulation layer in the case where the corner display area includes a plurality of extended areas.
20B is a simulation result for deformation of the thin film encapsulation layer in the case where the corner display area is integrally provided.
21A and 21B are plan views schematically illustrating a corner display area and an intermediate display area according to another exemplary embodiment of the present invention.
22 is an enlarged view of a portion of a display panel according to another exemplary embodiment of the present invention.
23 is a plan view illustrating a corner display area according to another embodiment of the present invention.
24 is a cross-sectional view taken along line XXIV-XXIV' of FIG. 22 .
25 is a cross-sectional view taken along line XXV-XXV' of FIG. 22 .
26 is a cross-sectional view taken along line XXVI-XXVI' of FIG. 23 .

Since the present invention can apply various transformations and can have various embodiments, specific embodiments are illustrated in the drawings and described in detail in the detailed description. Effects and features of the present invention, and a method for achieving them will become apparent with reference to the embodiments described below in detail in conjunction with the drawings. However, the present invention is not limited to the embodiments disclosed below and may be implemented in various forms.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings, and when described with reference to the drawings, the same or corresponding components are given the same reference numerals, and the overlapping description thereof will be omitted. .

In the following embodiments, terms such as first, second, etc. are used for the purpose of distinguishing one component from another, not in a limiting sense.

In the following examples, the singular expression includes the plural expression unless the context clearly dictates otherwise.

In the following embodiments, terms such as include or have means that the features or components described in the specification are present, and the possibility that one or more other features or components will be added is not excluded in advance.

In the following embodiments, when it is said that a part such as a film, region, or component is on or on another part, not only when it is directly on the other part, but also another film, region, component, etc. is interposed therebetween. Including cases where there is

In the drawings, the size of the components may be exaggerated or reduced for convenience of description. For example, since the size and thickness of each component shown in the drawings are arbitrarily indicated for convenience of description, the present invention is not necessarily limited to the illustrated bar.

Where certain embodiments are otherwise feasible, a specific process sequence may be performed different from the described sequence. For example, two processes described in succession may be performed substantially simultaneously, or may be performed in an order opposite to the order described.

In the following embodiments, when a film, a region, or a component is connected, it is not only the case that the film, the region, and the components are directly connected, but also other films, regions, and components are interposed between the films, regions, and components. It includes the case of intervening and indirectly connected. For example, in the present specification, when it is said that a film, a region, a component, etc. are electrically connected, not only the case where the film, a region, a component, etc. are directly electrically connected, other films, regions, components, etc. are interposed therebetween. Indirect electrical connection is also included.

1 is a perspective view schematically illustrating a display device 1 according to an exemplary embodiment. 2A, 2B, and 2C are cross-sectional views schematically illustrating a display device 1 according to an exemplary embodiment of the present invention. FIG. 2A is a cross-sectional view of the display device 1 in the y-direction of FIG. 1 . FIG. 2B is a cross-sectional view of the display device 1 in the x-direction of FIG. 1 . FIG. 2C illustrates a cross-section in which the corner display areas CDA are disposed on both sides of the front display area FDA in the display device 1 .

1 and 2A to 2C , the display device 1 is a device for displaying a moving image or a still image, and includes a mobile phone, a smart phone, a tablet personal computer, Portable electronic devices such as mobile communication terminals, electronic notebooks, e-books, portable multimedia players (PMPs), navigation devices, UMPCs (Ultra Mobile PCs), etc., as well as televisions, laptops, monitors, billboards, and Internet of things (IOT) It can be used as a display screen of various products such as In addition, the display device 1 according to an embodiment is a wearable device such as a smart watch, a watch phone, a glasses display, and a head mounted display (HMD). can be used In addition, the display device 1 according to an embodiment includes a dashboard of a vehicle, a center information display (CID) disposed on a center fascia or dashboard of the vehicle, and a rearview mirror display ( room mirror display), as entertainment for the rear seat of a car, can be used as a display placed on the back of the front seat.

In an exemplary embodiment, the display device 1 may have a long side in the first direction and a short side in the second direction. Here, the first direction and the second direction may be directions crossing each other. For example, the first direction and the second direction may form an acute angle with each other. As another example, the first direction and the second direction may form an obtuse angle or may form a right angle with each other. Hereinafter, a case in which the first direction (eg, the y direction or the -y direction) and the second direction (eg, the x direction and the -x direction) are perpendicular to each other will be described in detail.

In another exemplary embodiment, the display device 1 includes a side length in a first direction (eg, y direction or -y direction) and a side length in a second direction (eg, x direction or -x direction). may be the same. In another embodiment, the display device 1 may have a short side in the first direction (eg, y direction or -y direction) and a long side in the second direction (eg, x direction or -x direction). have.

An edge where the long side in the first direction (eg, the y direction or the -y direction) and the short side in the second direction (eg, the x direction or the -x direction) meet may be rounded to have a predetermined curvature.

The display device 1 may include a display panel 10 and a cover window CW. In this case, the display panel 10 and the cover window CW may function to protect the display panel 10 .

The cover window CW may be a flexible window. The cover window CW may be easily bent according to an external force without generating a crack to protect the display panel 10 . The cover window CW may include glass, sapphire, or plastic. The cover window CW may be, for example, ultra thin glass (UTG) or colorless polyimide (CPI). In an embodiment, the cover window CW may have a structure in which a flexible polymer layer is disposed on one surface of a glass substrate, or may be configured only with a polymer layer.

The display panel 10 may be disposed under the cover window CW. Although not illustrated, the display panel 10 may be attached to the cover window CW by a transparent adhesive member such as an optically clear adhesive (OCA) film.

The display panel 10 may include a display area DA displaying an image and a peripheral area PA surrounding the display area DA. The display area DA may include a plurality of pixels PX, and an image may be displayed through the plurality of pixels PX. Each of the plurality of pixels PX may include sub-pixels. For example, each of the plurality of pixels PX may include a red sub-pixel, a green sub-pixel, and a blue sub-pixel. Alternatively, each of the plurality of pixels PX may include a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel.

In the present exemplary embodiment, the display area DA may include a front display area FDA, a side display area SDA, a corner display area CDA, and an intermediate display area MDA. The plurality of pixels PX disposed in each display area DA may display an image. In an exemplary embodiment, the pixels PX of the front display area FDA, the side display area SDA, the corner display area CDA, and the middle display area MDA may each provide an independent image. In another embodiment, each of the pixels PX of the front display area FDA, the side display area SDA, the corner display area CDA, and the middle display area MDA may provide portions of any one image. have.

The front display area FDA is a flat display area and may include a first pixel PX1 having a first display element. In an embodiment, the front display area FDA may provide most of the images.

A pixel PX having a display element may be disposed in the side display area SDA. Accordingly, the side display area SDA can display an image. In an embodiment, the side display area SDA includes a first side display area SDA1 , a second side display area SDA2 , a third side display area SDA3 , and a fourth side display area SDA4 . can do. In some embodiments, at least one of the first side display area SDA1 , the second side display area SDA2 , the third side display area SDA3 , and the fourth side display area SDA4 may be omitted.

The first side display area SDA1 and the third side display area SDA3 may be connected to the front display area FDA in a first direction (eg, a y direction or a -y direction). For example, the first side display area SDA1 may be connected from the front display area FDA in the -y direction, and the third side display area SDA3 may be connected from the front display area FDA in the y direction.

The first side display area SDA1 and the third side display area SDA3 have a radius of curvature and may be bent. In an exemplary embodiment, the curvature radii of the first side display area SDA1 and the third side display area SDA3 may be different from each other. In another exemplary embodiment, the radius of curvature of the first side display area SDA1 and the third side display area SDA3 may be the same. Hereinafter, a case in which the radius of curvature of the first side display area SDA1 and the third side display area SDA3 is the same as the first radius of curvature R1 will be described in detail. In addition, since the first side display area SDA1 and the third side display area SDA3 are similar to each other, the first side display area SDA1 will be mainly described in detail.

The second side display area SDA2 and the fourth side display area SDA4 may be connected to the front display area FDA in the second direction (eg, the x direction or the -x direction). For example, the second side display area SDA2 may be connected from the front display area FDA in the -x direction, and the fourth side display area SDA4 may be connected from the front display area FDA in the x direction.

The second side display area SDA2 and the fourth side display area SDA4 have a radius of curvature and may be bent. In an embodiment, the radius of curvature of the second side display area SDA2 and the fourth side display area SDA4 may be different from each other. In another exemplary embodiment, the radius of curvature of the second side display area SDA2 and the fourth side display area SDA4 may be the same. Hereinafter, a case in which the radius of curvature of the second side display area SDA2 and the fourth side display area SDA4 is the same as the second radius of curvature R2 will be described in detail. Also, since the second side display area SDA2 and the fourth side display area SDA4 are similar to each other, the second side display area SDA2 will be mainly described in detail.

In an embodiment, the first radius of curvature R1 of the first side display area SDA1 may be different from the second radius of curvature R2 of the second side display area SDA2. For example, the first radius of curvature R1 may be smaller than the second radius of curvature R2. As another example, the first radius of curvature R1 may be greater than the second radius of curvature R2 . In another exemplary embodiment, the first radius of curvature R1 of the first side display area SDA1 may be the same as the second radius of curvature R2 of the second side display area SDA2. Hereinafter, a case in which the first radius of curvature R1 is greater than the second radius of curvature R2 will be described in detail.

The corner display area CDA is disposed at a corner of the front display area FDA and may be bent. That is, the corner display area CDA may be disposed to correspond to the corner portion CP. Here, the corner portion CP is a corner of the display area DA, and the long side of the display area DA in the first direction (eg, the y direction or the -y direction) and the second direction (eg, the x direction or the -x direction) may be a portion where the short sides meet. Also, the corner display area CDA may be disposed between the adjacent side display areas SDA. For example, the corner display area CDA may be disposed between the first side display area SDA1 and the second side display area SDA2 . Alternatively, the corner display area CDA is between the second side display area SDA2 and the third side display area SDA3 , or between the third side display area SDA3 and the fourth side display area SDA4 , or , between the fourth side display area SDA4 and the first side display area SDA1 . Accordingly, the side display area SDA and the corner display area CDA surround the front display area FDA and may be bent.

A second pixel PX2 including a second display element may be disposed in the corner display area CDA. Accordingly, the corner display area CDA can display an image.

In the present embodiment, when the first radius of curvature R1 of the first side display area SDA1 and the second radius of curvature R2 of the second side display area SDA2 are different from each other, in the corner display area CDA The radius of curvature can be changed gradually. In an embodiment, when the first radius of curvature R1 of the first side display area SDA1 is greater than the second radius of curvature R2 of the second side display area SDA2, the curvature of the corner display area CDA The radius may gradually decrease in a direction from the first side display area SDA1 to the second side display area SDA2. For example, the third radius of curvature R3 of the corner display area CDA may be smaller than the first radius of curvature R1 and larger than the second radius of curvature R2 .

In an embodiment, the display panel 10 may further include an intermediate display area MDA. The middle display area MDA may be disposed between the corner display area CDA and the front display area FDA. In an embodiment, the middle display area MDA may extend between the side display area SDA and the corner display area CDA. For example, the middle display area MDA may extend between the first side display area SDA1 and the corner display area CDA. Also, the middle display area MDA may extend between the second side display area SDA2 and the corner display area CDA.

The intermediate display area MDA may include a third pixel PX3 . Also, in an exemplary embodiment, a driving circuit for providing an electrical signal or a voltage line for providing a voltage may be disposed in the middle display area MDA, and the third pixel PX3 overlaps with the driving circuit or power line can be In this case, the third display element of the third pixel PX3 may be disposed above the driving circuit or the power wiring. In some embodiments, the driving circuit or the power wiring may be disposed in the peripheral area PA, and the third pixel PX3 may not overlap the driving circuit or the power wiring.

In the present exemplary embodiment, the display device 1 may display an image not only in the front display area FDA but also in the side display area SDA, the corner display area CDA, and the middle display area MDA. Accordingly, the proportion of the display area DA in the display device 1 may increase. In addition, since the display device 1 is bent at a corner and includes a corner display area CDA for displaying an image, aesthetics may be improved.

3 is an equivalent circuit diagram schematically illustrating a pixel circuit PC applicable to a display panel. 4 is a plan view schematically illustrating a display panel 10 according to an exemplary embodiment. 4 is a plan view illustrating the shape of the display panel 10 before the corner display area CDA is bent.

The display panel 10 may include a display element. For example, the display panel 10 includes an organic light emitting diode display panel using an organic light emitting diode including an organic light emitting layer, a micro light emitting diode display panel using a micro LED, and a quantum dot light emitting layer. It may be a quantum dot light emitting display panel using a quantum dot light emitting diode including a quantum dot light emitting diode, or an inorganic light emitting display panel using an inorganic light emitting device including an inorganic semiconductor. Hereinafter, the case in which the display panel 10 is an organic light emitting display panel using an organic light emitting diode as a display element will be described in detail.

Referring to FIG. 3 , the pixel circuit PC may be connected to a display element, for example, an organic light emitting diode (OLED).

In an embodiment, the pixel circuit PC may include a driving thin film transistor T1 , a switching thin film transistor T2 , and a storage capacitor Cst. In addition, the organic light emitting diode (OLED) may emit red, green, or blue light, or may emit red, green, blue, or white light.

The switching thin film transistor T2 is connected to the scan line SL and the data line DL, and a data signal or data inputted from the data line DL based on a scan signal or a switching voltage inputted from the scan line SL. A voltage may be transferred to the driving thin film transistor T1. The storage capacitor Cst is connected to the switching thin film transistor T2 and the driving voltage line PL, and the difference between the voltage received from the switching thin film transistor T2 and the first power voltage ELVDD supplied to the driving voltage line PL. voltage corresponding to .

The driving thin film transistor T1 is connected to the driving voltage line PL and the storage capacitor Cst, and a driving current flowing from the driving voltage line PL to the organic light emitting diode OLED in response to the voltage value stored in the storage capacitor Cst. can control The organic light emitting diode (OLED) may emit light having a predetermined luminance by a driving current. The opposite electrode (eg, a cathode) of the organic light emitting diode OLED may receive the second power voltage ELVSS.

3 illustrates that the pixel circuit PC includes two thin film transistors and one storage capacitor, the number of thin film transistors and the number of storage capacitors may be variously changed according to the design of the pixel circuit PC. have. For example, the pixel circuit PC may include three, four, five or more thin film transistors.

Referring to FIG. 4 , the display panel 10 may include a display area DA and a peripheral area PA. The display area DA is an area in which the plurality of pixels PX display an image, and the peripheral area PA may at least partially surround the display area DA. The display area DA may include a front display area FDA, a side display area SDA, a corner display area CDA, and an intermediate display area MDA.

Each of the pixels PX may include sub-pixels, and the sub-pixels may emit light of a predetermined color using an organic light emitting diode as a display element. Each organic light emitting diode may emit light of, for example, red, green, or blue. Each organic light emitting diode may be connected to a pixel circuit including a thin film transistor and a storage capacitor.

In this specification, the display panel 10 may include a substrate 100 and a multilayer film disposed on the substrate 100 . In this case, the display area DA and the peripheral area PA may be defined in the substrate 100 and/or the multilayer film. That is, it is said that the substrate 100 and/or the multilayer film include a front display area (FDA), a side display area (SDA), a corner display area (CDA), an intermediate display area (MDA), and a peripheral area (PA). can

The substrate 100 is glass or polyethersulfone, polyarylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide ( Polyphenylene sulfide), polyimide (polyimide), polycarbonate (polycarbonate), may include a polymer resin such as cellulose triacetate, cellulose acetate propionate (cellulose acetate propionate). The substrate 100 including the polymer resin may have flexible, rollable, and bendable properties. The substrate 100 may have a multilayer structure including a base layer and a barrier layer (not shown) including the above-described polymer resin.

The peripheral area PA is an area that does not provide an image and may be a non-display area. In the peripheral area PA, a driving circuit DC for providing an electrical signal to the pixels PX, a power supply line for providing power, or the like may be disposed. A driving circuit DC for providing an electrical signal to each pixel PX through a signal line may be disposed in the peripheral area PA. For example, the driving circuit DC may be a scan driving circuit that provides a scan signal to each pixel PX through the scan line SL. Alternatively, it may be a data driving circuit (not shown) that provides a data signal to each pixel PX through the data line DL. In an embodiment, the data driving circuit may be disposed adjacent to one side of the display panel 10 . For example, in the peripheral area PA, the data driving circuit may be disposed to correspond to the first side display area SDA1.

The peripheral area PA may include a pad part (not shown) that is an area to which an electronic device, a printed circuit board, or the like can be electrically connected. The pad part may be exposed without being covered by the insulating layer, and may be electrically connected to a flexible printed circuit board (FPCB). The flexible printed circuit board may electrically connect the controller and the pad unit, and may supply a signal or power transmitted from the controller. In some embodiments, the data driving circuit may be disposed on a flexible printed circuit board.

A first pixel PX1 having a first display element may be disposed in the front display area FDA. The front display area FDA may be a flat portion. In an embodiment, the front display area FDA may provide most of the images.

In the side display area SDA, the pixel PX including the display element may be disposed and may be bent. That is, the side display area SDA may be a curved area from the front display area FDA, as described with reference to FIG. 1 . In an embodiment, the width of the side display area SDA may gradually decrease in a direction away from the front display area FDA. In an embodiment, the side display area SDA includes a first side display area SDA1 , a second side display area SDA2 , a third side display area SDA3 , and a fourth side display area SDA4 . can do.

The first side display area SDA1 and the third side display area SDA3 may be connected in a first direction (eg, a y direction or a -y direction). Also, the second side display area SDA2 and the fourth side display area SDA4 may be connected in the second direction (eg, the x direction or the -x direction).

The corner display area CDA may be disposed between the adjacent side display areas SDA. For example, the corner display area CDA may be disposed between the first side display area SDA1 and the second side display area SDA2 . Alternatively, the corner display area CDA is between the second side display area SDA2 and the third side display area SDA3 , or between the third side display area SDA3 and the fourth side display area SDA4 , or , between the fourth side display area SDA4 and the first side display area SDA1 . Hereinafter, the corner display area CDA disposed between the first side display area SDA1 and the second side display area SDA2 will be described in detail.

The corner display area CDA may be disposed to correspond to the corner portion CP of the display area DA. Here, the corner portion CP is a corner of the display area DA, and the long side of the display area DA in the first direction (eg, the y direction or the -y direction) and the second direction (eg, the x direction or the -x direction) may be a portion where the short sides meet.

Also, the corner display area CDA may surround at least a portion of the front display area FDA. For example, the corner display area CDA may be disposed between the first side display area SDA1 and the second side display area SDA2 to surround at least a part of the front display area FDA.

In the corner display area CDA, the second pixel PX2 having a display element may be disposed and may be bent. That is, as described with reference to FIG. 1 , the corner display area CDA may be a curved area from the front display area FDA while being disposed to correspond to the corner part CP.

The middle display area MDA may be disposed between the front display area FDA and the corner display area CDA. Also, in an embodiment, the middle display area MDA may extend between the side display area SDA and the corner display area CDA. For example, the middle display area MDA may extend between the first side display area SDA1 and the corner display area CDA and/or between the second side display area SDA2 and the corner display area CDA. have. In an embodiment, the middle display area MDA may be curved.

A third pixel PX3 including a display element may be disposed in the intermediate display area MDA. Also, in an embodiment, a driving circuit DC for providing an electrical signal or a power supply line (not shown) for providing a voltage may also be disposed in the intermediate display area MDA. In an embodiment, the driving circuit DC may be connected to the peripheral area PA through the intermediate display area MDA. In this case, the third pixel PX3 disposed in the intermediate display area MDA may overlap the driving circuit DC or the power wiring. In another embodiment, the third pixel PX3 may not overlap the driving circuit DC or the power wiring. In this case, the driving circuit DC may be disposed along the peripheral area PA.

At least one of the side display area SDA, the corner display area CDA, and the middle display area MDA may be bent. In this case, the first side display area SDA1 of the side display areas SDA is bent with a first radius of curvature, and the second side display area SDA2 of the side display areas SDA has a second radius of curvature. can be bent At this time, when the first radius of curvature is greater than the second radius of curvature, the radius of curvature at which the corner display area CDA is bent gradually decreases in the direction from the first side display area SDA1 to the second side display area SDA2. can do.

When the corner display area CDA is bent, a compressive strain greater than a tensile strain may occur in the corner display area CDA. In this case, it is necessary to apply a contractible substrate and a multilayer structure to the corner display area CDA. Accordingly, the stacked structure of the multilayer film disposed on the corner display area CDA or the shape of the substrate 100 may be different from the stacked structure of the multilayer film disposed on the front display area FDA or the shape of the substrate 100 .

In an embodiment, the corner display area CDA may include a plurality of extension areas extending from the intermediate display area MDA, and a through portion may be provided between the plurality of adjacent extension areas. Alternatively, in another embodiment, the corner display area CDA includes pixel arrangement areas in which the second pixel PX2 is disposed and connection areas connecting the pixel arrangement areas and the intermediate display area MDA, and One of the pixel arrangement areas and the connection areas may define a through area. Hereinafter, it will be described in detail with reference to the drawings.

5A to 5C are enlarged views illustrating a part of a display panel according to an exemplary embodiment of the present invention.

5A to 5C , the display panel may include a display area and a peripheral area PA, and the display areas include a front display area FDA, side display areas SDA1 and SDA2, and a corner display area CDA. ), and an intermediate display area MDA.

The first pixel PX1 may be disposed in the front display area FDA, the second pixel PX2 may be disposed in the corner display area CDA, and the third pixel PX3 in the middle display area MDA. ) can be placed. 5A to 5C , the sizes of the second pixel PX2 and the third pixel PX3 are the same, and the sizes of the first pixel PX1 and the third pixel PX3 are different. In another exemplary embodiment, the sizes of the first to third pixels PX1 to PX3 may all be the same. In another embodiment, the sizes of the first pixels PX1 to PX3 may be different from each other. In another embodiment, any one of the first pixel PX1 , the second pixel PX2 , and the third pixel PX3 may include the first pixel PX1 , the second pixel PX2 , and the third pixel ( PX3) may be the same as the other one.

The corner display area CDA may include a plurality of extension areas LA extending from the middle display area MDA. In this case, the plurality of extension areas LA may extend in a direction away from the front display area FDA. Also, second pixels PX2 may be disposed in each of the plurality of extension areas LA. 5A and 5B , the second pixels PX2 may be arranged in a line along the extending direction of the extension area LA. Referring to FIG. 5C , the second pixels PX2 may be disposed along a plurality of lines along the extending direction of the extension area LA. Hereinafter, the case in which the second pixels PX2 are arranged in a line along the extending direction of the extension area LA will be described in detail.

A through portion PNP may be provided between the plurality of adjacent extension areas LA. Accordingly, an empty space may be defined between the plurality of adjacent extension areas LA.

Referring to FIG. 5A , the width of the through portion PNP may increase from the middle display area MDA toward the ends of the plurality of extension areas LA. That is, the width of the through portion PNP may increase in a direction away from the front display area FDA. In this case, the width of the through portion PNP means a separation distance between the plurality of adjacent extension areas LA. That is, the plurality of extension areas LA may be radially disposed.

For example, the first width dis1 of the penetrating portion PNP at the distal end of the extension areas LA may be equal to the second width dis1 of the penetrating portion PNP at any middle of the distal end and the intermediate display area MDA. dis2) can be greater. In some embodiments, the extension areas LA adjacent to the portion where the extension areas LA and the intermediate display area MDA are connected may be integrally provided.

Referring to FIG. 5B , the width of the penetrating portion PNP may be constant along the direction from the middle display area MDA to the distal end of the extension area LA. In this case, the plurality of extension areas LA may extend in the same direction from the intermediate display area MDA.

The peripheral area PA may fix distal ends of the plurality of extension areas LA. Accordingly, the plurality of extension areas LA may be fixed by the peripheral area PA. In some embodiments, power wiring and/or driving circuits may be disposed in the peripheral area PA. In some embodiments, the peripheral area PA may be spaced apart from each other corresponding to each of the plurality of extension areas LA. In this case, the through portion PNP may extend to the peripheral area PA between the plurality of adjacent extension areas LA.

6A and 6B are plan views illustrating any one of the extension areas LA according to an embodiment of the present invention.

Referring to FIG. 6A , the corner display area CDA may include a plurality of extension areas LA extending from the middle display area MDA, and a through portion may be provided between the plurality of adjacent extension areas LA. have. In addition, the second pixel PX2 including the second display element may be disposed in the extension area LA, and the third pixel PX3 including the third display element may be disposed in the middle display area MDA. .

The display panel may include a groove Gv disposed on the substrate. The groove Gv may be concave in the thickness direction of the substrate. In the present embodiment, at least one of the grooves Gv may be disposed in the extension area LA. For example, the groove Gv may include a first groove Gv1 , a second groove Gv2 , and a third groove Gv3 . In this case, the first groove Gv1 and the second groove Gv2 may be disposed in the extension area LA, and the second groove Gv2 may be disposed to surround the first groove Gv1. The third groove Gv3 may be disposed to be spaced apart from the extension area LA. The third groove Gv3 may extend along the corner display area CDA. In some embodiments, the third groove Gv3 may extend in one direction.

At least one of the grooves Gv may be disposed to surround the second pixel PX2 . For example, the first groove Gv1 and the second groove Gv2 may be disposed to surround the plurality of second pixels PX2 . That is, the first groove Gv1 and the second groove Gv2 may surround the second display element. As another example, the first groove Gv1 may be disposed to individually surround the second pixel PX2 .

In addition, the present embodiment may include the inorganic pattern layer PVX2 disposed on both sides of the groove Gv and having a pair of protruding tips protruding toward the center of the groove Gv.

In the present embodiment, at least one inorganic pattern layer PVX2 having a groove Gv and a protruding tip may be disposed in the extension area LA. When the second display element included in the second pixel PX2 is an organic light emitting diode, the second display element may include a pixel electrode, an intermediate layer including an emission layer, and a counter electrode 213 . In addition, the intermediate layer may include a first functional layer between the pixel electrode and the emission layer, and/or a second functional layer between the emission layer and the counter electrode 213 . The first functional layer and the second functional layer may be formed on the entire surface of the intermediate display area MDA and the extension area LA. The first functional layer and the second functional layer may include an organic material, and external oxygen or moisture is transmitted through the first functional layer and the second functional layer to the intermediate display area (MDA) and the extended area ( LA) can be introduced into the interior. Such oxygen or moisture may damage the organic light emitting diode in the middle display area MDA and the extended area LA. In this embodiment, the first functional layer and the second functional layer can be cut off by the groove (Gv) and the protruding tip, and moisture and oxygen can be prevented from flowing into the organic light emitting diode from the outside. Accordingly, it is possible to prevent damage to the organic light emitting diode.

The display panel may include a dam portion DP disposed on the substrate. The dam portion DP may protrude in the thickness direction of the substrate. In the present embodiment, at least one of the dam portions DP may be disposed in the extension area LA. For example, the dam part DP may include a first dam part DP1 and a second dam part DP2. In this case, the first dam part DP1 may be disposed in the extended area LA, and the second dam part DP2 may be disposed to be spaced apart from the extended area LA. The second dam part DP2 may extend along the corner display area CDA.

At least one of the dam parts DP may be disposed to surround the second pixel PX2 . That is, at least one of the dam portions DP may be disposed to surround the second display element. For example, the first dam part DP1 may be disposed to surround the plurality of second pixels PX2 . Also, the first dam part DP1 may be disposed between the first groove Gv1 and the second groove Gv2.

In an embodiment of the present invention, at least one dam portion DP may be disposed in the extension area LA. In this case, when the second display element included in the second pixel PX2 is an organic light emitting diode, the organic light emitting diode may be vulnerable to oxygen and moisture as described above. Accordingly, a thin film encapsulation layer for encapsulating the organic light emitting diode may be disposed on the second pixel PX2 . In this case, the thin film encapsulation layer may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. Since the dam part DP according to the embodiment of the present invention protrudes in the thickness direction of the substrate, it is possible to control the flow of the at least one organic encapsulation layer. In this case, the dam unit DP may separate the at least one organic encapsulation layer. In addition, the at least one organic encapsulation layer may be filled in the first groove Gv1 and the third groove Gv3.

In an embodiment of the present invention, one of the multilayer films stacked on the extension area LA may have a contact hole CNT corresponding to a distal end of the extension area LA. In this case, the contact hole CNT may be disposed inside the first groove Gv1. That is, the contact hole CNT may be surrounded by the first groove Gv1. The contact hole CNT may be disposed between the second pixel PX2 and the first groove Gv1 furthest from the intermediate display area MDA. In the present exemplary embodiment, the counter electrode 213 may also be formed on the entire surface of the intermediate display area MDA and the extension area LA similarly to the first functional layer or the second functional layer. Even in this case, the counter electrode 213 may be disconnected based on the groove Gv. Accordingly, the connection wiring CL for supplying power may be disposed in the extension area LA, and the connection wiring CL is connected to the second power voltage ELVSS through the contact hole CNT to the second pixel PX2. , see FIG. 3) can be supplied.

Referring to FIG. 6B , the groove Gv may further include a fourth groove Gv4. The fourth groove Gv4 may be disposed in the extension area LA, and may be disposed to surround the second groove Gv2.

The dam part DP may further include a third dam part DP3. The third dam part DP3 may be disposed to surround the first dam part DP1 . Also, the third dam part DP3 may be disposed between the second groove Gv2 and the fourth groove Gv4. As such, in an embodiment, the dam portion DP and the groove Gv may be alternately disposed. In another embodiment, the grooves Gv may be continuously disposed or the dam portions DP may be continuously disposed.

Hereinafter, as shown in FIG. 6A , the groove Gv includes the first groove Gv1 , the second groove Gv2 , and the third groove Gv3 , and the dam portion DP includes the first dam portion DP1 and the third groove Gv3 . A case in which the second dam part DP2 is included will be described in detail.

7A and 7B are plan views illustrating an arrangement structure of sub-pixels in the extended area LA according to an exemplary embodiment of the present invention. In FIGS. 7A and 7B , the same reference numerals as those of FIG. 6A mean the same members, and thus redundant descriptions will be omitted.

7A and 7B , the corner display area CDA includes a plurality of extension areas LA extending from the middle display area MDA, and a through portion is formed between the plurality of adjacent extension areas LA. can be provided In addition, the second pixel PX2 including the second display element may be disposed in the extension area LA, and the third pixel PX3 including the third display element may be disposed in the middle display area MDA. .

A plurality of second pixels PX2 may be provided in the extended area LA. In this case, the plurality of second pixels PX2 may be arranged side by side along the extension direction EDR of the extension area LA.

In an embodiment, a plurality of third pixels PX3 may be provided in the intermediate display area MDA. In an embodiment, the plurality of third pixels PX3 may be arranged side by side in the extension direction EDR. In this case, the plurality of third pixels PX3 may be disposed side by side with the plurality of second pixels PX2 .

The second pixel PX2 and the third pixel PX3 may include a red sub-pixel Pr, a green sub-pixel Pg, and a blue sub-pixel Pb, respectively. The red sub-pixel Pr, the green sub-pixel Pg, and the blue sub-pixel Pb may emit red light, green light, and blue light, respectively. In the present specification, a sub-pixel is a minimum unit for realizing an image and refers to a light emitting area. Meanwhile, when an organic light emitting diode is employed as a display element, the light emitting area may be defined by an opening of the pixel defining layer. This will be described later.

Referring to FIG. 7A , the red subpixel Pr, the green subpixel Pg, and the blue subpixel Pb may have a stripe structure. That is, the red sub-pixel Pr, the green sub-pixel Pg, and the blue sub-pixel Pb may be arranged side by side in the vertical direction VDR perpendicular to the extension direction EDR. In this case, the red sub-pixels Pr, the green sub-pixels Pg, and the blue sub-pixels Pb may be arranged side by side in the extension direction EDR, respectively. Also, the red subpixel Pr, the green subpixel Pg, and the blue subpixel Pb may have a long side in the extension direction EDR.

Alternatively, unlike illustrated, the red sub-pixel Pr, the green sub-pixel Pg, and the blue sub-pixel Pb may be arranged side by side in the extension direction EDR. In this case, the red sub-pixel Pr, the green sub-pixel Pg, and the blue sub-pixel Pb may have a long side in the vertical direction VDR.

In an embodiment, the red sub-pixel Pr, the green sub-pixel Pg, and the blue sub-pixel Pb of the third pixel PX3 are the red sub-pixel Pr and the green color of the second pixel PX2, respectively. The sub-pixel Pg and the blue sub-pixel Pb may be disposed side by side.

Referring to FIG. 7B , the sub-pixel arrangement structure of the second pixel PX2 and the sub-pixel arrangement structure of the third pixel PX3 may have an S-stripe structure. The second pixel PX2 and the third pixel PX3 may include a red sub-pixel Pr, a green sub-pixel Pg, and a blue sub-pixel Pb, respectively.

In the present embodiment, the green sub-pixel Pg may be disposed in the first column 11 , and the red sub-pixel Pr and the blue sub-pixel Pb may be disposed in the adjacent second column 21 . In this case, the green subpixel Pg may be disposed in a rectangular shape having a long side in the vertical direction VDR, and the red subpixel Pr and the blue subpixel Pb may be disposed in a rectangular shape. In other words, it can be said that the side of the red subpixel Pr and the side of the blue subpixel Pb are disposed to face the long side of the green subpixel Pg.

Alternatively, in another embodiment, the sub-pixel arrangement structure of the second pixel PX2 and the third pixel PX3 may be a pentile type.

8 is a cross-sectional view schematically illustrating a front display area (FDA) according to an embodiment of the present invention.

Referring to FIG. 8 , the display panel may include a substrate 100 , a buffer layer 111 , a pixel circuit layer PCL, a display element layer DEL, and a thin film encapsulation layer TFE.

The buffer layer 111 may be disposed on the substrate 100 . The buffer layer 111 may include an inorganic insulating material such as silicon nitride, silicon oxynitride, and silicon oxide, and may be a single layer or multiple layers including the above-described inorganic insulating material.

The pixel circuit layer PCL may be disposed on the buffer layer 111 . The pixel circuit layer PCL includes the first thin film transistor TFT1 and the inorganic insulating layer IIL disposed below or/and above the components of the first thin film transistor TFT1, the first planarization layer 115, and the first thin film transistor TFT1. Two planarization layers 116 may be included. The inorganic insulating layer IIL may include a first gate insulating layer 112 , a second gate insulating layer 113 , and an interlayer insulating layer 114 .

The first thin film transistor TFT1 may include a semiconductor layer Act, and the semiconductor layer Act may include polysilicon. Alternatively, the semiconductor layer Act may include amorphous silicon, an oxide semiconductor, or an organic semiconductor. The semiconductor layer Act may include a channel region and a drain region and a source region respectively disposed on both sides of the channel region. The gate electrode GE may overlap the channel region.

The gate electrode GE may include a low-resistance metal material. The gate electrode GE may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), and the like, and may be formed as a multilayer or single layer including the above material. have.

The first gate insulating layer 112 between the semiconductor layer Act and the gate electrode GE is formed of silicon oxide (SiO ₂ ), silicon nitride (SiN _X ), silicon oxynitride (SiON), and aluminum oxide (Al ₂ O _{3 ).} ), titanium oxide (TiO ₂ ), tantalum oxide (Ta ₂ O ₅ ), hafnium oxide (HfO ₂ ), or an inorganic insulating material such as zinc oxide (ZnO).

The second gate insulating layer 113 may be provided to cover the gate electrode GE. The second gate insulating layer 113 is similar to the first gate insulating layer 112 , silicon oxide (SiO ₂ ), silicon nitride (SiN _X ), silicon oxynitride (SiON), aluminum oxide (Al ₂ O ₃ ), It may include an inorganic insulating material such as titanium oxide (TiO ₂ ), tantalum oxide (Ta ₂ O ₅ ), hafnium oxide (HfO _{2 ), or zinc oxide (ZnO).}

An upper electrode CE2 of the storage capacitor Cst may be disposed on the second gate insulating layer 113 . The upper electrode CE2 may overlap the gate electrode GE below it. In this case, the gate electrode GE and the upper electrode CE2 overlapping with the second gate insulating layer 113 interposed therebetween may form the storage capacitor Cst. That is, the gate electrode GE may function as the lower electrode CE1 of the storage capacitor Cst.

In this way, the storage capacitor Cst and the first thin film transistor TFT1 may be formed to overlap each other. In some embodiments, the storage capacitor Cst may be formed not to overlap the first thin film transistor TFT1.

The upper electrode CE2 includes aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), and iridium (Ir). , chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and/or copper (Cu), and may be a single layer or multiple layers of the aforementioned materials. .

The interlayer insulating layer 114 may cover the upper electrode CE2 . The interlayer insulating layer 114 is silicon oxide (SiO ₂ ), silicon nitride (SiN _X ), silicon oxynitride (SiON), aluminum oxide (Al ₂ O ₃ ), titanium oxide (TiO ₂ ), tantalum oxide (Ta ₂ O) ₅ ), hafnium oxide (HfO ₂ ), or zinc oxide (ZnO), and the like. The interlayer insulating layer 114 may be a single layer or a multilayer including the aforementioned inorganic insulating material.

The drain electrode DE and the source electrode SE may be respectively positioned on the interlayer insulating layer 114 . The drain electrode DE and the source electrode SE may include a material having good conductivity. The drain electrode DE and the source electrode SE may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), or the like, and a multilayer including the above material. Alternatively, it may be formed as a single layer. In an embodiment, the drain electrode DE and the source electrode SE may have a multilayer structure of Ti/Al/Ti.

The first planarization layer 115 may be disposed to cover the drain electrode DE and the source electrode SE. The first planarization layer 115 may include an organic insulating layer. The first planarization layer 115 is a general general-purpose polymer such as Polymethylmethacrylate (PMMA) or Polystyrene (PS), a polymer derivative having a phenol-based group, an acrylic polymer, an imide-based polymer, an aryl ether-based polymer, an amide-based polymer, a fluorine-based polymer, It may include an organic insulating material such as p-xylene-based polymer, vinyl alcohol-based polymer, and blends thereof.

The first connection electrode CML1 may be disposed on the first planarization layer 115 . In this case, the first connection electrode CML1 may be connected to the drain electrode DE or the source electrode SE through the contact hole of the first planarization layer 115 . The first connection electrode CML1 may include a material having good conductivity. The first connection electrode CML1 may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), and the like, and is formed as a multilayer or single layer including the above material. can be In an embodiment, the first connection electrode CML1 may have a multilayer structure of Ti/Al/Ti.

The second planarization layer 116 may be disposed to cover the first connection electrode CML1 . The second planarization layer 116 may include an organic insulating layer. The second planarization layer 116 is a general-purpose polymer such as Polymethylmethacrylate (PMMA) or Polystyrene (PS), a polymer derivative having a phenolic group, an acrylic polymer, an imide-based polymer, an arylether-based polymer, an amide-based polymer, a fluorine-based polymer, It may include an organic insulating material such as p-xylene-based polymer, vinyl alcohol-based polymer, and blends thereof.

The display element layer DEL may be disposed on the pixel circuit layer PCL. The display element layer DEL includes a first organic light emitting diode OLED1 , wherein the pixel electrode 211 of the first organic light emitting diode OLED1 is connected to a first connection electrode through a contact hole of the second planarization layer 116 . (CML1) may be electrically connected.

The pixel electrode 211 includes indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In ₂ O ₃ : indium oxide), and indium. It may include a conductive oxide such as indium gallium oxide (IGO) or aluminum zinc oxide (AZO). In another embodiment, the pixel electrode 211 may include silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), or neodymium (Nd). , iridium (Ir), chromium (Cr), or a reflective layer including a compound thereof may be included. In another embodiment, the pixel electrode 211 may further include a layer formed _{of ITO, IZO, ZnO, or In 2} O _{3 above/under the above-described reflective layer.}

A pixel defining layer 118 having an opening 118OP exposing a central portion of the pixel electrode 211 may be disposed on the pixel electrode 211 . The pixel defining layer 118 may include an organic insulating material and/or an inorganic insulating material. The opening 118OP may define an emission area (hereinafter, referred to as an emission area, EA) of light emitted from the first organic light emitting diode OLED1 . For example, the width of the opening 118OP may correspond to the width of the light emitting area EA.

A spacer 119 may be disposed on the pixel defining layer 118 . The spacer 119 may be used to prevent damage to the substrate 100 in a method of manufacturing a display device. In the case of a method of manufacturing a display panel, a mask sheet may be used. In this case, the mask sheet enters the opening 118OP of the pixel defining layer 118 or is in close contact with the pixel defining layer 118 to form the substrate 100 . It is possible to prevent a defect in which a part of the substrate 100 is damaged or damaged by the mask sheet when the deposition material is deposited on the substrate.

The spacer 119 may include an organic insulating material such as polyimide. Alternatively, the spacer 119 may include an inorganic insulating material such as silicon nitride or silicon oxide, or may include an organic insulating material and an inorganic insulating material.

In an embodiment, the spacer 119 may include a material different from that of the pixel defining layer 118 . Alternatively, in another embodiment, the spacer 119 may include the same material as the pixel defining layer 118 . In this case, the pixel defining layer 118 and the spacer 119 are combined together in a mask process using a halftone mask or the like. can be formed.

An intermediate layer 212 may be disposed on the pixel defining layer 118 . The intermediate layer 212 may include an emission layer 212b disposed in the opening 118OP of the pixel defining layer 118 . The light emitting layer 212b may include a polymer or a low molecular weight organic material that emits light of a predetermined color.

A first functional layer 212a and a second functional layer 212c may be disposed below and above the emission layer 212b, respectively. The first functional layer 212a may include, for example, a hole transport layer (HTL) or a hole transport layer and a hole injection layer (HIL). The second functional layer 212c is a component disposed on the emission layer 212b and may be optional. The second functional layer 212c may include an electron transport layer (ETL) and/or an electron injection layer (EIL). The first functional layer 212a and/or the second functional layer 212c may be a common layer formed to cover the entire substrate 100 like the counter electrode 213 to be described later.

The counter electrode 213 may be made of a conductive material having a low work function. For example, the counter electrode 213 may include silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium ( Ir), chromium (Cr), lithium (Li), calcium (Ca), or an alloy thereof may include a (semi) transparent layer. Alternatively, the counter electrode 213 may further include a layer such as _{ITO, IZO, ZnO, or In 2} O ₃ on the (semi)transparent layer including the above-described material.

In some embodiments, a capping layer (not shown) may be further disposed on the counter electrode 213 . The capping layer may include LiF, an inorganic material, and/or an organic material.

The thin film encapsulation layer TFE may be disposed on the counter electrode 213 . In an embodiment, the thin film encapsulation layer (TFE) includes at least one inorganic encapsulation layer and at least one organic encapsulation layer, and in one embodiment, FIG. 8 shows a first layer in which the thin film encapsulation layers (TFE) are sequentially stacked. It shows an inorganic encapsulation layer 310 , an organic encapsulation layer 320 , and a second inorganic encapsulation layer 330 .

The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may include at least one inorganic material selected from among aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride. have. The organic encapsulation layer 320 may include a polymer-based material. The polymer-based material may include an acrylic resin, an epoxy-based resin, polyimide, polyethylene, and the like. In an embodiment, the organic encapsulation layer 320 may include an acrylate.

Although not shown, a touch electrode layer may be disposed on the thin film encapsulation layer (TFE), and an optical function layer may be disposed on the touch electrode layer. The touch electrode layer may acquire coordinate information according to an external input, for example, a touch event. The optical function layer may reduce the reflectance of light (external light) incident from the outside toward the display device, and/or may improve color purity of light emitted from the display device. In an embodiment, the optical functional layer may include a retarder and/or a polarizer. The phase retarder may be a film type or liquid crystal coating type, and may include a λ/2 phase delay and/or a λ/4 phase delay. The polarizer may also be a film type or a liquid crystal coating type. The film type may include a stretched synthetic resin film, and the liquid crystal coating type may include liquid crystals arranged in a predetermined arrangement. The phase retarder and the polarizer may further include a protective film.

In another embodiment, the optical function layer may include a black matrix and color filters. The color filters may be arranged in consideration of the color of light emitted from each of the pixels of the display device. Each of the color filters may include a red, green, or blue pigment or dye. Alternatively, each of the color filters may further include quantum dots in addition to the aforementioned pigments or dyes. Alternatively, some of the color filters may not include the aforementioned pigment or dye, and may include scattering particles such as titanium oxide.

In another embodiment, the optical functional layer may include a destructive interference structure. The destructive interference structure may include a first reflective layer and a second reflective layer disposed on different layers. The first reflected light and the second reflected light respectively reflected from the first and second reflective layers may destructively interfere, and thus external light reflectance may be reduced.

An adhesive member may be disposed between the touch electrode layer and the optical function layer. As the adhesive member, a general one known in the art may be employed without limitation. The adhesive member may be a pressure sensitive adhesive (PSA).

9 is a cross-sectional view illustrating a groove Gv provided in a display panel according to an exemplary embodiment.

Referring to FIG. 9 , the groove Gv may be provided in the base layer BL and the lower layer LL. The groove Gv is disposed on the substrate and may be concave in a thickness direction of the substrate. In this case, the groove Gv may be defined as the hole H of the upper surface of the base layer BL and the lower layer LL.

In an embodiment, the base layer BL may be a lower inorganic layer or a lower inorganic pattern layer. In this case, the base layer BL may be a single layer or a multilayer layer of silicon nitride (SiNx) and silicon oxide (SiOx). In another embodiment, the base layer BL may be a metal pattern layer. In this case, the base layer BL may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc. can be formed.

The lower layer LL may correspond to some of the components of the display panel described with reference to FIG. 8 . For example, the lower layer LL may be the second planarization layer 116 described with reference to FIG. 8 . Alternatively, the lower layer LL may include a first planarization layer 115 and a second planarization layer 116 . Alternatively, the lower layer LL may further include a third planarization layer between the first planarization layer 115 and the second planarization layer 116 . That is, the lower layer LL may include at least one of a first planarization layer 115 , a second planarization layer 116 , and a third planarization layer.

In an embodiment, when the base layer BL is a lower inorganic pattern layer or a metal pattern layer, the lower layer LL may cover an edge of the lower inorganic pattern layer or the metal pattern layer. Also, the hole H of the lower layer LL may expose a central portion of the lower inorganic pattern layer or a central portion of the metal pattern layer.

In the present embodiment, the inorganic pattern layer PVX2 may be disposed on both sides of the groove Gv. The inorganic pattern layer PVX2 may have a pair of protruding tips PT protruding toward the center of the groove Gv. In this case, the first width W1 between the pair of protruding tips PT may be smaller than the second width W2 or diameter of the hole H of the lower layer LL. In this case, the second width W2 is a distance between the portions meeting the inorganic pattern layer PVX2 among the side surfaces of the lower layer LL facing each other.

At least one of the first functional layer 212a and the second functional layer 212c may be disposed on the inorganic pattern layer PVX2. At this time, at least one of the first functional layer 212a and the second functional layer 212c may be cut off by the protruding tip PT and the groove Gv.

At least one of the first functional layer pattern 212Pa and the second functional layer pattern 212Pc may be disposed in the groove Gv. In this case, the first functional layer pattern 212Pa and the second functional layer pattern 212Pc may include the same material as at least one of the first functional layer 212a and the second functional layer 212c. At least one of the first functional layer pattern 212Pa and the second functional layer pattern 212Pc may be simultaneously formed when at least one of the first functional layer 212a and the second functional layer 212c is formed.

The counter electrode 213 may be disposed on at least one of the first functional layer 212a and the second functional layer 212c. The counter electrode 213 may be cut off by the protruding tip PT and the groove Gv. The counter electrode pattern 213P may be disposed in the groove Gv. In this case, the counter electrode pattern 213P may include the same material as the counter electrode 213 . The counter electrode pattern 213P may be simultaneously formed when the counter electrode 213 is formed.

Accordingly, in the present embodiment, at least one of the first functional layer 212a and the second functional layer 212c and the counter electrode 213 may be cut off by the protruding tip PT and the groove Gv. Hereinafter, for convenience of description, a case in which the first functional layer 212a, the second functional layer 212c, and the counter electrode 213 are cut off by the protruding tip PT and the groove Gv will be described in detail. decide to do

10A is a cross-sectional view taken along line X-X' of FIG. 6A. 10B is an enlarged view of the groove Gv and the dam portion DP of FIG. 10A. In FIGS. 10A and 10B , the same reference numerals as those of FIG. 8 mean the same members, and thus a duplicate description will be omitted.

10A and 10B , the display panel may include a corner display area CDA and an intermediate display area MDA. The corner display area CDA may include a second thin film transistor TFT2 and a second organic light emitting diode OLED2 that is a second display element, and the middle display area MDA has a third organic light emitting diode that is a third display element. It may include a diode OLED3. The second thin film transistor TFT2 and the second organic light emitting diode OLED2 implement the second sub-pixel in the corner display area CDA, and the third organic light emitting diode OLED3 implements the third sub-pixel in the middle display area MDA. A sub-pixel can be implemented.

In the present embodiment, a groove Gv concave in the thickness direction of the substrate 100 may be included on the substrate 100 . In this case, the groove Gv may be disposed between the second organic light emitting diode OLED2 and the third organic light emitting diode OLED3 . The groove Gv may include a first groove Gv1 , a second groove Gv2 , and a third groove Gv3 . The first groove Gv1, the second groove Gv2, and the third groove Gv3 may be identical to the groove Gv described with reference to FIG. 9 . In this case, the lower layers of the first groove Gv1 , the second groove Gv2 , and the third groove Gv3 may be the second planarization layer 116 .

Hereinafter, the multilayer film stacked on the middle display area MDA and the corner display area CDA will be described in detail.

In the present embodiment, the intermediate display area MDA and the corner display area CDA include the substrate 100 , the buffer layer 111 , the pixel circuit layer PCL, the display element layer DEL, and the thin film encapsulation layer TFE. These may be stacked. The pixel circuit layer PCL includes an inorganic insulating layer IIL, a first connection wiring CL1 , a first planarization layer 115 , a second connection wiring CL2 , a second planarization layer 116 , and an inorganic pattern layer. (PVX2).

A buffer layer 111 may be disposed on the substrate 100 . In an embodiment, the buffer layer 111 may have a protruding tip in the corner display area CDA. The protruding tip of the buffer layer 111 may prevent the first functional layer 212a and/or the second functional layer 212c from being formed between the adjacent extended areas LA.

An inorganic insulating layer IIL may be disposed on the buffer layer 111 . The inorganic insulating layer IIL may include a first gate insulating layer 112 , a second gate insulating layer 113 , and an interlayer insulating layer 114 .

A first connection line CL1 may be disposed on the inorganic insulating layer IIL. The first connection line CL1 may extend from the middle display area MDA to the corner display area CDA. The first connection line CL1 may be a signal line for providing an electrical signal to the second pixel PX2 of the corner display area CDA or a power line for providing power.

The first planarization layer 115 may be disposed on the inorganic insulating layer IIL, and the first planarization layer 115 may cover the first connection wiring CL1 . A second connection line CL2 , a second connection electrode CML2 , and a third connection electrode CML3 may be disposed on the first planarization layer 115 .

The second connection line CL2 may extend from the middle display area MDA to the corner display area CDA. The second connection wiring CL2 may be a signal line providing an electrical signal to the second thin film transistor TFT2 of the corner display area CDA, similar to the first connection wiring CL1, or a power supply wiring for providing power. .

In this embodiment, the lower inorganic pattern layer PVX1 may be disposed on the second connection wiring CL2 . In an embodiment, a plurality of lower inorganic pattern layers PVX1 may be disposed on the second connection wiring CL2 , and the plurality of lower inorganic pattern layers PVX1 may be disposed to be spaced apart from each other on the second connection wiring CL2 . can be

The second planarization layer 116 may be disposed to cover the second connection line CL2 , the second connection electrode CML2 , and the third connection electrode CML3 . In one embodiment, the second planarization layer 116 may be a lower layer defining the groove Gv. In this case, the second planarization layer 116 may include a hole H, which may correspond to the lower inorganic pattern layer PVX1. Also, the second planarization layer 116 may cover an edge of the lower inorganic pattern layer PVX1 . Accordingly, the groove Gv may be defined as the central portion of the lower inorganic pattern layer PVX1 and the hole H of the second planarization layer 116 .

In this embodiment, the inorganic pattern layer PVX2 may be disposed on the second planarization layer 116 . The inorganic pattern layer PVX2 is disposed on both sides of the groove Gv, and may have a pair of protruding tips PT protruding toward the center of the groove Gv.

The first functional layer 212a, the second functional layer 212c, and the counter electrode 213 disposed on the inorganic pattern layer PVX2 may be cut off by the groove Gv and the pair of protruding tips PT. have. In addition, a first functional layer pattern 212Pa, a second functional layer pattern 212Pc, and a counter electrode pattern 213P may be disposed in the groove Gv.

In this embodiment, a dam portion DP protruding in the thickness direction of the substrate 100 may be provided on the inorganic pattern layer PVX2. In an embodiment, the dam part DP may include a first dam part DP1 and a second dam part DP2 spaced apart from each other. Also, in an embodiment, the dam portion DP and the groove Gv may be alternately disposed. For example, in the direction from the corner display area CDA to the middle display area MDA, the first groove Gv1, the first dam part DP1, the second groove Gv2, the second dam part DP2, and The third grooves Gv3 may be sequentially disposed.

The dam portion DP may include first layers 118a and 118b and second layers 119a and 119b on the first layers 118a and 118b. In this case, the first layers 118a and 118b may include the same material as the pixel defining layer 118 . Also, the first layers 118a and 118b may be formed simultaneously when the pixel defining layer 118 is formed. The second layers 119a and 119b may include the same material as the spacers 119 (refer to FIG. 8 ). In addition, the second layers 119a and 119b may be simultaneously formed when the spacers 119 are formed.

The thin film encapsulation layer TFE may cover the second organic light emitting diode OLED2 and the third organic light emitting diode OLED3 . The thin film encapsulation layer TFE may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. 10A and 10B illustrate that the thin film encapsulation layer TFE includes a first inorganic encapsulation layer 310 , an organic encapsulation layer 320 , and a second inorganic encapsulation layer 330 .

The thin film encapsulation layer TFE may extend from the second organic light emitting diode OLED2 to the first dam portion DP1 . In addition, the thin film encapsulation layer TFE may extend from the third organic light emitting diode OLED3 to the second dam portion DP2 .

The first inorganic encapsulation layer 310 may completely and continuously cover the corner display area CDA and the middle display area MDA. Specifically, the first inorganic encapsulation layer 310 is formed entirely in the first groove Gv1, the first dam portion DP1, the second groove Gv2, the second dam portion DP2, and the third groove Gv3 and They may be arranged consecutively. Also, the first inorganic encapsulation layer 310 may cover the first functional layer pattern 212Pa, the second functional layer pattern 212Pc, and the counter electrode pattern 213P disposed inside the groove Gv. The first inorganic encapsulation layer 310 may contact the inorganic pattern layer PVX2 . Specifically, the first inorganic encapsulation layer 310 may contact the protruding tip PT of the inorganic pattern layer PVX2.

In an embodiment, the organic encapsulation layer 320 may be separated by the dam portion DP. For example, the organic encapsulation layer 320 may extend from the second organic light emitting diode OLED2 to the first dam portion DP1 and may fill the first groove Gv1 . In addition, the organic encapsulation layer 320 may extend from the third organic light emitting diode OLED3 to the second dam portion DP2 and may fill the third groove Gv3 . That is, the organic encapsulation layer 320 may be controlled by the first dam unit DP1 and the second dam unit DP2 . In this case, the organic encapsulation layer 320 may not be filled in the second groove Gv2.

Like the first inorganic encapsulation layer 310 , the second inorganic encapsulation layer 330 may completely and continuously cover the corner display area CDA and the middle display area MDA. In an embodiment, the second inorganic encapsulation layer 330 may contact the first inorganic encapsulation layer 310 in the first dam unit DP1 and the second dam unit DP2. Also, the second inorganic encapsulation layer 330 may contact the first inorganic encapsulation layer 310 in the second groove Gv2 . Accordingly, the organic encapsulation layer 320 may be separated by the dam portion DP. In some embodiments, at least one of the first layers 118a and 118b and the second layers 119a and 119b of the dam portion DP may be omitted, and the organic encapsulation layer 320 is formed from the intermediate display area MDA. It may extend to the corner display area CDA. That is, the organic encapsulation layer 320 may be integrally provided in the middle display area MDA and the corner display area CDA.

In addition, the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 cover the exposed side surfaces of the substrate 100 , the buffer layer 111 , the inorganic insulating layer (IIL), and the first planarization layer 115 . can be covered

In this embodiment, the hole H of the second planarization layer 116 may be formed by an etching process. Unlike the present exemplary embodiment, if the lower inorganic pattern layer PVX1 is omitted, the second connection wiring CL2 may be etched through the etching process. In this case, the resistance of the second connection line CL2 may be increased. In this embodiment, since the lower inorganic pattern layer PVX1 is disposed on the second connection wiring CL2 to correspond to the hole H of the second planarization layer 116, the second connection wiring CL2 is etched. it can be prevented

In an exemplary embodiment, a driving circuit or a power wiring may be disposed in the middle display area MDA, and the third organic light emitting diode OLED3 may be disposed to overlap the driving circuit or the power wiring. 10A illustrates that the third organic light emitting diode OLED3 overlaps the driving circuit transistor DC-TFT included in the driving circuit. In an embodiment, the third thin film transistor connected to the third organic light emitting diode OLED3 may be disposed to be spaced apart from the middle display area MDA. In this case, the third organic light emitting diode OLED3 may be connected to the third thin film transistor through the third connection electrode CML3 . Alternatively, in some embodiments, the third thin film transistor may be disposed in the middle display area MDA. In this case, the third organic light emitting diode OLED3 may be connected to the third thin film transistor disposed in the middle display area MDA.

10C is an enlarged view of the groove Gv and the dam portion DP according to another embodiment of the present invention. In FIG. 10C , the same reference numerals as those of FIG. 10B denote the same members, and thus a redundant description will be omitted.

Referring to FIG. 10C , a groove Gv concave in the thickness direction of the substrate 100 may be included on the substrate 100 . In this case, the groove Gv may be disposed between the second organic light emitting diode OLED2 and the third organic light emitting diode OLED3 . The groove Gv may include a first groove Gv1 , a second groove Gv2 , and a third groove Gv3 . The first groove Gv1, the second groove Gv2, and the third groove Gv3 may be identical to the groove Gv described with reference to FIG. 9 . In this case, the lower layers of the first groove Gv1 , the second groove Gv2 , and the third groove Gv3 may be the first planarization layer 115 and the second planarization layer 116 .

In the present embodiment, the intermediate display area MDA and the corner display area CDA include the substrate 100 , the buffer layer 111 , the pixel circuit layer PCL, the display element layer DEL, and the thin film encapsulation layer TFE. These may be stacked. The pixel circuit layer PCL includes an inorganic insulating layer IIL, a first connection wiring CL1, a lower inorganic layer PVX1-1, a first planarization layer 115, a second planarization layer 116, and an inorganic pattern layer. (PVX2).

A buffer layer 111 and an inorganic insulating layer IIL may be disposed on the substrate 100 , and a first connection line CL1 may extend from the middle display area MDA to the corner display area CDA.

In the present exemplary embodiment, the lower inorganic layer PVX1-1 may cover the first connection wiring CL1 . In this case, the lower inorganic layer PVX1-1 may entirely cover the first connection wiring CL1 . In some embodiments, the lower inorganic layer PVX1-1 may expose at least a portion of the first connection line CL1 . The lower inorganic layer PVX1-1 may be a single layer or a multilayer layer including an inorganic material such as silicon nitride (SiNx) and silicon oxide (SiOx).

A lower layer including the first planarization layer 115 and the second planarization layer 116 may be disposed on the lower inorganic layer PVX1-1. The lower layer may expose a portion of the lower inorganic layer PVX1-1. In this case, the lower layer including the first planarization layer 115 and the second planarization layer 116 may have a hole H. In this case, the hole H of the lower layer may be a connection between the hole of the first planarization layer 115 and the hole of the second planarization layer 116 . Accordingly, the groove Gv of the present embodiment may be defined as a part of the lower inorganic layer PVX1-1 and the hole H of the lower layer.

The inorganic pattern layer PVX2 is disposed on both sides of the groove Gv, and the first functional layer 212a, the second functional layer 212c, and the counter electrode 213 have the groove Gv and the inorganic pattern layer PVX2. ) can be cut off by the protruding tip (PT).

In this embodiment, since the hole H of the lower layer including the first planarization layer 115 and the second planarization layer 116 is provided, the depth of the groove Gv may be increased. Accordingly, since the first functional layer 212a, the second functional layer 212c, and the counter electrode 213 may be cut off by the groove Gv and the protruding tip PT with high probability, the reliability of the display panel may be reduced. can be secured.

11A is a cross-sectional view taken along line X-X′ of FIG. 6A according to another embodiment of the present invention. 11B is an enlarged view of the groove Gv and the dam portion DP of FIG. 11A. In FIGS. 11A and 11B , the same reference numerals as those of FIGS. 10A and 10B denote the same member, and thus a redundant description will be omitted.

The embodiment of FIGS. 11A and 11B is different from the embodiment of FIGS. 10A and 10B in that it includes the third connection line CL3 and the third planarization layer 117 .

11A and 11B , the display panel may include a corner display area CDA and an intermediate display area MDA. The corner display area CDA may include a second thin film transistor TFT2 and a second organic light emitting diode OLED2 that is a second display element, and the middle display area MDA has a third organic light emitting diode that is a third display element. It may include a diode OLED3.

In the present embodiment, a groove Gv concave in the thickness direction of the substrate 100 may be included on the substrate 100 . The inorganic pattern layer PVX2 may have a pair of protruding tips PT protruding toward the center of the groove Gv, and the groove Gv includes the second organic light emitting diode OLED2 and the third organic light emitting diode OLED3 . ) can be placed between

In this embodiment, a third planarization layer 117 may be disposed between the first planarization layer 115 and the second planarization layer 116 . The third planarization layer 117 is a general-purpose polymer such as Polymethylmethacrylate (PMMA) or Polystyrene (PS), a polymer derivative having a phenolic group, an acrylic polymer, an imide-based polymer, an arylether-based polymer, an amide-based polymer, a fluorine-based polymer, It may include an organic insulating material such as p-xylene-based polymer, vinyl alcohol-based polymer, and blends thereof.

A third connection line CL3 may be disposed between the first planarization layer 115 and the third planarization layer 117 . The third connection line CL3 may extend from the middle display area MDA to the corner display area CDA. Accordingly, in the present exemplary embodiment, the signal or power voltage supplied from the driving circuit disposed in the intermediate display area MDA is applied to the first connecting line CL1 , the second connecting line CL2 , and the third connecting line CL3 . may be transmitted to the corner display area CDA through The third connection wiring CL3 is conductive including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc. similar to the first connection wiring CL1 or the second connection wiring CL2 . It may include a material, and may be formed as a multi-layer or a single layer including the above material. In an embodiment, the third connection wiring CL3 may have a multilayer structure of Ti/Al/Ti.

In this embodiment, a second connection electrode CML2 connecting the second thin film transistor TFT2 and the second organic light emitting diode OLED2 may be included. The second connection electrode CML2 may include a second lower connection electrode CMLa2 and a second upper connection electrode CMLb2. The second lower connection electrode CMLa2 is disposed between the first planarization layer 115 and the third planarization layer 117 , and the second thin film transistor TFT2 is provided through a contact hole provided in the first planarization layer 115 . can be connected with The second lower connection electrode CMLa2 may include the same material as that of the third connection line CL3 , and may be simultaneously formed when the third connection line CL3 is formed.

The second upper connection electrode CMLb2 may be disposed between the third planarization layer 117 and the second planarization layer 116 . The second upper connection electrode CMLb2 may be connected to the second lower connection electrode CMLa2 through a contact hole formed in the third planarization layer 117 . Also, the second upper connection electrode CMLb2 may be connected to the second organic light emitting diode OLED2 through a contact hole provided in the second planarization layer 116 . The second upper connection electrode CMLb2 may include the same material as that of the second connection line CL2 , and may be simultaneously formed when the second connection line CL2 is formed.

12A, 12B, and 12C are enlarged views of the groove Gv and the dam part DP according to various embodiments of the present disclosure. 12A to 12C, the same reference numerals as in FIGS. 11A and 11B mean the same member, and thus a duplicate description will be omitted.

12A to 12C , the display panel may include a corner display area CDA and an intermediate display area MDA. The corner display area CDA may include a second thin film transistor TFT2 and a second organic light emitting diode OLED2 that is a second display element, and the middle display area MDA has a third organic light emitting diode that is a third display element. It may include a diode OLED3.

In the present embodiment, a groove Gv concave in the thickness direction of the substrate 100 may be included on the substrate 100 . In this case, the groove Gv may be disposed between the second organic light emitting diode OLED2 and the third organic light emitting diode OLED3 . The groove Gv may include a first groove Gv1 , a second groove Gv2 , and a third groove Gv3 .

12A and 12B , the first groove Gv1 , the second groove Gv2 , and the third groove Gv3 may be the same as or similar to the groove Gv described with reference to FIG. 9 . In this case, the lower layers of the first groove Gv1 , the second groove Gv2 , and the third groove Gv3 may include a third planarization layer 117 and a second planarization layer 116 .

Referring to FIG. 12B , a metal pattern layer CLP may be disposed on the first planarization layer 115 . In an embodiment, a plurality of metal pattern layers CLP may be disposed on the first planarization layer 115 , and a plurality of metal pattern layers CLP may be disposed to be spaced apart from each other. In an embodiment, the metal pattern layer CLP may be connected to the first connection wiring CL1 through the connection hole 115CNT of the first planarization layer 115 .

The third planarization layer 117 and the second planarization layer 116 may be disposed to cover an edge of the metal pattern layer CLP. In this case, the lower layer including the third planarization layer 117 and the second planarization layer 116 may have a hole H, and the hole H of the lower layer forms a central portion of the metal pattern layer CLP. can be exposed. Accordingly, the hole H of the lower layer and the central portion of the metal pattern layer CLP may define the groove Gv.

In this embodiment, the lower inorganic pattern layer may be omitted, and the metal pattern layer CLP may be simultaneously formed when the connection wiring is formed. Accordingly, the manufacturing process of the display panel may be simplified.

Referring to FIG. 12C , the first groove Gv1 , the second groove Gv2 , and the third groove Gv3 may be the same as or similar to the groove Gv described with reference to FIG. 9 . In this case, the lower layers of the first groove Gv1 , the second groove Gv2 , and the third groove Gv3 are the first planarization layer 115 , the third planarization layer 117 and the second planarization layer 116 . may include

The lower inorganic layer PVX1-1 may cover the first connection line CL1 . A lower layer including the first planarization layer 115 and the second planarization layer 116 may be disposed on the lower inorganic layer PVX1-1. In this case, the lower layer may expose a portion of the lower inorganic layer PVX1-1. In this case, the hole H of the lower layer may be a hole in the first planarization layer 115 , a hole in the third planarization layer 117 , and a hole in the second planarization layer 116 connected thereto. Accordingly, the groove Gv of the present embodiment may be defined as a part of the lower inorganic layer PVX1-1 and the hole H of the lower layer.

13 is a cross-sectional view taken along line XIII-XIII' of FIG. 6A. In FIG. 13 , the same reference numerals as those of FIGS. 10A and 10B mean the same member, and thus a redundant description will be omitted.

Referring to FIG. 13 , the display panel may include a corner display area CDA. The corner display area CDA may include a plurality of extension areas LA extending from the middle display area, and a through portion may be provided between the plurality of adjacent extension areas LA. The second organic light emitting diode OLED2 and the second thin film transistor TFT2 may be disposed in the extension area LA. The second organic light emitting diode OLED2 of FIG. 13 is an organic light emitting diode farthest from the middle display area of the second organic light emitting diodes OLED2 disposed in the extended area LA.

The connection line CL may extend from the intermediate display area to the extension areas LA. For example, the connection line CL may include a first connection line CL1 and a second connection line CL2 . In an embodiment, the first connection wiring CL1 may be disposed between the inorganic insulating layer IIL and the first planarization layer 115 , and the second connection wiring CL2 may include the first planarization layer 115 and It may be disposed between the second planarization layers 116 . In an embodiment, the second connection line CL2 may supply the second power voltage ELVSS (refer to FIG. 3 ) to the second organic light emitting diode OLED2 .

The second planarization layer 116 may include a contact hole CNT exposing at least a portion of the second connection line CL2 . In this case, the contact hole CNT may be disposed at the distal end of the extension area LA. Specifically, the contact hole CNT includes the second organic light emitting diode OLED2 and the second groove farthest from the middle display area MDA among the second organic light emitting diodes OLED2 disposed in the extension area LA. Gv2). In an embodiment, the inorganic pattern layers PVX2 may be spaced apart to correspond to the contact hole CNT of the second planarization layer 116 to expose the second connection wiring CL2 .

The second connection line CL2 may be connected to the counter electrode 213 . In an embodiment, the second connection line CL2 and the counter electrode 213 may be connected through the pixel electrode pattern 211P including the same material as the pixel electrode 211 . The pixel electrode pattern 211P may be disposed to be spaced apart from the pixel electrode 211 , and may be disposed in the contact hole CNT. Also, the pixel electrode pattern 211P may be simultaneously formed when the pixel electrode 211 is formed.

In the present exemplary embodiment, the contact hole CNT of the second planarization layer 116 may be disposed at the distal end of the extension area LA. In this case, the first functional layer 212a and the second functional layer 212c may be disposed to be spaced apart from the contact hole CNT to expose the contact hole CNT. That is, the first functional layer 212a and the second functional layer 212c may not extend to the contact hole CNT exposing the second connection line CL2 . Accordingly, the second connection line CL2 and the counter electrode 213 connected through the pixel electrode pattern 211P may maintain a low resistance. That is, the first functional layer 212a and the second functional layer 212c may not be formed at the distal end of the extended area LA by adjusting the range formed on the entire surface of the extended area LA. In addition, the range of the counter electrode 213 may be adjusted so that it is also formed at the distal end of the extension area LA.

In this case, the counter electrode pattern 213P inside the second groove Gv2 is in contact with the lower inorganic pattern layer PVX1 or the first planarization layer 115, and the protruding tip PT of the inorganic pattern layer PVX2 is It may be in contact with the counter electrode 213 .

14 is a plan view illustrating any one of the extension areas LA according to another embodiment of the present invention. In FIG. 14 , the same reference numerals as those of FIG. 6A mean the same members, and thus a redundant description will be omitted.

Referring to FIG. 14 , the corner display area CDA may include a plurality of extension areas LA extending from the middle display area MDA, and a through portion may be provided between the plurality of adjacent extension areas LA. have. In addition, the second pixel PX2 including the second display element may be disposed in the extension area LA, and the third pixel PX3 including the third display element may be disposed in the middle display area MDA. .

The display panel may include a groove Gv disposed on the substrate. The groove Gv may be concave in the thickness direction of the substrate. In addition, the inorganic pattern layer PVX2 having a pair of protruding tips protruding toward the center of the groove Gv may be disposed on both sides of the groove Gv. In the present embodiment, at least one of the grooves Gv may be disposed in the extension area LA. For example, the groove Gv may include a first groove Gv1 , a second groove Gv2 , and a third groove Gv3 .

Also, the connection line CL may extend from the intermediate display area MDA to the extension area LA.

In the present exemplary embodiment, a plurality of second pixels PX2 may be disposed in the extension area LA. In this case, the opposite electrodes 213 of the second organic light emitting diodes may be spaced apart from each other and may be respectively connected to the connection line CL. That is, a plurality of contact holes CNT of the planarization layer may be provided in the extension area LA. In this case, the first groove Gv1 and the inorganic pattern layer PVX2 may be disposed to respectively surround the plurality of second pixels PX2 .

In the present embodiment, when the first functional layer and the second functional layer of the organic light emitting diode are formed using a fine metal mask (FMM), the first functional layer and the second functional layer are spaced apart from each other in each organic light emitting diode can be In addition, since the first groove Gv1 and the inorganic pattern layer are disposed to surround the plurality of second pixels PX2, respectively, the opposite electrode of the organic light emitting diode is formed by the first groove Gv1 and the protruding tip of the inorganic pattern layer. can be cut off Accordingly, the opposite electrodes of the second organic light emitting diodes may be respectively connected to the connection wiring to receive the second power voltage.

15 is a plan view schematically illustrating a corner display area CDA and an intermediate display area MDA according to an embodiment of the present invention. In FIG. 15 , the same reference numerals as those of FIG. 6A mean the same members, and repeated descriptions will be omitted.

Referring to FIG. 15 , the corner display area CDA includes a plurality of extension areas LA extending from the middle display area MDA, and a through portion PNP is formed between the plurality of adjacent extension areas LA. can be provided. In addition, the second pixel PX2 including the second display element may be disposed in the extension area LA, and the third pixel PX3 including the third display element may be disposed in the middle display area MDA. .

A plurality of second pixels PX2 may be provided in the extended area LA, and a plurality of third pixels PX3 may be provided in the intermediate display area MDA. In this case, the second pixels PX2 and the third pixels PX3 may be arranged side by side along the extension direction of the extension area LA.

The third pixels PX3 may include an internal pixel IPX3 and an external pixel OPX3 . In this case, the external pixel OPX3 may face the second pixel PX2 . Also, the external pixel OPX3 may be disposed between the internal pixel IPX3 and the second pixel PX2 .

In the present embodiment, each of the plurality of extension areas LA may include a first extension area LA1 and a second extension area LA2 . In this case, the second extension area LA2 may be disposed between the first extension area LA1 and the intermediate display area MDA. In this case, each of the second extension areas LA2 of the plurality of extension areas LA may be connected to each other. For example, the second extension areas LA2 may be integrally provided. Accordingly, the through portion PNP may be defined as edges of the first extension areas LA1 and edges of the second extension areas LA2 adjacent to each other.

A groove Gv may be included on the corner display area CDA and the middle display area MDA. The groove Gv may be concave in the thickness direction of the substrate. In the present embodiment, at least one of the grooves Gv may be disposed in the extension area LA. The groove (Gv) is, for example, the first groove (Gv1), the second groove (Gv2), the third groove (Gv3), the fifth groove (Gv5), the sixth groove (Gv6), and the seventh groove (Gv6) Gv7).

The first groove Gv1 may be disposed in the extension area LA. For example, the first groove Gv1 may surround the plurality of second pixels PX2 . As another example, the first groove Gv1 may be disposed to individually surround the second pixel PX2 .

The second groove Gv2 may be disposed between the second pixel PX2 and the third pixel PX3 . In an embodiment, the second groove Gv2 may extend in a direction in which the plurality of extension areas LA are spaced apart from each other. For example, the second groove Gv2 may extend in one direction. Alternatively, the second groove Gv2 may extend along the edge of the middle display area MDA.

The third groove Gv3 may be disposed between the second groove Gv2 and the third pixel PX3 . In an embodiment, the third groove Gv3 may extend parallel to the second groove Gv2. For example, the third groove Gv3 may extend in a direction in which the plurality of extension areas LA are spaced apart from each other.

The fifth groove Gv5 may be disposed in the extension area LA. In this case, the fifth groove Gv5 may surround the first groove Gv1. For example, the fifth groove Gv5 may surround the plurality of second pixels PX2 and the first groove Gv1 .

The sixth groove Gv6 may be disposed between the third groove Gv3 and the third pixel PX3 . In an embodiment, the sixth groove Gv6 may extend parallel to the second groove Gv2 and/or the third groove Gv3. For example, the sixth groove Gv6 may extend in a direction in which the plurality of extension areas LA are spaced apart from each other.

The seventh groove Gv7 may be disposed in the second extension area LA2 . In this case, the seventh groove Gv7 may be disposed between the adjacent first grooves Gv1. Specifically, the seventh groove Gv7 may be disposed between the first dam portions DP1 of the plurality of adjacent extension areas LA.

The inorganic pattern layer PVX2 is disposed on both sides of the groove Gv, and may have a pair of protrusion teams protruding toward the center of the groove Gv.

At least one of the dam parts DP may be disposed to surround the second pixel PX2 . That is, at least one of the dam portions DP may be disposed to surround the second display element. The dam part DP may include a first dam part DP1 and a second dam part DP2.

The first dam part DP1 may surround the plurality of second pixels PX2 . Specifically, the first dam part DP1 may be disposed to surround the first groove Gv1 and the fifth groove Gv5. In an embodiment, a portion of the first dam part DP1 may extend in a direction in which the plurality of extension areas LA are spaced apart from each other. For example, the first dam part DP1 may extend along the edge of the middle display area MDA. In this case, the first dam part DP1 may be provided integrally.

The second dam part DP2 may be disposed between the first dam part DP1 and the third pixel PX3 . Specifically, the second dam part DP2 may be disposed between the second groove Gv2 and the third groove Gv3. In this case, the second dam part DP2 may extend in a direction in which the second groove Gv2 and/or the third groove Gv3 extend. The second dam part DP2 may extend in a direction in which the plurality of extension areas LA are spaced apart from each other.

In the present exemplary embodiment, the first auxiliary dam unit ADP1 may be disposed between the second pixel PX2 and the first dam unit DP1 . Specifically, the first auxiliary dam part ADP1 may be disposed between the first groove Gv1 and the fifth groove Gv5. Accordingly, the first auxiliary dam portion ADP1 may be disposed to surround the second pixel PX2 and the first groove Gv1.

A second auxiliary dam unit ADP2 may be disposed between the third pixel PX3 and the second dam unit DP2 . Specifically, the second auxiliary dam part ADP2 may be disposed between the third groove Gv3 and the sixth groove Gv6. In this case, the second auxiliary dam part ADP2 may extend in a direction in which the third groove Gv3 and/or the sixth groove Gv6 extend. For example, the second auxiliary dam unit ADP2 may extend in a direction in which the plurality of extension areas LA are spaced apart from each other.

The first auxiliary dam part ADP1 and the second auxiliary dam part ADP2 are disposed on the inorganic pattern layer PVX2 and may protrude in the thickness direction of the substrate. In this case, the thickness of the first auxiliary dam part ADP1 and the thickness of the second auxiliary dam part ADP2 may be thinner than the thickness of the dam part DP.

16A is a cross-sectional view taken along line XVI-XVI' of FIG. 15 . 16B is an enlarged view of the groove and the dam portion of FIG. 16A. In FIGS. 16A and 16B , the same reference numerals as those of FIGS. 10A, 10B, and 15 mean the same member, and thus a redundant description thereof will be omitted.

16A and 16B , the display panel may include a corner display area CDA and an intermediate display area MDA. The corner display area CDA may include a second thin film transistor TFT2 and a second organic light emitting diode OLED2 that is a second display element, and the middle display area MDA has a third organic light emitting diode that is a third display element. It may include a diode OLED3. The second thin film transistor TFT2 and the second organic light emitting diode OLED2 implement the second sub-pixel in the corner display area CDA, and the third organic light emitting diode OLED3 implements the third sub-pixel in the middle display area MDA. A sub-pixel can be implemented.

Among the third organic light emitting diodes OLED3 , the external organic light emitting diode OOLED3 may be located closest to the edge of the middle display area MDA and face the second organic light emitting diode OLED2 of the corner display area CDA. It can be placed for viewing.

In the present embodiment, a groove Gv concave in the thickness direction of the substrate 100 may be included on the substrate 100 . In this case, the groove Gv may be disposed between the second organic light emitting diode OLED2 and the third organic light emitting diode OLED3 . The lower layer of the groove Gv may be the second planarization layer 116 .

In the intermediate display area MDA and the corner display area CDA, the substrate 100, the buffer layer 111, the pixel circuit layer (PCL), the display element layer (DEL), the thin film encapsulation layer (TFE), and the optical function layer ( OFL) may be stacked. The pixel circuit layer PCL may include an inorganic insulating layer IIL, a connection line CL, a first planarization layer 115 , a second planarization layer 116 , and an inorganic pattern layer PVX2 . The connection wiring CL may include a lower connection wiring LCL, a first connection wiring CL1 , and a second connection wiring CL2 .

In an embodiment, the lower connection line LCL may be disposed between the first gate insulating layer 112 and the second gate insulating layer 113 . In another embodiment, the lower connection line LCL may be disposed between the second gate insulating layer 113 and the interlayer insulating layer 114 . In this case, the lower connection line LCL may include the same material as one of the gate electrode GE and the upper electrode CE2 of FIG. 8 .

In another embodiment, the lower connection line LCL may be disposed between the buffer layer 111 and the first gate insulating layer 112 . In this case, the lower connection line LCL may include the same material as the semiconductor layer Act of FIG. 8 .

The lower connection line LCL may extend from the middle display area MDA to the corner display area CDA. The lower connection line LCL may be a signal line for providing an electrical signal to the second organic light emitting diode OLED2 or a power line for providing power.

The first connection wiring CL1 may be disposed on the inorganic insulating layer IIL, and the first planarization layer 115 may be disposed on the first connection wiring CL1 . In the present embodiment, the first planarization layer 115 may be divided into a corner planarization layer 115C and an intermediate planarization layer 115M based on the groove. Specifically, the first planarization layer 115 may be divided into a corner planarization layer 115C and an intermediate planarization layer 115M based on the second groove Gv2. In this case, the corner planarization layer 115C may be disposed to cover the second thin film transistor TFT2 , and the intermediate planarization layer 115M may be disposed to cover the driving circuit transistor DC-TFT. In an embodiment, the corner planarization layer 115C and the intermediate planarization layer 115M may expose a portion of the first connection line CL1 .

The second connection line CL2 , the second connection electrode CML2 , and the third connection electrode CML3 may be disposed on the first planarization layer 115 . In this case, the second connection electrode CML2 may be disposed on the corner planarization layer 115C. In some embodiments, the third connection electrode CML3 may be a part of the second connection line CL2 .

The third connection electrode CML3 may be disposed on the intermediate planarization layer 115M. In an embodiment, the third connection electrode CML3 may be connected to the first connection line CL1 . In this case, the third connection electrode CML3 may extend from the intermediate planarization layer 115M to the corner planarization layer 115C, and the side surface of the intermediate planarization layer 115M and the side surface of the corner planarization layer 115C facing each other. can cover Also, the third connection electrode CML3 may be connected to the first connection line CL1 exposed between the corner planarization layer 115C and the intermediate planarization layer 115M. Accordingly, the first connection wiring CL1 and the third connection electrode CML3 may prevent moisture from penetrating into the second organic light emitting diode OLED2 or the third organic light emitting diode OLED3 from the outside.

A lower inorganic pattern layer PVX1 may be disposed on the second connection line CL2 and the third connection electrode CML3 . In an embodiment, a plurality of lower inorganic pattern layers PVX1 may be disposed on the second connection line CL2 and/or the third connection electrode CML3 , and the plurality of lower inorganic pattern layers PVX1 may include a second The connection line CL2 and/or the third connection electrode CML3 may be disposed to be spaced apart from each other. In this embodiment, any one of the plurality of lower inorganic pattern layers PVX1 may cover a side surface of the intermediate planarization layer 115M and a side surface of the corner planarization layer 115C facing each other.

The second planarization layer 116 may be disposed to cover the second connection line CL2 , the second connection electrode CML2 , and the third connection electrode CML3 . In one embodiment, the second planarization layer 116 may be a lower layer defining the groove Gv. In this case, the second planarization layer 116 may include a hole H, which may correspond to the lower inorganic pattern layer PVX1. Also, the second planarization layer 116 may cover an edge of the lower inorganic pattern layer PVX1 . Accordingly, the groove Gv may be defined as the central portion of the lower inorganic pattern layer PVX1 and the hole H of the second planarization layer 116 .

An inorganic pattern layer PVX2 may be disposed on the second planarization layer 116 . That is, the inorganic pattern layer PVX2 may be disposed on both sides of the groove Gv, and may have a pair of protruding tips PT protruding toward the center of the groove Gv.

The first functional layer 212a, the second functional layer 212c, and the counter electrode 213 disposed on the inorganic pattern layer PVX2 may be cut off by the groove Gv and the pair of protruding tips PT. have. In addition, a first functional layer pattern 212Pa, a second functional layer pattern 212Pc, and a counter electrode pattern 213P may be disposed in the groove Gv.

A dam portion DP protruding in the thickness direction of the substrate 100 may be provided on the inorganic pattern layer PVX2. In an embodiment, the dam part DP may include a first dam part DP1 and a second dam part DP2 spaced apart from each other.

In the present embodiment, the first auxiliary dam part ADP1 may be disposed between the second organic light emitting diode OLED2 and the first dam part DP1 . Specifically, the first auxiliary dam part ADP1 may be disposed between the first groove Gv1 and the fifth groove Gv5. In this embodiment, the second auxiliary dam part ADP2 may be disposed between the third organic light emitting diode OLED3 and the second dam part DP2. Specifically, the second auxiliary dam part ADP2 may be disposed between the third groove Gv3 and the sixth groove Gv6.

The first auxiliary dam part ADP1 and the second auxiliary dam part ADP2 are disposed on the inorganic pattern layer PVX2 and may protrude in the thickness direction of the substrate 100 . In this case, the first auxiliary dam unit ADP1 and the second auxiliary dam unit ADP2 may include first layers 118c and 118d. In this case, the first layers 118c and 118d may include the same material as the pixel defining layer 118 .

In this embodiment, the thickness of the dam portion DP may be greater than the thickness of the first auxiliary dam portion ADP1. Similarly, the thickness of the dam portion DP may be greater than the thickness of the second auxiliary dam portion ADP2. Specifically, the dam part DP includes the first layers 118a and 118b and the second layers 119a and 119b, but the first auxiliary dam part ADP1 and the second auxiliary dam part ADP2 are the first layers 118c. , 118d) may have different thicknesses. In this case, the thickness of the dam portion DP may be a distance from the upper surface of the inorganic pattern layer PVX2 to the upper surface of the second layers 119a and 119b. The thickness of the first auxiliary dam part ADP1 or the thickness of the second auxiliary dam part ADP2 may be the distance from the top surface of the inorganic pattern layer PVX2 to the top surface of the first layers 118c and 118d.

Alternatively, the distance from the top surface of the substrate 100 to the top surfaces of the second layers 119a and 119b is greater than the distance from the top surface of the substrate 100 to the top surface of the first layer 118c of the first auxiliary dam unit ADP1. can Similarly, the distance from the top surface of the substrate 100 to the top surfaces of the second layers 119a and 119b is greater than the distance from the top surface of the substrate 100 to the top surface of the first layer 118d of the second auxiliary dam unit ADP2. can

In the present embodiment, the second layers 119a and 119b of the dam portion DP may function similarly to the spacer 119 of FIG. 8 . For example, in the manufacturing method of manufacturing a display panel, the second layers 119a and 119b of the dam portion DP may be damaged by at least one of the pixel circuit layer PCL and the display element layer DEL by the mask sheet. it can be prevented In this case, the shape of the second layers 119a and 119b of the dam portion DP may be changed by contacting the mask sheet.

When the shape of the second layers 119a and 119b of the dam part DP is deformed, the first inorganic encapsulation layer 310 may be formed along the deformed shape of the second layers 119a and 119b of the dam part DP. and, accordingly, the barrier properties may be weakened.

In this embodiment, the first auxiliary dam unit ADP1 and the second auxiliary dam unit ADP2 may be disposed between the organic light emitting diode and the dam unit DP. Since the thickness of the first auxiliary dam part ADP1 and the thickness of the second auxiliary dam part ADP2 are thinner than the thickness of the dam part DP, they may not contact the mask sheet. Accordingly, the first inorganic encapsulation layer 310 may be formed on the flat top surface of the first auxiliary dam unit ADP1 and the top surface of the second auxiliary dam unit ADP2 that are not deformed. Accordingly, it is possible to delay the time at which external air or moisture from the outside reaches the organic light emitting diode. Accordingly, the barrier properties of the first inorganic encapsulation layer 310 may be enhanced.

An optical function layer OFL may be disposed on the thin film encapsulation layer TFE. In an embodiment, the optical function layer OFL may include a light blocking pattern 410 , a color filter 420 , and an overcoat layer 430 . The light blocking pattern 410 may at least partially absorb external light or internally reflected light to prevent deterioration in quality due to external light. The light blocking pattern 410 may include a black pigment.

The color filter 420 may include a color filter corresponding to each organic light emitting diode. For example, when the light emitting layer of the organic light emitting diode emits any one of blue, green, and red light, the color filter 420 may be blue or green according to the color of the light emitted by the light emitting layer of each organic light emitting diode. , or a red color filter may be included. For example, when the emission layer of the organic light emitting diode emits red light, the color filter 420 on the emission layer of the organic light emitting diode may be a red color filter having high transmittance in a red wavelength band.

The overcoat layer 430 may be disposed on the light blocking pattern 410 and the color filter 420 . The overcoat layer 430 may be integrally disposed on the corner display area CDA and the middle display area MDA. In addition, the overcoat layer 430 may be disposed in the second groove Gv2 , and the overcoat layer 430 may fill the second groove Gv2 . The overcoat layer 430 may have a substantially flat top surface, and may include an organic material such as acrylic, benzocyclobutene (BCB), or hexamethyldisiloxane (HMDSO).

In some embodiments, an input sensing layer may be disposed between the optical function layer OFL and the thin film encapsulation layer TFE.

17 is a cross-sectional view taken along line XVII-XVII' of FIG. 15 . In FIG. 17 , the same reference numerals as those of FIG. 16 mean the same members, and thus redundant descriptions will be omitted.

Referring to FIG. 17 , a driving circuit transistor DC-TFT may be disposed on the substrate 100 in the intermediate display area MDA, and the first planarization layer 115 and the second planarization layer 116 may include a driving circuit. It may be disposed to cover the transistor DC-TFT. An internal organic light emitting diode IOLED3 and an external organic light emitting diode OLED3 may be disposed on the second planarization layer 116 . In this case, the external organic light emitting diode OLED3 may be disposed between the sixth groove Gv6 and the internal organic light emitting diode IOLED3 . A thin film encapsulation layer (TFE) may be disposed on the external organic light emitting diode (OOLED3) and the internal organic light emitting diode (IOLED3).

In this embodiment, the second planarization layer 116 may include a concave portion CCP between the internal organic light emitting diode IOLED3 and the external organic light emitting diode OLED3. In this case, the concave portion CCP is defined as a side surface of the second planarization layer 116 and an upper surface of the second planarization layer 116 facing each other between the internal organic light emitting diode IOLED3 and the external organic light emitting diode OOLED3. can be

In addition, a first distance d1 from the top surface of the substrate 100 to the top surface of the second planarization layer 116 may be defined between the internal organic light emitting diode IOLED3 and the external organic light emitting diode OOLED3, A second distance d2 from the top surface of 100 to the top surface of the second planarization layer 116 facing the pixel defining layer 118 may be defined. In this case, the first distance d1 may be smaller than the second distance d2.

The concave portion CCP as described above may be formed using a halftone mask when the second planarization layer 116 is formed.

In the present embodiment, the second planarization layer 116 may include a concave portion CCP between the internal organic light emitting diode IOLED3 and the external organic light emitting diode OLED3. Accordingly, when the organic encapsulation layer 320 of the thin film encapsulation layer TFE is formed, reflow of the organic material forming the organic encapsulation layer 320 may be controlled. Specifically, the concave portion CCP may be provided between the internal organic light emitting diode IOLED3 and the external organic light emitting diode OLED3 to form a flat top surface of the organic encapsulation layer 320 . Also, the concave portion CCP may prevent or reduce the overflow of the organic material forming the organic encapsulation layer 320 beyond the second dam portion DP2 of FIG. 16A .

An inorganic pattern layer PVX2 may be disposed on the second planarization layer 116 . The inorganic pattern layer PVX2 may be disposed on both sides of the sixth groove Gv6 . In this case, the inorganic pattern layer PVX2 may be disposed between the sixth groove Gv6 and the external organic light emitting diode OOLED3 in the intermediate display area MDA.

In an embodiment, at least a portion of the inorganic pattern layer PVX2 may overlap the external pixel electrode 211O of the external organic light emitting diode OOLED3. In this case, the external pixel electrode 211O may have a step difference.

18 is a cross-sectional view taken along line XVIII-XVIII' of FIG. 15 . 19 is a cross-sectional view taken along line XIX-XIX' of FIG. 15 . In FIGS. 18 and 19 , the same reference numerals as those of FIGS. 15 and 16 mean the same member, and thus a duplicate description will be omitted.

18 and 19 , the corner display area may include a plurality of extension areas extending from the middle display area, and a through portion PNP may be provided between the plurality of adjacent extension areas. The second organic light emitting diodes OLED2 may be disposed in the extended area. Each of the plurality of extension areas may include a first extension area LA1 and a second extension area LA2 , and the second extension areas LA2 may be integrally provided by being connected to each other. Accordingly, the through portion PNP may be defined as an edge of the adjacent first extension area LA1 .

Referring to FIG. 18 , a pixel circuit layer PCL, a display element layer DEL, and a thin film encapsulation layer TFE may be disposed in the second extension area LA2 . The pixel circuit layer PCL includes a second thin film transistor TFT2, a first connection wiring CL1, a second connection wiring CL2, an inorganic insulating layer IIL, a first planarization layer 115, and a second planarization layer 116 . The display element layer DEL may include a second organic light emitting diode OLED2 .

A first groove Gv1 , a fifth groove Gv5 , and a seventh groove Gv7 may be disposed on the second extension area LA2 . In addition, the first auxiliary dam part ADP1 may be disposed between the first groove Gv1 and the fifth groove Gv5, and the first dam part DP1 between the fifth groove Gv5 and the seventh groove Gv7. can be placed.

In an embodiment, the substrate 100 and the inorganic insulating layer IIL may be continuously disposed. Also, the first planarization layer 115 may be separated based on the seventh groove Gv7. For example, the first planarization layer 115 may be divided into a first corner planarization layer 115C1 and a second corner planarization layer 115C2 based on the seventh groove Gv7. In some embodiments, the inorganic insulating layer IIL may also be separated based on the seventh groove Gv7.

The second connection line CL2 and the second connection electrode CML2 may be disposed on the first planarization layer 115 . In some embodiments, the second connection electrode CML2 may be a part of the second connection line CL2 .

In an embodiment, the second connection line CL2 may cover the first corner planarization layer 115C1 and the second corner planarization layer 115C2 . For example, the second connection wiring CL2 may cover a side surface of the first corner planarization layer 115C1 and a side surface of the second corner planarization layer 115C2 facing each other. The second connection line CL2 may be connected to the first connection line CL1 exposed between the first corner planarization layer 115C1 and the second corner planarization layer 115C2 . Accordingly, the first connection wiring CL1 and the second connection wiring CL2 may prevent moisture from penetrating into the second organic light emitting diode OLED2 from the outside.

A lower inorganic pattern layer PVX1 may be disposed on the second connection line CL2 . A plurality of lower inorganic pattern layers PVX1 may be disposed on the second connection wiring CL2 , and the plurality of lower inorganic pattern layers PVX1 may be disposed to be spaced apart from each other on the second connection wiring CL2 . In the present embodiment, any one of the plurality of lower inorganic pattern layers PVX1 may cover a side surface of the first corner planarization layer 115C1 and a side surface of the second corner planarization layer 115C2 facing each other.

Also, in this embodiment, the organic encapsulation layer 320 may be separated by the first dam portion DP1 and the seventh groove Gv7.

Referring to FIG. 19 , a pixel circuit layer PCL, a display element layer DEL, and a thin film encapsulation layer TFE may be disposed in the first extension area LA1 . The pixel circuit layer PCL includes a second thin film transistor TFT2, a first connection wiring CL1, a second connection wiring CL2, an inorganic insulating layer IIL, a first planarization layer 115, and a second planarization layer 116 . The display element layer DEL may include a second organic light emitting diode OLED2 .

A first groove Gv1 and a fifth groove Gv5 may be respectively disposed on the first extension areas LA1 . In addition, the first auxiliary dam portion ADP1 may be disposed between the first groove Gv1 and the fifth groove Gv5, and the first dam portion DP1 may be disposed between the fifth groove Gv5 and the through portion PNP. can be placed.

In this embodiment, the substrate 100, the inorganic insulating layer (IIL), the first planarization layer 115, the second planarization layer 116, and the thin film encapsulation layer (TFE) are to be separated based on the through portion (PNP). can

20A is a simulation result of deformation of the thin film encapsulation layer in the case where the corner display area includes a plurality of extended areas. 20B is a simulation result for deformation of the thin film encapsulation layer in the case where the corner display area is integrally provided.

When the corner display area is bent, when the maximum deformation of the thin film encapsulation layer is 0.7% or less, the stability of the display element can be secured.

Referring to FIG. 20A , when the corner display region includes a plurality of extended regions, it can be seen that the maximum deformation of the thin film encapsulation layer is 0.31% when the corner display region is bent.

Referring to FIG. 20B , it can be seen that, when the corner display area is provided integrally, the maximum deformation of the thin film encapsulation layer is 1% when the corner display area is bent.

Accordingly, when the corner display area includes a plurality of extended areas, stability of display elements disposed in the plurality of extended areas may be secured.

21A and 21B are plan views schematically illustrating a corner display area CDA and an intermediate display area MDA according to another exemplary embodiment of the present invention. In FIGS. 21A and 21B , the same reference numerals as those of FIG. 15 mean the same members, and thus a redundant description thereof will be omitted. 21A and 21B are different from the embodiment described with reference to FIG. 15 in that the intermediate groove MGv is provided in the intermediate display area MDA.

Referring to FIG. 21A , the corner display area CDA includes a plurality of extension areas LA extending from the middle display area MDA, and a through portion PNP is formed between the plurality of adjacent extension areas LA. can be provided. In addition, the second pixel PX2 including the second display element may be disposed in the extension area LA, and the third pixel PX3 including the third display element may be disposed in the middle display area MDA. .

In the present exemplary embodiment, the intermediate display area MDA may include a first intermediate display area MDA1 and a second intermediate display area MDA2. In this case, the second intermediate display area MDA2 may be disposed between the first intermediate display area MDA1 and the corner display area CDA.

An intermediate groove MGv may be disposed between the first intermediate display area MDA1 and the second intermediate display area MDA2 . The middle display area MDA may be divided into a first intermediate display area MDA1 and a second intermediate display area MDA2 by an intermediate groove MGv. The intermediate groove MGv may be the same as or similar to the groove Gv of FIG. 9 .

The intermediate groove MGv may extend in a direction in which the plurality of extension areas LA are spaced apart from each other. For example, the intermediate groove MGv may extend in one direction. Alternatively, the intermediate groove MGv may extend along the edge of the intermediate display area MDA.

In addition, the present embodiment may include an inorganic pattern layer PVX2 disposed on both sides of the intermediate groove MGv and having a pair of protruding tips protruding toward the center of the intermediate groove MGv. Accordingly, the counter electrode 213 formed in the intermediate display area MDA may be cut off by the intermediate groove MGv and the inorganic pattern layer PVX2 . For example, the first counter electrode 213A may be disposed in the first intermediate display area MDA1 , and the second counter electrode 213B may be disposed in the second intermediate display area MDA2 .

In an embodiment of the present invention, one of the multilayer films stacked on the intermediate display area MDA corresponds to the first intermediate display area MDA1 and the second intermediate display area MDA2, respectively, to correspond to the first contact hole CNT1 and the second intermediate display area MDA2. Two contact holes CNT2 may be provided.

The third pixels PX3 disposed in the first intermediate display area MDA1 may be connected to the connection line CL through the first contact hole CNT1 to receive the second power voltage. Specifically, the first counter electrode 213A disposed in the first intermediate display area MDA1 may be connected to the connection line CL through the first contact hole CNT1 . Also, the third pixels PX3 disposed in the second intermediate display area MDA2 may be connected to the connection line CL through the second contact hole CNT2 to receive the second power voltage. Specifically, the second counter electrode 213B disposed in the second intermediate display area MDA2 may be connected to the connection line CL and the second contact hole CNT2 .

Referring to FIG. 21B , the corner display area CDA includes a plurality of extension areas LA extending from the middle display area MDA, and a through portion PNP is formed between the plurality of adjacent extension areas LA. can be provided. In addition, the second pixel PX2 including the second display element may be disposed in the extension area LA, and the third pixel PX3 including the third display element may be disposed in the middle display area MDA. .

In the present exemplary embodiment, a plurality of third pixels PX3 may be provided in the intermediate display area MDA. In this case, the intermediate groove MGv may surround each of the plurality of third pixels PX3 . In addition, the present embodiment may include an inorganic pattern layer PVX2 disposed on both sides of the intermediate groove MGv and having a pair of protruding tips protruding toward the center of the intermediate groove MGv. Accordingly, the counter electrode 213 formed in the intermediate display area MDA may be disposed to correspond to the plurality of third pixels PX3 and be spaced apart from each other.

In an embodiment of the present invention, one of the multilayer films stacked on the intermediate display area MDA may include an intermediate contact hole MCNT corresponding to each of the plurality of third pixels PX3 . In this case, each of the plurality of third pixels PX3 disposed in the intermediate display area MDA may be connected to a connection line through the intermediate contact hole MCNT to receive the second power voltage. Specifically, the counter electrodes 213 disposed in the intermediate display area MDA may be connected to the connection wiring through the intermediate contact hole MCNT, respectively.

22 is an enlarged view of a portion of a display panel according to another exemplary embodiment of the present invention. 23 is a plan view illustrating a corner display area CDA according to another exemplary embodiment of the present invention. In FIG. 22 , the same reference numerals as those of FIG. 5A mean the same members, and thus a duplicate description will be omitted.

22 and 23 , the display panel may include a display area and a peripheral area, and the display areas include a front display area (FDA), side display areas (SDA1, SDA2), a corner display area (CDA), and It may include an intermediate display area MDA.

The first pixel PX1 may be disposed in the front display area FDA, the second pixel PX2 may be disposed in the corner display area CDA, and the third pixel PX3 may be disposed in the middle display area MDA. ) can be placed.

The corner display area CDA may include a pixel arrangement area PDA and a connection area CA. A second pixel PX2 may be disposed in the pixel arrangement area PDA. A plurality of pixel arrangement areas PDA may be provided in the corner display area CDA, and the plurality of pixel arrangement areas PDA may be disposed to be spaced apart from each other.

The connection area CA may connect the intermediate display area MDA and the pixel arrangement area PDA. In an exemplary embodiment, the connection area CA may extend from the middle display area MDA in a serpentine manner. For example, the connection area CA may include direction change areas in which the extension direction is changed at least twice or more. As another example, the connection area CA may extend in a sine curve shape.

A plurality of connection areas CA may be provided in the corner display area CDA, and the plurality of connection areas CA may be disposed to be spaced apart from each other. A connection wiring may be disposed in the connection area CA. For example, the connection wiring may be a signal line transmitting an electrical signal to the second pixel PX2 and/or a power wiring supplying a voltage.

In an embodiment, the adjacent connection areas CA may be symmetrically disposed with respect to a direction in which the pixel arrangement areas PDA are spaced apart from each other. For example, the first connection area CA1 and the second connection area CA2 may meander from the middle display area MDA, and the first pixel arrangement area PDA1 and the second pixel arrangement area ( PDA1 ) and the second pixel arrangement area ( PDA2) may be connected to the first connection area CA1 and the second connection area CA2, respectively. In this case, the adjacent first connection area CA1 and the second connection area CA2 are symmetrical with respect to the direction in which the adjacent first and second pixel arrangement areas PDA1 and PDA2 are spaced apart from each other. can be placed.

The adjacent pixel arrangement areas PDA and the adjacent connection areas CA may define the through area PNA. Specifically, the closed curve CC may be defined between the adjacent pixel arrangement areas PDA and the adjacent connection areas CA, and an empty area inside the closed curve CC may be defined as the through area PNA. can Also, similarly to the above, the pixel arrangement area PDA, the intermediate display area MDA, and the adjacent connection areas CA may define the through area PNA.

In the present embodiment, the corner display area CDA includes a pixel arrangement area PDA spaced apart from each other and a connection area CA connecting the pixel arrangement area PDA and the intermediate display area MDA, so that the corner display area is displayed. A portion of the area CDA may be stretched, and at the same time, another portion of the corner display area CDA may be contracted.

24 is a cross-sectional view taken along line XXIV-XXIV' of FIG. 22 . 25 is a cross-sectional view taken along line XXV-XXV' of FIG. 22 . In FIGS. 24 and 25 , the same reference numerals as those of FIGS. 10A and 10B mean the same member, and thus a redundant description will be omitted. The embodiment of FIGS. 24 and 25 is different from the embodiment described with reference to FIGS. 10A and 109B in that the through area PNA is provided around the middle display area MDA and the corner display area CDA.

24 and 25 , the display panel may include a corner display area CDA and an intermediate display area MDA. The corner display area CDA may include a second thin film transistor TFT2 and a second organic light emitting diode OLED2 that is a second display element, and the middle display area MDA has a third organic light emitting diode that is a third display element. It may include a diode OLED3.

The corner display area CDA may include a pixel arrangement area PDA and a connection area, and the connection area may connect the intermediate display area MDA and the pixel arrangement area PDA. Also, the adjacent pixel arrangement areas PDA and the adjacent connection areas may define a through area PNA, and the pixel arrangement area PDA, the intermediate display area MDA, and the adjacent connection areas are through areas. (PNA) can be defined.

In the present embodiment, a groove Gv concave in the thickness direction of the substrate 100 may be included on the substrate 100 . In an embodiment, in the pixel arrangement area PDA, the groove Gv may be disposed between the second organic light emitting diode OLED2 and the through area PNA. Also, in the intermediate display area MDA, the groove Gv may be disposed between the third organic light emitting diode OLED3 and the through area PNA.

In an embodiment, the groove Gv may be disposed between the second organic light emitting diode OLED2 and the third organic light emitting diode OLED3 . For example, one of the pixel arrangement areas PDA may be disposed with the intermediate display area MDA and the through area PNA interposed therebetween. In this case, a groove Gv may be disposed between one of the second organic light emitting diodes OLED2 in the pixel arrangement area PDA and the through area PNA. Also, a groove Gv may be disposed between the third organic light emitting diode OLED3 of the intermediate display area MDA and the through area PNA. Accordingly, the groove Gv may be disposed between the second organic light emitting diode OLED2 and the third organic light emitting diode OLED3 .

The second planarization layer 116 may include an inorganic pattern layer PVX2. That is, the inorganic pattern layer PVX2 may be disposed on both sides of the groove Gv, and may have a pair of protruding tips PT protruding toward the center of the groove Gv.

In this case, the first functional layer 212a, the second functional layer 212c, and the counter electrode 213 disposed on the inorganic pattern layer PVX2 are formed by a groove Gv and a pair of protruding tips PT. can be cut off In addition, a first functional layer pattern 212Pa, a second functional layer pattern 212Pc, and a counter electrode pattern 213P may be disposed in the groove Gv.

Referring to FIG. 24 , a dam portion DP may be disposed between the third organic light emitting diode OLED3 of the intermediate display area MDA and the through area PNA. In this case, the dam portion DP may protrude on the inorganic pattern layer PVX2 in the thickness direction of the substrate 100 .

In some embodiments, a plurality of dam portions DP and/or grooves Gv may be provided. For example, the dam part DP may include a first dam part DP1-1 and a second dam part DP2-1, and the groove Gv includes a first groove Gv1-1 and a second groove DP2-1. Gv2-1) may be included. At this time, the first groove Gv1-1, the first dam part DP1-1, the second groove Gv2-1, and the second dam part DP2-1 are formed from the middle display area MDA through the through area ( PNA) can be arranged sequentially.

The thin film encapsulation layer TFE may cover the third organic light emitting diode OLED3 . Also, the thin film encapsulation layer TFE may extend from the third organic light emitting diode OLED3 to the dam portion DP.

The first inorganic encapsulation layer 310 may completely and continuously cover the intermediate display area MDA. Specifically, the first inorganic encapsulation layer 310 may be entirely and continuously disposed in the groove Gv and the dam portion DP. Also, the first inorganic encapsulation layer 310 may cover the first functional layer pattern 212Pa, the second functional layer pattern 212Pc, and the counter electrode pattern 213P disposed inside the groove Gv. The first inorganic encapsulation layer 310 may contact the inorganic pattern layer PVX2 . Specifically, the first inorganic encapsulation layer 310 may contact the protruding tip PT of the inorganic pattern layer PVX2.

In this embodiment, the first inorganic encapsulation layer 310 covers the side surfaces of the substrate 100 , the buffer layer 111 , the inorganic insulating layer IIL, and the first planarization layer 115 facing the through area PNA. can be covered

The organic encapsulation layer 320 may extend from the third organic light emitting diode OLED3 to the dam portion DP and may fill the groove Gv. For example, the organic encapsulation layer 320 may extend from the third organic light emitting diode OLED3 to the first dam portion DP1-1 and may fill the first groove Gv1-1. That is, the organic encapsulation layer 320 may be controlled by the first dam unit DP1-1 and the second dam unit DP2-1. In this case, the organic encapsulation layer 320 may not be filled in the second groove Gv2-1.

Like the first inorganic encapsulation layer 310 , the second inorganic encapsulation layer 330 may entirely and continuously cover the intermediate display area MDA. In an embodiment, the second inorganic encapsulation layer 330 may contact the first inorganic encapsulation layer 310 in the first dam unit DP1-1 and the second dam unit DP2-1. Also, the second inorganic encapsulation layer 330 may contact the first inorganic encapsulation layer 310 in the second groove Gv2-1. The second inorganic encapsulation layer 330 may cover side surfaces of the substrate 100 , the buffer layer 111 , the inorganic insulating layer IIL, and the first planarization layer 115 facing the through area PNA.

Referring to FIG. 25 , the second organic light emitting diode OLED2 of the pixel arrangement area PDA may be surrounded by the dam portion DP and the groove Gv. For example, the dam portion DP and the groove Gv may be disposed between the second organic light emitting diode OLED2 and the through area PNA.

In some embodiments, a plurality of dam portions DP and/or grooves Gv may be provided. For example, the groove Gv may include a first groove Gv1-2 and a second groove Gv2-2. In this case, the first groove Gv1-2, the dam portion DP, and the second groove Gv2-2 may be sequentially disposed in a direction from the second organic light emitting diode OLED2 to the through area PNA. have.

The thin film encapsulation layer TFE may cover the second organic light emitting diode OLED2 . In addition, the thin film encapsulation layer TFE may extend from the second organic light emitting diode OLED2 to the dam portion DP.

The first inorganic encapsulation layer 310 may completely and continuously cover the pixel arrangement area PDA. Specifically, the first inorganic encapsulation layer 310 may be entirely and continuously disposed in the groove Gv and the dam portion DP. Also, the first inorganic encapsulation layer 310 may cover the first functional layer pattern 212Pa, the second functional layer pattern 212Pc, and the counter electrode pattern 213P disposed inside the groove Gv. The first inorganic encapsulation layer 310 may contact the inorganic pattern layer PVX2 . Specifically, the first inorganic encapsulation layer 310 may contact the protruding tip PT of the inorganic pattern layer PVX2.

Also, the first inorganic encapsulation layer 310 may cover the substrate 100 facing the through area PNA, the buffer layer 111 , the inorganic insulating layer IIL, and the first planarization layer 115 .

The organic encapsulation layer 320 may extend from the second organic light emitting diode OLED2 to the dam portion DP and may fill the groove Gv. For example, the organic encapsulation layer 320 may extend from the second organic light emitting diode OLED2 to the dam portion DP and may fill the first groove Gv1 - 2 . That is, the organic encapsulation layer 320 may be controlled by the dam unit DP. In this case, the organic encapsulation layer 320 may not be filled in the second groove Gv2 - 2 . Accordingly, the organic encapsulation layer 320 may be disposed in each pixel arrangement area PDA. Accordingly, the organic encapsulation layer 320 of the intermediate display area MDA and the organic encapsulation layer of the pixel arrangement area PDA may be separately disposed.

Like the first inorganic encapsulation layer 310 , the second inorganic encapsulation layer 330 may entirely and continuously cover the pixel arrangement area PDA. In an embodiment, the second inorganic encapsulation layer 330 may contact the first inorganic encapsulation layer 310 at the dam portion DP. Also, the second inorganic encapsulation layer 330 may contact the first inorganic encapsulation layer 310 in the second groove Gv2 - 2 . The second inorganic encapsulation layer 330 may cover the substrate 100 , the buffer layer 111 , the inorganic insulating layer IIL, and the first planarization layer 115 facing the through area PNA.

26 is a cross-sectional view taken along line XXVI-XXVI' of FIG. 23 .

Referring to FIG. 26 , in the connection area CA, the substrate 100, the buffer layer 111, the inorganic insulating layer IIL, the first planarization layer 115, the second planarization layer 116, and the lower organic insulating layer ( UOL), and a connection line CL may be disposed. In an embodiment, the connection line CL may include a first connection line CL1 and a second connection line CL2 . The first connecting line CL1 and the second connecting line CL2 may be power lines that transmit electrical signals to the pixel arrangement area or supply voltages. The first connection wiring CL1 and the second connection wiring CL2 of the connection area CA are respectively the first connection wiring CL1 and the second connection wiring CL2 disposed in the pixel arrangement area PDA of FIG. 25 . can be connected with

In the present embodiment, the buffer layer 111 and the inorganic insulating layer IIL may be disposed on a part of the substrate 100 , and the lower organic insulating layer UOL may be disposed on the other part of the substrate 100 . Similar to the first planarization layer 115 or the second planarization layer 116 , the lower organic insulating layer UOL may include an organic insulating material such as polyimide. The lower organic insulating layer UOL may relieve stress at an edge portion of the substrate 100 . In some embodiments, the buffer layer 111 and the inorganic insulating layer IIL may be omitted, and the lower organic insulating layer UOL may be entirely disposed on the substrate 100 .

A first connection wiring CL1 may be disposed on the substrate 100 , and the first planarization layer 115 may cover the first connection wiring CL1 . A second connection wiring CL2 may be disposed on the first planarization layer 115 , and the second planarization layer 116 may cover the second connection wiring CL2 .

As described above, in an embodiment of the present invention, the corner display area CDA may include a plurality of extension areas LA extending from the middle display area MDA. In this case, the corner display area CDA may be contracted. In an embodiment of the present invention, the corner display area CDA may include pixel arrangement areas PDA and a connection area CA connected to the pixel arrangement areas PDA. Accordingly, a part of the corner display area CDA may be stretched, and at the same time, another part of the corner display area CDA may be contracted.

Although the present invention has been described with reference to one embodiment shown in the drawings, it will be understood that this is merely exemplary, and that those skilled in the art can make various modifications and variations therefrom. Accordingly, the true technical protection scope of the present invention should be determined by the technical spirit of the appended claims.

PVX1, PVX1-1: lower inorganic pattern layer, lower inorganic layer
PVX2: inorganic pattern layer
R1, R2: 1st radius of curvature, 2nd radius of curvature
Gv: groove
DP1, DP2, DP3: 1st dam part, 2nd dam part, 3rd dam part
ADP1, ADP2: 1st auxiliary dam part, 2nd auxiliary dam part
LA1, LA2: 1st extension area, 2nd extension area
MDA1, MDA2: first intermediate display area, second intermediate display area
1: display device
10: display panel
100: substrate
115, 116: first planarization layer, second planarization layer
115M, 115C: Intermediate leveling layer, corner leveling layer
211: pixel electrode
211P: pixel electrode pattern
212: middle layer
212a, 212b, 212c: first functional layer, light emitting layer, second functional layer
213: counter electrode
213A, 213B: first counter electrode, second counter electrode
310: first inorganic encapsulation layer
320: organic encapsulation layer
330: second inorganic encapsulation layer

Claims (36)

a front display area in which a first display element is disposed, a first side display area connected to the front display area in a first direction, a second side display area connected to the front display area and a second direction intersecting the first direction;
a corner display area disposed between the first side display area and the second side display area to at least partially surround the front display area and in which a second display element is disposed; and
a substrate disposed between the front display area and the corner display area and including an intermediate display area on which a third display element is disposed;
a groove disposed on the substrate and concave in a thickness direction of the substrate; and
an inorganic pattern layer disposed on both sides of the groove and having a pair of protruding tips protruding toward the center of the groove;
and the groove is disposed between the second display element and the third display element. According to claim 1,
the corner display area includes a plurality of extension areas extending from the intermediate display area;
A penetrating portion is provided between the plurality of adjacent extension regions,
and the second display element is disposed in the plurality of extension areas. 3. The method of claim 2,
and the groove is disposed to surround the second display element. 3. The method of claim 2,
It further includes; a dam portion disposed on the inorganic pattern layer and protruding in the thickness direction of the substrate,
The dam part includes a first dam part and a second dam part,
The first dam portion is disposed to surround the second display element,
and the second dam portion extends along the corner display area. 5. The method of claim 4,
Each of the plurality of extension regions includes a first extension region and a second extension region disposed between the first extension region and the intermediate display region,
The second extension regions of the plurality of extension regions are connected to each other and provided integrally,
a groove disposed between the first dam portions of the plurality of adjacent extension regions. 5. The method of claim 4,
a first auxiliary dam portion disposed on the inorganic pattern layer and protruding in the thickness direction of the substrate between the second display element and the first dam portion;
and a thickness of the first dam portion is greater than a thickness of the first auxiliary dam portion. 3. The method of claim 2,
A planarization layer disposed on the substrate; further comprising,
The planarization layer is separated into a corner planarization layer and an intermediate planarization layer based on the groove,
a second display element is disposed on the corner flattening layer;
A third display element is disposed on the intermediate planarization layer. 3. The method of claim 2,
The third display element includes an internal display element and an external display element adjacent to the groove,
The external display element includes a pixel electrode and a counter electrode,
and the pixel electrode covers at least a portion of the inorganic pattern layer. 3. The method of claim 2,
a planarization layer between the substrate and the third display element;
The third display element includes an internal display element and an external display element adjacent to the groove,
and the planarization layer has a concave portion between the inner display element and the outer display element. 3. The method of claim 2,
It further includes a; connecting wiring disposed on the substrate and extending from the intermediate display area to the plurality of extension areas;
The second display element includes a pixel electrode, an intermediate layer, and a counter electrode,
and the connection wiring and the counter electrode are connected at distal ends of the plurality of extension regions. 11. The method of claim 10,
a planarization layer disposed between the connection wiring and the second display element;
The planarization layer has a contact hole exposing the connection wiring,
The connection wiring and the counter electrode are connected through a pixel electrode pattern disposed in the contact hole. 3. The method of claim 2,
It further includes a; connecting wiring disposed on the substrate and extending from the intermediate display area to the plurality of extension areas;
A plurality of the second display elements are disposed in one of the plurality of extension regions;
Each of the plurality of second display elements includes opposite electrodes spaced apart from each other;
and the counter electrodes are respectively connected to the connection wiring. 3. The method of claim 2,
The third display element includes a pixel electrode and a counter electrode,
the intermediate display area includes a first intermediate display area and a second intermediate display area disposed between the first intermediate display area and the corner display area;
a connection wire disposed in the intermediate display area; and
It further includes; an intermediate groove disposed between the first intermediate display area and the second intermediate display area;
The opposite electrode of the third display element disposed in the first intermediate display area and the opposite electrode of the third display element disposed in the second intermediate display area are respectively connected to the connection wiring through a contact hole. 3. The method of claim 2,
The third display element includes a pixel electrode and a counter electrode, and is provided in plurality in the intermediate display area;
a connection wire disposed in the intermediate display area; and
The intermediate display area further includes an intermediate groove surrounding each of the plurality of third display elements;
The opposing electrodes of the plurality of third display elements are spaced apart from each other by the intermediate groove and are respectively connected to the connection wiring. According to claim 1,
The corner display area is
and pixel arrangement areas in which the second display element is disposed, respectively, and connection areas connecting the pixel arrangement areas and the intermediate display area;
The neighboring pixel arrangement regions and the neighboring connection regions define a through region,
The display panel further comprising: a connection line extending from the intermediate display area to the pixel arrangement area in the connection area. 16. The method of claim 15,
the connection regions extend serpentinely from the intermediate display region;
The adjacent connection areas are symmetrically disposed with respect to a direction in which the pixel arrangement areas are spaced apart. According to claim 1,
The second display element includes a pixel electrode, an intermediate layer including a light emitting layer, and a counter electrode;
The intermediate layer includes a first functional layer between the pixel electrode and the light emitting layer and a second functional layer between the counter electrode and the light emitting layer,
at least one of the first functional layer and the second functional layer and the counter electrode are disconnected by the pair of protruding tips and the groove. According to claim 1,
a dam portion disposed on the inorganic pattern layer and protruding in a thickness direction of the substrate; and
a thin film encapsulation layer covering the second display element and the third display element, the thin film encapsulation layer including at least one inorganic encapsulation layer and at least one organic encapsulation layer;
the thin film encapsulation layer extends from the second display element and the third display element to the dam portion;
and the at least one organic encapsulation layer is separated by the dam part. According to claim 1,
an inorganic insulating layer disposed on the substrate;
a connection wiring disposed on the inorganic insulating layer and extending from the intermediate display area to the corner display area;
a lower inorganic pattern layer disposed on the connection wiring; and
a lower layer having a hole corresponding to the lower inorganic pattern layer and covering an edge of the lower inorganic pattern layer;
and the groove is defined by a central portion of the lower inorganic pattern layer and the hole. According to claim 1,
an inorganic insulating layer disposed on the substrate;
a connection wiring disposed on the inorganic insulating layer and extending from the intermediate display area to the corner display area;
a lower inorganic layer disposed on the connection wiring; and
A lower layer having a hole exposing a portion of the lower inorganic layer, the lower layer including a first planarization layer and a second planarization layer;
and the groove is defined by the lower inorganic layer and the hole. According to claim 1,
an inorganic insulating layer disposed on the substrate;
a connection wiring disposed on the inorganic insulating layer and extending from the intermediate display area to the corner display area;
a metal pattern layer disposed on the connection wiring; and
A lower layer having a hole corresponding to the metal pattern layer and covering an edge of the metal pattern layer; further comprising,
The groove is defined by a central portion of the metal pattern layer and the hole. a front display area in which the first display element is disposed, a corner display area in which the second display element is disposed, and a corner display area in which the second display element is disposed and disposed at a corner of the front display area, and disposed between the front display area and the corner display area; a display panel including an intermediate display area in which display elements are disposed; and
and a cover window covering the display panel;
The corner display area includes a plurality of extension areas extending from the intermediate display area,
and the second display element is disposed in the plurality of extension areas. 23. The method of claim 22,
The display panel is
Board,
a groove disposed on the substrate and concave in a thickness direction of the substrate; and
an inorganic pattern layer disposed on both sides of the groove and having a pair of protruding tips protruding in a direction toward the center of the groove;
and the groove is disposed between the second display element and the third display element. 24. The method of claim 23,
The second display element includes a pixel electrode, an intermediate layer including a light emitting layer, and a counter electrode;
The intermediate layer includes a first functional layer between the pixel electrode and the light emitting layer and a second functional layer between the counter electrode and the light emitting layer,
at least one of the first functional layer and the second functional layer and the counter electrode are disconnected by the pair of protruding tips and the groove. 24. The method of claim 23,
and the groove is disposed to surround the second display element. 24. The method of claim 23,
The display panel is
It is disposed on the inorganic pattern layer, further comprising a dam portion protruding in the thickness direction of the substrate,
The dam part includes a first dam part and a second dam part,
The first dam portion is disposed to surround the second display element,
and the second dam portion extends along the corner display area. 27. The method of claim 26,
The display panel is
a first auxiliary dam portion disposed on the inorganic pattern layer between the second display element and the first dam portion and protruding in a thickness direction of the substrate;
and a thickness of the first dam portion is greater than a thickness of the first auxiliary dam portion. 24. The method of claim 23,
The display panel is
a dam portion disposed on the inorganic pattern layer and protruding in the thickness direction of the substrate;
a thin film encapsulation layer covering the second display element and the third display element, the thin film encapsulation layer including at least one inorganic encapsulation layer and at least one organic encapsulation layer;
the thin film encapsulation layer extends from the second display element and the third display element to the dam portion;
and the at least one organic encapsulation layer is separated by the dam part. 24. The method of claim 23,
The display panel is
It is disposed on the substrate and further includes a connection wiring extending from the intermediate display area to the plurality of extension areas,
The second display element includes a pixel electrode, an intermediate layer, and a counter electrode,
and the connection wiring and the counter electrode are connected at distal ends of the plurality of extension regions. 24. The method of claim 23,
The display panel is
It is disposed on the substrate and further includes a connection wiring extending from the intermediate display area to the plurality of extension areas,
A plurality of the second display elements are disposed in one of the plurality of extension regions;
Each of the plurality of second display elements includes opposite electrodes spaced apart from each other;
and the counter electrodes are respectively connected to the connection wiring. 23. The method of claim 22,
The display panel is
a first side display area connected to the front display area in a first direction, the first side display area having a first radius of curvature and being bent;
a second side display area connected to the front display area in a second direction intersecting the first direction, the second side display area having a second radius of curvature different from the first radius of curvature;
and the corner display area is disposed between the first side display area and the second side display area. a front display area on which the first display element is disposed, a corner display area on which the first display element is disposed and bent and disposed at a corner of the front display area, and a corner display area on which the second display element is disposed, and between the front display area and the corner display area; 3 A display panel including an intermediate display area on which display elements are disposed; and
and a cover window covering the display panel;
The corner display area is
pixel arrangement regions in which the second display elements are respectively arranged; and
connection regions connecting the pixel arrangement regions and the intermediate display region;
The neighboring pixel arrangement regions and the neighboring connection regions define a through region,
and a connection line extending from the intermediate display area to the pixel arrangement areas is disposed in the connection areas. 33. The method of claim 32,
the connection regions extend serpentinely from the intermediate display region;
The display device of claim 1, wherein the adjacent connection areas are symmetrically disposed with respect to a direction in which the pixel arrangement areas are spaced apart. 33. The method of claim 32,
The display panel is
Board,
a groove disposed on the substrate and concave in a thickness direction of the substrate; and
an inorganic pattern layer disposed on both sides of the groove and having a pair of protruding tips protruding in a direction toward the center of the groove;
and the groove is disposed between the second display element and the through area. 35. The method of claim 34,
The second display element includes a pixel electrode, an intermediate layer including a light emitting layer, and a counter electrode;
The intermediate layer includes a first functional layer between the pixel electrode and the light emitting layer and a second functional layer between the counter electrode and the light emitting layer,
at least one of the first functional layer and the second functional layer and the counter electrode are disconnected by the pair of protruding tips and the groove. 33. The method of claim 32,
The display panel is
a first side display area connected to the front display area in a first direction, the first side display area having a first radius of curvature and being bent;
a second side display area connected to the front display area in a second direction intersecting the first direction, the second side display area having a second radius of curvature different from the first radius of curvature;
and the corner display area is disposed between the first side display area and the second side display area.

Images