KR20210137629A - Multi-Level Step-Up DC-DC Converter With High Conversion Ratio - Google Patents

Abstract

According to an embodiment of the present invention, an N-level flying capacitor (FC) step-up DC-DC converter comprises: an inductor having a first terminal connected to an input terminal and a second terminal connected to a first node; a plurality of diodes connected in series between the first node and an output terminal; a plurality of power switches connected in series between the first node and the output terminal; a plurality of capacitors disposed between the plurality of diodes and the plurality of power switches; an output resistor connected in parallel to the output terminal; and a pass switch connected from the first node to ground. The pass switch has a first side connected to the first node, has a second side connected to a ground, and can be operated by a gating signal obtained by performing an AND operation on the gating signals from the plurality of power switches.

Description

Multi-Level Step-Up DC-DC Converter With High Conversion Ratio}

The present invention relates to a multilevel flying capacitor (FC) step-up DC-DC converter having high efficiency and a high step-up ratio.

A step-up DC-DC converter that makes the output voltage higher than the input voltage can be essentially used in a grid-connected power conversion device that requires a high DC output voltage from a low voltage in the power conversion process. For example, the step-up DC-DC converter may be used in applications such as a solar power conversion device, a fuel cell system, and a battery-based electric vehicle.

As power capacity increases, characteristics that are basically required for a step-up DC-DC converter are high efficiency and a high step-up ratio. At the same time, there is a demand for a step-up DC-DC converter having a small volume and weight and having as few elements as possible.

A conventional boost DC-DC converter may operate a duty ratio close to 1 in order to obtain a high voltage conversion ratio. In this case, the current stress of the power semiconductor switch and the diode increases, and the efficiency decreases, so that the step-up ratio may be limited to 3 times or less.

In order to overcome the technical disadvantages of the conventional boost converter, research on the circuit configuration of a new high-voltage DC-DC converter has been conducted. A DC-DC converter of a multilevel flying capacitor (FC) method, which is being researched recently, is attracting attention due to its relatively high efficiency while implementing a high step-up ratio.

1 is a view showing a conventional conventional flying capacitor step-up DC-DC converter 20 .

Referring to FIG. 1 , the flying capacitor step-up DC-DC converter 20 may be derived from a flying capacitor type multilevel converter topology.

In FIG. 1 , the 5-level flying capacitor (FC) boosting DC-DC converter 20 is illustrated as an example, but the present invention is not limited thereto, and a larger number of the flying capacitor (FC) boosting DC-DC converter 20 is provided. level can be applied.

FIG. 2 is a view showing a conventional 3-level FC step-up converter 30 .

Referring to FIG. 2 , when the 3-level FC step-up converter 30 operates in a normal state, the capacitor C1 is charged with , and the theoretical voltage gain can be expressed as Equation 1 below.

In Equation 1, 'D' represents a duty ratio.

가 되어 절반으로 감소할 수 있다. 이러한, 3-레벨 FC 승압 컨버터(30)에서 인덕터에 흐르는 전류의 유효 스위칭 주파수가 2배가 되어 인덕터의 사이즈가 그만큼 줄어드는 효과가 있다. 하지만, 많은 소자가 직렬로 연결되도록 동작하는 과정에서 도전 손실이 증가하여 고승압비를 얻는데 한계가 있고, 다양한 산업 분야에서 요구되는 승압비 효율을 얻는 것에도 한계가 있다. The 3-level FC step-up converter 30 reduces the voltage stress of the used power semiconductor switches and diodes.

can be reduced by half. In the 3-level FC step-up converter 30 , the effective switching frequency of the current flowing through the inductor is doubled, so that the size of the inductor is reduced by that much. However, there is a limit in obtaining a high step-up ratio due to an increase in conduction loss in the process of operating many devices to be connected in series, and there is a limit in obtaining the step-up ratio efficiency required in various industrial fields.

3 and 4 are diagrams illustrating a switching pattern of the conventional FC step-up DC-DC converter 30 . 5A to 5D are diagrams illustrating an operation mode of the conventional FC step-up DC-DC converter 30 .

The operating principle of the 3-level FC step-up converter 30 will be described with reference to FIGS. 3 to 4 and FIGS. 5A to 5D .

,

와 1개의 듀티비 신호 D를 사용할 수 있다. 전력 스위치 S₁의 게이팅 신호는 캐리어

과 듀티비 D를 비교하여 얻을 수 있는데,

일 때,

이면,

이 될 수 있다. 마찬가지로, 전력 스위치 S₂의 게이팅 신호는 캐리어

와 듀티비 D를 비교하여 얻을 수 있는데, D>tri₂ 이면 S₂=1이 되고, D<tri₂ 이면 S₂=0이 될 수 있다. 여기서, S_x=1은 전력 스위치 S_x을 턴온(turn on) 시킨다는 의미이고, S_x=0은 전력 스위치 S_x을 턴오프(turn off) 시킨다는 의미일 수 있다. _{To generate the gating signal of the power switch S 1} and the power switch S ₂ of the 3-level FC step-up converter 30, two carrier signals (carrier signal )

,

and one duty ratio signal D can be used. The gating signal of the power switch S _{1 is the carrier}

It can be obtained by comparing the duty ratio D with

when,

back side,

this can be Similarly, the gating signal of the power switch S _{2 is}

It can be obtained by comparing and the duty ratio D. _{If D>tri 2,} then S ₂ =1, and if _{D<tri 2, S 2} =0. Here, S _x =1 may mean to turn on the _{power switch S x , and S x} =0 may mean to turn off the _{power switch S x .}

_{Two active power switches S 1} and S ₂ are disposed in the 3-level FC step-up converter 30, and as shown in FIGS. 5A to 5D, depending on the switching state of the _{two power switches S 1} and S _{2 ,} Four types of converter operation modes can be represented.

5A to 5D are diagrams showing equivalent circuits in which operation modes of four types of converters are identified.

5A to 5D, in the 3-level FC step-up DC-DC converter 30 _{, a circle (○) indicated on each power switch S 1} , S ₂ indicates that the corresponding power switch is turned on. . In addition, in the circuit diagram of the 3-level FC step-up converter 30, the red color indicates the flow of current.

Looking at the operation mode M1, the two power switches S ₁ and S ₂ are both turned on.

Looking at the operation mode M2, the power switch S ₁ is turned off (turn off), the power switch S ₂ is in a turned on (turn on) state.

Looking at the operation mode M3, the power switch S ₁ is turned on (turn on), the power switch S ₂ is in a turned off (turn off) state.

Looking at the operation mode M4, both power switches S ₁ and S ₂ are turned off.

3 and 4, the two carrier signals tri and tr2 are 180 degrees out of phase with each other, so that when the duty ratio D is greater than 0.5 and when the duty ratio D is less than 0.5, 3-level FC The switching patterns of the step-up DC-DC converter 30 are different from each other.

As shown in FIG. 3 , when the duty ratio D is less than 0.5, the change of the operation mode may be changed in the order of M4→M2→M4→M3. At this time, the operation mode M1 does not exist. In this case, the time ratio occupied by the operation mode M4 among the total switching stock prices becomes the largest. In the operation mode M4, the two active power switches (S ₁ , S ₂ ) are both turned off (turned off), and in this case, the two diodes (D ₁ , D ₂ ) may be turned on (turn on).

As shown in FIG. 4 , when the duty ratio D is greater than 0.5, the change of the operation mode may be changed in the order of M1→M2→M1→M3. In this case, the time ratio occupied by the operation mode M1 among the total switching stock prices becomes the largest. In the operation mode M1, both active power switches (S ₁ , S ₂ ) are turned on (turned on), and in this case, the two diodes (D ₁ , D ₂ ) may be turned off.

In order to obtain a high step-up ratio in the 3-level FC step-up DC-DC converter 30, the duty ratio D is operated at a value of at least 0.5 or more, so that the output voltage is dependent only on the operation modes M1, M2, and M3 during high step-up operation. get it It should be noted here that when the duty ratio D is operated with a value of 0.75 or more, as shown in FIG. 4 , the ratio of the time occupied by the operation mode M1 may be almost 50% or more of the switching period.

The conduction loss of the diode and the power semiconductor switch element is closely related to the overall efficiency of the converter. Conduction losses caused by on-drop voltage and on resistance of diodes and turn-on resistance of MOSFET switches are analyzed to account for a relatively large portion of the total power loss. . In particular, in the case of the operation mode M1, since the two power switches (S ₁ , S ₂ ) are connected in series, it can be seen that the turn-on resistance value is twice that of the individual MOSFET switch turn-on resistance.

In the case of the 5-level FC step-up DC-DC converter 20 shown in Fig. 1, when the four MOSFET switches are connected in series, the conduction resistance value is further increased to 4 times the turn-on resistance of the individual MOSFET switches, so that the efficiency is increased. There is a problem with lowering.

The present invention proposes a circuit configuration of an FC step-up converter of a new configuration capable of high-efficiency power conversion even when the number of levels of the FC step-up converter is increased, and a method for controlling the same.

SUMMARY OF THE INVENTION An object of the present invention is to provide a multilevel flying capacitor (FC) step-up DC-DC converter having high efficiency and a high step-up ratio.

A multilevel flying capacitor (FC) step-up DC-DC converter according to an embodiment of the present invention for achieving the above object includes an inductor having a first terminal connected to an input terminal and a second terminal connected to a first node; a plurality of diodes connected in series between the first node and an output terminal, a plurality of power switches connected in series between the first node and the output terminal, and disposed between the plurality of diodes and the plurality of power switches It may include a plurality of capacitors and an output resistor connected in parallel to the output terminal. The pass switch may operate by a gating signal obtained by performing an AND operation of a first side connected to the first node, a second side connected to a ground, and an AND operation on the gating signals of the plurality of power switches.

In the multilevel FC step-up DC-DC converter according to an embodiment of the present invention, a first diode among the plurality of diodes, a first power switch among the plurality of power switches, and the pass switch may be connected to the first node. . A second side of the pass switch may be connected to a ground, and a second side of the first power switch may be connected to a second power switch among the plurality of power switches.

In the multilevel FC step-up DC-DC converter according to an embodiment of the present invention, a first terminal of a first diode among the plurality of diodes is connected to the first node, and a second terminal of the first diode is connected to the plurality of diodes. It may be connected to a second diode among the diodes.

In the multi-level FC step-up DC-DC converter according to an embodiment of the present invention, a first terminal of a first capacitor among the plurality of capacitors is connected between the first diode and the second diode, and a first terminal of the first capacitor is The second terminal may be connected between the first power switch and the second power switch.

A multilevel FC step-up DC-DC converter according to an embodiment of the present invention includes a first path passing through the plurality of power switches and a second path connected from the first node to a ground (GND) through a pass switch. can do.

In the multilevel FC step-up DC-DC converter according to an embodiment of the present invention, when all power switches are turned on, the pass switch may be turned on.

The FC step-up DC-DC converter according to various embodiments of the present invention has all the advantages of the existing n-level FC step-up DC-DC converter by adding _{one pass switch S pass and at the same time obtains a high step-up ratio.} . In addition, the FC step-up DC-DC converter according to various embodiments of the present invention can obtain improved efficiency than the conventional n-level FC step-up DC-DC converter.

_{The gating signal of the pass switch S pass} added to the FC step-up DC-DC converter according to various embodiments of the present disclosure may be calculated by performing an AND operation on the gating signals of all power switches. Therefore, a separate control circuit and control algorithm for controlling the pass switch S _{pass is not required.}

Since the FC step-up DC-DC converter according to various embodiments of the present invention implements high efficiency and a high step-up ratio, it can be applied to various industrial fields.

The FC step-up DC-DC converter according to various embodiments of the present invention guarantees a high lifespan, and can be expected to improve reliability and lifespan.

1 is a view showing a conventional step-up DC-DC converter of a conventional flying capacitor (FC: flying capacitor) method.
2 is a view showing a typical 3-level FC step-up converter.
3 and 4 are diagrams showing a switching pattern of a conventional FC step-up DC-DC converter.
5A to 5D are diagrams illustrating an operation mode of a conventional FC step-up DC-DC converter.
6 is a diagram illustrating a 3-level FC step-up DC-DC converter according to an embodiment of the present invention.
7 is a diagram illustrating generation of a gating signal of a _{pass switch S pass .}
8 is a diagram showing the operation waveform of the 3-level FC step-up DC-DC converter proposed in the present invention.
9 is a diagram showing an equivalent circuit of the operation mode M1 of the 3-level FC step-up DC-DC converter shown in FIG. 6 .
10 is a diagram showing an equivalent circuit of the operation mode M2 of the 3-level FC step-up DC-DC converter proposed in the present invention.
11 is a diagram showing an equivalent circuit of the operation mode M3 of the 3-level FC step-up DC-DC converter 100 proposed in the present invention.
12A is a diagram illustrating an operation waveform of a prior art 3-level FC DC-DC converter without a pass switch S _pass.
12B is a diagram illustrating an operation waveform of a 3-level FC step-up DC-DC converter according to an embodiment of the present invention.
13 is a diagram illustrating a 5-level FC step-up DC-DC converter according to an embodiment of the present invention.
14 is a diagram illustrating an N-level FC step-up DC-DC converter according to an embodiment of the present invention.

Advantages and features of the present invention and methods of achieving them will become apparent with reference to the embodiments described below in detail in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in a variety of different forms, and only these embodiments allow the disclosure of the present invention to be complete, and common knowledge in the technical field to which the present invention belongs It is provided to fully inform the possessor of the scope of the invention, and the present invention is only defined by the scope of the claims. Accordingly, in some embodiments, well-known process steps, well-known device structures, and well-known techniques have not been specifically described in order to avoid obscuring the present invention. Like reference numerals refer to like elements throughout.

In order to clearly express various layers and regions in the drawings, the thicknesses are enlarged. Throughout the specification, like reference numerals are assigned to similar parts. When a part, such as a layer, film, region, plate, etc., is "on" another part, it includes not only the case where it is "directly on" another part, but also the case where there is another part in between. Conversely, when we say that a part is "just above" another part, we mean that there is no other part in the middle. Also, when a part of a layer, film, region, plate, etc. is said to be “under” another part, it includes not only the case where the other part is “directly under” but also the case where there is another part in between. Conversely, when we say that a part is "just below" another part, it means that there is no other part in the middle.

Relative terms "below", "beneath", "lower", "above", "upper", etc., as shown in the figure, refer to one element or It can be used to easily describe the correlation between components and other devices or components. The spatially relative terms should be understood as terms including different orientations of the device during use or operation in addition to the orientation shown in the drawings. For example, when an element shown in the figures is turned over, an element described as "beneath" or "beneath" another element may be placed "above" the other element. Accordingly, the exemplary term “below” may include both directions below and above. The device may also be oriented in other orientations, and thus spatially relative terms may be interpreted according to orientation.

In the present specification, when it is said that a part is connected to another part, it includes not only a case in which it is directly connected, but also a case in which it is electrically connected with another element interposed therebetween. In addition, when it is said that a part includes a certain component, this means that other components may be further included, rather than excluding other components, unless otherwise stated.

In this specification, terms such as first, second, third, etc. may be used to describe various components, but these components are not limited by the terms. The above terms are used for the purpose of distinguishing one component from other components. For example, without departing from the scope of the present invention, the first component may be referred to as a second or third component, and similarly, the second or third component may also be alternately named.

Unless otherwise defined, all terms (including technical and scientific terms) used herein may be used with the meaning commonly understood by those of ordinary skill in the art to which the present invention belongs. In addition, terms defined in a commonly used dictionary are not to be interpreted ideally or excessively unless clearly specifically defined.

In the present disclosure, an embodiment may be used in a sense including one of various embodiments, aspects, or aspects of the present disclosure. The following description is illustrative for helping understanding of the present disclosure, and the present disclosure is not limited only to the embodiments described below. In addition, the accompanying drawings may enlarge, exaggerate, briefly show or omit some or all of the configuration for convenience of description.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

6 is a diagram illustrating a 3-level FC step-up DC-DC converter 100 according to an embodiment of the present invention.

Referring to FIG. 6 , the 3-level FC step-up DC-DC converter 100 according to an embodiment of the present invention includes an input terminal, an inductor Ls, a first diode D ₁ , a second diode D ₂ , a pass a switch S _pass , a first power switch S ₁ , a second power switch S ₂ , a first capacitor C ₁ , a second capacitor C ₂ , an output resistance Ro, and an output terminal can do.

A first terminal of the inductor Ls may be connected to an input terminal, and a second terminal of the inductor Ls may be connected to a P-point node. The output resistor Ro may be connected in parallel to the output terminal. A first terminal of the output resistor Ro may be connected to a positive terminal, and a second terminal of the output resistor Ro may be connected to a ground terminal. A first diode D ₁ , a pass switch S _pass , and a first power switch S ₁ may be connected to the P point node. The first side of the pass switch S _pass may be connected to the P-point node and the first side of the first power switch S _{1 .} A second side of the pass switch S _pass may be connected to the ground terminal. The first diode D ₁ and the second diode D ₂ may be connected in series. A first terminal of the first diode D ₁ may be connected to the P-point node. The second terminal of the first diode (D ₁₎ may be connected to the first terminal and the first capacitor (C ₁₎ of the second diode (D _2). A first terminal of the first capacitor C ₁ may be connected between the first diode D ₁ and the second diode D _{2 .} The second terminal of the first diode (D ₂₎ can be connected to the second terminal and the first capacitor (C ₁₎ of the first diode (D _1). A second terminal of the second diode D ₂ may be connected to an output terminal.

A first capacitor (C ₁₎ a first terminal of the first diode second terminal of the first power switch (S a (D ₁₎ and is connected between the second diode (D _2), a first capacitor (C ₁₎ of ₁ ) and the second power switch (S ₂ ) may be connected between. The between second capacitor (C ₂₎ of the first terminal of the second diode (D ₂₎ and is connected between an output terminal, a second terminal of the capacitor (C ₂₎ is a second power switch (S ₂₎ and an output terminal can be connected.

The first power switch S ₁ and the second power switch S ₂ may be connected in series. A first side of the first power switch S ₁ may be connected to a point P node and a pass switch S _{pass .} A first power switch S ₁ of the second side can be connected to the second power switch, the first side of the S _2. A first side of the second power switch S ₂ may be connected to a first capacitor C ₁ and a second side of the first power switch S _{1 .} A second side of the second power switch S ₂ may be connected to the second capacitor C _{2 and the ground.}

The pass switch S _pass serves to provide a conductive path from point P directly to ground.

The pass switch S _pass may operate to be turned on only during a time during which the first power switch S ₁ and the second power switch S ₂ are simultaneously turned on (ie, only during the operation mode M1). Accordingly, during the time of the operation mode M1, two paths from the point P to the ground are secured. That is, during the time of the operation mode M1, the inductor current i _{s branches to the path of the pass} switch S pass and the first power switch S ₁ -the second power switch S ₂ path and flows to the ground, so that the current stress of each switch is reduced. It works.

In addition, when the pass switch S _pass and the first power switch S ₁ and the second power switch S ₂ are both turned on, the effective combined resistance of the two paths from the point P to the ground is the pass switch S _pass when there is no pass switch S pass . can be further reduced. Accordingly, the conduction loss is reduced, thereby increasing the overall efficiency.

7 is a diagram illustrating generation of a gating signal of a _{pass switch S pass .}

Referring to FIG. 7 , the pass switch S _pass may be turned on only while the first power switch S ₁ and the second power switch S _{2 are simultaneously turned on.} That is, the pass switch S _pass = 1 only when the first power switch S ₁ =1 and the second power switch S _{2 =1.} That is, _{it can be calculated by S pass} =S ₁ ^S ₂ operation (here, “^” means AND operator).

8 is a diagram showing the operation waveform of the 3-level FC step-up DC-DC converter proposed in the present invention.

The operating principle of the FC step-up DC-DC converter 100 will be described with reference to FIG. 8 , taking the case of the 3-level FC step-up DC-DC converter having the simplest configuration as an example. When a carrier of a triangular waveform having a period of T is used, the duration of each operation mode may be expressed as in Equations 2 to 4 below.

Equation 2 represents the duration of the operation mode M1.

Equation 3 represents the duration of the operation mode M2.

Equation 4 represents the duration of the operation mode M3.

When the average value of the output voltage is Vo, the average value Vo of the output voltage can be calculated as in Equation 5 below.

의 리플 없는 일정한 직류라고 가정한다. 컨버터의 평균입력전력 Pi는 평균출력전력 Po와 동일함으로,

로 나타낼 수 있다. 따라서, 평균 입력전류 Is는 다음의 수학식 6과 같이 나타낼 수 있다.Here, the input voltage is

is assumed to be a constant direct current without ripple of Since the average input power Pi of the converter is the same as the average output power Po,

can be expressed as Therefore, the average input current Is can be expressed as in Equation 6 below.

9 is a diagram illustrating an equivalent circuit of the operation mode M1 of the 3-level FC step-up DC-DC converter 100 shown in FIG. 6 .

6, 8 and 9 , in the operation mode M1, the first power switch S ₁ and the second power switch S ₂ may be simultaneously turned on.

In the operation mode M1, since the first power switch S ₁ and the second power switch S ₂ are simultaneously turned on (turn on), the pass switch S _pass may be turned on (turn on). In FIG. 9 , the MOSFET switch has been replaced with an _{on resistance R on .}

In the operation mode M1, the current of the inductor Ls increases exponentially, and the load voltage Vo on the output side may decrease exponentially. For convenience of understanding, it can be assumed as in Equations 7 and 8 that the time constants of the input and output terminals are respectively very large compared to the switching period.

In Equations 7 and 8, R _M1 is the combined resistance of the resistance connected from the P point (see FIG. 6 ) to the ground, and the combined resistance R _M1 can be expressed as in Equation 9 below.

Under the assumptions of Equations 7 and 8, the current of the inductor Ls may increase linearly, and the output voltage ν _o may decrease linearly. Therefore, the input current can be expressed as in Equation 10 below.

In Equation 10, I _smin means the current of the inductor Ls in the initial state of the operation mode M1. The operation mode M1 lasts as long as the time shown in Equation 2, and the input current may reach the _{maximum value I smax at the last time of the operation mode M1.}

The input current at the last time of M1 can be expressed as in Equation 11 below.

는 다음의 수학식 12와 같이 나타낼 수 있다.Therefore, the ripple of the inductor (Ls) current

can be expressed as in Equation 12 below.

_{Since the first capacitor C 1} (see FIG. 6 ) is not connected to any part of the circuit during the operation mode M1, the voltage value of Vc1 does not change.

10 is a diagram showing an equivalent circuit of the operation mode M2 of the 3-level FC step-up DC-DC converter 100 proposed in the present invention.

6, 8 and 10 , in the operation mode M2, the first power switch S ₁ may be turned off, and the second power switch S ₂ may be turned on. In FIG. 10 , the first diode D ₁ was modeled as an on-drop voltage V _d and an on-resistance R _d , and the MOSFET switch S ₂ was replaced with an on-resistance Ron. .

In the operation mode M2, since the first capacitor C ₁ is charged by the current of the inductor Ls and the voltage increases, the energy of the inductor Ls decreases and the energy of the first capacitor C ₁ increases. can

If the current flowing through the inductor Ls is sufficiently large, the first capacitor voltage v _c1 may increase almost linearly as if the capacitor is charged by the constant current source. Also, the average voltage V _c1 of the first capacitor C ₁ may be maintained at a substantially constant voltage with a value of (1/2) Vo. If the time constant T _M2 is much larger than the switching period, it can be expressed as Equation 13 below.

이면, 출력전압 Vo는 거의 선형적으로 감소할 수 있다.If the condition of Equation 13 is satisfied, the current i _s of the inductor Ls may decrease almost linearly. During the operation mode M2, the second capacitor C ₂ continues to discharge,

, the output voltage Vo may decrease almost linearly.

11 is a diagram showing an equivalent circuit of the operation mode M3 of the 3-level FC step-up DC-DC converter 100 proposed in the present invention.

6, 8 and 11 , in the operation mode M3, the first power switch S ₁ may be turned on, and the second power switch S2 may be turned off. In FIG. 11 , the second diode D ₂ was modeled _{with a voltage V d} representing on-drop and an on-resistance R _{d .} In addition, the MOSFET switch S ₁ was replaced with an on-resistance Ron.

가 되는데,

,

,

이므로, 다음의 수학식 14와 같이 나타낼 수 있다.In the operation mode M3, the first capacitor C ₁ may be discharged by the current of the inductor Ls, and the voltage may decrease. In operation mode M3, the voltage V _L across the inductor (Ls) is

will go,

,

,

Therefore, it can be expressed as Equation 14 below.

As shown in Equation 14, since a negative voltage is applied to the inductor, the current of the inductor Ls may also decrease. That is, in the operation mode M3, the energy of the _{inductor Ls and the first capacitor C 1 may decrease.} If the current flowing through the inductor Ls is sufficiently large, the first capacitor voltage v _c1 may decrease almost linearly _{as the first capacitor C 1} is discharged by the constant current source. In addition, if the time constant T _M3 is much greater than the switching period, it can be expressed as in Equation 15 below.

Assuming Equation 15, the current i _s of the inductor Ls may decrease almost linearly. During operation mode M3 second capacitor (C ₂₎ can be charged by a current i _s of the inductor (Ls). At this time, if the load is sufficiently large, the output voltage Vo may increase almost linearly.

In order to prove the efficiency improvement effect of the N-level FC step-up DC-DC converter 100 proposed in the present invention, a 3-level FC step-up DC-DC converter 100 was applied. _{The efficiency of the 3-level FC DC-DC converter 30 without the pass switch S pass} of the prior art shown in FIG. 2 and the 3-level FC step-up DC-DC converter according to the embodiment of the present invention shown in FIG. 6 ( 100), a computer simulation was performed to compare the efficiency.

The circuit constants and control constants used in the simulation are shown in Table 1 below.

In Table 1, the input voltage may be set to 50V, and the command value of the output voltage may be set to 400V. That is, the FC step-up DC-DC converter used in the simulation performs an 8-fold step-up operation, and the duty ratio D is 0.875.

12A is a diagram showing the operation waveform of the prior art 3-level FC DC-DC converter 30 without the _{switch S pass.} 12B is a diagram illustrating an operation waveform of the 3-level FC step-up DC-DC converter 100 according to an embodiment of the present invention.

12A and 12B , three waveforms from the top may mean gating signals of the first power switch S1 , the second power switch S2 , and the pass switch S _{pass .}

가 되어 항상 오프 상태로 설정하였다.Since the 3-level FC DC-DC converter 30 without the pass switch S _{pass does not have a pass switch S pass} , in the operation waveform of FIG. 12A , the gate signal of the _{pass switch S pass is}

and is always set to OFF.

Voltage V _c1, Looking at the waveform of the output voltage Vo, it can be seen that for the normal operation of a prior art three-level DC-DC converter FC 30 in Fig input current i _s, the first capacitor (C ₁₎ from 12a .

은 다음의 수학식 16과 같이 나타낼 수 있다.In FIG. 12A , it can be seen that the average value (I _{s ) of the input current i s} is 97.08 [A], and the average value (V _{o ) of the output voltage v o becomes 383.03 [V].} Since the input voltage V _s is 50 [V] and the output resistance Ro is 32 [Ω], the converter efficiency of the prior art

can be expressed as in Equation 16 below.

In Figure 12b, a power switch (S _1), a second power switch (S _2), and a path switch (S _pass) the gating signal and the input current i _s of the first capacitor voltage (C ₁₎ Vc1, the output voltage v The waveform of o is shown. It can be seen that the operation waveform of the 3-level FC step-up DC-DC converter 100 of FIG. 12B matches the operation waveform shown in FIG. 8, and the 3-level FC step-up DC-DC converter 100 operates normally can be known

는 다음의 수학식 17과 같이 나타낼 수 있다.The average value (Is) of the input current i _s in Fig 12b can confirm that the 98.62 [A] and the output voltage v o average value (Vo) is 389.1 [V a] a. Since the input voltage Vs is 50 [V] and the output-side resistance Ro is 32 [Ω], the efficiency of the converter proposed in the present invention is

can be expressed as in Equation 17 below.

As a result of the simulation verification, _{the efficiency of the conventional 3-level FC DC-DC converter 30 without the pass switch S pass} is compared with the efficiency of the 3-level FC step-up DC-DC converter 100 according to the embodiment of the present invention. It can be confirmed that there is an efficiency improvement effect of about 1.49%. The efficiency improvement of more than 1% at the converter efficiency near 95% proves that the 3-level FC step-up DC-DC converter 100 including _{only one pass switch S pass is very effective in realizing high efficiency in the high step-up ratio state.} do.

13 is a diagram illustrating a 5-level FC step-up DC-DC converter 200 according to an embodiment of the present invention.

Referring to FIG. 13 , the 5-level FC step-up DC-DC converter 200 according to an embodiment of the present invention includes an input terminal, an inductor Ls, a first diode D ₁ , a second diode D ₂ , and a second 3 diode (D ₃ ), fourth diode (D ₄ ), at least one pass switch (S _pass ), first power switch (S ₁ ), second power switch (S ₂ ), third power switch (S _{3 )} ), a fourth power switch S ₄ , a first capacitor C ₁ , a second capacitor C ₂ , a third capacitor C ₃ , an output capacitor C _out , an output resistance R _L , and It may include an output stage.

A first terminal of the inductor Ls may be connected to an input terminal, and a second terminal of the inductor Ls may be connected to a P-point node. The output resistor (R _L ) may be connected in parallel to the output terminal. A first terminal of the output resistor R _L may be connected to a positive terminal, and _{a second terminal of the output resistor R L} may be connected to a ground terminal. A first diode D ₁ , a pass switch S _pass , and a first power switch S ₁ may be connected to the P point node. The first side of the pass switch S _pass may be connected to the P-point node and the first side of the first power switch S _{1 .} A second side of the pass switch S _pass may be connected to the ground terminal. The first diode D ₁ to the fourth diode D ₄ may be connected in series. The first power switch S ₁ to the fourth power switch S ₄ may be connected in series.

A first terminal of the first diode D ₁ may be connected to the P-point node. The second terminal of the first diode (D ₁₎ may be connected to the first terminal and the first capacitor (C ₁₎ of the second diode (D _2). A first terminal of the first capacitor C ₁ may be connected between the first diode D ₁ and the second diode D _{2 .} The second terminal of the first diode (D ₂₎ can be connected to the second terminal and the first capacitor (C ₁₎ of the first diode (D _1). A second terminal of the second diode D ₂ may be connected to the second capacitor C _{2 .} A first terminal of the third diode D ₃ may be connected to a second terminal of the second diode D ₂ and a second capacitor C _{2 .} The second terminal of the third diode (D ₃₎ can be connected to a first terminal of a third capacitor (C ₃₎ and a fourth diode (D _4). A second terminal of the fourth diode D ₄ may be connected to an output terminal.

A first capacitor (C ₁₎ a first terminal of the first diode second terminal of the first power switch (S a (D ₁₎ and is connected between the second diode (D _2), a first capacitor (C ₁₎ of ₁ ) and the second power switch (S ₂ ) may be connected between. A second capacitor (C ₂₎ the first terminal of the second diode (D ₂₎ and a third diode (D ₃₎ is connected between the second terminal of the second capacitor (C ₂₎ is a second power switch (S a ₂ ) and the third power switch (S ₃ ) may be connected between. A third capacitor (C ₃₎ a first terminal is a third diode (D ₃₎ and a fourth diode (D ₄₎ is connected between the second terminal of the third capacitor (C ₃₎ is a third power switch (S a ₃ ) and the fourth power switch (S ₄ ) may be connected between. An output capacitor (C _out) the first terminal is connected between the fourth diode and the output terminal, the output terminal of the second capacitor (C _out) of may be connected between the fourth power switch (S ₄₎ and the ground.

The first power switch S ₁ and the second power switch S ₂ may be connected in series. A first side of the first power switch S ₁ may be connected to a point P node and a pass switch S _{pass .} A first power switch S ₁ of the second side can be connected to the second power switch, the first side of the S _2. The first side of the second power switch S ₂ may be connected to the second side of the first power switch S _{1 and the first capacitor C 1 .} A second side of the second power switch S ₂ may be connected to a first side of the third power switch S _{3 .} The first side of the third power switch S ₃ may be connected to the second side of the second _{power switch S 2 and the second capacitor C 2 .} The second side of the third power switch S ₃ may be connected to the first side of the third capacitor C ₃ and the fourth power switch S _{4 .} The first side of the fourth power switch S ₄ may be connected to the second side of the third power switch S _{3 and the third capacitor C 3 .} The second side of the fourth power switch S ₄ may be connected to the _{output capacitor C out and the ground terminal.}

In the 5-level FC step-up DC-DC converter 200 , the first side of the _{pass switch S pass} may be connected to the P point node and the first side of the first _{power switch S 1 .} A second side of the pass switch S _pass may be connected to the ground terminal.

As such, by adding the pass switch Spas to the 5-level FC step-up DC-DC converter, the first power switch S ₁ , the second power switch S ₂ , the third power switch S ₃ , and the fourth path through the power switch (S ₄₎ (e.g., a first path) and the other conductive path with which is connected to ground (GND) directly from a point P connected to the second terminal of the inductor (Ls) (e.g., the second path) can be obtained.

As such, a conductive path (eg, a second path) is additionally secured in the 5-level FC step-up DC-DC converter 200 according to an embodiment of the present invention, thereby reducing conduction loss.

By reducing the conduction loss in the 5-level FC step-up DC-DC converter 200 according to the embodiment of the present invention, the overall efficiency of the 5-level FC step-up DC-DC converter 200 according to the embodiment of the present invention is increased. And at the same time, it is possible to implement a high step-up ratio.

_{The gating signal of the pass} switch S pass is an AND operation of the gating signals of the first power switch S ₁ , the second power switch S ₂ , the third power switch S ₃ , and the fourth power switch S _{4 .} can be saved by The gating signal of the pass switch S _pass can be obtained by the following Equation (18).

14 is a diagram illustrating an n-level FC step-up DC-DC converter 300 according to an embodiment of the present invention.

Referring to FIG. 14 , an n-level FC step-up DC-DC converter 300 may be implemented. _{At least one pass switch S pass} may be disposed in the n-level FC step-up DC-DC converter 300 .

In the n-level FC step-up DC-DC converter 300 , a first side of the _{pass switch S pass} may be connected to a P-point node and a first side of the first _{power switch S 1 .} A second side of the pass switch S _pass may be connected to the ground terminal. An n-level FC step-up DC-DC converter 300 according to an embodiment of the present invention includes an input terminal, an inductor (Ls), n-1 diodes, at least one pass switch (S _pass ), n-1 power switches, It may include n-1 capacitors, an output resistor (R _L ), and an output terminal.

In this way, by adding the pass switch Spas to the n-level FC step-up DC-DC converter, it is connected to the second end of the inductor Ls together with a path (eg, the first path) passing through n-1 power switches. Another conductive path (eg, a second path) directly connected from the point P to the ground (GND) may be secured.

As such, a conductive path (eg, a second path) is additionally secured in the n-level FC step-up DC-DC converter 300 according to an embodiment of the present invention, thereby reducing conduction loss.

By reducing the conduction loss in the n-level FC step-up DC-DC converter 300 according to the embodiment of the present invention, the overall efficiency of the n-level FC step-up DC-DC converter 300 according to the embodiment of the present invention is increased. And at the same time, it is possible to implement a high step-up ratio.

The gating signal of the pass switch S _pass can be obtained by ANDing the gating signals of n-1 power switches. The gating signal of the pass switch S _pass can be obtained by the following Equation 19.

The FC step-up DC-DC converter according to various embodiments of the present invention has all the advantages of the existing n-level FC step-up DC-DC converter by adding _{one pass switch S pass and at the same time obtains a high step-up ratio.} . In addition, the FC step-up DC-DC converter according to various embodiments of the present invention can obtain improved efficiency than the conventional n-level FC step-up DC-DC converter.

_{The gating signal of the pass switch S pass} added to the FC step-up DC-DC converter according to various embodiments of the present disclosure may be calculated by performing an AND operation on all of the gating signals of the plurality of power switches. Therefore, a separate control circuit and control algorithm for controlling the pass switch S _{pass is not required.}

Since the FC step-up DC-DC converter according to various embodiments of the present invention implements high efficiency and a high step-up ratio, it can be applied to various industrial fields.

As described above, according to the present invention, a multi-level flying capacitor (FC) step-up DC-DC converter having high efficiency and a high step-up ratio can be realized.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and it is common in the technical field to which the present invention pertains that various substitutions, modifications and changes are possible without departing from the technical spirit of the present invention. It will be clear to those who have the knowledge of

10: boost DC-DC converter
20: Conventional 5-level FC step-up DC-DC converter
100: Proposed 3-level FC step-up DC-DC converter
200: Proposed 5-level FC step-up DC-DC converter
300: Proposed n-level FC step-up DC-DC converter

Claims (6)

an input unit connected to an input terminal on one side and connected to a ground on the other side;
an inductor having a first terminal connected to an input terminal and a second terminal connected to a first node;
a plurality of diodes connected in series between the first node and an output terminal;
a plurality of power switches connected in series between the first node and the ground;
a pass switch having a first side connected to the first node and a second side connected to the ground;
a plurality of capacitors disposed between the plurality of diodes and the plurality of power switches; and
an output resistor connected in parallel to the output terminal; and
The pass switch is a multi-level step-up DC-DC converter having a high conversion ratio, characterized in that the operation by a gating signal obtained by performing an AND operation on the gating signals of the plurality of power switches. According to claim 1,
A first diode of the plurality of diodes, a first power switch of the plurality of power switches, and the pass switch are connected to the first node,
The second side of the first power switch is connected to a second power switch among the plurality of power switches. According to claim 1,
A first terminal of a first diode among the plurality of diodes is connected to the first node, and a second terminal of the first diode is connected to a second diode among the plurality of diodes. Multilevel step-up DDC-DC converter. According to claim 1,
a first terminal of a first capacitor among the plurality of capacitors is connected between the first diode and the second diode;
The second terminal of the first capacitor is connected between the first power switch and the second power switch. According to claim 1,
A multilevel step-up DC-DC converter having a high conversion ratio, comprising a first path passing through all power switches and a second path from the first node passing through the pass switches and connected to the ground. According to claim 1,
A multilevel step-up DC-DC converter with a high conversion ratio, characterized in that when all the power switches are turned on, the pass switch is turned on.

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