KR20210083091A - Electroluminescence display device - Google Patents

Abstract

The present specification discloses an organic light emitting display device. The organic light emitting display device includes: a substrate having a display area on which pixels are disposed and a non-display area outside the display area; a pixel circuit disposed in the display area on the substrate and configured to drive the pixels; an inlet unit which is in the non-display area and to which power and a signal transmitted to the pixel circuit are applied; and a high potential voltage line extending from the inlet unit to the pixel circuit, wherein an electrical resistance of a portion proximate to the inlet unit is greater than an electrical resistance of a portion remote from the inlet unit.

Description

Organic light emitting display device {ELECTROLUMINESCENCE DISPLAY DEVICE}

The present specification relates to an organic light emitting display device and a driving method thereof.

The application range of a display device, which is a connection medium between a user and information, is expanding, and accordingly, various display devices including an organic light emitting display device are widely applied to the screens of everyday electronic devices, for example, cell phones and notebook computers.

Since the organic light emitting display device displays an image based on light generated from a self-luminous device (light emitting diode, etc.) included in the sub-pixel, there is no need for a separate light source, so the thickness can be made thin. have it

In the organic light emitting display device, when a scan signal and a data signal are supplied to the sub-pixels, the light emitting device of the selected sub-pixel emits light to display an image. To this end, the organic light emitting diode display includes a pixel circuit for driving sub-pixels and a power circuit for supplying power to the sub-pixels. The pixel circuit is also connected to a scan driving circuit for supplying a scan signal (or a gate signal) and a data driving circuit for supplying a data voltage.

The pixel circuit is becoming increasingly complex as various compensation operations are added as well as driving sub-pixels, and thus unexpected side effects may appear. Accordingly, various studies have been made to minimize the abnormal operation of the pixel circuit and to keep the operation performance constant.

An object of the present specification is to provide a value-based light emitting display device in which display quality is stabilized. More specifically, an object of the present specification is to provide a wiring structure that reduces a voltage difference affecting driving of a display device. The tasks of the present specification are not limited to the tasks mentioned above, and other tasks not mentioned will be clearly understood by those skilled in the art from the following description.

A value emitting display device according to an exemplary embodiment of the present specification includes: a substrate having a display area on which pixels are disposed and a non-display area outside the display area; a pixel circuit in the display area on the substrate and configured to drive the pixels; an inlet in the non-display area to which power and a signal transmitted to the pixel circuit are applied; and a high potential voltage line extending from the lead-in to the pixel circuit, wherein an electrical resistance of a portion close to the lead-in is greater than an electrical resistance of a portion farther from the lead-in.

The high potential voltage line may include a first high potential voltage line extending in a first direction; and a second high potential voltage line extending in a second direction crossing the first direction.

The length of the second high potential voltage line in the second direction may increase as it moves away from the lead-in part. In this case, the length of the second high potential voltage line increases in a linear or stepwise manner.

The first high potential voltage line and the second high potential voltage line may be disposed on different layers. For example, the first high potential voltage line may be disposed above the second high potential voltage line.

The first high potential voltage line may be made of the same material as a source or drain electrode of a thin film transistor included in the pixel circuit. In addition, the second high potential voltage line may be made of the same material as the gate electrode of the thin film transistor included in the pixel circuit. Meanwhile, the second high potential voltage line may include a gate electrode of a thin film transistor included in the pixel circuit; and a layer between the source or drain electrodes.

The non-display area may further include a low-potential voltage line for transmitting the low-potential power VSS to the pixel circuit. The low potential voltage line may start from the lead-in part and extend to surround the display area.

The details of other embodiments are included in the detailed description and drawings.

In the organic light emitting diode display according to the exemplary embodiment of the present specification, all pixels may receive operating power uniformly through an effective arrangement of power lines. Accordingly, the embodiments of the present specification may provide a display device with improved display uniformity. Effects according to the embodiments of the present specification are not limited by the contents exemplified above, and more various effects are included in the present specification.

1 is a schematic block diagram of an organic light emitting display device according to an exemplary embodiment of the present specification.
FIG. 2 is a schematic block diagram of a sub-pixel shown in FIG. 1 .
3 is a view showing a power supply line according to an embodiment of the present specification.
4 is a view showing a power supply line according to another embodiment of the present specification.
5 is a diagram illustrating luminance uniformity of a display device to which an embodiment of the present specification is applied.

Advantages and features of the present specification and methods of achieving them will become apparent with reference to the embodiments described below in detail in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in a variety of different forms, and only these embodiments allow the disclosure of the present invention to be complete, and common knowledge in the technical field to which the present invention belongs It is provided to fully inform the possessor of the scope of the invention, and the present invention is only defined by the scope of the claims.

The shapes, sizes, proportions, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present specification are illustrative and the present specification is not limited to the illustrated matters. Like reference numerals refer to like elements throughout. In addition, in describing the present invention, if it is determined that a detailed description of a related known technology may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted. When 'including', 'having', 'consisting', etc. mentioned in this specification are used, other parts may be added unless 'only' is used. When a component is expressed in the singular, the case in which the plural is included is included unless otherwise explicitly stated. In interpreting the components, it is interpreted as including an error range even if there is no separate explicit description.

In the case of a description of the positional relationship, for example, when the positional relationship of two parts is described as 'on', 'on', 'on', 'beside', etc., 'right' Alternatively, one or more other parts may be positioned between the two parts unless 'directly' is used. Reference to a device or layer “on” another device or layer includes any intervening layer or other device directly on or in the middle of another device. When it is described that a component is “connected”, “coupled” or “connected” to another component, the component may be directly connected or connected to the other component, but other components may be interposed between each component. It will be understood that each component may be “interposed” or “connected”, “coupled” or “connected” through another component.

Although first, second, etc. are used to describe various elements, these elements are not limited by these terms. These terms are only used to distinguish one component from another. Accordingly, the first component mentioned below may be the second component within the spirit of the present invention.

The size and thickness of each component shown in the drawings are illustrated for convenience of description, and the present invention is not necessarily limited to the size and thickness of the illustrated component. Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a schematic block diagram of an organic light emitting diode display according to an exemplary embodiment of the present specification, and FIG. 2 is a schematic block diagram of a sub-pixel illustrated in FIG. 1 .

The organic light emitting display device may include an image processing unit 110 , a timing control unit 120 , a scan driving unit 130 , a data driving unit 140 , a display panel 150 , and a power supply unit 180 .

The image processing unit 110 outputs driving signals for driving various devices together with image data supplied from the outside. The driving signal output from the image processing unit 110 may include a data enable signal, a vertical sync signal, a horizontal sync signal, and a clock signal.

The timing controller 120 receives a driving signal along with image data from the image processing unit 110 . The timing controller 120 includes a gate timing control signal GDC for controlling an operation timing of the scan driver 130 and a data timing control signal DDC for controlling an operation timing of the data driver 140 based on the driving signal. ) to create/output.

The scan driver 130 outputs a scan signal in response to the gate timing control signal GDC supplied from the timing controller 120 . The scan driver 130 outputs a scan signal through the scan lines GL1 to GLm. The scan driver 130 may be formed in the form of an integrated circuit (IC). The scan driver 130 may be formed in a non-display area of the display panel 150 in the form of a gate in panel. The scan driver 130 may be disposed on the left and right sides of the display panel 150 , or may be disposed on either side of the display panel 150 . The scan driver 130 may include a plurality of stages. For example, the first stage of the scan driver 130 may output a first scan signal for driving the first scan line of the display panel 150 .

The data driver 140 outputs a data voltage in response to the data timing control signal DDC supplied from the timing controller 120 . The data driver 140 samples and latches the digital data signal DATA supplied from the timing controller 120 , and converts it into an analog data voltage based on the gamma reference voltage. The data driver 140 outputs a data voltage through the data lines DL1 to DLn. The data driver 140 may be formed in the form of an integrated circuit (IC).

The power supply unit 180 outputs a high potential voltage VDD and a low potential voltage VSS. The high potential voltage and the low potential voltage output from the power supply unit 180 are supplied to the display panel 150 . The high potential voltage is supplied to the display panel 150 through a first power line EVDD, and the low potential voltage is supplied to the display panel 150 through a second power line EVSS. The voltage output from the power supply unit 180 is also used by the data driver 140 or the scan driver 130 .

The display panel 150 displays an image corresponding to the data voltage and scan signal supplied from the data driver 140 and the scan driver 130 , and the power supplied from the power supply unit 180 . The display panel 150 includes sub-pixels SP that operate to display an image.

The sub-pixels SP include a red sub-pixel, a green sub-pixel and a blue sub-pixel, or include a white sub-pixel, a red sub-pixel, a green sub-pixel, and a blue sub-pixel. The sub-pixels SP may have one or more different emission areas according to emission characteristics.

As shown in FIG. 2 , one sub-pixel SP may be connected to a scan line GL, a data line DL, a first power line EVDD, and a second power line EVSS. The number of transistors and capacitors as well as a driving method of the sub-pixel SP are determined according to the circuit configuration. A circuit for driving the sub-pixel SP according to an embodiment may include a switching transistor, a driving transistor, a capacitor, and an organic light emitting diode. The driving circuit may operate in the order of an initialization period t1 , a sampling period t2 , a sustain period t3 , and a light emission period t4 . The initialization period t1 is a period for initializing the gate node of the driving transistor. The sampling period t2 is a period in which the organic light emitting diode OLED is initialized while sampling the threshold voltage of the driving transistor. The sustain period t3 is a period in which the data voltage Vdata applied through the data line is maintained at a specific node. The emission period t4 is a period in which the organic light emitting diode emits light with a driving current generated based on the data voltage Vdata.

3 is a view showing a power supply line according to an embodiment of the present specification.

Various types of power are supplied to a circuit (hereinafter, referred to as a pixel circuit) for driving each sub-pixel SP. For example, the pixel circuit is provided with an initialization voltage VREF, a high potential voltage VDD, a low potential voltage VSS, and a data voltage Vdata at specific time points. Accordingly, the organic light emitting diode display may include a power supply line that transmits various types of power to the pixel circuit.

among the above power sources. The low potential voltage VSS is supplied to the cathode electrode of the organic light emitting diode, and the high potential voltage VDD is supplied to the driving transistor. As shown in the illustrated example, the low potential voltage VSS may be transmitted through the low potential voltage line EVSS surrounding the display area A/A. Meanwhile, the high potential voltage VDD may be transmitted through a plurality of high potential voltage lines EVDD1 and EVDD2.

In the case of the high potential voltage (VDD) line, the voltage line EVDD1 extending in the first direction (eg, the vertical direction) and the voltage line EVDD2 extending in the second direction (eg, the horizontal direction) are meshed It may be provided in a shape. Such a net shape can reduce electrical resistance compared to a shape in which the power supply line is provided in only one direction, so that power transmission is more efficient. However, the inventors of the present specification have recognized some problems that are not resolved even in the power wiring structure as shown in FIG. 3 . One of them is the drop of the high potential voltage (VDD) and the resulting screen non-uniformity.

The high potential voltage (VDD) that supplies the required (target) voltage to the organic light emitting diode is introduced through the input terminal (PAD) and transmitted to each pixel circuit through a line. Example: A phenomenon in which the value decreases as it is transmitted to the pixel below the display area in FIG. 3 .

Due to this, the luminance of a pixel far from the input terminal PAD may be relatively low. That is, even when a signal expressing the same gray level is transmitted, a pixel farther from the input terminal PAD may emit light with a lower luminance than a nearby pixel. Conversely, there may be a problem in that a pixel close to the input terminal PAD emits light with a higher luminance than a pixel farther away. Accordingly, the display unevenness between the upper and lower portions of the display area may be visually recognized by the user. Accordingly, the present inventors have devised a power line arrangement capable of reducing the above-described luminance non-uniformity caused by a voltage drop.

4 is a view showing a power supply line according to another embodiment of the present specification.

The inventors have derived a wiring structure capable of improving the reference voltage fluctuation problem and the brightness non-uniformity problem described in FIG. 3 . The improved wiring structure is designed so that variations in the high potential voltage VDD do not affect the final pixel circuit by varying the resistance of each part of the voltage line. 4 shows power supply lines to which the improved structure is applied.

The organic light emitting diode display according to the present exemplary embodiment includes: a substrate having a display area A/A on which pixels are disposed and a non-display area I/A outside the display area A/A; a pixel circuit in the display area A/A on the substrate and driving the pixels; an inlet (PAD) to which power and signals transmitted to the pixel circuit are applied; and high-potential voltage lines EVDD11 and EVDD22 extending from the lead-in portion PAD to the pixel circuit.

The substrate serves to support and protect the components of the organic light emitting diode display disposed thereon. The substrate may be a flexible substrate made of a flexible material having a flexible characteristic. The substrate may be a glass or plastic substrate. In the case of a plastic substrate, a polyimide-based or polycarbonate-based material may be used to have flexibility.

An array of pixels is disposed in the display area A/A. The non-display area I/A may be located outside the display area A/A and surround the display area A/A. However, the shape/arrangement of the non-display area I/A is not limited to the example illustrated in FIG. 4 . In the non-display area I/A, a driving circuit (eg, GIP), a power line, and the like may be disposed. A pixel circuit and a light emitting device are not disposed in the non-display area I/A, but organic/inorganic functional layers may be present. In addition, materials used to form the display area A/A may be disposed in the non-display area I/A for different purposes. For example, the same metal as the gate electrode of the TFT of the display area A/A or the same metal as the source/drain electrodes may be disposed in the non-display area I/A for wiring or electrodes. Furthermore, the same metal as one electrode (eg, an anode) of the organic light emitting diode may be disposed in the non-display area I/A for wiring and electrodes.

The pixel circuit may include a thin film transistor (TFT), a capacitor, an organic light emitting diode (OLED), and various signal lines.

The thin film transistor may include a gate electrode; source and drain electrodes; semiconductor layer; and an insulating layer. The semiconductor layer may be made of amorphous silicon or polycrystalline silicon. Polycrystalline silicon has better mobility than amorphous silicon, so it has low energy consumption and excellent reliability. Recently, oxide semiconductors have been in the spotlight because of their excellent mobility and uniformity. The semiconductor layer may include a source region, a drain region, and a channel between the source and drain regions including p-type or n-type impurities, and a source region adjacent to the channel. and a lightly doped region between the drain region. The gate electrode serves as a switch that turns on or off the thin film transistor based on an electric signal transmitted from the outside through the gate line, and a conductive metal copper (Cu); Aluminum (Al), molybdenum (Mo), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), etc. or alloys thereof may be composed of a single layer or multiple layers. have. The source and drain electrodes are connected to the data line and allow an electric signal transmitted from the outside to be transmitted from the thin film transistor to the organic light emitting diode. The source and drain electrodes are made of conductive metals such as copper (Cu), aluminum (Al), molybdenum (Mo), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), and neodymium (Nd). It may consist of a single layer or multiple layers of a metal material or an alloy thereof.

The gate insulating layer is an insulating film composed of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), and is provided so that a current flowing through the semiconductor layer does not flow to the gate electrode. In addition, an interlayer insulating layer composed of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx) may be disposed between the gate electrode and the source and drain electrodes to insulate the gate electrode and the source and drain electrodes from each other. .

A protective layer made of an inorganic insulating layer such as silicon oxide (SiOx) or silicon nitride (SiNx) may be positioned on the thin film transistor. The protective layer may prevent unnecessary electrical connection between components of the thin film transistor and prevent contamination or damage from the outside. The protective layer may be omitted depending on the configuration and characteristics of the thin film transistor and the organic light emitting device.

The thin film transistor may be classified as a switching thin film transistor or a driving thin film transistor. When a signal is applied from the gate line to the switching thin film transistor, the signal from the data line is transferred to the gate electrode of the driving thin film transistor. The driving thin film transistor transmits a current transmitted through the power wiring to the anode according to a signal received from the switching thin film transistor, and light emission is controlled by the current transmitted to the anode.

A planarization layer is disposed on the thin film transistor. The planarization layer protects the thin film transistor, alleviates a step difference caused by the thin film transistor, and reduces parasitic-capacitance generated between the thin film transistor, the gate line, the data line, and the organic light emitting device. The planarization layer is composed of Acrylic Resin, Epoxy Resin, Phenolic Resin, Polyamides Resin, Polyimides Resin, Unsaturated Polyesters Resin), a polyphenylene-based resin (Polyphenylene Resin), a polyphenylenesulfide-based resin (Polyphenylenesulfides Resin), and benzocyclobutene (Benzocyclobutene) may be formed of at least one material.

The organic light-emitting device is disposed on the planarization layer. The organic light emitting diode includes an anode, a light emitting unit, and a cathode. The anode may be disposed directly over the planarization layer. The anode is an electrode serving to supply holes to the light emitting part, and may be electrically connected to the thin film transistor through a contact hole in the planarization layer. The anode may be made of indium tin oxide (ITO), indium zinc oxide (IZO), or the like, which are transparent conductive materials. When the organic light emitting diode display 100 is a top emission method for emitting light upward, the anode may further include a reflective layer so that the emitted light can be more smoothly emitted in the upward direction in which the cathode is disposed. can The anode may have a two-layer structure in which a transparent conductive layer and a reflective layer made of a transparent conductive material are sequentially stacked, or a three-layer structure in which a transparent conductive layer, a reflective layer, and a transparent conductive layer are sequentially stacked, and the reflective layer is silver (Ag ) or an alloy containing silver.

A light emitting part is disposed between the anode and the cathode. The light emitting unit serves to emit light, and includes a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer; At least one of an ETL) and an Electron Injection Layer (EIL) may be included, and some components of the light emitting unit may be omitted depending on the structure or characteristics of the organic light emitting display device 100 .

The cathode is disposed on the light emitting unit, and serves to supply electrons to the light emitting unit. Since the cathode needs to supply electrons, it may be made of a metal material such as magnesium (Mg), silver-magnesium (Ag:Mg), which is a conductive material having a low work function. When the organic light emitting diode display 100 is a top emission type, the cathode is indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), zinc oxide (Zinc oxide, ZnO) and tin oxide (TiO)-based transparent conductive oxides may be used.

The pixel circuit is a signal necessary for driving a sub-pixel. Power and the like are supplied through the signal lines. To this end, the pixel circuit may be connected to signal lines for communication with a gate driver, a data driver, and the like. The outline of the operation of the pixel circuit is the same as described with reference to FIG. 2 .

The lead-in portion PAD is in the non-display area I/A. The lead-in portion PAD includes a connection terminal (pad, bump, pin, etc.), and through the connection terminal, a flexible printed circuit board (FPCB), a chip-on-film (COF), a tape-carrier-package (TCP) ) can be associated with Components such as a power control IC and a data driver IC may be mounted on the FPCB.

The high potential voltage line lines EVDD11 and EVDD22 are provided such that an electrical resistance of a portion closer to the lead-in PAD is greater than an electrical resistance of a portion farther from the lead-in PAD. That is, the high potential voltage line is designed to balance the overall resistance by reflecting in advance that a voltage drop occurs as the distance from the lead-in portion PAD is increased. Accordingly, the pixel circuit close to the lead-in portion PAD receives the high potential voltage VDD through a path having a relatively large (per unit length) resistance, and the pixel circuit farther from the lead-in portion PAD receives a relatively small resistance. It is supplied with a high potential voltage (VDD) through a path with resistance (per unit length). Accordingly, all pixels of the display area A/A may be supplied with a uniform high potential voltage VDD in which a voltage drop according to a resistance and a position on the transmission path is offset.

The high potential voltage line may include a first high potential voltage line EVDD11 extending in a first direction (eg, a vertical direction); and a second high potential voltage line EVDD22 extending in a second direction (eg, a horizontal direction) crossing the first direction. The first high potential voltage line EVDD11 and the second high potential voltage line EVDD22 may be connected to each other through a contact hole or the like to function as one conductive line.

The length of the second high potential voltage line EVDD22 may increase in the second direction as the distance from the lead-in part PAD increases. Through this configuration, the organic light emitting display device supplies the high potential voltage VDD through an electrical path having more resistance to the pixel circuit having a small voltage drop width because it is close to the lead-in part PAD, and supplies the lead-in part PAD. ) and a pixel circuit with a large voltage drop, a high potential voltage (VDD) is supplied through an electrical path with less resistance. Accordingly, the high potential voltage VDD may be uniformly supplied to each pixel circuit regardless of the position of the sub-pixel.

The length of the second high potential voltage line EVDD22 may increase linearly or stepwise. That is, the horizontal length of the second high potential voltage line EVDD22 may continuously increase for each row as shown in FIG. 5 or may increase in units of a constant row (eg, 5 rows, 10 rows, etc.). .

Meanwhile, the first high potential voltage line EVDD11 and the second high potential voltage line EVDD22 may be disposed on different layers. That is, the first high potential voltage line EVDD11 is disposed above the second high potential voltage line EVDD22 or, conversely, the second high potential voltage line EVDD22 is connected to the first high potential voltage line ( EVDD11) and may be disposed on an upper layer.

The first high potential voltage line EVDD11 may be formed of the same material as a source or drain electrode of a thin film transistor included in the pixel circuit. Also, the second high potential voltage line EVDD22 may be made of the same material as a gate electrode of a thin film transistor included in the pixel circuit. In this case, the second high potential voltage line EVDD22 may include a gate electrode of a thin film transistor included in the pixel circuit; and a layer between the source or drain electrodes. Alternatively, the second high potential voltage line EVDD22 may be disposed on the same layer as the gate electrode.

It further includes a low potential voltage line EVSS that transmits the low potential power VSS to the pixel circuit. The low potential voltage line may be provided to start from the lead-in portion PAD and extend to surround the display area A/A.

5 is a diagram illustrating luminance uniformity of a display device to which an embodiment of the present specification is applied. As shown, in the embodiment of FIG. 4 , the difference in luminance is further reduced in the vertical/left and right directions, compared to the case of having the power wiring having the structure as in FIG. 3 . According to the experimental results, the high potential voltage drop in the example of FIG. 4 was reduced by about 17 to 31% compared to the example of FIG. 3 .

Accordingly, in the organic light emitting diode display according to the exemplary embodiment of the present specification, all pixels may receive operating power uniformly through an effective arrangement of power lines, and thus display uniformity may be improved.

Although the embodiments of the present specification have been described in detail with reference to the accompanying drawings, the present specification is not necessarily limited to these embodiments, and various modifications may be made within the scope without departing from the technical spirit thereof. Accordingly, the embodiments disclosed in the present specification are intended to explain, not to limit the technical spirit of the present invention, and the scope of the technical spirit of the present invention is not limited by these embodiments. Each feature of the various embodiments of the present invention may be partially or wholly combined or combined with each other, and may be technically variously linked and operated by those skilled in the art, and each embodiment may be implemented independently of each other or together in a related relationship. may be carried out. The protection scope of the present invention should be construed by the following claims, and all technical ideas within the equivalent range should be construed as being included in the scope of the present invention.

Claims (11)

a substrate having a display area on which pixels are disposed and a non-display area outside the display area;
a pixel circuit in the display area on the substrate and configured to drive the pixels;
an inlet in the non-display area to which power and a signal transmitted to the pixel circuit are applied;
extending from the inlet to the pixel circuit;
and a high potential voltage line in which an electrical resistance of a portion close to the lead-in is greater than an electrical resistance of a portion farther from the lead-in. According to claim 1,
The high potential voltage line is
a first high potential voltage line extending in a first direction; and a second high potential voltage line extending in a second direction crossing the first direction. 3. The method of claim 2,
The second high potential voltage line is
The organic light emitting display device in which the length in the second direction increases as the distance from the inlet part increases. 4. The method of claim 3,
The length of the second high potential voltage line increases linearly or stepwise. 3. The method of claim 2,
The first high potential voltage line and the second high potential voltage line are disposed on different layers. 6. The method of claim 5,
The organic light emitting diode display device in which the first high potential voltage line is disposed above the second high potential voltage line. 3. The method of claim 2,
The first high potential voltage line is made of the same material as a source or drain electrode of a thin film transistor included in the pixel circuit. 3. The method of claim 2,
The second high potential voltage line is made of the same material as a gate electrode of a thin film transistor included in the pixel circuit. 9. The method of claim 8,
The second high potential voltage line may include a gate electrode of a thin film transistor included in the pixel circuit; and an organic light emitting diode display disposed on a layer between the source or drain electrodes. According to claim 1,
The organic light emitting display device further comprising a low potential voltage line for transmitting a low potential power VSS to the pixel circuit in the non-display area. 11. The method of claim 10,
The low potential voltage line starts from the lead-in part and extends to surround the display area.

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