KR20210047575A - Channel device including aligned carbon nanotubes - Google Patents
Channel device including aligned carbon nanotubes Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
- H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
- H01L29/0669—Nanowires or nanotubes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02606—Nanotubes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
- H10K85/10—Organic polymers or oligomers
- H10K85/111—Organic polymers or oligomers comprising aromatic, heteroaromatic, or aryl chains, e.g. polyaniline, polyphenylene or polyphenylene vinylene
- H10K85/115—Polyfluorene; Derivatives thereof
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
- H10K85/20—Carbon compounds, e.g. carbon nanotubes or fullerenes
- H10K85/221—Carbon nanotubes
Abstract
Description
본 발명은 정렬된 탄소나노튜브를 포함하는 채널 소자에 관한 것으로써, 보다 상세하게는, 탄소나노튜브를 수직으로 정렬시킴으로써, 전도성 및 전하 이동도가 증가되고 가동-정지(on-off) 비율이 높은 채널 소자에 관한 것이다. The present invention relates to a channel device including aligned carbon nanotubes, and more particularly, by vertically aligning the carbon nanotubes, conductivity and charge mobility are increased, and an on-off ratio is increased. It relates to high channel devices.
단일벽탄소나노튜브(SWCNTs)는 그들의 흥미로운 물리화학적 특성으로 인해 나노스케일 과학기술에서 주요한 건축 블록(key building block)이다. SWCNT는 고속 및 저 출력 반도체 전자장비에 대해 특히 유망하다. 그러나, 이러한 건축 블록을 체계적으로 조직화하여 조직화된 조립체, 궁극적으로 유용한 장치를 얻는 것은 도전적이다. 무작위 네트워크 SWCNT 박막이 감소된 채널 전도도 및 이동성을 포함하는 차선의(sub-optimal) 전기적 특성을 가져오기 때문에, 정돈된 구조가 필요하다. 이러한 결점을 해결하고 더 높은 전도도 및 이동성을 달성하기 위하여, 다수의 SWCNT를 정렬하기 위한 기술들이 탐구되었다. 이러한 접근법은 두 개의 주된 카테고리로 분리될 수 있다: (a) 화학 기상 증착법 및 아크-방전(arc-discharge)을 통한 직접 성장, 및 (b) 후 합성 조립(post synthetic assembly). 직접 성장의 경우에, 금속성 및 반도체성 SWCNT 모두가 제조된다. 이 경우에, SWCNT 전계 효과 트랜지스터(FETs)의 성능은 금속성 SWCNTs(m-SWCNTs)에 의해 제한되기 때문에, 동질의 전자 특성을 갖는 반도체성 SWCNT(s-SWCNTs) 샘플을 정제하려는 시도에 대한 동기를 부여한다.Single-walled carbon nanotubes (SWCNTs) are the key building blocks in nanoscale science and technology due to their interesting physicochemical properties. SWCNT is particularly promising for high-speed and low-power semiconductor electronics. However, systematically organizing these building blocks to obtain an organized assembly, ultimately a useful device, is challenging. Since random networked SWCNT thin films result in sub-optimal electrical properties including reduced channel conductivity and mobility, an ordered structure is required. In order to solve this drawback and achieve higher conductivity and mobility, techniques for aligning multiple SWCNTs have been explored. These approaches can be divided into two main categories: (a) direct growth via chemical vapor deposition and arc-discharge, and (b) post synthetic assembly. In the case of direct growth, both metallic and semiconducting SWCNTs are produced. In this case, since the performance of SWCNT field effect transistors (FETs) is limited by metallic SWCNTs (m-SWCNTs), this motivates attempts to purify semiconducting SWCNT (s-SWCNTs) samples with homogeneous electronic properties. Grant.
m-SWCNT 및 s-SWCNT를 그들의 특정 물리적 및 전자적 구조에 따라 분리하는 다양한 후-합성 분류 방법이 개발되었으며, 이러한 방법은 보통 수성 용액 또는 유기 용액에서 수행된다. 이러한 용액-기반의 분류 접근법에 의해 반도체 전자 장치에서 제조될 수 있는 고 순도의 s-SWCNT의 이점을 취하기 위하여, s-SWCNT를 조립하고 정렬하는 용액-기반의 방법, 예를 들어, 증발-추진 자가-조립법, 블로운 기포 조립법(blown-bubble assembly), 가스 흐름 자가-조립법, 스핀-코팅법, 랭뮤어 -블라젯 및 -쉐이퍼 방법, 컨택트 프린팅 조립법(contact printing assembly) 및 AC 전기영동법이 개발되었다. Various post-synthetic classification methods have been developed to separate m-SWCNTs and s-SWCNTs according to their specific physical and electronic structure, and these methods are usually carried out in aqueous or organic solutions. In order to take advantage of the high purity s-SWCNTs that can be manufactured in semiconductor electronic devices by this solution-based classification approach, a solution-based method of assembling and aligning s-SWCNTs, e.g., evaporation-driven Self-assembly method, blow-bubble assembly method, gas flow self-assembly method, spin-coating method, Langmuir-Blajet and -Shaper method, contact printing assembly method, and AC electrophoresis method are developed. Became.
이러한 방법들 각각이 강점을 갖지만, s-SWCNT 조립 및 배열의 정밀성을 향상시키고 실현 가능한 s-SWCNT-기반의 전자 장치의 제작을 가능토록 하는 새로운 방법들이 여전히 필요하다. Although each of these methods has strengths, there is still a need for new methods that improve the precision of s-SWCNT assembly and arrangement and enable the fabrication of feasible s-SWCNT-based electronic devices.
따라서, s-SWCNT 조립 및 배열의 정밀성이 향상시킬 수 있는 방법에 대해 연구가 진행되고 있다. Therefore, research is being conducted on a method that can improve the precision of s-SWCNT assembly and arrangement.
본 발명은 상술된 문제점을 해결하기 위해 안출된 것으로, 본 발명의 목적은, 고도의 나노 튜브 정렬을 가지는 반도체성-단일벽탄소나노튜브(s-SWCNT)의 고밀도막을 포함하는 채널 소자를 제공하는 것이다. The present invention was conceived to solve the above-described problem, and an object of the present invention is to provide a channel device including a high-density film of semiconducting-single-walled carbon nanotubes (s-SWCNT) having a high degree of nanotube alignment. will be.
본 발명의 일 실시예에 따른 채널 소자는 기판; 및 반도체성-단일벽탄소나노튜브(s-SWCNT)가 상기 기판 상에 수직으로 형성되는 막;을 포함하는 것을 특징으로 한다. A channel device according to an embodiment of the present invention includes a substrate; And a film in which a semiconducting single-walled carbon nanotube (s-SWCNT) is vertically formed on the substrate.
일 실시예에서, 상기 막은, 상기 s-SWCNT가 약 15°이하로 정렬되는 것을 특징으로 한다. In one embodiment, the film is characterized in that the s-SWCNT is aligned to about 15 degrees or less.
일 실시예에서, 상기 s-SWCNT은, 선형 패킹 밀도가 10 단일벽탄소나노튜브/㎛이상인 것을 특징으로 한다. In one embodiment, the s-SWCNT is characterized in that the linear packing density is 10 single-walled carbon nanotubes/µm or more.
일 실시예에서, 상기 기판은, 소수성인 것을 특징으로 한다. In one embodiment, the substrate is characterized in that it is hydrophobic.
본 발명의 일 실시예에 따른 채널 소자 제조 방법은 기판의 하측이 매질과 접촉시켜 준비하는 단계; 유기 용애 중에 선택적으로 폴리머 코팅된 반도체성-단일벽탄소나노튜브(semiconductor-selective-polymer-wrapped s-SWCNT)가 분산된 액체 용액을 상기 매질에 부유시키는 단계; 상기 액체 용액이 공기-액체 계면에서 상기 매질로 확산되고, 상기 선택적으로 폴리머 코팅된 반도체성-단일벽탄소나노튜브가 상기 기판 상에 일정 간격 이격되어 증착되는 단계; 상기 기판을 상기 매질로 침지시켜 상기 기판이 침지되는 방향으로 상기 선택적으로 폴리머 코팅된 반도체성-단일벽탄소나노튜브를 수직으로 증착시키는 단계; 및 상기 기판을 회수하는 단계;를 포함하는 것을 특징으로 한다. A method of manufacturing a channel device according to an embodiment of the present invention includes preparing a lower side of a substrate in contact with a medium; Floating in the medium a liquid solution in which a semiconductor-selective-polymer-wrapped s-SWCNT is selectively dispersed in an organic solvent; Diffusing the liquid solution into the medium at an air-liquid interface, and depositing the selectively polymer-coated semiconducting-single-walled carbon nanotubes at predetermined intervals on the substrate; Immersing the substrate in the medium to vertically deposit the selectively polymer-coated semiconducting-single-wall carbon nanotubes in a direction in which the substrate is immersed; And recovering the substrate.
일 실시예에서, 상기 선택적으로 폴리머 코팅된 반도체성-단일벽탄소나노튜브에서 상기 폴리머를 제거하는 단계;를 더 포함하는 것을 특징으로 한다. In one embodiment, the step of removing the polymer from the selectively polymer-coated semiconducting-single-wall carbon nanotubes; characterized in that it further comprises.
일 실시예에서, 상기 선택적으로 폴리머 코팅된 반도체성-단일벽탄소나노튜브가 상기 기판 상에 일정 간격 이격되어 증착되는 단계 및 상기 기판을 상기 매질로 침지시키는 단계를 반복하는 것을 특징으로 한다. In one embodiment, the selectively polymer-coated semiconducting-single-walled carbon nanotubes are deposited on the substrate at predetermined intervals, and the step of immersing the substrate in the medium is repeated.
일 실시예에서, 상기 용매는, 유기 용매로 클로로폼(chloroform), 디크롤로메탄, N,N-디메틸포름아미드, 벤젠, 디클로로벤젠, 톨루엔 및 자일렌 중 어느 하나를 포함하는 것을 특징으로 한다. In one embodiment, the solvent is characterized in that it contains any one of chloroform, dichloromethane, N,N-dimethylformamide, benzene, dichlorobenzene, toluene, and xylene as an organic solvent.
일 실시예에서, 상기 폴리머는, 폴리플루오렌 유도체인 것을 특징으로 한다. In one embodiment, the polymer is characterized in that it is a polyfluorene derivative.
본 발명에 따르면, 고도의 나노 튜브 정렬을 가지는 반도체성-단일벽탄소나노튜브(s-SWCNT)의 고밀도막을 포함함하므로써, 전도성 및 전하 이동도가 증가되고 가동-정지(on-off) 비율이 높아지는 효과가 발생하게 된다. According to the present invention, by including a high-density film of semiconducting-single-walled carbon nanotubes (s-SWCNT) having a high degree of nanotube alignment, conductivity and charge mobility are increased, and the on-off ratio is increased. Increased effect occurs.
도 1은 본 발명에 따른 채널 소자 제조 방법을 도시한 도면이다.
도 2는 본 발명에 따른 채널 소자의 고 해상도 SEM사진이다.
도 3은 기판의 침지 속도에 따른 s-SWCNT 줄무늬 간의 넓이 및 s-SWCNT 줄무늬 두께 변화를 나타낸 그래프이다. 1 is a diagram showing a method of manufacturing a channel device according to the present invention.
2 is a high-resolution SEM photograph of a channel device according to the present invention.
3 is a graph showing changes in the area between s-SWCNT stripes and the thickness of s-SWCNT stripes according to the immersion speed of the substrate.
본 발명을 첨부된 도면을 참조하여 상세히 설명하면 다음과 같다. 여기서, 반복되는 설명, 본 발명의 요지를 불필요하게 흐릴 수 있는 공지 기능 및 구성에 대한 상세한 설명은 생략한다. 본 발명의 실시형태는 당 업계에서 평균적인 지식을 가진 자에게 본 발명을 완전하게 설명하기 위해서 제공되는 것이다. 따라서, 도면에서의 요소들의 형상 및 크기 등은 보다 명확한 설명을 위하여 과장될 수 있다. The present invention will be described in detail with reference to the accompanying drawings as follows. Here, repeated descriptions and detailed descriptions of known functions and configurations that may unnecessarily obscure the subject matter of the present invention will be omitted. Embodiments of the present invention are provided to completely explain the present invention to those with average knowledge in the art. Accordingly, the shapes and sizes of elements in the drawings may be exaggerated for clearer explanation.
명세서 전체에서, 어떤 부분이 어떤 구성 요소를 "포함"한다고 할 때, 이는 특별히 반대되는 기재가 없는 한 다른 구성 요소를 제외하는 것이 아니라 다른 구성 요소를 더 포함할 수 있는 것을 의미한다. Throughout the specification, when a part "includes" a certain component, it means that other components may be further included rather than excluding other components unless specifically stated to the contrary.
이하, 본 발명의 이해를 돕기 위하여 바람직한 실시예를 제시한다. 그러나 하기의 실시예는 본 발명을 보다 용이하게 이해하기 위하여 제공되는 것일 뿐, 실시예에 의해 본 발명의 내용이 한정되는 것은 아니다. Hereinafter, preferred embodiments are presented to aid in understanding the present invention. However, the following examples are only provided to more easily understand the present invention, and the contents of the present invention are not limited by the examples.
<채널 소자> <Channel element>
본 발명에 따른 채널 소자는 기판 및 막을 포함한다. The channel device according to the present invention includes a substrate and a film.
기판은 매질보다 후술되는 반도체성-단일벽탄소나노튜브와 친화성을 높여 회수율을 증가시키기 위해 소수성을 사용할 수 있다. 일 실시예에 있어서, 기판은 실리콘 기판이 사용될 수 있다. The substrate may use hydrophobicity in order to increase the affinity with the semiconducting-single-walled carbon nanotubes described below rather than the medium to increase the recovery rate. In one embodiment, a silicon substrate may be used as the substrate.
도 2는 본 발명에 따른 채널 소자의 고 해상도 SEM사진이다. 도 2를 참고하면, 막은 기판 표면에 형성되는 구성으로, 반도체성-단일벽탄소나노튜브(s-SWCNT)가 수직으로 기판에 증착되어, s-SWCNT 줄무늬가 형성된다. 2 is a high-resolution SEM photograph of a channel device according to the present invention. Referring to FIG. 2, the film is formed on the surface of the substrate, and semiconducting-single-walled carbon nanotubes (s-SWCNT) are vertically deposited on the substrate to form s-SWCNT stripes.
좀 더 상세하게는, 막은 복수개의 s-SWCNT가 기판에 정렬 및 증착되어 전체적으로 기판의 길이방향으로 줄무늬 형태로 제공된다. 그리고, 막은 복수개의 s-SWCNT 줄무늬가 이격되어 형성되는 형태로 제공된다. In more detail, a plurality of s-SWCNTs are arranged and deposited on a substrate to provide a film in the form of stripes in the length direction of the substrate as a whole. In addition, the film is provided in a form in which a plurality of s-SWCNT stripes are spaced apart.
이때, 각각의 s-SWCNT는 기판의 길이(수직)을 기준으로 15°이하로 정렬된다. 또한, s-SWCNT는 선형 패킹 밀도는 10단일벽탄소나노튜브/㎛ 이상인 것을 특징으로 한다. 선형 패킹 밀도(linear packing density)는 s-SWCNT 줄무늬 및 막에 정렬된 s-SWCNT의 밀도를 의미하는 것으로, 이는 1㎛ 당 SWCNT의 개수를 의미할 수 있다. At this time, each s-SWCNT is aligned at 15° or less based on the length (vertical) of the substrate. In addition, the s-SWCNT is characterized in that the linear packing density is 10 single-walled carbon nanotubes/µm or more. The linear packing density refers to the density of s-SWCNT stripes and s-SWCNTs aligned to the membrane, which may refer to the number of SWCNTs per 1 μm.
따라서, s-SWCNT의 기울기가 15°를 초과하거나, 선형 패킹 밀도가 10SWCNT/㎛ 미만이면, s-SWCNT의 줄무늬 간격이 좁아지고 s-SWCNT 사이 단선이 일어나 전하 이동도가 감소하는 문제가 발생할 수 있다. Therefore, if the slope of the s-SWCNT exceeds 15° or the linear packing density is less than 10SWCNT/㎛, the spacing of the stripes of the s-SWCNT is narrowed, and a disconnection between the s-SWCNTs occurs, resulting in a problem of decreasing charge mobility. have.
<채널 소자 제조 방법><Channel element manufacturing method>
본 발명의 일 실시예에 따른 채널 소자 제조 방법은 준비하는 단계(S100), 액체 용액을 매질에 부유시키는 단계(S200), 기판에 s-SWCNT가 증착되는 단계(S300), s-SWCNT를 수직으로 증착시키는 단계(S400) 및 기판을 회수하는 단계(S500)를 포함한다. The method of manufacturing a channel device according to an embodiment of the present invention includes preparing (S100), floating a liquid solution in a medium (S200), depositing s-SWCNT on a substrate (S300), and vertically s-SWCNT. It includes a step of depositing (S400) and a step of recovering the substrate (S500).
도 1은 본 발명에 따른 채널 소자 제조 방법을 도시한 도면이다. 1 is a diagram showing a method of manufacturing a channel device according to the present invention.
준비하는 단계(S100)는 기판의 하측을 매질과 접촉시키는 단계이다. The preparing step (S100) is a step of bringing the lower side of the substrate into contact with the medium.
도 1(a)는 액체 용액을 매질에 부유시키는 단계(S200)를 도시한 도면이다. S200은 기판과 매질이 접촉된 위치에서 일정 거리 떨어진 곳에 선택적으로 폴리머 코팅된 반도체성-단일벽탄소나노튜브(semiconductor-selective-polymer-wrapped s-SWCNT)를 포함하는 액체 용액을 떨어트려 매질에 s-SWCNT를 부유시키는 단계이다. 1 (a) is a diagram showing a step (S200) of floating a liquid solution in a medium. In S200, a liquid solution containing a polymer-coated semiconductor-selective-polymer-wrapped s-SWCNT is dropped into the medium at a certain distance from the position where the substrate and the medium are in contact. -This is the step of floating SWCNT.
이때, 액체 용액은 유기 용매로 클로로폼(chloroform), 디크롤로메탄, N,N-디메틸포름아미드, 벤젠, 디클로로벤젠, 톨루엔 및 자일렌 중 어느 하나를 포함할 수 있다. In this case, the liquid solution may contain any one of chloroform, dichloromethane, N,N-dimethylformamide, benzene, dichlorobenzene, toluene, and xylene as an organic solvent.
그리고, 폴리머는 유기 폴리머로 폴리플루오렌 유도체인 것을 특징으로 한다. 일 실시예에 있어서, 폴리머는 폴리(9,9-디알킬-플루오렌) 유도체, 및 폴리(페닐 비닐렌) 유도체를 포함한다. Further, the polymer is an organic polymer and is characterized in that it is a polyfluorene derivative. In one embodiment, the polymer comprises a poly(9,9-dialkyl-fluorene) derivative, and a poly(phenyl vinylene) derivative.
도 1(b)는 s-SWCNT가 기판에 증착되는 단계(S300)를 도시한 도면이다. S300은 s-SWCNT가 떨어진 위치에서 분산되어 기판에 도달하여 기판과 접촉하는 단계이다. 나아가, s-SWCNT는 기판 표면에 일정 간격 이격되어 증착될 수 있다. 1(b) is a diagram illustrating a step S300 of depositing s-SWCNT on a substrate. S300 is a step in which the s-SWCNT is dispersed at a distant location to reach the substrate and contact the substrate. Furthermore, s-SWCNT may be deposited on the surface of the substrate at a predetermined interval.
s-SWCNT은 Marangoni 효과 및 s-SWCNT 사이 반데르발스 힘에 의해 기판으로 끌어 당겨질 수 있다. 또한, s-SWCNT과 매질보다 s-SWCNT과 기판 사이 친화력을 높이기 위해 기판은 소수성 기판이 사용될 수 있다. The s-SWCNT can be attracted to the substrate by the Van der Waals force between the Marangoni effect and the s-SWCNT. In addition, in order to increase the affinity between the s-SWCNT and the substrate rather than the s-SWCNT and the medium, a hydrophobic substrate may be used as the substrate.
일 실시예에 있어서, 기판은 실리콘 기판, 매질은 물, 액체 용액은 s-SWCNT를 포함하는 클로로폼(chloroform)으로 제공될 수 있다. 소수성인 클로로폼은 극성인 물 표면에 부유하게 되고, 극성인 물보다 소수성인 실리콘 기판과 친화성이 높아 기판 방향으로 확산될 수 있다. In one embodiment, the substrate may be a silicon substrate, a medium may be water, and a liquid solution may be provided as chloroform including s-SWCNT. Hydrophobic chloroform floats on the surface of polar water, and has a higher affinity with the hydrophobic silicon substrate than polar water and can diffuse in the direction of the substrate.
s-SWCNT가 기판을 향해 끌어당겨지듯 확산됨으로써, s-SWCNT는 기판에 수직으로 증착될 수 있다. 그리고, s-SWCNT이 확산될 때, 국소적으로 농도가 증가하여 s-SWCNT는 일정 간격 이격되어 기판에 증착되게 된다. As the s-SWCNT diffuses as if being pulled toward the substrate, the s-SWCNT can be deposited perpendicularly to the substrate. And, when the s-SWCNT is diffused, the concentration increases locally so that the s-SWCNT is deposited on the substrate at a predetermined interval.
아울러, 기판은 표면에 HDMS 및 PDMS 중 어느 하나를 코팅하여 접착력을 증가시킬 수 있다. In addition, the substrate may increase adhesion by coating any one of HDMS and PDMS on the surface.
도 1(c)는 s-SWCNT를 수직으로 증착시키는 단계(S400)를 도시한 도면이다. S400은 기판을 매질로 침지시켜 기판이 침지되는 방향으로 s-SWCNT를 증착시키는 단계이다. 즉, s-SWCNT는 기판의 수직 혹은 길이 방향으로 증착되어 복수개의 s-SWCNT 줄무늬가 형성된다. 1(c) is a diagram showing a step (S400) of vertically depositing s-SWCNT. S400 is a step of depositing s-SWCNT in the direction in which the substrate is immersed by immersing the substrate with a medium. That is, the s-SWCNT is deposited in the vertical or length direction of the substrate to form a plurality of s-SWCNT stripes.
이때, 기판을 매질에 침지시키는 속도에 따라 s-SWCNT 줄무늬 간의 넓이 및 s-SWCNT 줄무늬 두께를 조절할 수 있다. In this case, the width between the s-SWCNT stripes and the thickness of the s-SWCNT stripes may be adjusted according to the speed at which the substrate is immersed in the medium.
도 3은 기판의 침지 속도에 따른 s-SWCNT 줄무늬 간의 넓이 및 s-SWCNT 줄무늬 두께 변화를 나타낸 그래프이다. 3 is a graph showing changes in the area between s-SWCNT stripes and the thickness of s-SWCNT stripes according to the immersion speed of the substrate.
기판 속도가 -20㎜/min 미만일 경우, 기판 침지 속도가 빨라 s-SWCNT가 기판에 수직으로 증착되기 전에 기판이 침지되어 s-SWCNT가 기판에 수평으로 증착되는 것을 알 수 있다. 그리고, 기판의 침지 속도가 빨라 s-SWCNT가 수평으로 침지됨으로써, s-SWCNT 줄무늬의 두께도 두꺼워 진다. When the substrate speed is less than -20 mm/min, the substrate immersion speed is high, so that the substrate is immersed before the s-SWCNT is vertically deposited on the substrate, so that the s-SWCNT is horizontally deposited on the substrate. In addition, the s-SWCNT is immersed horizontally due to the high immersion speed of the substrate, so that the thickness of the s-SWCNT stripe is also increased.
기판 속도가 -40㎜/min 초과일 경우, s-SWCNT 줄무늬 간의 넓이가 가장 넓어 s-SWCNT가 기판에 일정 간격 이격되어 증착된다. 또한, 기판 침지 속도가 느려 s-SWCNT가 기판에 수직으로 증착됨으로써, s-SWCNT 줄무늬의 두께는 얇게 형성되는 것을 알 수 있다. When the substrate speed is more than -40mm/min, the area between the s-SWCNT stripes is the widest, so that the s-SWCNTs are deposited on the substrate at regular intervals. In addition, it can be seen that the s-SWCNT is deposited vertically on the substrate due to the slow substrate immersion rate, so that the thickness of the s-SWCNT stripe is formed thin.
본 발명에 따른 채널 소자 제조 방법은 S300 및 S400 단계를 반복할 수 있다. S300 및 S400단계를 반복함으로써, s-SWCNT 줄무늬 중 s-SWCNT의 농도가 낮은 위치에 s-SWCNT가 추가 증착되어 s-SWCNT 사이 단선을 방지하는 효과가 발생할 수 있다. The method of manufacturing a channel device according to the present invention may repeat steps S300 and S400. By repeating steps S300 and S400, s-SWCNT is additionally deposited at a location where the concentration of s-SWCNT is low among the s-SWCNT stripes, thereby preventing disconnection between s-SWCNTs.
나아가, 본 발명에 따른 채널 소자 제조 방법은 선택적으로 폴리머 코팅된 반도체성-단일벽탄소나노튜브에서 폴리머를 제거하는 단계(S600)를 더 포함할 수 있다. 폴리머를 제거함으로써, 정렬된 s-SWCNT 배열의 자가-조립을 개선하였고, 고성능을 위하여 FET에서 금속 전극에 대한 s-SWCNT의 접촉을 개선하는 효과가 발생할 수 있다. Further, the method of manufacturing a channel device according to the present invention may further include a step (S600) of selectively removing the polymer from the polymer-coated semiconducting-single-walled carbon nanotubes. By removing the polymer, the self-assembly of the aligned s-SWCNT array has been improved, and the effect of improving the contact of the s-SWCNT to the metal electrode in the FET for high performance can occur.
따라서, 폴리머는 s-SWCNT 줄무늬 형성 후 제거되는 것을 특징으로 한다. Therefore, the polymer is characterized in that it is removed after the formation of the s-SWCNT stripes.
상기에서는 본 발명의 바람직한 실시예를 참조하여 설명하였지만, 해당 기술 분야의 숙련된 당업자는 하기의 특허 청구의 범위에 기재된 본 발명의 사상 및 영역으로부터 벗어나지 않는 범위 내에서 본 발명을 다양하게 수정 및 변경시킬 수 있음을 이해할 수 있을 것이다. Although the above has been described with reference to preferred embodiments of the present invention, those skilled in the art will variously modify and change the present invention within the scope not departing from the spirit and scope of the present invention described in the following claims. You will understand that you can do it.
Claims (9)
반도체성-단일벽탄소나노튜브(s-SWCNT)가 상기 기판 상에 수직으로 형성되는 막;을 포함하는,
정렬된 탄소나노튜브를 포함하는 채널 소자.
Board; And
Including; a semiconducting-single-walled carbon nanotube (s-SWCNT) film formed vertically on the substrate;
Channel device comprising aligned carbon nanotubes.
상기 막은,
상기 s-SWCNT가 약 15°이하로 정렬되는 것을 특징으로 하는, 정렬된 탄소나노튜브를 포함하는 채널 소자.
The method of claim 1,
The membrane,
Channel device comprising aligned carbon nanotubes, characterized in that the s-SWCNT is aligned to less than about 15°.
상기 s-SWCNT은,
선형 패킹 밀도가 10단일벽탄소나노튜브(SWCNT)/㎛이상인 것을 특징으로 하는, 정렬된 탄소나노튜브를 포함하는 채널 소자.
The method of claim 1,
The s-SWCNT,
A channel element comprising aligned carbon nanotubes, characterized in that the linear packing density is 10 single-walled carbon nanotubes (SWCNT)/㎛ or more.
상기 기판은,
소수성인 것을 특징으로 하는, 정렬된 탄소나노튜브를 포함하는 채널 소자.
The method of claim 1,
The substrate,
A channel device comprising aligned carbon nanotubes, characterized in that it is hydrophobic.
유기 용액 중에 선택적으로 폴리머 코팅된 반도체성-단일벽탄소나노튜브(semiconductor-selective-polymer-wrapped s-SWCNT)가 분산된 액체 용액을 상기 매질에 부유시키는 단계;
상기 액체 용액이 공기-액체 계면에서 상기 매질로 확산되고, 상기 선택적으로 폴리머 코팅된 반도체성-단일벽탄소나노튜브가 상기 기판 상에 일정 간격 이격되어 증착되는 단계;
상기 기판을 상기 매질로 침지시켜 상기 기판이 침지되는 방향으로 상기 선택적으로 폴리머 코팅된 반도체성-단일벽탄소나노튜브를 수직으로 증착시키는 단계; 및
상기 기판을 회수하는 단계;를 포함하는,
정렬된 탄소나노튜브를 포함하는 채널 소자 제조 방법.
Preparing the lower side of the substrate by contacting the medium;
Suspending a liquid solution in which a semiconductor-selective-polymer-wrapped s-SWCNT is selectively dispersed in an organic solution in the medium;
Diffusing the liquid solution into the medium at an air-liquid interface, and depositing the selectively polymer-coated semiconducting-single-walled carbon nanotubes at regular intervals on the substrate;
Immersing the substrate in the medium to vertically deposit the selectively polymer-coated semiconducting-single-wall carbon nanotubes in a direction in which the substrate is immersed; And
Including; recovering the substrate;
Channel device manufacturing method comprising aligned carbon nanotubes.
상기 선택적으로 폴리머 코팅된 반도체성-단일벽탄소나노튜브에서 상기 폴리머를 제거하는 단계;를 더 포함하는 것을 특징으로 하는, 정렬된 탄소나노튜브를 포함하는 채널 소자 제조 방법.
The method of claim 5,
Removing the polymer from the selectively polymer-coated semiconducting-single-walled carbon nanotubes; characterized in that it further comprises, a channel device manufacturing method comprising aligned carbon nanotubes.
상기 선택적으로 폴리머 코팅된 반도체성-단일벽탄소나노튜브가 상기 기판 상에 일정 간격 이격되어 증착되는 단계 및 상기 기판을 상기 매질로 침지시키는 단계를 반복하는 것을 특징으로 하는, 정렬된 탄소나노튜브를 포함하는 채널 소자 제조 방법.
The method of claim 5,
Aligned carbon nanotubes, characterized in that repeating the step of depositing the selectively polymer-coated semiconducting-single-walled carbon nanotubes at regular intervals on the substrate and immersing the substrate with the medium Channel device manufacturing method comprising.
상기 용매는,
유기 용매로 클로로폼(chloroform), 디크롤로메탄, N,N-디메틸포름아미드, 벤젠, 디클로로벤젠, 톨루엔 및 자일렌 중 어느 하나를 포함하는 것을 특징으로 하는, 정렬된 탄소나노튜브를 포함하는 채널 소자 제조 방법.
The method of claim 5,
The solvent is,
Channel comprising aligned carbon nanotubes, characterized in that it contains any one of chloroform, dichloromethane, N,N-dimethylformamide, benzene, dichlorobenzene, toluene, and xylene as an organic solvent Device manufacturing method.
상기 폴리머는,
폴리플루오렌 유도체인 것을 특징으로 하는, 정렬된 탄소나노튜브를 포함하는 채널 소자 제조 방법.
The method of claim 5,
The polymer,
A method of manufacturing a channel device comprising aligned carbon nanotubes, characterized in that it is a polyfluorene derivative.
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