KR20210032890A - Multilayer capacitor - Google Patents

Abstract

The present invention relates to a multi-layered capacitor, which comprises: a capacitor body having first and second capacitor units disposed to face each other having a connection region of a predetermined thickness in which an internal electrode is not formed therebetween; and first and second external electrodes are respectively formed at both ends of the capacitor body in a longitudinal direction. The first capacitor unit includes first and second internal electrodes disposed to be alternately exposed through both surfaces of the first capacitor unit in a longitudinal direction with a plurality of dielectric layers interposed therebetween. The second capacitor unit includes third and fourth internal electrodes disposed to be alternately exposed through both surfaces of the second capacitor unit in a longitudinal direction with the dielectric layers interposed therebetween. Also, the first external electrode includes a first internal layer connected to the first and third internal electrodes and including copper (Cu), and a first external layer for covering the first internal layer. In addition, the second external electrode includes a second internal layer connected to the second and fourth internal electrodes and including copper, and a second external layer for covering the second internal layer. Accordingly, the multi-layered capacitor capable of enhancing high-temperature reliability can be provided.

Description

Multilayer Capacitor{MULTILAYER CAPACITOR}

The present invention relates to a multilayer capacitor.

As the trend of multifunctional, lightweight, and miniaturized electronic products progresses rapidly, the need for small and high-performance electronic components is increasing.

Accordingly, the adoption of electronic components that require high reliability corresponding to automobiles and networks and electronic components for industrial use is also increasing significantly.

In this way, competition for technology development of passive components to meet market demands is accelerating, and in particular, multilayer capacitors are a representative field in which the technology competition is fierce.

Such a multilayer capacitor is largely _{composed of a dielectric layer based on BaTiO 3} (BT), an internal electrode based on a metal, and an external electrode including metal and glass to realize capacity.

Recently, a lot of efforts have been made to improve the reliability of high temperature, high pressure, moisture resistance, etc. of a multilayer capacitor through the development of high-capacity products based on thinning of dielectric layers and internal electrodes and improvement of microstructures.

In addition, in a general multilayer capacitor, a plating layer of an external electrode is made of a nickel plating layer and a tin plating layer, and when mounted on a substrate, a solder containing tin (Sn-base solder) is used.

However, in the case of a solder containing tin, a problem such as crack may occur when the product requires high temperature reliability of 150°C or higher, and thus, a conductive adhesive mainly composed of epoxy and metallic filler is used as a bonding material. It is a trend.

However, when the above-described conductive adhesive is used as a bonding material, when the plating layer of the external electrode is made of tin, the bonding strength between the conductive adhesive and the plating layer decreases, and thus a problem of increasing the mounting failure of the multilayer capacitor may occur.

Korean Patent Publication 2014-0060392 Korean Patent Publication 10-1831322

An object of the present invention is to provide a multilayer capacitor capable of enhancing high temperature reliability when mounting a multilayer capacitor on a substrate using a conductive adhesive.

An aspect of the present invention is a capacitor body in which the first capacitor portion and the second capacitor portion are disposed to face each other with a connection region having a predetermined thickness in which no internal electrodes are formed; And first and second external electrodes respectively formed at both ends of the capacitor body in the length direction. Including, wherein the first capacitor portion includes first and second internal electrodes alternately exposed through both surfaces of the first capacitor portion in a length direction with a plurality of dielectric layers interposed therebetween, and the second capacitor portion And third and fourth internal electrodes disposed to be alternately exposed through both surfaces of the second capacitor portion in a length direction with a dielectric layer therebetween, and the first external electrode is connected to the first and third internal electrodes, And a first inner layer containing copper (Cu), and a first outer layer covering the first inner layer and containing silver (Ag) and palladium (Pd), and the second outer electrode includes the first inner layer. A multilayer capacitor is provided including a second inner layer connected to the second and fourth inner electrodes and containing copper, and a second outer layer covering the second inner layer and containing silver and palladium.

In an embodiment of the present invention, the number of stacks of the first and second internal electrodes may be greater than the number of stacks of the third and fourth internal electrodes.

In an embodiment of the present invention, a surface of the capacitor body adjacent to the second capacitor portion may be a mounting surface.

In an embodiment of the present invention, the capacitor body includes first and second surfaces facing each other, third and fourth surfaces connected to the first and second surfaces and facing each other, and first and second surfaces. And fifth and sixth surfaces connected to the third and fourth surfaces, and the first and second inner layers of the first and second external electrodes are on the third and fourth surfaces of the capacitor body. First and second connecting portions respectively formed and connected to the exposed portions of the internal electrodes, and first and second band portions extending from the first and second connecting portions to a portion of the first surface of the capacitor body, respectively. I can.

In an embodiment of the present invention, the first and second outer layers of the first and second external electrodes include third and fourth connection portions formed on the first and second connection portions, respectively, and the third and second outer layers. The fourth connecting portion may include third and fourth band portions respectively extending to cover the first and second band portions, respectively.

Another aspect of the present invention is a capacitor body in which the first capacitor portion and the second capacitor portion are disposed to face each other with a connection region having a predetermined thickness in which no internal electrodes are formed; And first and second external electrodes respectively formed at both ends of the capacitor body in the length direction. Including, the first capacitor portion includes first and second internal electrodes disposed to be alternately exposed through both surfaces of the first capacitor portion in a length direction with a plurality of dielectric layers interposed therebetween, and the second capacitor portion And third and fourth internal electrodes disposed to be alternately exposed through both surfaces of the second capacitor part in a length direction with a dielectric layer therebetween, and the first external electrode is connected to the first and third internal electrodes, A first inner layer containing copper, a first intermediate layer covering the first inner layer and containing nickel (Ni), and a first outer layer covering the first intermediate layer and containing palladium, the The second external electrode is connected to the second and fourth internal electrodes and covers a second inner layer containing copper, a second intermediate layer covering the second inner layer and containing nickel, and the second intermediate layer And a second outer layer containing palladium.

In an embodiment of the present invention, the first and second intermediate layers and the first and second outer layers may be plated layers.

In an embodiment of the present invention, the first and second intermediate layers of the first and second external electrodes include fifth and sixth connection portions respectively formed on the first and second connection portions, and the fifth and second connection portions. 6 It may include fifth and sixth band portions respectively extending from the connection portion to cover the first and second band portions, respectively.

In an embodiment of the present invention, the first and second outer layers of the first and second external electrodes include third and fourth connection portions formed on the fifth and sixth connection portions, respectively, and the third and second outer layers. The fourth connecting portion may include third and fourth band portions respectively extending to cover the fifth and sixth band portions, respectively.

According to an embodiment of the present invention, when a multilayer capacitor is mounted on a substrate using a conductive adhesive, there is an effect of enhancing high temperature reliability.

1 is a schematic perspective view of a multilayer capacitor according to an embodiment of the present invention.
2A and 2B are plan views illustrating structures of first and second internal electrodes in FIG. 1, respectively.
3A and 3B are plan views showing structures of third and fourth internal electrodes in FIG. 1, respectively.
4 is a cross-sectional view taken along line II′ of FIG. 1.
5 is a schematic perspective view of a multilayer capacitor according to another embodiment of the present invention.
6 is a cross-sectional view taken along line II-II' of FIG. 5.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

However, embodiments of the present invention may be modified in various forms, and the scope of the present invention is not limited to the embodiments described below.

In addition, embodiments of the present invention are provided to more completely describe the present invention to those with average knowledge in the art.

In the drawings, the shapes and sizes of elements may be exaggerated for clearer explanation.

In addition, components having the same function within the scope of the same idea shown in the drawings of each embodiment will be described with the same reference numerals.

Hereinafter, when a direction of the capacitor body 110 is defined to clearly describe an embodiment of the present invention, X, Y and Z indicated in the drawings represent the length direction, the width direction, and the thickness direction of the capacitor body 110, respectively. . In addition, in the present embodiment, the Z direction may be used in the same concept as the stacking direction in which the dielectric layers are stacked.

In addition, in this embodiment, for convenience of explanation, the lower and upper surfaces of the capacitor body in the Z direction are respectively first and second surfaces 1 and 2, and both surfaces in the X direction are the third and fourth surfaces 3 and 3, respectively. As 4), it will be described by setting both sides in the Y direction as the fifth and sixth sides (5, 6), respectively. Here, the first surface 1 will be described by setting it together as a mounting surface.

1 is a perspective view schematically illustrating a multilayer capacitor according to an exemplary embodiment of the present invention, and FIGS. 2A and 2B are plan views respectively illustrating structures of first and second internal electrodes in FIG. 1, and FIGS. 3A and 3A. 3B is a plan view showing the structures of the third and fourth internal electrodes in FIG. 1, respectively, and FIG. 4 is a cross-sectional view taken along line II′ of FIG. 1.

1 to 4, in a multilayer capacitor 100 according to an embodiment of the present invention, a first capacitor part and a second capacitor part are disposed to face each other with a connection area having a predetermined thickness in which no internal electrodes are formed. And first and second external electrodes 131 and 132 formed at both ends of the capacitor body 110 in the length direction of the capacitor body 110.

The capacitor body 110 is formed by stacking a plurality of dielectric layers 111 and then firing, and the shape and dimensions of the capacitor body 110 and the number of stacked dielectric layers are not limited to those shown in the present embodiment.

The dielectric layer 111 may include a ceramic powder having a high dielectric constant, for example, barium titanate (BaTiO ₃ )-based or strontium titanate (SrTiO ₃ )-based powder, but the present invention is not limited thereto.

In this case, in this embodiment, the dielectric layer may be stacked in the Z direction so as to be horizontal with respect to the first surface 1 which is the mounting surface.

In addition, the plurality of dielectric layers 111 forming the capacitor body 110 are in a sintered state, and the boundary between the adjacent dielectric layers 111 is integrated so that it is difficult to check without using a scanning electron microscope (SEM). Can be.

In this case, the capacitor body 110 may have a substantially hexahedral shape, but the present invention is not limited thereto. In addition, the shape and dimensions of the capacitor body 110 and the number of stacked dielectric layers 111 are not limited to those shown in the drawings of the present embodiment.

In this embodiment, for convenience of explanation, both surfaces of the capacitor body 110 facing each other in the Z direction are connected to the first and second surfaces 1 and 2, and the first and second surfaces 1 and 2 are connected to each other. And the two sides facing each other in the X direction are connected to the third and fourth sides (3, 4), the first and second sides (1, 2), and connected to the third and fourth sides (3, 4), Both surfaces facing each other in the Y direction are defined as fifth and sixth surfaces 5 and 6.

The dielectric layer 111 may include a high-k ceramic material, for example, barium titanate (BaTiO ₃ )-based or strontium titanate (SrTiO ₃ )-based ceramic powder, etc., but sufficient capacitance can be obtained. The present invention is not limited thereto.

In addition, a ceramic additive, an organic solvent, a plasticizer, a binder, a dispersant, and the like may be further added to the dielectric layer 111 in addition to the ceramic powder.

The ceramic additive may be, for example, a transition metal oxide or a transition metal carbide, a rare earth element, magnesium (Mg) or aluminum (Al).

In addition, the capacitor body 110 has different impedance characteristics including a first capacitor part as a high-capacity region and a second capacitor part as a low-capacity high ESR region, and an internal electrode between the first capacitor part and the second capacitor part A connection region having a predetermined thickness that is not formed may be disposed to realize low ESL characteristics.

In this case, the first surface 1 of the capacitor body 110, which is a surface adjacent to the second capacitor unit, may be a mounting surface.

In addition, an upper cover 112 is disposed above the first capacitor part, and a lower cover 113 is disposed below the second capacitor part.

The first capacitor part may be formed by repeatedly stacking a plurality of first and second internal electrodes 121 and 122 in the Z direction with a dielectric layer 111 interposed therebetween as a capacitance contributing part.

2A and 2B, the first and second internal electrodes 121 and 122 are electrodes having different polarities, and a conductive paste including a conductive metal is printed on the dielectric layer 111 to a predetermined thickness. It may be formed, and may be alternately disposed in a horizontal direction with respect to the first surface 1 along the stacking direction of the dielectric layers 111. The first and second internal electrodes 121 and 122 may be formed such that one end thereof is exposed through the third and fourth surfaces 3 and 4, respectively.

In this case, the first and second internal electrodes 121 and 122 may be electrically insulated from each other by the dielectric layer 111 disposed therebetween.

In addition, the first and second internal electrodes 121 and 122 may be formed to have a uniform width as a whole, so that the ESR may not be significantly increased.

In addition, the first and second internal electrodes 121 and 122 are exposed through the third and fourth surfaces 3 and 4 of the capacitor body 110, respectively. 132) and each may be electrically connected.

Therefore, when a voltage is applied to the first and second external electrodes 131 and 132, electric charges are accumulated between the first and second internal electrodes 121 and 122 that face each other, and at this time, the capacitance of the multilayer capacitor 100 Is proportional to the area of the overlapping regions of the first and second internal electrodes 121 and 122.

In addition, the material for forming the first and second internal electrodes 121 and 122 is not particularly limited, and, for example, a noble metal material such as platinum (Pt), palladium (Pd), and palladium-silver (Pd-Ag) alloy. And a conductive paste made of at least one of nickel (Ni) and copper (Cu).

In this case, the printing method of the conductive paste may use a screen printing method or a gravure printing method, and the present invention is not limited thereto.

The second capacitor portion is formed by repeatedly stacking a plurality of third and fourth internal electrodes 123 and 124 with a dielectric layer 111 interposed therebetween.

In this case, the second capacitor portion may have a thinner thickness than the first capacitor portion, and when the intervals between the internal electrodes are similar, the number of stacked first and second internal electrodes 121 and 122 is the third and fourth internal electrodes. It may be more than the number of stacks of (123, 124).

When the internal electrode is additionally disposed in the second capacitor, the length of the circuit is reduced when the multilayer capacitor is mounted on the substrate, and ESL of the multilayer capacitor at high frequencies can be reduced.

3A and 3B, the third and fourth internal electrodes 123 and 124 are electrodes having different polarities, and a conductive paste including a conductive metal is printed on the dielectric layer 111 to a predetermined thickness. It is formed, and may be alternately disposed in a horizontal direction with respect to the first surface 1 along the stacking direction of the dielectric layers 111. The third and fourth internal electrodes 123 and 124 may be formed such that one end thereof is exposed through the third and fourth surfaces 3 and 4, respectively.

In this case, the third and fourth internal electrodes 123 and 124 may be electrically insulated from each other by the dielectric layer 111 disposed therebetween.

Therefore, when a voltage is applied to the first and second external electrodes 131 and 132, charges are accumulated between the third and fourth internal electrodes 123 and 124 that face each other, and at this time, the capacitance of the multilayer capacitor 100 Is proportional to the area of the overlapping regions of the third and fourth internal electrodes 123 and 124.

In addition, the material for forming the first and second internal electrodes 121 and 122 is not particularly limited, and, for example, a noble metal material such as platinum (Pt), palladium (Pd), and palladium-silver (Pd-Ag) alloy. And a conductive paste made of at least one of nickel (Ni) and copper (Cu).

In this case, the printing method of the conductive paste may use a screen printing method or a gravure printing method, and the present invention is not limited thereto.

The upper cover 112, the lower cover 113, and the connection region may have the same material and configuration as the dielectric layer 111 of the first capacitor part, except that the internal electrode is not included.

The upper cover 112 may be formed by stacking a single dielectric layer or two or more dielectric layers on the upper surface of the first capacitor part, and basically, the first and second internal electrodes 121 and 122 of the first capacitor part by physical or chemical stress. ) Can play a role in preventing damage.

The lower cover 113 may be formed by stacking a single dielectric layer or two or more dielectric layers on the lower surface of the second capacitor part, and basically, the third and fourth internal electrodes 123 and 124 of the second capacitor part by physical or chemical stress. ) Can play a role in preventing damage.

The connection region includes a plurality of dielectric layers 111 and serves to form a predetermined gap between the first capacitor part and the second capacitor part.

The first external electrode 130 is connected to the first and third internal electrodes 121 and 123 and covers the first inner layer 131 and the first inner layer 131 including copper (Cu), and It includes a first outer layer 132 containing silver (Ag) and palladium (Pd).

The first inner layer 131 of the first external electrode 130 is formed on the third surface 3 of the capacitor body 110 and is connected to the exposed portions of the first and third internal electrodes 121 and 123 A first connection part 131a to be formed, and a first band part 131b extending from the first connection part 131a to a part of the first surface 1 of the capacitor body 110 may be included.

In this case, in order to increase the adhesion strength, the first band portion 131b may extend to a part of the second surface 2 and the fifth and sixth surfaces 5 and 6 of the capacitor body 110.

In addition, the first outer layer 132 of the first outer electrode 130 may be formed by applying a paste containing Ag and Pd to the surface of the first inner layer 131 and then sintering it. It may include a third connection portion 132a formed on the 131a, and a third band portion 132b extending from the third connection portion 132a to cover the first band portion 131b.

The first outer layer 132 may serve to enhance corrosion resistance of the first outer electrode 130 at a high temperature.

The second external electrode 140 is connected to the second and fourth internal electrodes 122 and 124 and covers the second inner layer 141 and the second inner layer 141 and includes silver and palladium. It includes a second outer layer 142 including.

The second inner layer 141 of the second external electrode 140 is formed on the fourth surface 4 of the capacitor body 110 and is connected to the exposed portions of the second and fourth internal electrodes 122 and 124 A second connection part 141a to be formed and a second band part 141b extending from the second connection part 141a to a part of the first surface 1 of the capacitor body 110 may be included.

In this case, in order to increase the adhesion strength, the second band portion 141b may extend to a part of the second surface 2 and the fifth and sixth surfaces 5 and 6 of the capacitor body 110.

In addition, the second outer layer 142 of the second outer electrode 140 may be formed by applying a paste containing Ag and Pd to the surface of the second inner layer 141 and then sintering the second outer layer 141. It may include a fourth connecting portion 142a formed on the 141a, and a fourth band portion 142b extending from the fourth connecting portion 142a to cover the second band portion 141b.

The second outer layer 142 may serve to enhance corrosion resistance of the second outer electrode 140 at a high temperature.

5 is a perspective view schematically illustrating a multilayer capacitor according to another embodiment of the present invention, and FIG. 6 is a cross-sectional view taken along line II-II' of FIG. 5.

Here, the structures of the capacitor body 110 and the first and second inner layers 131 and 141 of the first and second external electrodes 130 ′ and 140 ′ are similar to those of the above-described exemplary embodiment. A detailed description thereof is omitted, and the first and second outer layers 132 ′ and 142 ′ of the first and second external electrodes 130 ′ and 140 ′ having a structure different from the previously described embodiment and the first and The second intermediate layers 133 and 143 will be described in detail.

5 and 6, as another example of the present invention, in the multilayer capacitor 100' of this embodiment, the first external electrode 130' covers the first inner layer 131 and nickel (Ni) A first intermediate layer 133 including a may further be included.

The first intermediate layer 133 may be formed by plating the surface of the first inner layer 131, and a fifth connection portion 133a and a fifth connection portion 133a formed on the first connection portion 131a ) May include a fifth band portion 133b extending to cover the first band portion 131b.

In addition, the first outer layer 132 ′ of the first external electrode 130 ′ covers the first intermediate layer 133 and may include palladium.

The first outer layer 132' may be formed by plating the surface of the first intermediate layer 133, and a third connection portion 132a' formed on the fifth connection portion 133a, and a third connection portion A third band portion 132b' extending to cover the fifth band portion 133b at 132a' may be included.

In addition, the second external electrode 140 ′ may cover the second inner layer 141 and include a second intermediate layer 143 including nickel (Ni).

The second intermediate layer 143 may be formed by plating the surface of the second inner layer 141, and the sixth connection portion 143a and the sixth connection portion 143a formed on the second connection portion 141a ) May include a sixth band portion 143b extending to cover the second band portion 141b.

In addition, the second outer layer 142 ′ of the second external electrode 140 ′ covers the second intermediate layer 143 and may include palladium.

The second outer layer 142' may be formed by plating the surface of the second intermediate layer 143, and the fourth connection portion 142a' and the fourth connection portion formed on the sixth connection portion 143a A fourth band portion 142b' extending to cover the sixth band portion 143b at 142a' may be included.

In this way, the first and second intermediate layers 133 and 143 are formed by plating so that the first and second external electrodes 130 ′ and 140 ′ cover the first and second inner layers 131 and 141. When the first and second outer layers 132 ′ and 142 ′ are formed by plating to cover the first and second intermediate layers 133 and 143, corrosion resistance at high temperatures may be further improved.

The dielectric layer 111 of the capacitor body 110 of the present embodiment is preferably made of BaCaTiO ₃ (BCT) or BT+BCT so that the multilayer capacitor can be used in a high temperature environment of 150° C. I can.

In addition, in order to improve the deterioration of the bonding portion of the substrate due to the repetition of the high-temperature-low-temperature cycle, the first and second outer layers 132 are made of Ag + epoxy-based conductive adhesives rather than the conventional Sn solder and the substrate mounting method using epoxy. , 142) is mounted on an alumina substrate having electrode pads made of silver and palladium.

At this time, the reason for using a conductive adhesive containing an Ag filler is to improve corrosion resistance by removing a potential difference including Ag and the same metal contained in the electrode pad of the alumina substrate.

That is, the multilayer capacitor 100 of the present embodiment is mounted on a substrate using a conductive adhesive, and can be utilized as a product requiring high temperature reliability of 150°C or higher.

Further, in the present embodiment, when the outer layer of the external electrode is mounted on the substrate, the bonding strength with the substrate does not deteriorate at a portion in contact with the conductive adhesive.

In addition, since the outer layer does not contain tin and the palladium contained in the outer layer inhibits oxidation of the conductive adhesive and silver (Ag) contained in the electrode pad, it is possible to prevent the occurrence of reliability problems at high temperatures.

In addition, it is possible to reduce the equivalent series inductance (ESL) of the multilayer capacitor even in a high temperature environment.

Although the embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and variations are possible without departing from the technical matters of the present invention described in the claims. It will be obvious to those of ordinary skill in the field.

100, 100': stacked capacitor
110: capacitor body
111: dielectric layer
112: top cover
113: lower cover
121, 122, 123, 124: first to fourth internal electrodes
130, 130': first external electrode
131, 141: first and second inner layers
132, 132': first outer layer
133: first intermediate layer
140, 140': second external electrode
142, 142': second outer layer
143: second intermediate layer

Claims (12)

A capacitor body having a first capacitor part and a second capacitor part facing each other with a connection region having a predetermined thickness in which no internal electrodes are formed; And
First and second external electrodes respectively formed at both ends of the capacitor body in the length direction; Including,
The first capacitor portion includes first and second internal electrodes disposed to be alternately exposed through both surfaces of the first capacitor portion in a length direction with a plurality of dielectric layers interposed therebetween,
The second capacitor portion includes third and fourth internal electrodes disposed to be alternately exposed through both surfaces of the second capacitor portion in a length direction with a plurality of dielectric layers therebetween,
The first external electrode is connected to the first and third internal electrodes and covers the first inner layer containing copper (Cu), and the first inner layer and contains silver (Ag) and palladium (Pd). It includes a first outer layer that,
The second external electrode is a stacked type including a second inner layer connected to the second and fourth inner electrodes and containing copper, and a second outer layer covering the second inner layer and containing silver and palladium. Capacitor.
The method of claim 1,
A multilayer capacitor in which the number of stacks of the first and second internal electrodes is greater than the number of stacks of the third and fourth internal electrodes.
The method of claim 2,
In the capacitor body, a surface adjacent to the second capacitor portion is a mounting surface.
The method of claim 1,
The capacitor body includes first and second surfaces facing each other, third and fourth surfaces connected to the first and second surfaces and facing each other, and third and fourth surfaces connected to the first and second surfaces. Including fifth and sixth sides connected to the side,
The first and second inner layers of the first and second external electrodes are formed on the third and fourth surfaces of the capacitor body, respectively, and first and second connecting portions connected to the exposed portions of the internal electrodes, and the second A multilayer capacitor including first and second band portions respectively extending from the first and second connection portions to a portion of the first surface of the capacitor body.
The method of claim 4,
The first and second outer layers of the first and second external electrodes include third and fourth connecting portions respectively formed on the first and second connecting portions, and the first and second connecting portions at the third and fourth connecting portions. A multilayer capacitor including third and fourth band portions respectively extending to cover the second band portions, respectively.
A capacitor body having a first capacitor part and a second capacitor part facing each other with a connection region having a predetermined thickness in which no internal electrodes are formed; And
First and second external electrodes respectively formed at both ends of the capacitor body in the length direction; Including,
The first capacitor portion includes first and second internal electrodes disposed to be alternately exposed through both surfaces of the first capacitor portion in a length direction with a plurality of dielectric layers interposed therebetween,
The second capacitor portion includes third and fourth internal electrodes disposed to be alternately exposed through both surfaces of the second capacitor portion in a length direction with a plurality of dielectric layers therebetween,
The first external electrode includes a first internal layer connected to the first and third internal electrodes and including copper, a first intermediate layer covering the first internal layer and including nickel (Ni), and the first 1 covering the intermediate layer and comprising a first outer layer comprising palladium,
The second external electrode includes a second internal layer connected to the second and fourth internal electrodes and including copper, a second intermediate layer covering the second internal layer and including nickel, and the second intermediate layer. A stacked capacitor covering and comprising a second outer layer comprising palladium.
The method of claim 6,
A multilayer capacitor in which the number of stacks of the first and second internal electrodes is greater than the number of stacks of the third and fourth internal electrodes.
The method of claim 7,
In the capacitor body, a surface adjacent to the second capacitor portion is a mounting surface.
The method of claim 6,
A multilayer capacitor in which the first and second intermediate layers and the first and second outer layers are plated layers.
The method of claim 6,
The capacitor body includes first and second surfaces facing each other, third and fourth surfaces connected to the first and second surfaces and facing each other, and third and fourth surfaces connected to the first and second surfaces. Including fifth and sixth sides connected to the side,
The first and second inner layers of the first and second external electrodes are formed on the third and fourth surfaces of the capacitor body, respectively, and first and second connecting portions connected to the exposed portions of the internal electrodes, and the second A multilayer capacitor including first and second band portions respectively extending from the first and second connection portions to a portion of the first surface of the capacitor body.
The method of claim 10,
The first and second intermediate layers of the first and second external electrodes include fifth and sixth connecting portions respectively formed on the first and second connecting portions, and the first and second connecting portions in the fifth and sixth connecting portions. A multilayer capacitor including fifth and sixth band portions respectively extending to cover the two band portions, respectively.
The method of claim 11,
The first and second outer layers of the first and second external electrodes include third and fourth connecting portions respectively formed on the fifth and sixth connecting portions, and the fifth and second outer layers of the third and fourth connecting portions. A multilayer capacitor including third and fourth band portions respectively extending to cover the sixth band portions, respectively.

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