KR20210009821A - High voltage ingnition circuit for dc plasma power supllying apparatus - Google Patents

Abstract

According to an embodiment of the present invention, provided is a high voltage generation circuit for a direct current (DC) plasma power supply which supplies high voltage to a plasma torch to generate an initial plasma arc. The high voltage generation circuit for a DC plasma power supply comprises: an inverter including an upper transistor and a lower transistor connected in series between a DC voltage and a ground voltage; a transformation unit including a primary-side inductor connected to an output node of the inverter and a secondary-side inductor inductively coupled to the primary-side inductor; and a feedback unit preventing the upper transistor and the lower transistor from being turned on at the same time by controlling a gate voltage of the upper transistor or a gate voltage of the lower transistor based on a voltage of the output node of the inverter.

Description

High voltage generator circuit for DC plasma power supply {HIGH VOLTAGE INGNITION CIRCUIT FOR DC PLASMA POWER SUPLLYING APPARATUS}

The present invention relates to a high voltage generation circuit for a DC plasma power supply for generating a high voltage for generating an initial plasma arc in a DC plasma power supply.

When manufacturing semiconductor devices or OLED devices, various gases such as PFCs (Per Fluoro Compounds) gas (CF ₄ , NF ₃ , SF _6, etc.) are used for semiconductor film formation such as CVD (Chemical Vapor Deposition) or etching or cleaning of the film formation chamber. Is used. Most of these gases are non-decomposable and require thousands of degrees or more to decompose, so they are decomposed using a thermal arc plasma.

In order to generate such a plasma arc, a DC plasma power supply is connected so that a plasma arc is generated and maintained after initial ignition while flowing a discharge gas such as N ₂ gas through the plasma torch.

In this regard, Korean Patent No. 10-1879244 discloses a plasma system for processing CF ₄ generated in a semiconductor manufacturing process, the plasma system comprising: a plasma torch; A reaction furnace formed in the plasma torch to cause a chemical reaction for treating waste gas; A waste gas supply device formed to be connected to the reactor to supply waste gas from the outside to the inside of the reactor; An injection tank formed to be connected to the inside of the reaction furnace to inject a neutralizing liquid for removing harmful components contained in exhaust gas generated after waste gas treatment; An exhaust gas duct configured to be connected to the injection tank to discharge exhaust gas from which harmful components are removed to the outside; And an ID fan, wherein a reaction zone in which a detoxification reaction occurs is formed in the reaction furnace by the high-temperature thermal energy generated from the plasma torch installed in the reaction furnace and the waste gas supplied to the reaction furnace. A torch is formed in the upper part of the reactor, and a plate for receiving water into the reactor is formed on the upper part of the reactor, while the plate is formed close to the plasma torch, and the plate is treated with waste gas through the received water. In order to produce steam participating in the reaction for, the plate discloses a plasma system for treating CF ₄ of a semiconductor waste gas, characterized in that a spiral water flow groove is formed therein.

However, the registered patent only discloses the structure of the entire plasma system, and does not disclose a specific circuit for supplying DC power to the plasma torch.

Korean Patent Registration No. 10-1879244

An embodiment of the present invention is to provide a high voltage generator circuit for a DC plasma power supply supplying a high voltage for generating an initial plasma arc to a plasma torch.

A high voltage generation circuit for a DC plasma power supply according to an embodiment of the present invention includes an inverter including an upper transistor and a lower transistor connected in series between a DC voltage and a ground voltage; A transformer comprising a primary-side inductor connected to the output node of the inverter and a secondary-side inductor inductively coupled to the primary-side inductor; And a feedback unit for preventing the upper transistor and the lower transistor from being turned on at the same time by controlling the gate voltage of the upper transistor or the gate voltage of the lower transistor based on the voltage of the output node of the inverter.

The feedback unit may control a gate voltage of the upper transistor or a gate voltage of the lower transistor to prevent the upper transistor and the lower transistor from being turned on at the same time.

The upper transistor is a pull-up transistor, the lower transistor is a pull-down transistor, and the feedback unit may change the gate voltage of the upper transistor so that the upper transistor is turned off when the output voltage of the inverter is at a low level.

The feedback unit may include a feedback diode connected between the DC voltage and the output node of the inverter, and through which a current flows when the voltage of the output node of the inverter is a low level; A photo coupler through which current flows when current flows through the diode; And a gate voltage controller configured to change a gate voltage of the upper transistor so that the upper transistor is turned off when a current flows through the photo coupler.

The upper transistor is a pull-up transistor, the lower transistor is a pull-down transistor, and the feedback unit may change the gate voltage of the lower transistor so that the lower transistor is turned off when the output voltage of the inverter is a high level.

The feedback unit may include a feedback diode connected between the DC voltage and the output node of the inverter, and through which current flows when the voltage of the output node of the inverter is a high level; A photo coupler through which current flows when current flows through the feedback diode; And a gate voltage controller configured to change a gate voltage of the lower transistor so that the lower transistor is turned off when a current flows through the photo coupler.

It may further include a resonator for transmitting the voltage of the output node of the inverter to the primary side inductor to have a maximum value at the resonance frequency.

The resonator may include an inductor and a capacitor connected in series between the output terminal of the inverter and the primary side inductor, and a capacitor connected in parallel with the primary side inductor.

According to an embodiment of the present invention, a high voltage for generating an initial plasma arc can be supplied to the plasma torch.

According to the embodiment of the present invention, since the inverter of the half-bridge structure is included, it is possible to prevent the sudden voltage change generated in the plasma torch from affecting the input side.

According to an embodiment of the present invention, since the resonator is included, it is possible to improve power transmission efficiency and implement ZVS (Zero Voltage Switching).

1 is a diagram showing the configuration of a DC plasma power supply according to an embodiment of the present invention.
2 is a diagram showing the configuration of a high voltage generation circuit for a DC plasma power device according to an embodiment of the present invention.
3 and 4 are views for explaining the operation of the feedback unit of FIG. 2.
5 is an example of a circuit diagram of a feedback unit of FIG. 2.
6 is an example of a circuit diagram of a feedback unit of FIG. 2.
7 is a diagram showing a configuration diagram of a high voltage generation circuit for a DC plasma power device according to an embodiment of the present invention.

It is contemplated that the method or configuration of any embodiment described in this application may be implemented for any other method or configuration described in this application.

Terms or words used in this specification and claims are limited to their usual or dictionary meanings and should not be interpreted, and that the inventor can appropriately define the concept of terms in order to describe his own invention in the best way. Based on the principle, it should be interpreted as a meaning and concept consistent with the technical idea of the present invention.

In the specification and claims, when a certain part "includes" a certain component, it means that other components may be further included, not excluding other components unless otherwise stated.

The use of a singular word used in conjunction with the term “comprising” in the specification and claims may mean “one”, or “one or more”, “at least one”, and “one or more than one”. May be.

Terms such as "... unit", "... group", "module", and "device" described in the specification and claims mean a unit that processes at least one function or operation, which is a unit of hardware or software or hardware and software. It can be implemented in combination.

The use of the term “or” in the specification and claims is used to mean “and/or” unless expressly indicated as being mutually exclusive or merely representing selectables.

The expression "connected" in the specification and claims includes not only the case where the two elements are directly connected, but also the case that the two elements are connected indirectly through another element in the middle, and includes both wired or wireless cases. I can.

Features and advantages of the present invention will become apparent from the following detailed description. However, since various changes and modifications within the spirit and scope of the present invention will become apparent to those skilled in the art from this detailed description, the detailed description and specific examples represent specific embodiments of the present invention, but only examples. It should be understood that it is given as Various exemplary embodiments of the invention are discussed in detail below with respect to the accompanying drawings, in which exemplary embodiments of the invention are shown. While specific implementations are discussed, this is done for illustrative purposes only. Those skilled in the art will recognize that other components and configurations may be used without departing from the spirit and scope of the present invention. The same numbers represent the same elements throughout.

1 is a diagram showing the configuration of a DC plasma power supply according to an embodiment of the present invention.

Referring to FIG. 1, the DC plasma power supply device includes an ADC converter 10, a filter 20, a switching unit 30, a power transmission unit 40, an ADC converter 50, a high voltage generation circuit 60, and It may include a primary inductor L1 connected to the high voltage generation circuit 60, a secondary inductor L2 inductively coupled to the primary inductor L1, a plasma torch 70, and a main control unit 80. .

The ADC converter 10 converts three-phase AC power to DC power. The filter 20 removes the ripple of the DC power output from the ADC converter 10. The switching unit 30 converts DC power from which ripple has been removed into AC power. The power transmission unit 40 converts the AC power converted by the switching unit 30 to a low voltage high current and transmits it, and the ADC converter 50 converts the power transmitted by the power transmission unit 40 back to DC. The high voltage generation circuit 60 instantaneously generates a high voltage. Accordingly, a high voltage is applied to both ends of the plasma torch 70 through the primary inductor L1 and the secondary inductor L2. When a high voltage is instantaneously generated in the high voltage generator circuit 60 while flowing a discharge gas such as N ₂ through the plasma torch 70, the discharge gas is insulated and destroyed, thereby igniting the plasma torch 70. At this time, the generated plasma arc is maintained by the low voltage high current output from the ADC converter 50.

The main control unit 80 controls the entire DC plasma power supply and may include a PWM driver in particular. Accordingly, the switching unit 30 may convert DC power into AC power according to the output signal of the PWM driver.

2 is a diagram showing the configuration of a high voltage generator circuit 1 for a DC plasma power supply device according to an embodiment of the present invention. The high voltage generation circuit 1 for a DC plasma power supply device of FIG. 2 may correspond to the primary side inductor L1, the secondary side inductor L2, and the high voltage generation circuit 60 of FIG. 1.

Referring to FIG. 2, the high voltage generator circuit 1 for a DC plasma power supply device includes an inverter 100 including an upper transistor M1 and a lower transistor M2 connected in series between a DC voltage DC_High and a ground voltage. ); A transformer 200 including a primary-side inductor (L1) connected to the output node (A) of the inverter 100 and a secondary-side inductor (L2) inductively coupled to the primary-side inductor (L1); And the upper transistor M1 by controlling the gate voltage VG1 of the upper transistor M1 or the gate voltage VG2 of the lower transistor M2 based on the voltage of the output node A of the inverter 100. ) And a feedback unit 300 that prevents the lower transistor M2 from being turned on at the same time. The inverter 100 includes an upper transistor M1 and a lower transistor M2 connected in series between the DC voltage DC_High and the ground voltage. That is, the inverter 100 includes two transistors M1 and M2 having a half bridge structure. The upper transistor M1 and the lower transistor M2 may be an N-type field effect transistor (FET). The drain terminal of the upper transistor M1 may be connected to the DC voltage DC_High, and the source terminal of the upper transistor M1 may be connected to the output node A. The drain terminal of the lower transistor M2 may be connected to the output node A, and the source terminal of the lower transistor M2 may be connected to the ground voltage.

The upper input signal High_Side_In applied to the gate of the upper transistor M1 and the lower input signal Low_Side_In applied to the gate of the lower transistor M2 have a predetermined operating frequency (ω _op ) and have approximately opposite levels. Can have. The upper input signal High_Side_In and the lower input signal Low_Side_In may be output from the PWM driver of the main control unit 60 of FIG. 1. When the upper input signal High_Side_In is at a high level and the lower input signal Low_Side_In is at a low level, the upper transistor M1 is turned on and the lower transistor M2 is turned off, so that a voltage close to the DC voltage DC_High is output. . When the upper input signal High_Side_In is at a low level and the lower input signal Low_Side_In is at a high level, the upper transistor M1 is turned off and the lower transistor M2 is turned on, so that a voltage close to the ground voltage is output. That is, the inverter 100 converts the DC voltage DC_High into an AC voltage oscillating at the operating frequency ω _op .

The transformer 200 includes a primary-side inductor L1 connected to the output node A of the inverter 100 and a secondary-side inductor L2 inductively coupled to the primary-side inductor L1. As an AC voltage is generated at the output node A by the inverter 100, an AC current flows through the primary inductor L1. Since the secondary-side inductor L2 is inductively coupled with the primary-side inductor L1, the induced current is applied to the secondary-side inductor L2 according to the ratio of the number of turns of the primary-side inductor L1 and the secondary-side inductor L2. Flow. Typically, the number of turns of the secondary-side inductor L2 is larger than the number of turns of the primary-side inductor L1, and accordingly, a high voltage is generated in the secondary-side inductor L2. A plasma torch (refer to 70 in FIG. 1) is connected to the secondary inductor L2, and the plasma torch is initially ignited by the high voltage generated in the secondary inductor L2.

The feedback unit 300 controls the gate voltage of the upper transistor M1 or the gate voltage of the lower transistor M2 based on the voltage of the output node A of the inverter 100 to control the upper transistor M1 and the lower transistor. Prevents (M2) from turning on at the same time.

3 and 4 are diagrams for explaining the operation of the feedback unit 300 of FIG. 2.

The upper input signal High_Side_In and the lower input signal Low_Side_In should ideally be square wave signals having opposite levels, but may actually have the same level for reasons such as different delays. Accordingly, when the upper input signal High_Side_In and the lower input signal Low_Side_In are directly input to the upper transistor M1 and the lower transistor M2 without the feedback unit 300, the two transistors M1 and M2 are There may be a situation where both are turned on.

For example, in the period t1 of FIG. 3A, since the lower input signal Low_Side_In is at a high level, the lower transistor M2 is turned on and the voltage of the output node A may be at a low level. However, at this time, a high-level upper input signal (High_Side_In) is input and the upper transistor M1 is also turned on, so that a DC voltage (DC_High) is applied to the drain of the upper transistor M1, and the ground voltage is applied to the source of the upper transistor M1. By being connected, a current may flow through the upper transistor M1. In general, since the DC voltage DC_High supplied to the drain of the upper transistor M1 is a large voltage ranging from several tens to several hundred V, a very large current flows through the upper transistor M1, and the upper transistor M1 may be damaged.

In this embodiment, the feedback unit 300 is provided, and when the voltage of the output node A is at a low level, the gate voltage VG1 of the upper transistor M1 is changed so that the upper transistor M1 is turned off. In this embodiment, since the upper transistor M1 is an N-type transistor, the gate voltage VG1 of the upper transistor M1 may be changed to a low level as shown in FIG. 3B. Accordingly, since the upper transistor M1 is turned off, it is possible to prevent an overcurrent from flowing through the upper transistor M1.

As another example, since the upper input signal High_Side_In is at a high level in the period t2 of FIG. 4A, the upper transistor M1 is turned on and the voltage of the output node A may be at a high level. However, at this time, a high-level lower input signal Low_Side_In is input and the lower transistor M2 is also turned on. Accordingly, the DC voltage DC_High is applied to the drain of the lower transistor M2 and the ground voltage is connected to the source of the lower transistor M2, so that current may flow through the lower transistor M2. Accordingly, a very large current flows through the lower transistor M2, and the lower transistor M2 may be damaged.

When the voltage of the output node A is at a high level, the feedback unit 300 changes the gate voltage VG2 of the lower transistor M so that the lower transistor M2 is turned off. In this embodiment, since the lower transistor M2 is an N-type transistor, the gate voltage VG2 of the lower transistor M1 can be changed to a low level as shown in FIG. 4B. Accordingly, since the lower transistor M2 is turned off, it is possible to prevent an overcurrent from flowing through the lower transistor M2.

5 is an example 3100 of a circuit diagram of a feedback unit according to an embodiment of the present invention.

Referring to FIG. 5, the feedback unit 3100 includes: a feedback diode 3110 connected between a DC voltage and an output node A and through which current flows when the voltage of the output node A is at a low level; A photo coupler 3120 through which current flows when a current flows through the feedback diode 3110; And a gate voltage controller 3130 for changing a gate voltage of the upper transistor M1 to a low level when current flows through the photo coupler 3120. As shown in FIG. 5, the gate voltage controller 330 uses an upper input signal High_Side_In and an output voltage of the photocoupler as an input terminal, and an end connected to the gate VG1 of the upper transistor M1. It may be implemented as an operator 3130.

6 is an example 3200 of a circuit diagram of a feedback unit according to an embodiment of the present invention.

Referring to FIG. 6, the feedback unit 3200 includes a feedback diode 3210 connected between the ground voltage and the output node A, and through which current flows when the voltage of the output node A is at a high level; A photo coupler 3220 through which current flows when current flows through the feedback diode 3210; And a gate voltage controller 3230 that changes the gate voltage of the lower transistor M2 to a low level when a current flows through the photo coupler 3220. As shown in FIG. 6, the gate voltage controller 3230 uses the lower input signal Low_Side_In and the output voltage of the photocoupler 3220 as an input terminal, and the output terminal is connected to the gate VG2 of the lower transistor M2. It may be implemented as a connected AND operator 3230.

7 is a diagram showing a configuration diagram of a high voltage generator circuit 2 for a DC plasma power supply device according to an embodiment of the present invention. The high voltage generator circuit 2 for a DC plasma power supply device of FIG. 7 may correspond to the primary inductor L1, the secondary inductor L2, and the high voltage generator circuit 60 of FIG. 1.

The high voltage generation circuit 2 for a DC plasma power supply device of FIG. 7 is a resonator 400 connected between the inverter 100 and the transformer 200 compared to the high voltage generation circuit 1 for a DC plasma power supply device of FIG. 2. ).

The resonator 400 transmits the voltage of the output node A of the inverter 100 to the primary-side inductor L1 to have a maximum value at the resonant frequency. In addition, the resonator 400 enables ZVS (Zero Voltage Switching) to stably switch the upper and lower transistors M1 and M2 to obtain an output without malfunction.

As shown in FIG. 7, the resonator 400 includes an inductor L _R and a capacitor C _R1 connected in series between the output node A of the inverter and the primary inductor L1, and the primary side A capacitor C _R2 connected in parallel with the inductor L1 may be included.

The high voltage generator circuit 2 for a DC plasma power supply device according to an exemplary embodiment of the present invention may further include a resonator 400 to improve power transmission efficiency of the transformer 200. For example, power transmission efficiency may be increased by setting the resonance frequency of the resonator 400 based on the frequency according to the input period of the upper input signal High_Side_In and the lower input signal Low_Side_In.

The embodiments of the present invention have been described above with reference to the drawings. However, the scope of the present invention is not limited thereto, and various changes and modifications are possible.

For example, although it has been described that both the upper transistor M1 and the lower transistor M2 are N-type transistors, it can be replaced with a P-type transistor by appropriately adding an inverter to the gate.

In addition, although it has been described that the gate voltage controllers 3130 and 3230 are AND operators, they may be implemented with other logically identical operators, such as combining a NAND operator and an inverter.

In addition, the resonator 400 is not limited to the above structure, for example, an inductor and a capacitor are connected in series between the output node A and the ground voltage, and the output node A and the primary inductor L1 A variety of structures may be employed according to resonance characteristics, such as connecting other capacitors between ).

Claims (8)

An inverter including an upper transistor and a lower transistor connected in series between the DC voltage and the ground voltage;
A transformer comprising a primary-side inductor connected to the output node of the inverter and a secondary-side inductor inductively coupled to the primary-side inductor; And
A feedback unit that prevents the upper transistor and the lower transistor from being turned on at the same time by controlling the gate voltage of the upper transistor or the gate voltage of the lower transistor based on the voltage of the output node of the inverter
High voltage generation circuit for a DC plasma power device comprising a.
The method of claim 1,
And the feedback unit controls a gate voltage of the upper transistor or a gate voltage of the lower transistor to prevent the upper transistor and the lower transistor from being turned on at the same time.
The method of claim 1,
The upper transistor is a pull-up transistor and the lower transistor is a pull-down transistor,
And the feedback unit changes a gate voltage of the upper transistor so that the upper transistor is turned off when the output voltage of the inverter is at a low level.
The method of claim 3,
The feedback unit,
A feedback diode connected between the DC voltage and the output node of the inverter, and through which a current flows when the voltage of the output node of the inverter is at a low level;
A photo coupler through which current flows when current flows through the diode; And
A gate voltage controller that changes a gate voltage of the upper transistor so that the upper transistor is turned off when a current flows through the photo coupler
A high voltage generation circuit for a DC plasma power supply, comprising: a.
The method of claim 1,
The upper transistor is a pull-up transistor and the lower transistor is a pull-down transistor,
The feedback unit, when the output voltage of the inverter is at a high level, changes the gate voltage of the lower transistor so that the lower transistor is turned off.
The method of claim 5,
The feedback unit,
A feedback diode connected between the DC voltage and the output node of the inverter, and through which a current flows when the voltage of the output node of the inverter is a high level;
A photo coupler through which current flows when current flows through the feedback diode; And
And a gate voltage controller for changing a gate voltage of the lower transistor to turn off the lower transistor when a current flows through the photo coupler.
The method of claim 1,
A high voltage generation circuit for a DC plasma power supply device, further comprising: a resonator for transmitting the voltage of the output node of the inverter to the primary inductor to have a maximum value at a resonant frequency.
The method of claim 7,
The resonator may include an inductor and a capacitor connected in series between the output terminal of the inverter and the primary inductor, and a capacitor connected in parallel with the primary inductor.
A high voltage generation circuit for a DC plasma power supply, comprising: a.

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