KR20200092585A - Mobile terminal device - Google Patents

Abstract

Provided is a multi-channel mobile terminal capable of preventing a process required to be processed in real time from being disturbed by a process having a high bus occupancy rate, and dividing and processing data according to a data type by using an independent bus which is excellent in interoperability between devices because of a small bus load of a vehicle terminal that processes data by using the independent bus, when interlocking with other terminal devices to exchange data. To this end, the multi-channel mobile terminal comprises: a first CPU connected to a first bus used for image data processing and storing image data in a storage medium through the first bus; and a second CPU connected to a second bus provided for processing data excluding image data, and acquiring the image data through the first CPU when an event occurs, wherein the second bus is separated from the first bus.

Description

Multi-channel type mobile terminal that divides data according to data type{Mobile terminal device}

The present invention relates to a multi-channel mobile terminal that divides and processes data according to a data type, and more specifically, separates data processing requiring real-time data processing even if the bus occupancy is low and processing of data having a high bus occupancy is low. The present invention relates to a multi-channel mobile terminal that divides and processes data according to a type of data so that real-time data processing is not restricted by a process having a high bus share such as video data.

As the amount of data to be processed by a processor increases, a multi-processor is widely used instead of a single processor. Multi-processors have a number of core processors embedded in a single chip, and the multiple embedded core processors share workloads, thereby lowering the CPU share compared to single processors and having advantages in multi-tasking.

However, in a multi-processor incorporating multiple cores, a plurality of cores share a single cache and a single bus, but one of the multiple cores is a core in which the computational power is separated. When the bus is excessively occupied, other cores have a disadvantage in that it is difficult to use the bus, which is a channel of data.

For example, when a core 1 encodes an image in a quad core processor, Core 2, Core 3, and Core 4 must wait for bus occupancy to process other processes. Since the bus is shared by core 1 to core 4, when core 1 processes a process of encoding a large amount of video data, core 2 to core 4 must request and wait for the permission to use the bus, and core 2 to core 4, the process processing is delayed until the use authority of the bus is acquired. If Core 2 is processing a process that requires real-time processing, it is a very difficult situation for Core 2.

In addition, since cores 1 to 4 share the same cache, when core 1 occupies the cache, use of the caches of other cores (cores 2 to 4) may be limited. On the other hand, the Republic of Korea Patent No. 10-1356541 is shared by a plurality of cores, the instruction cache, by distributing the instruction set to each core in the instruction cache, each of the plurality of cores to consider the collision to occupy the cache "multi-core processor, A method for sharing a cache of a multi-core system, an electronic device, and a multi-core processor including the same has been proposed. Patent registration No. 10-1356541 minimizes each core competing or colliding with each other for cache use by directly providing an instruction set stored in the instruction cache to each core in the instruction cache stage.

However, 10-1356541 is difficult to solve when the bus shared by each core is excessively occupied by a specific core, and the process processing of other cores is limited due to the occupancy of the bus, which is a channel of data, and has a large capacity. No suitable solution has been proposed for devices that require image processing and real-time transmission and processing.

The object of the present invention is to physically separate the bus of the core that processes the process that requires real-time data processing and reporting, and the area that processes the video encoding, decoding, and other bus-intensive processes, and each core is separated from the event. The present invention is to provide a multi-channel mobile terminal that divides data according to a data type so that real-time process processing is not restricted by process processing with a high bus occupancy by allowing data to be shared only.

The above object is connected to a first bus (Bus) used for processing image data according to the present invention, the first core for storing the image data on a storage medium through the first bus and data excluding the image data It is connected to a second bus provided for processing, the second bus is separated from the first bus, and when an event occurs, it is achieved by a second core that acquires the image data through the first core .

According to the present invention, a process requiring real-time processing can be prevented from being interrupted by a process having a high bus share, and a vehicle terminal that processes data by using an independent bus when interworking with other terminal devices to exchange data with each other. The bus load of is small and the interoperability between other devices is excellent.

1 is a conceptual diagram illustrating an example in which a multi-channel mobile terminal, which is divided and processed according to a data type, according to an embodiment of the present invention is applied to a vehicle.
FIG. 2 shows a conceptual diagram when a multi-channel mobile terminal processing division according to the data type shown in FIG. 1 is implemented on a PCB.
FIG. 3 is a conceptual diagram illustrating a conventional multi-core device for comparison with the conceptual diagram illustrated in FIG. 1.
4 is a conceptual diagram illustrating a method in which a multi-channel mobile terminal, which is divided and processed according to a data type according to an embodiment, works with another device.

The processor described in this specification refers to an arithmetic processing device having one or more cores.

The process described in this specification may refer to a program running in each core and data to be processed.

The event described in this specification occurs when an external impact is applied to a vehicle terminal that processes data using an independent bus according to an embodiment. The occurrence of an event may refer to a case in which an accident occurs in a vehicle or a vehicle is likely to have an accident.

Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a conceptual diagram of an example in which a “multi-channel mobile terminal that divides and processes according to a data type” according to an embodiment of the present invention is applied to a vehicle, and FIG. 2 is according to a data type illustrated in FIG. 1. Fig. 3 shows a conceptual diagram when a multi-channel mobile terminal for processing a split is implemented on a PCB, and Fig. 3 is a conventional vehicle terminal (for example, a wireless communication type black box) for comparison with the conceptual diagram shown in Fig. 1. Shows a conceptual diagram.

Referring to FIGS. 1 to 3 together, a multi-channel mobile terminal (hereinafter referred to as a vehicle terminal) that divides and processes according to data types according to an embodiment includes a plurality of CPUs 101 and 111 (CPU1 and CPU2) ) To configure one vehicle terminal 100, and each of the CPUs 101 and 111 has independent buses BUS1 and BUS2. In the drawing, for convenience of explanation and understanding, the CPU exemplifies CPU1 101 and CPU2 111, that is, dual cores, but this is only an example, and a vehicle processing data using an independent bus according to an embodiment It is noted in advance that the terminal may be configured to include three, four, or more CPUs.

When each of the CPUs 101 and 111 has independent buses BUS1 and BUS2 and is driven using the respective buses BUS1 and BUS2, each of the CPUs 101 and 111 and each of the CPUs 101 and 111 The hardware connected to is independent. Accordingly, the applicant will describe the hardware regions connected to the CPUs 101 and 111 in FIGS. 1 and 2 as S1 and S2 regions.

In the S1 area, a CPU1 101, an image sensor (CCD) 102, a RAM (103), and a flash ROM (FLASH) 104 are provided, and the image data captured by the image sensor 102 is CPU1 ( 101) encodes to generate encoded data, and stores the encoded data in the flash ROM 104. The CPU1 101 needs RAM 103, which is a temporary storage space, to encode the image data captured by the image sensor 102, and drives the encoding program to reside the encoding process in the RAM 103 and upload the uploaded image. Data can be encoded in a specific format (formats such as AVI, MP4) to generate encoded data and then stored in the flash memory 104.

At this time, the bus (BUS1) of the CPU1 (101),

1) occupied by data going back and forth for encoding between CPU1 101 and RAM 103,

2) A large amount of bus BUS1 is occupied according to data storage between CPU1 101 and flash ROM 104 (hereinafter referred to as over occupancy).

Regardless of the load (LOAD) of CPU1 (101) by items 1) and 2), CPU1 (101) handles other processes except for the encoding process, and other processes must wait (WAIT) to receive the bus allocation. DELAY and mutual competition are caused in the processing of the process.

If, the vehicle terminal shown in Figure 1 is a wireless communication type black box, mounted on the vehicle, when an external shock occurs in the vehicle, the video file stored in the flash ROM 104 is transmitted to the control server through the modem 112 In the case of a vehicle terminal that needs to be performed, an event determination algorithm that detects an event in real time and determines the validity of the event may occur in real time.

When the bus 101 is mostly occupied by data exchanged between the CPU 1 101, the RAM 103, and the flash ROM 104, the event determination algorithm is difficult to operate in real time, and it is difficult to operate in real time. The time and the time to judge the event and the time to transmit the judgment result to the control server are differentiated, and the event control algorithm uses the bus to the time when the bus (BUS1) is accessible and accessible, i.e., the idle (IDLE) time of the bus (BUS1). BUS1) You must either wait to occupy or compete with other processes to secure the bus (BUS1). When the event determination algorithm is considered to be one process running on the CPU1 101 (hereinafter referred to as an "event determination process"), the bus BUS1 must be secured to drive the event determination process on the CPU1 101. If the bus BUS1 is occupied excessively by the video data and the encoding data, it becomes difficult to secure the bus BUS1. This means that the event determination process cannot be driven in real time at the right time.

Processes related to image processing and data storage have been one of the factors causing bottlenecks in data processing due to the competition to secure buses and the waiting time for bus occupancy in existing personal computers. When encoding large amounts of video data, Internet Explorer's loading is delayed or other applications are not running smoothly. Many users are familiar with it. Similarly, CPU1 101, RAM 103, and flash ROM 104 occupy most of the resources of the bus BUS1 when implementing the embedded (EMBEDDED) system or encoding video data in a terminal made for special purposes. Accordingly, the applicant processes data using a single independent bus by independently driving a process having a large share of the bus BUS1 and allowing the processor (CPU2) 111 to process other processes through a separate bus BUS2. The vehicle terminal 100 does not cause contention and time delays to occupy the bus.

In order for the two buses BUS1 and BUS2 to operate as one device in the vehicle terminal 100, the CPU1 101 and the CPU2 111 need to have a structure capable of transmitting and receiving data at a required time by interruption. have. In FIG. 1, CPU2 111 applies an interrupt to CPU1 101, and CPU1 101 proposes an interrupt-based connection structure that transmits data to CPU2 111 in response to the interrupt.

When CPU2 111 does not interrupt CPU1 101, CPU1 101 and CPU2 111 operate independently.

The block conceptual diagram illustrated in FIG. 1 illustrates a block conceptual diagram for a vehicle terminal including a wireless communication type black box or wireless communication type black box function. Of course, the existing vehicle terminal does not have the structure shown in FIG. 1, and is represented by the conceptual diagram shown in FIG.

The image data processing with a high bus occupancy is processed in the S1 area, and a process (for example, an event determination algorithm) that needs to clearly determine the event occurrence time by driving in real time, although the bus occupancy is not high, is independently driven in the S2 area.

In the S1 area, the image data obtained through the image sensor 102 is encoded by the CPU1 101 as a normal black box, encoded into a video file of a format such as MP4 and AVI, and stored in the flash memory 104.

In the S2 region, an event determination algorithm that determines in real time whether an external impact on the vehicle is a valid event or an invalid event is driven as a process. The process running in the S2 region is not occupied by the bus BUS2 by the S1 region, so a number of processes can be leisurely driven while sharing the bus BUS2.

In this state, when an external impact is applied to the vehicle and the external impact is determined to be an accident by the event determination algorithm, the event determination algorithm may apply an interrupt to the CPU1 101 through the CPU2 111. At this time, data transfer is performed between the CPU1 101 and the CPU2 111, and the CPU1 101 and the CPU2 111 can transmit data through the general-purpose I/O ports respectively provided. CPU2 (111) acquires the encoded video file provided by CPU1 (101), transfers it to the modem 112, and the modem 112 is a control server (not shown) whether an event occurs and the video file related to the event (Hereinafter referred to as "event video file") can be transmitted to the control server.

The RAM 114 located in the S2 area provides a working space for various processes driven by the CPU2 111, and the sensor 115 is a 3-axis acceleration that senses an external shock applied to the vehicle and an acceleration value applied to the vehicle. It may be a sensor or an impact amount sensor.

The GPS sensor 113 detects the vehicle's location information and provides it to the CPU2 (111), and when the event image file is transmitted to the control server through the modem 112, the CPU2 (111) attaches the location information together to generate an event. The location can be notified to the control server.

Here, except that the CPU (101, 111) and the RAM (103, 114) is a pair, the rest of the components (102, 104, 112, 113, 114) can be seen that each one is a necessary component when configuring the vehicle terminal. have.

In order to independently operate the buses BUS1 and BUS2, the CPU1 101 and the CPU2 111 must be separated, but the RAMs 103 or 114 may be shared by the two CPUs 101 and 111. However, the applicant has separated the CPUs 101 and 111, and the RAMs 103 and 114 are also separated for each CPU 101 and 111. This means that when two CPUs 101 and 111 share RAM (any one of 103 and 114) and one RAM (any one of 103 and 114), CPU1 (101) and CPU2 (111) may use RAM (103, 114). One of the CPU1 (101) and CPU2 (111), and one must wait to access the shared RAM (any one of 103, 114). This problem can be understood from the same perspective as the problem that the processing power of both the CPU and the built-in graphics module decreases when Intel's PC processor shares the built-in graphics module with RAM connected to the CPU.

In summary, the S1 area corresponds to an area in which a process that continuously overloads the bus is operated, and the S2 area is an area in which a process that does not overload the bus is operated.

The structure of FIGS. 1 and 3 is compared and described in this regard as follows.

First, it is assumed that the existing multi-core device 10 shown in FIG. 3 is a vehicle terminal as illustrated in FIG. 1.

In the existing multi-core device 10, the image data generated by the image sensor 15 is provided to the core 11, and the core 11 processes the encoding process and the event determination algorithm for RAM 19 (event determination) Process).

The encoding process accesses the RAM 19 through the memory controller 14 and utilizes the temporary storage space of the RAM 19 to encode the video data into a specific format (eg, AVI, MP4) to generate encoded data. The generated encoded data is transmitted to the storage controller 13 through a bus, and the storage controller 13 can store the encoded data as a flash memory 16. This process is repeated continuously and continuously while the vehicle is driving, and the bus is over-occupied by the encoding process. In this state, when an impact is applied to the exterior of the vehicle, the event determination process uploaded to the ram 19 must determine whether the event is a valid event or an invalid event in real time by referring to the measurement value of the sensor 20. However, in order to acquire the sensor value from the sensor 20, the bus (BUS) transmitting the sensor value must wait until the idle state, and the RAM 19 is also busy due to the access of the encoding process. ) Must also wait. That is, real-time processing is difficult.

If the event determination process overcomes this problem and the event occurred in the vehicle is determined to be a valid event, the location information obtained from the GPS sensor 17 and the encoding data stored in the flash memory 16 must be transmitted to the modem 18 . However, the bus BUS is over-occupied by the encoding process, and the event determination process must wait to obtain permission to use the bus. Accordingly, even if the multi-core device shown in FIG. 3 attempts to transmit the event file to the control server through the modem 18, a transmission delay occurs as well as to wait for frequent access to obtain a bus access right. The event image file included in the file may be damaged or some encoding data may be delayed and transmitted due to a bus access delay. In some cases, the possibility that the event control process itself causes an error cannot be ruled out.

However, according to the block diagram illustrated in FIG. 1, since the encoding process having a high bus share is entirely handled by the CPU1 101, the event determination process is whether or not the CPU 101 occupies the connected bus BUS1 or not. The CPU2 111 can drive completely.

In addition, since the CPU2 111 is configured independently from the CPU1 101, the processing of the encoding process is excluded, and accordingly, the share of the bus BUS2 of the CPU2 111 is lowered, so the bus BUS2 is interlocked with other devices. You have time to exchange data with your device.

This will be described with reference to FIG. 4.

4 is a conceptual diagram of a method in which the vehicle terminal 100 according to an embodiment is interlocked with another device.

Referring to FIG. 4, the vehicle terminal 100 according to an embodiment is divided into an S1 area having a high bus load and an S2 area having a low real-time bus load, and an S2 area having a low real-time bus load is connected for interfacing with other devices. Terminal 110a may be provided. The connection terminal 110a may be USB, micro 5PIN, MOLEX pin, and various other types. The connection terminal 110a may be connected to the connection terminal 200a provided in another device 200 by wire or may perform data communication wirelessly.

For example, when the connection terminal 110a has the form of a USB terminal, the connection terminal 110a may be equipped with a dongle for Bluetooth, ZigBee, and Wi-Fi wireless communication having a socket connectable to the USB terminal. If the dongle is also provided in the connection terminal 200a of the other device 200, the vehicle terminal 100 and the other device 200 may exchange data while performing wireless communication.

When the vehicle terminal 100 is connected to the other device 200 by wire or wireless, it receives data transmitted through another device and processes it in the S2 area or provides data to the other device 200 in the S2 area. (200) may be processed.

Here, the other device 200, an automatic emergency braking system (AEB: Autonomous Emergency Braking) to reduce the speed of the vehicle or brake the vehicle even if the driver does not press the brake in the event of a collision,

When the vehicle leaves the lane, the lane steering assist system (LKAS) maintains the lane by adjusting the driving direction, and the advanced smart cruise allows the vehicle to run at a predetermined speed and know the distance from the vehicle ahead. Control (ASCC: Advanced Smart Cruise Control), detects the danger of blind spot collision in the vehicle, changes the lane to a safe lane, and then supports side collision avoidance (ABSD: Active Blind Spot Detection), visually showing the situation around the vehicle It may be an Advanced Driver Assistance Systems (ADAS) such as Around View Monitor (AVM).

In addition, it may be an existing navigation or a black box as another device 200. If the other device 200 is a navigation, the vehicle terminal 100 obtains map information or a driving history of the vehicle from the navigation when an event occurs in the vehicle and provides it to the control server through the modem 112. It might be.

Conversely, the vehicle terminal 100 may provide a wireless communication environment to another device 200 (navigation). The LTE communication environment of the modem 112 may be provided to the other device 200 (navigation), so that the navigation can be quickly acquired to obtain a map or control program.

As another example, when the vehicle terminal 100 is connected to an ADAS device and connected to another device (200, ADAS device), the vehicle terminal 100 is an electronic control unit (ECU) of the vehicle from the other device 200, ADAS It is also possible to determine whether the vehicle is safely driving by accessing information or obtaining a lane driving situation. In this case, the vehicle terminal 100 may notify the control server whether or not the driver of the vehicle is driving safely, and the control server may also adjust the insurance rate for the vehicle.

As described above, the vehicle terminal 100 is interlocked with various devices to implement new functions that are difficult to implement with a single device. To this end, the vehicle terminal 100 is designed so that the bus BUS2, which is a data passage, has a margin for interworking with other devices.

101: CPU1 102: CCD
103: RAM 104: Flash ROM
111: CPU2 112: modem
113: GPS sensor 114: RAM
115: sensor

Claims (6)

A first CPU connected to a first bus used for image data processing and storing the image data on a storage medium through the first bus; And
A second bus that is connected to a second bus provided for processing data other than the image data, the second bus is separated from the first bus, and when an event occurs, a second CPU that acquires the image data through the first CPU Multi-channel-type mobile terminal for processing according to the data type characterized in that it comprises a. According to claim 1,
The first CPU,
A multi-channel mobile terminal for divided processing according to a data type, characterized in that the encoded data encoding the video data is stored in the storage medium through the first bus. According to claim 2,
The second CPU,
When the event occurs, the multi-channel mobile terminal is divided according to the data type, characterized in that to request the withdrawal of the image data by applying an interrupt (interrupt) to the first CPU. According to claim 1,
The second CPU,
Processes a process that requires real-time processing,
When the event is generated by the process processing, the multi-channel mobile terminal is divided according to the data type, characterized in that access to the first CPU. According to claim 1,
The second CPU,
A multi-channel mobile terminal that is interlocked with an external device and divides and processes it according to a data type, characterized in that when the external event occurs from the external device, the first CPU is accessed. The method of claim 5,
The external device,
It is a vehicle electronic device mounted on a vehicle,
Navigation, Black Box AEB (Autonomous Emergency Braking), LKAS (Lane Keep Assist System) ADAS (Advanced Driver Assistance System), ASCC (Advanced Smart Cruise Control), ABSD (Active Blind Spot Detection), AVM (Around View Monitor) devices A multi-channel mobile terminal that is divided and processed according to a data type, characterized in that it is at least one.

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