KR20200053858A - Apparatus for synchronizing in serial communication interface and method thereof - Google Patents

Abstract

According to the present invention, disclosed are a synchronizing device in a serial communication interface and a method thereof. In a state in which mutual communication is performed between a single master device and a plurality of slave devices using a serial communication protocol such as an I2C protocol, an SPI protocol or the like, information of the slave devices having the same or different slave IDs is obtained at the same time or at synchronized timing by using a single clock signal line, multiple data lines, single chip select line, etc., thereby preventing errors in information over time when the information is acquired and easily obtaining the desired information from the slave devices depending on a purpose.

Description

Apparatus for synchronizing in serial communication interface and method thereof

The present invention relates to a synchronization device and method in a serial communication interface, in particular, in a state in which a single master device and a plurality of slave devices communicate with each other using a serial communication protocol such as I2C protocol, SPI protocol, a single clock signal line, Regarding a synchronization device and method in a serial communication interface that simultaneously or simultaneously obtains information of the plurality of slave devices having the same or different slave IDs using a plurality of data lines, a single chip selection line, or the like. will be.

Inter-Integrated Circuit (I2C) is one of synchronous serial communication and performs half-duplex communication.

In addition, SPI (Serial Peripheral Interface) is one of synchronous serial communication, and performs full-duplex communication.

In the case of serial interfaces such as I2C and SPI, in order to acquire information of N (N is a natural number) target device, the master device must sequentially access each target device, and thus multiple target devices are simultaneously It is impossible to acquire information on, and in order to acquire information on a plurality of target devices at the same time, synchronized timing control using an external trigger or the like is required using N controllers.

That is, in the case of the I2C protocol, it is possible to connect N slave devices to one master device, but only one slave device can be accessed at the same time.

In addition, in the case of the SPI protocol, N slave devices can be connected to one master device, and only one slave device can be accessed using a chip select (CS) signal.

As described above, in the case of a serial interface such as I2C, SPI, it is difficult to obtain information on a plurality of slave devices at the same time, and even if information on a plurality of slave devices is obtained using a plurality of controllers, information according to asynchronous Error may occur.

Korean Registered Patent No. 10-0848545 [Title: A device equipped with a master and a plurality of slaves based on the I2C bus protocol]

An object of the present invention is to use a single clock signal line, a plurality of data lines, a single chip selection line, etc. in a state of mutual communication using a serial communication protocol such as I2C protocol, SPI protocol, etc. between a single master device and a plurality of slave devices. Accordingly, an object of the present invention is to provide a synchronization device and method in a serial communication interface that acquires information of the plurality of slave devices having the same or different slave IDs at the same time or at a synchronized timing.

A synchronization device in a serial communication interface according to an embodiment of the present invention includes a plurality of slave devices; And a master device connected to the plurality of slave devices through a single clock signal line, and connected to each of the plurality of slave devices through a plurality of serial data lines, wherein the master device is through the single clock signal line. A synchronized clock signal is transmitted to the plurality of slave devices, and a read operation of information on each of the plurality of slave devices is performed according to a read operation bit or a write operation bit in a plurality of control signals corresponding to each of the plurality of slave devices. Alternatively, a write operation may be performed.

As an example related to the present invention, the master device and the plurality of slave devices may be in a communication connection state through an Inter-Integrated Circuit (I2C) protocol or a Serial Peripheral Interface (SPI) protocol.

As an example related to the present invention, the master device may acquire information from the plurality of slave devices at the same time according to a read operation bit or a write operation bit in a plurality of control signals corresponding to each of the plurality of slave devices.

As an example related to the present invention, the master device sequentially sets the plurality of slave devices according to a preset synchronized timing according to a read operation bit or a write operation bit in a plurality of control signals corresponding to each of the plurality of slave devices. Information can be obtained from.

As an example related to the present invention, when the master device and the plurality of slave devices are connected through an I2C protocol, the master device and the plurality of slave devices are connected through the single clock signal line, and the plurality of serial data Each of the master device and the plurality of slave devices may be connected through a line.

As an example related to the present invention, when the master device and the plurality of slave devices are connected through the SPI protocol, the master device and the plurality of slave devices are connected through the single clock signal line, and a single chip selection line The master device and the plurality of slave devices are connected to each other, and each of the master device and the plurality of slave devices may be connected through a plurality of MISO lines and a plurality of MOSI lines included in the plurality of serial data lines.

A synchronization method in a serial communication interface according to an embodiment of the present invention includes: transmitting, by a master device, a synchronized clock signal to a plurality of slave devices connected through a single clock signal line; Transmitting, by the master device, control signals for controlling each of the plurality of slave devices through a plurality of serial data lines respectively connected to the plurality of slave devices; Outputting, by each of the plurality of slave devices, a preset bit value to an ACK bit in the control signal when the control signal transmitted from the master device matches the address of the slave device; And performing, by the master device, a read operation or a write operation of information for each of the plurality of slave devices according to a read operation bit or a write operation bit in a control signal corresponding to each of the plurality of slave devices. can do.

As an example related to the present invention, the step of performing a read operation or a write operation of information on each of the plurality of slave devices may include simultaneously obtaining information from the plurality of slave devices; And sequentially acquiring information from the plurality of slave devices according to a preset synchronized timing.

The present invention is the same using a single clock signal line, a plurality of data lines, a single chip selection line, etc. in a state in which communication is performed between a single master device and a plurality of slave devices using a serial communication protocol such as an I2C protocol or an SPI protocol. Or, by acquiring information of the plurality of slave devices having different slave IDs at the same time or by acquiring at a synchronized timing, preventing errors in information over time when acquiring information, and desired information from a plurality of slave devices depending on the purpose There is an effect that can be easily obtained.

1 is a block diagram showing the configuration of a synchronization device in a serial communication interface according to an embodiment of the present invention.
2 is a view showing the configuration of a synchronization device in the I2C protocol method according to an embodiment of the present invention.
3 is a view showing the configuration of a synchronization device in the SPI protocol method according to an embodiment of the present invention.
4 is a diagram illustrating an example of data acquisition through a synchronization device in an I2C protocol method according to an embodiment of the present invention.
5 is a view showing an example of data acquisition through a synchronization device in the SPI protocol method according to an embodiment of the present invention.
6 is a flowchart illustrating a synchronization method in a serial communication interface according to an embodiment of the present invention.

It should be noted that the technical terms used in the present invention are only used to describe specific embodiments, and are not intended to limit the present invention. In addition, technical terms used in the present invention should be interpreted as meanings generally understood by a person having ordinary knowledge in the technical field to which the present invention belongs, unless otherwise defined in the present invention. It should not be interpreted as a meaning or an excessively reduced meaning. In addition, when the technical term used in the present invention is a wrong technical term that does not accurately represent the spirit of the present invention, it should be understood as being replaced by a technical term that can be correctly understood by those skilled in the art. In addition, the general terms used in the present invention should be interpreted as defined in the dictionary or in context before and after, and should not be interpreted as an excessively reduced meaning.

In addition, the singular expression used in the present invention includes a plural expression unless the context clearly indicates otherwise. In the present invention, terms such as “consisting of” or “comprising” should not be construed to include all of the various components or steps described in the invention, and some of the components or some steps may not be included. It may be, or should be construed to further include additional components or steps.

Further, terms including ordinal numbers such as first and second used in the present invention may be used to describe elements, but the elements should not be limited by terms. The terms are used only to distinguish one component from other components. For example, the first component may be referred to as a second component without departing from the scope of the present invention, and similarly, the second component may be referred to as a first component.

Hereinafter, preferred embodiments according to the present invention will be described in detail with reference to the accompanying drawings, but the same or similar elements will be given the same reference numbers regardless of the reference numerals, and redundant descriptions thereof will be omitted.

In addition, in the description of the present invention, when it is determined that detailed descriptions of related known technologies may obscure the subject matter of the present invention, detailed descriptions thereof will be omitted. In addition, it should be noted that the accompanying drawings are only for easy understanding of the spirit of the present invention and should not be interpreted as limiting the spirit of the present invention by the accompanying drawings.

1 is a block diagram showing the configuration of a synchronization device 10 in a serial communication interface according to an embodiment of the present invention.

As shown in FIG. 1, the synchronization device 10 in the serial communication interface is composed of a master device 100 and a plurality of slave devices 200. Not all components of the synchronization device 10 shown in FIG. 1 are required components, and the synchronization device 10 may be implemented by more components than the components shown in FIG. 1, or fewer components The synchronization device 10 may also be implemented.

Each of the master device 100 and the plurality of slave devices 200 is a communication unit (not shown) for performing a communication function with other terminals, and a storage unit (not shown) for storing various information and programs (or applications). City), a display unit (not shown) for displaying various information and program execution results, a voice output unit (not shown) for outputting voice information corresponding to the various information and program execution results, various components of each terminal, and A control unit (not shown) for controlling a function may be included.

The master device (or master device) 100 communicates with a plurality of slave devices 200. Here, the communication protocol (or communication interface) between the master device 100 and the plurality of slave devices 200 is a serial communication protocol (or serial), such as an Inter-Integrated Circuit (I2C) protocol or a Serial Peripheral Interface (SPI) protocol. Communication interface).

When using the I2C protocol, as shown in FIG. 2, the master device 100 is connected to the plurality of slave devices 200 through a single clock signal line (or single clock bus) (SCL), in advance A clock signal (or synchronization signal / synchronized clock signal) having a predetermined time interval is transmitted (or provided) to the plurality of slave devices 200.

In addition, when using the I2C protocol, as shown in FIG. 2, the master device 100 is connected to the plurality of slave devices 200 through a plurality of serial data lines (SDA1, SDA2, SDA3), respectively. The control signal for controlling the specific slave device 200 is transmitted through the serial data line corresponding to the specific slave device 200.

When using the SPI protocol, as shown in FIG. 3, the master device 100 is connected to the plurality of slave devices 200 through a single clock signal line (or single clock bus) (SCK), and the A clock signal (or synchronization signal / synchronized clock signal) having a predetermined time interval is transmitted (or provided) to the plurality of slave devices 200.

In addition, when using the SPI protocol, as shown in FIG. 3, the master device 100 may use the plurality of slave devices through a single chip selection line (or chip selection bus) CS. It is connected to (200), and transmits a chip selection signal for selecting at least one slave device 200 among the plurality of slave devices 200.

In addition, when using the SPI protocol, as shown in FIG. 3, the master device 100 includes a plurality of MISO lines (Master Input Slave Output Line) (MISO_1, MISO_2, ..., MISO_N) and a plurality of It is connected to each of the plurality of slave devices 200 through a MOSI line (Master Output Slave Input Line) (MOSI_1, MOSI_2, ..., MOSI_N), and reads or information (or data) with a specific slave device 200 For writing, information is transmitted and received through the MISO line and the MOSI line corresponding to the specific slave device 200. Here, the plurality of MISO lines and the plurality of MOSI lines may correspond to the serial data line.

As such, the master device 100 and the plurality of slave devices 200 may be synchronized by transmitting the synchronized clock signals to the plurality of slave devices 200 through a single clock signal line to the master device 100. have.

In addition, the master device 100 transmits each control signal to the plurality of slave devices 200 to acquire information (or data). Here, the plurality of slave devices 200 may be connected to the master device 100 through individual serial data lines, respectively, or in the same or different slave IDs. At this time, the control signal (or control packet / frame) has a predetermined form (or structure) according to the communication protocol, start condition, destination address, read / write, ACK, data, ACK, data, ... ACK, It may be set as a termination condition.

Further, the master device 100 reads information (or data) for each of the plurality of slave devices 200 according to a read operation bit or a write operation bit in a control signal corresponding to each slave device 200 ( Read or write is performed. At this time, the master device 100 acquires information from the plurality of slave devices 200 at the same time (or in parallel) (eg, reads information, writes information, etc.), or a preset synchronized timing. Accordingly, information may be sequentially obtained from the plurality of slave devices 200. Here, when the communication method between the master device 100 and the plurality of slave devices 200 uses an SPI communication interface, the master device 100 may transmit the plurality of slave devices 200 through a single chip selection line. It may be connected to.

When using the I2C protocol, as illustrated in FIG. 4, the master device 100 simultaneously acquires information (or performs a read operation) from the first slave device 200 to the third slave device 200.

When using the SPI protocol, as illustrated in FIG. 5, the master device 100 simultaneously acquires information (or performs a read operation) from the first slave device 200 to the third slave device 200. .

As described above, the master device 100 may acquire accurate synchronization information while acquiring data (eg, reading data, writing data, etc.) from the plurality of slave devices 200 at the same clock timing.

The slave device (or slave device) 200 communicates with the master device 100 and other slave devices 200. Here, the slave device 200 may be a temperature sensor, a pressure sensor, a memory, a terminal, etc. installed (or provided / deployed) at an arbitrary place.

In addition, the slave device 200 is connected to the master device 100 through a single clock signal line, and is connected through a separate serial data line allocated to each slave device 200. At this time, when using the SPI protocol, the slave device 200 may be connected through a single chip selection line.

In addition, while each of the plurality of slave devices 200 is connected to the master device 100 through a separate serial data line, a control signal transmitted from the master device 100 is monitored while monitoring the serial data line. It checks (or checks) whether it matches the address of the corresponding slave device 200.

When the test result (or the result of the check) and the control signal transmitted from the master device 100 match the address of the corresponding slave device 200, the slave device 200 is preset in the ACK bit in the control signal. The set bit value (eg '0') is output.

In addition, if the test result (or the result of the check), the control signal transmitted from the master device 100 does not match the address of the corresponding slave device 200, the slave device 200 is the slave device 200 ), Delete (or discard) the control signal that does not match the address.

In addition, each of the plurality of slave devices 200, in accordance with the read operation bit or write operation bit in the control signal corresponding to each slave device 200, in conjunction with the master device 100, the plurality of slave devices ( 200) A read operation or a write operation of information (or data) for each is performed. The master device 100 obtains information from the plurality of slave devices 200 at the same time (or in parallel) (eg, reads information, writes information, etc.), or according to a preset synchronized timing. Information may be sequentially acquired from the plurality of slave devices 200.

As described above, in a state in which communication is performed between a single master device and a plurality of slave devices using a serial communication protocol such as an I2C protocol or an SPI protocol, the same is performed using a single clock signal line, a plurality of data lines, and a single chip selection line. Alternatively, information of the plurality of slave devices having different slave IDs may be simultaneously acquired or may be obtained at a synchronized timing.

Hereinafter, a synchronization method in a serial communication interface according to the present invention will be described in detail with reference to FIGS. 1 to 6.

6 is a flowchart illustrating a synchronization method in a serial communication interface according to an embodiment of the present invention.

First, the master device 100 transmits a clock signal (or synchronization signal / synchronized clock signal) having a predetermined time interval to a plurality of slave devices 200 connected through a single clock signal line (or a single clock bus) ( Or provide).

As such, the master device 100 and the plurality of slave devices 200 may be synchronized by transmitting the synchronized clock signals to the plurality of slave devices 200 through a single clock signal line to the master device 100. have.

For example, the first master device 100 transmits a clock signal having an on / off period of 100 μsec to each of the first slave devices 200 to the ten slave devices 200 connected through the first clock signal line.

As described above, as the first master device and the plurality of slave devices communicate with each other through a clock signal synchronized through a single first clock signal line, the first master device simultaneously transmits to the plurality of slave devices at 100 μsec. It may be possible to read or write information about (S610).

Thereafter, the master device 100 transmits each control signal to the plurality of slave devices 200 to acquire information (or data). Here, the plurality of slave devices 200 may be connected to the master device 100 through individual serial data lines, respectively, or in the same or different slave IDs. At this time, the control signal (or control packet / frame) has a predetermined form (or structure) according to the communication protocol, start condition, destination address, read / write, ACK, data, ACK, data, ... ACK, It may be set as a termination condition.

For example, the first master device may include first control signals to tenth control for reading data of each slave device to the first slave device to the tenth slave device respectively connected through individual first to tenth serial data lines. Each signal is transmitted (S620).

Thereafter, each of the plurality of slave devices 200 is connected to the master device 100 through a separate serial data line, while monitoring the corresponding serial data line, and receiving a control signal transmitted from the master device 100 It checks (or checks) whether it matches the address of the corresponding slave device 200.

For example, the first slave device checks whether there is a control signal matching the address of the corresponding first slave device among the first control signal to the tenth control signal transmitted from the first master device (S630).

When the test result (or the result of the check) and the control signal transmitted from the master device 100 match the address of the corresponding slave device 200, the slave device 200 is preset in the ACK bit in the control signal. The set bit value (eg '0') is output.

That is, when a control signal targeting the slave device 200 is detected, the slave device 200 transmits (or outputs) a response signal corresponding to the control signal.

For example, when a first control signal that matches an address of a corresponding first slave device among first control signals to tenth control signals transmitted from the first master device is confirmed, the first slave device controls the first control The preset bit value '0' is output to the ACK bit in the signal.

In addition, the first slave device deletes the second control signal to the tenth control signal that do not match the address of the corresponding first slave device among the first control signal to the tenth control signal transmitted from the first master device (or Discard) (S640).

Thereafter, the master device 100 reads information (or data) for each of the plurality of slave devices 200 according to a read operation bit or a write operation bit in a control signal corresponding to each slave device 200 ( Read or write is performed. At this time, the master device 100 acquires information from the plurality of slave devices 200 at the same time (or in parallel) (eg, reads information, writes information, etc.), or a preset synchronized timing. Accordingly, information may be sequentially obtained from the plurality of slave devices 200. Here, when the communication method between the master device 100 and the plurality of slave devices 200 uses an SPI communication interface, the master device 100 may transmit the plurality of slave devices 200 through a single chip selection line. It may be connected to.

For example, the first master device reads information on the first slave device to the tenth slave device according to the read operation bit included in the first control signal to the tenth control signal (S650).

Embodiments of the present invention, as described above, in a state of mutual communication using a serial communication protocol, such as I2C protocol, SPI protocol between a single master device and a plurality of slave devices, a single clock signal line, a plurality of data lines, The information of the plurality of slave devices having the same or different slave IDs is simultaneously acquired by using a single chip selection line or the like, or obtained at a synchronized timing to prevent errors in information over time when obtaining information. Accordingly, desired information can be easily obtained from a plurality of slave devices.

The above-described contents may be modified and modified without departing from the essential characteristics of the present invention by those skilled in the art to which the present invention pertains. Therefore, the embodiments disclosed in the present invention are not intended to limit the technical spirit of the present invention, but to explain, and the scope of the technical spirit of the present invention is not limited by these embodiments. The scope of protection of the present invention should be interpreted by the claims below, and all technical spirits within the equivalent range should be interpreted as being included in the scope of the present invention.

10: Synchronization device in serial communication interface
100: master device 200: multiple slave devices

Claims (8)

A plurality of slave devices; And
And a master device connected to the plurality of slave devices through a single clock signal line, and connected to each of the plurality of slave devices through a plurality of serial data lines,
The master device,
A clock signal synchronized through the single clock signal line is transmitted to the plurality of slave devices, and according to the read operation bit or write operation bit in a plurality of control signals corresponding to each of the plurality of slave devices, the plurality of slave devices Synchronization device in a serial communication interface, characterized in that to perform a read operation or a write operation of information for each. According to claim 1,
The master device and the plurality of slave devices,
Synchronization device in a serial communication interface, characterized in that the communication is connected through the Inter-Integrated Circuit (I2C) protocol or the Serial Peripheral Interface (SPI) protocol. According to claim 1,
The master device,
Synchronization apparatus in a serial communication interface, characterized in that for acquiring information from the plurality of slave devices at the same time according to the read operation bit or write operation bit in a plurality of control signals corresponding to each of the plurality of slave devices. According to claim 1,
The master device,
A serial communication interface characterized in that information is sequentially obtained from the plurality of slave devices according to a preset synchronized timing according to a read operation bit or a write operation bit in a plurality of control signals corresponding to each of the plurality of slave devices. Sync device. According to claim 1,
The master device and the plurality of slave devices,
When connected through the I2C protocol, the master device and the plurality of slave devices are connected through the single clock signal line, and the master device and each of the plurality of slave devices are connected through the plurality of serial data lines. Synchronization device in serial communication interface. According to claim 1,
The master device and the plurality of slave devices,
When connected through the SPI protocol, the master device and the plurality of slave devices are connected through the single clock signal line, the master device and the plurality of slave devices are connected through a single chip selection line, and the plurality of serial A synchronization device in a serial communication interface, characterized in that each of the master device and the plurality of slave devices is connected through a plurality of MISO lines and a plurality of MOSI lines included in a data line. Transmitting, by a master device, a synchronized clock signal to a plurality of slave devices connected through a single clock signal line;
Transmitting, by the master device, control signals for controlling each of the plurality of slave devices through a plurality of serial data lines respectively connected to the plurality of slave devices;
Outputting, by each of the plurality of slave devices, a preset bit value to an ACK bit in the control signal when the control signal transmitted from the master device matches the address of the slave device; And
And performing, by the master device, a read operation or a write operation of information on each of the plurality of slave devices according to a read operation bit or a write operation bit in a control signal corresponding to each of the plurality of slave devices. Method of synchronization on the serial communication interface. The method of claim 7,
The step of performing a read operation or a write operation of information for each of the plurality of slave devices may include:
Simultaneously obtaining information from the plurality of slave devices; And
And a process of acquiring information from the plurality of slave devices sequentially according to a preset synchronized timing.

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