KR20200049411A - Display device - Google Patents

Abstract

An input detection sensor comprises first detection electrodes and second detection electrodes of which one end of opposite ends is electrically connected with a corresponding signal line. Each of the first detection electrodes overlaps the second detection electrodes and comprises bridge patterns disposed on a different layer from the second detection electrodes. One group of the first detection electrodes and the second detection electrodes receives a sine wave signal. According to the present invention, bandwidths of the detection signals become wide to improve sensitivity.

Description

Display device {DISPLAY DEVICE}

The present invention relates to a display device, and more particularly, to a display device including an input sensor.

Various display devices have been developed for use in multimedia devices such as televisions, mobile phones, tablet computers, navigation systems, and game machines. An input device for display devices includes a keyboard or a mouse. Further, display devices include a touch panel as an input device.

An object of the present invention is to provide a display device including an input sensing sensor with improved sensing sensitivity.

A display device according to an exemplary embodiment of the present invention includes a display panel and an input sensing sensor disposed on the display panel and including a sensing area and a wiring area outside the sensing area.

The input sensing sensor includes first and second sensing electrodes disposed in the wiring region and the signal line groups disposed in the wiring region, one end of which is electrically connected to the corresponding signal line of the signal line groups. It includes sensing electrodes. The second sensing electrodes have a greater length than the first sensing electrodes. The signal line groups include a first signal line group electrically connected to the first sensing electrodes and a second signal line group electrically connected to the second sensing electrodes. Each of the first sensing electrodes overlaps the second sensing electrodes and includes first bridge patterns disposed on a different layer from the second sensing electrodes. Electrodes of any one of the first sensing electrodes and the second sensing electrodes receive a sinusoidal signal.

The other group of electrodes of the first sensing electrodes and the second sensing electrodes provides a sensing signal corresponding to the sinusoidal signal to the sensing circuit.

Each of the second sensing electrodes has an integral shape.

The display panel includes a display area corresponding to the sensing area and a non-display area corresponding to the wiring area. The display area includes light emitting areas and a non-light emitting area. Each of the first sensing electrodes is defined with openings corresponding to the emission regions.

The corresponding signal line of the signal line groups includes at least a portion disposed on the same layer as the second sensing electrodes.

The input sensing sensor further includes an insulating layer disposed between the first bridge patterns and the second sensing electrodes. The insulating layer covers the sensing region.

The first signal line group includes one signal line electrically connected to odd-numbered sensing electrodes among the first sensing electrodes, and other signal lines electrically connected to even-numbered sensing electrodes of the first sensing electrodes. Includes. The signal lines on one side and the signal lines on the other side are spaced apart between the sensing regions in the extending direction of the first sensing electrodes.

The input sensing sensor further includes first dummy patterns disposed inside each of the first sensing electrodes and second dummy patterns disposed inside each of the second sensing electrodes.

The input detection sensor further includes second bridge patterns connecting the first dummy patterns.

At least one of the first dummy patterns includes extension portions disposed on both sides of the center portion in the extension direction of the center portion and the first sensing electrodes. Each of the extensions is connected to a corresponding second bridge pattern among the second bridge patterns.

The first bridge patterns and the second bridge patterns are disposed on the same layer.

The second bridge patterns are arranged to correspond to the first bridge patterns, and the second bridge patterns have a greater length than the corresponding first bridge pattern among the first bridge patterns.

The input sensing sensor further includes a dummy signal line connected to a first dummy pattern disposed on the outermost side of the first dummy patterns in the extending direction of the first sensing electrodes.

The input sensing sensor further includes third bridge patterns insulated from the dummy signal line. The third bridge patterns connect the first sensing electrodes and signal lines of the first signal line group.

In the display device, a notch region concave inward on a plane is defined.

The display panel includes a base layer, a circuit element layer disposed on the base layer, a display element layer disposed on the circuit element layer, and an upper insulating layer disposed on the display element layer.

A signal transmission region in which at least a portion of the base layer, the circuit element layer, the display element layer, and the upper insulating layer is removed is defined in the display panel.

A display device according to an exemplary embodiment of the present invention includes a display panel and an input sensing sensor disposed above the display panel. The input sensing sensor includes a first sensing electrode and a second sensing electrode that intersects the first sensing electrode and is longer than the first sensing electrode. The first sensing electrode includes sensor parts disposed on the same layer as the second sensing electrode and bridge patterns disposed on a different layer from the second sensing electrode, and any one of the bridge patterns is a bridge pattern. It overlaps the second sensing electrode. Any one of the first sensing electrode and the second sensing electrode receives a sinusoidal signal through one end of both ends.

A display device according to an exemplary embodiment of the present invention includes a display panel and an input sensing sensor disposed above the display panel. The input sensing sensor includes an insulating layer, a first sensing electrode, and a second sensing electrode that intersects the first sensing electrode and is longer than the first sensing electrode and has an integral shape. The first sensing electrode includes first portions disposed above the insulating layer and second portions disposed below the insulating layer and connected to the first portions through contact holes passing through the insulating layer. Any one of the first sensing electrode and the second sensing electrode receives a sinusoidal signal through one end of both ends.

The second sensing electrode has an integral shape on the insulating layer.

One end of both ends of the second sensing electrode is connected to a signal line, and the other end is electrically isolated.

According to the present invention, the relative position of the connection portion (or bridge pattern) with respect to the sensor portion is changed according to the connection structure between the signal line and the sensing electrode. That is, a bridge pattern is disposed on either the first sensing electrode or the second sensing electrode according to the connection structure between the signal line and the sensing electrode.

According to the present invention, by reducing the resistance of the input sensing sensor it is possible to improve the bandwidth (AC Band Width) characteristics of the AC signal. Sensing sensitivity is improved by increasing the bandwidth of the sensing signal.

1 is a perspective view of a display device according to an exemplary embodiment of the present invention.
2A to 2D are cross-sectional views of a display device according to an exemplary embodiment of the present invention.
3A and 3B are cross-sectional views of a display panel according to an exemplary embodiment of the present invention.
4 is a plan view of a display panel according to an exemplary embodiment of the present invention.
5A is an enlarged cross-sectional view of a display panel according to an exemplary embodiment of the present invention.
5B is an enlarged cross-sectional view of an upper insulating layer according to an embodiment of the present invention.
6A is a cross-sectional view of an input sensing layer according to an embodiment of the present invention.
6B is a plan view of an input sensing layer according to an embodiment of the present invention.
6C and 6D are partial cross-sectional views of an input sensing layer according to an embodiment of the present invention.
6E is an enlarged plan view of area AA of FIG. 6B.
7A is a plan view of a sensing unit according to an embodiment of the present invention.
7B is an enlarged plan view of a crossing area of a sensing unit according to an embodiment of the present invention.
7C is an equivalent circuit diagram of an input sensing sensor according to an embodiment of the present invention.
7D is a waveform diagram of a drive signal according to an embodiment of the present invention.
7E is a graph showing 1 decibel bandwidth characteristics according to the structure of the input sensor.
8A is a plan view of an input detection sensor according to an embodiment of the present invention.
8B is a partial plan view of an input sensing sensor according to an embodiment of the present invention.
8C is a plan view of an enlarged crossing area of the input sensor according to an embodiment of the present invention.
8D is a plan view of an input sensing sensor according to an embodiment of the present invention.
9A is a plan view of an input detection sensor according to an embodiment of the present invention.
9B is a partial plan view of an input sensing sensor according to an embodiment of the present invention.
9C is an equivalent circuit diagram of an input sensing sensor according to an embodiment of the present invention.
10A is a perspective view of a display module according to an embodiment of the present invention.
10B is a plan view of an input sensing layer according to an embodiment of the present invention.
11A is a perspective view of a display module according to an embodiment of the present invention.
11B is a plan view of an input sensing layer according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In this specification, when a component (or region, layer, part, etc.) is referred to as being “on”, “connected” to, or “joined” to another component, it is directly connected / connected to the other component. It means that they can be combined or a third component can be arranged between them.

The same reference numerals refer to the same components. In addition, in the drawings, the thickness, ratio, and dimensions of the components are exaggerated for effective description of technical content. “And / or” includes all combinations of one or more of which the associated configurations may be defined.

Terms such as first and second may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from other components. For example, the first component may be referred to as a second component without departing from the scope of the present invention, and similarly, the second component may be referred to as a first component. Singular expressions include plural expressions unless the context clearly indicates otherwise.

In addition, terms such as "below", "below", "above", "above", etc. are used to describe the relationship between the components shown in the drawings. The terms are relative concepts and are explained based on the directions indicated in the drawings.

The terms "include" or "have" are intended to indicate the presence of a feature, number, step, action, component, part, or combination thereof described in the specification, one or more other features, numbers, or steps. It should be understood that it does not preclude the existence or addition possibility of the operation, components, parts or combinations thereof.

1 is a perspective view of a display device DD according to an exemplary embodiment of the present invention. As shown in FIG. 1, the display device DD may display the image IM through the display surface DD-IS. The display surface DD-IS is parallel to a surface defined by the first direction axis DR1 and the second direction axis DR2. The normal direction of the display surface DD-IS, that is, the thickness direction of the display device DD is indicated by the third direction axis DR3.

The front (or top) and back (or bottom) of each member or units described below are divided by the third direction axis DR3. However, the first to third direction axes DR1, DR2, and DR3 shown in this embodiment are merely examples. Hereinafter, the first to third directions refer to the same reference numerals as the directions indicated by the first to third direction axes DR1, DR2, and DR3, respectively.

In an embodiment of the present invention, a display device DD having a flat display surface is illustrated, but is not limited thereto. The display device DD may include a curved display surface or a three-dimensional display surface. The three-dimensional display surface includes a plurality of display areas indicating different directions, and may include, for example, a polygonal columnar display surface.

The display device DD according to the present embodiment may be a rigid display device. However, the present invention is not limited thereto, and the display device DD according to the present invention may be a flexible display device DD. The flexible display device DD may include a foldable foldable display device or a bending type display device in which some areas are bent.

In this embodiment, a display device DD that can be applied to a mobile phone terminal is exemplarily illustrated. Although not shown, the electronic modules mounted on the main board, the camera module, the power supply module, etc. are disposed on the bracket / case together with the display device DD to configure the mobile phone terminal. The display device DD according to the present invention can be applied to a large-sized electronic device such as a television, a monitor, a small-sized electronic device such as a tablet, a car navigation system, a game machine, and a smart watch.

As shown in FIG. 1, the display surface DD-IS includes an image area DD-DA in which the image IM is displayed and a bezel area DD-NDA adjacent to the image area DD-DA. . The bezel area DD-NDA is an area in which an image is not displayed. 1 shows icon images as an example of the image IM.

As illustrated in FIG. 1, the image area DD-DA may have a substantially rectangular shape. The term " substantially rectangular shape " includes not only a rectangular shape in a mathematical sense, but also a rectangular shape in which a boundary of a curve is defined without defining a vertex in a vertex region (or corner region).

The bezel area DD-NDA may surround the image area DD-DA. However, the shape of the image region DD-DA and the shape of the bezel region DD-NDA are not limited thereto, and may be relatively designed.

2A to 2D are cross-sectional views of a display device DD according to an exemplary embodiment of the present invention. 2A to 2D show cross sections defined by the second direction axis DR2 and the third direction axis DR3. 2A to 2D are simply illustrated to explain a stacking relationship of functional members constituting the display device DD.

The display device DD according to an exemplary embodiment of the present invention may include a display panel, an input sensing sensor, an anti-reflector, and a window. At least some of the components of the display panel, the input sensor, the anti-reflection member, and the window may be formed by a continuous process, or at least some of the components may be coupled to each other through an adhesive member. 2A to 2D, an optical transparent adhesive member (OCA) is exemplarily illustrated as an adhesive member. The adhesive member described below may include a conventional adhesive or adhesive. In one embodiment of the present invention, the anti-reflection member and the window may be replaced with other components or omitted.

2A to 2D, the input sensor, the anti-reflective member, and other components of the window and the corresponding components formed through a continuous process are represented as "layers". The other components of the input detection sensor, the anti-reflection member, and the window and the configuration combined through the adhesive member are represented as "panels". The panel includes a base layer providing a base surface, for example, a synthetic resin film, a composite material film, a glass substrate, etc., but the "layer" may be omitted from the base layer. In other words, the units represented by "layers" are disposed on the base surface provided by other units.

Hereinafter, the input detection sensor, the anti-reflection member, and the window may include an input detection panel (ISP), an anti-reflection panel (RPP), a window panel (WP) or an input detection layer (ISL), an anti-reflection layer (with or without base layer) RPL), a window layer (WL).

As illustrated in FIG. 2A, the display device DD may include a display panel DP, an input sensing layer ISL, an anti-reflection panel (RPP), and a window panel (WP). The input sensing layer ISL is directly disposed on the display panel DP. In this specification, "the configuration of B is directly disposed on the configuration of A" means that a separate adhesive layer / adhesive member is not disposed between the configuration of A and the configuration of B. The B configuration is formed through a continuous process on the base surface provided by the A configuration after the A configuration is formed.

The display module DP may include a display panel DP and an input sensing layer ISL directly disposed on the display panel DP. An optical transparent adhesive member (OCA) is disposed between the display module DM and the anti-reflection panel (RPP), and between the anti-reflection panel (RPP) and the window panel (WP).

The display panel DP generates an image, and the input sensing layer ISL acquires coordinate information of an external input (eg, a touch event). Although not separately illustrated, the display module DM according to an embodiment of the present invention may further include a protection member disposed on a lower surface of the display panel DP. The protective member and the display panel DP may be combined through an adhesive member. The display devices DD of FIGS. 2B to 2D described below may further include a protection member.

The display panel DP according to an embodiment of the present invention may be a light-emitting display panel, and is not particularly limited. For example, the display panel DP may be an organic light emitting display panel or a quantum dot light emitting display panel. The light emitting layer of the organic light emitting display panel may include an organic light emitting material. The light emitting layer of the quantum dot light emitting display panel may include a quantum dot, a quantum rod, and the like. Hereinafter, the display panel DP is described as an organic light emitting display panel.

The anti-reflection panel (RPP) reduces the reflectance of external light incident from the upper side of the window panel (WP). The anti-reflection panel (RPP) according to an embodiment of the present invention may include a phase retarder and a polarizer. The phase retarder may be a film type or a liquid crystal coating type, and may include a λ / 2 phase retarder and / or a λ / 4 phase retarder. The polarizer may also be a film type or a liquid crystal coating type. The film type includes a stretched synthetic resin film, and the liquid crystal coating type may include liquid crystals arranged in a predetermined arrangement. The phase retarder and the polarizer may further include a protective film. The phase retarder and the polarizer itself or a protective film may be defined as the base layer of the anti-reflection panel (RPP).

 The anti-reflection panel (RPP) according to an embodiment of the present invention may include color filters. The color filters have a predetermined arrangement. The arrangement of color filters may be determined in consideration of emission colors of pixels included in the display panel DP. The anti-reflection panel (RPP) may further include a black matrix adjacent to the color filters.

 The anti-reflection panel (RPP) according to an embodiment of the present invention may include an offset interference structure. For example, the offset interference structure may include a first reflective layer and a second reflective layer disposed on different layers. The first reflected light and the second reflected light respectively reflected from the first reflective layer and the second reflective layer may cancel each other, thereby reducing external light reflectance.

The window panel WP according to an embodiment of the present invention includes a base layer WP-BS and a light blocking pattern WP-BZ. The base layer (WP-BS) may include a glass substrate and / or synthetic resin film. The base layer (WP-BS) is not limited to a single layer. The base layer (WP-BS) may include two or more films combined with an adhesive member.

The light blocking pattern WP-BZ partially overlaps the base layer WP-BS. The light blocking pattern WP-BZ is disposed on the rear surface of the base layer WP-BS, and the light blocking pattern WP-BZ may substantially define a bezel area DD-NDA of the display device DD. The region where the light blocking pattern WP-BZ is not disposed may define an image region DD-DA of the display device DD. When limiting to the window panel WP, an area in which the light blocking pattern WP-BZ is disposed is defined as a light blocking area of the window panel WP, and an area in which the light blocking pattern WP-BZ is not disposed is a window panel (WP). WP).

The light blocking pattern WP-BZ may have a multi-layer structure. The multi-layer structure may include a colored color layer and a black light-shielding layer. The colored color layer and the black light-shielding layer may be formed through deposition, printing, and coating processes. Although not separately illustrated, the window panel WP may further include a functional coating layer disposed on the front surface of the base layer WP-BS. The functional coating layer may include an anti-fingerprint layer, an anti-reflection layer, and a hard coating layer. 2B to 2D referenced below, the window panel WP and the window layer WL are briefly illustrated without distinction between the base layer WP-BS and the light blocking pattern WP-BZ.

2B and 2C, the display device DD may include a display panel DP, an input sensing panel ISP, an anti-reflection panel (RPP), and a window panel WP. The stacking order of the input sensing panel (ISP) and the anti-reflection panel (RPP) may be changed.

As illustrated in FIG. 2D, the display device DD may include a display panel DP, an input sensing layer ISL, an antireflection layer (RPL), and a window layer WL. Compared to the display device DD shown in FIG. 2A, the adhesive members OCA are omitted, and the input sensing layer (ISL), the antireflection layer (RPL), and the window layer (on the base surface provided to the display panel DP) ( WL) was formed in a continuous process. The stacking order of the input sensing layer ISL and the anti-reflection layer RRP may be changed.

3A and 3B are cross-sectional views of a display panel DP according to an exemplary embodiment of the present invention.

3A, the display panel DP includes a base layer BL, a circuit element layer DP-CL disposed on the base layer BL, a display element layer DP-OLED, and an upper insulating layer (TFL). The display area DP-DA and the non-display area DP-NDA corresponding to the image area DD-DA and the bezel area DD-NDA shown in FIG. 1 may be defined on the display panel DP. . In this embodiment, that the regions and regions correspond to each other means that they overlap each other and are not limited to having the same area / shape.

The base layer BL may include at least one plastic film. The base layer BL may include a plastic substrate, a glass substrate, a metal substrate, or an organic / inorganic composite material substrate.

The circuit element layer DP-CL includes at least one insulating layer and circuit elements. The insulating layer includes at least one inorganic film and at least one organic film. The circuit element includes signal lines, a driving circuit of pixels, and the like. Detailed description thereof will be described later.

The display element layer DP-OLED includes at least organic light emitting diodes. The display element layer DP-OLED may further include an organic layer such as a pixel defining layer.

The upper insulating layer TFL includes a plurality of thin films. Some thin films are arranged to improve the optical efficiency, and some thin films are arranged to protect the organic light emitting diodes. Detailed description of the upper insulating layer (TFL) will be described later.

3B, the display panel DP includes a base layer BL, a circuit element layer DP-CL disposed on the base layer BL, a display element layer DP-OLED, and a sealing substrate ( ES) and a sealant SM that combines the base layer BL and the encapsulation substrate ES. The encapsulation substrate ES may be spaced apart from the display element layer DP-OLED with a predetermined gap GP. The base layer BL and the encapsulation substrate ES may include a plastic substrate, a glass substrate, a metal substrate, or an organic / inorganic composite substrate. The sealant SM may include an organic adhesive member or a frit. In this embodiment, the sealant SM is in contact with the circuit element layer DP-CL, but is not limited thereto. A portion of the circuit element layer DP-CL is removed, and the sealant SM may contact the base layer BL.

4 is a plan view of a display panel DP according to an exemplary embodiment. 5A is an enlarged cross-sectional view of a display panel DP according to an exemplary embodiment of the present invention. 5B is an enlarged cross-sectional view of an upper insulating layer (TFL) according to an embodiment of the present invention. The display panel DP of FIG. 5A is illustrated based on the display panel DP of FIG. 3A.

As shown in FIG. 4, the display panel DP includes a driving circuit GDC, a plurality of signal lines (SGL, hereinafter signal lines), a plurality of signal pads (DP-PD, hereinafter signal pads), and A plurality of pixels PX (hereinafter referred to as pixels) may be included.

The display area DP-DA may be defined as an area where pixels PX are disposed. Each of the pixels PX includes an organic light emitting diode and a pixel driving circuit connected thereto. The driving circuit GDC, the signal lines SGL, the signal pads DP-PD, and the pixel driving circuit may be included in the circuit element layer DP-CL shown in FIGS. 3A and 3B.

The driving circuit GDC may include a scanning driving circuit. The scan driving circuit generates a plurality of scan signals (hereinafter, scan signals) and sequentially outputs the scan signals to a plurality of scan lines (hereinafter, scan lines) that will be described later. The scan driving circuit may further output another control signal to the driving circuit of the pixels PX.

The scan driving circuit may include a plurality of thin film transistors formed through the same process as the driving circuit of the pixels PX, for example, a low temperature polycrystaline silicon (LTPS) process or a low temperature polycrystalline oxide (LTPO) process.

The signal lines SGL include scan lines GL, data lines DL, power line PL, and control signal line CSL. The scan lines GL are respectively connected to the corresponding pixel PX among the pixels PX, and the data lines DL are respectively connected to the corresponding pixel PX of the pixels PX. The power supply line PL is connected to the pixels PX. The control signal line CSL may provide control signals to the scan driving circuit.

The signal lines SGL overlap the display area DP-DA and the non-display area DP-NDA. The signal lines SGL may include a pad portion and a line portion. The line portion overlaps the display area DP-DA and the non-display area DP-NDA. The pad portion is disposed at the end of the line portion. The pad portion is disposed in the non-display area DP-NDA and overlaps the corresponding signal pad among the signal pads DP-PD. The area in which the signal pads DP-PD are disposed among the non-display area DP-NDA may be defined as a pad area DP-PA. A circuit board (not shown) may be connected to the pad area DP-PA.

The line portion substantially connected to the pixel PX constitutes most of the signal lines SGL. The line portion is connected to the transistors T1 and T2 of the pixel PX (see FIG. 5A). The line portion may have a single-layer / multi-layer structure, and the line portion may be a single body or may include two or more portions. Two or more parts may be disposed on different layers, and may be connected to each other through a contact hole passing through an insulating layer disposed between two or more parts.

5A shows a partial cross section of the display panel DP corresponding to the transistors T1 and T2 and the light emitting diode OLED. The circuit element layer DP-CL disposed on the base layer BL includes at least one insulating layer and circuit elements. Circuit elements include signal lines, driving circuits for pixels, and the like. The circuit element layer DP-CL may be formed through a process of forming an insulating layer, a semiconductor layer, and a conductive layer by coating or vapor deposition, and a patterning process of an insulating layer, a semiconductor layer, and a conductive layer by a photolithography process.

In this embodiment, the circuit element layer DP-CL includes a buffer film BFL, which is an inorganic film, a first inorganic film 10 and a second inorganic film 20, and may include an organic film 30. have. The buffer film BFL may include a plurality of stacked inorganic films. 5A, the first semiconductor pattern OSP1, the second semiconductor pattern OSP2, the first control electrode GE1, the second control electrode GE2, and the first semiconductor pattern constituting the switching transistor T1 and the driving transistor T2 are shown in FIG. The arrangement relation of the first input electrode DE1, the first output electrode SE1, the second input electrode DE2, and the second output electrode SE2 is exemplarily illustrated. The first to fourth through holes CH1 to CH4 are also illustratively illustrated.

The display element layer DP-OLED may include an organic light emitting diode (OLED). The display element layer DP-OLED includes a pixel defining layer PDL. For example, the pixel defining layer PDL may be an organic layer.

The first electrode AE is disposed on the organic layer 30. The first electrode AE is connected to the second output electrode SE2 through a fifth through hole CH5 penetrating the organic layer 30. The opening OP is defined in the pixel defining layer PDL. The opening OP of the pixel defining layer PDL exposes at least a portion of the first electrode AE. The opening OP of the pixel defining layer PDL is referred to as a light emitting opening to distinguish it from other openings.

As shown in FIG. 5A, the display area DP-DA may include a light emitting area PXA and a non-light emitting area NPXA adjacent to the light emitting area PXA. The non-emission area NPXA may surround the emission area PXA. In this embodiment, the emission area PXA is defined to correspond to a partial area of the first electrode AE exposed by the emission opening OP.

The hole control layer HCL may be commonly disposed in the emission area PXA and the non-emission area NPXA. The hole control layer (HCL) may include a hole transport layer, and may further include a hole injection layer. The emission layer EML is disposed on the hole control layer HCL. The emission layer EML may be disposed in a region corresponding to the emission opening OP. That is, the emission layer EML may be formed separately from each of the pixels. The emission layer EML may include organic materials and / or inorganic materials. The emission layer EML may generate a predetermined colored color light.

The electronic control layer ECL is disposed on the emission layer EML. The electron control layer (ECL) may include an electron transport layer, and may further include an electron injection layer. The hole control layer HCL and the electron control layer ECL may be commonly formed in a plurality of pixels using an open mask. The second electrode CE is disposed on the electronic control layer ECL. The second electrode CE has an integral shape and is commonly disposed in a plurality of pixels.

5A and 5B, an upper insulating layer TFL is disposed on the second electrode CE. The upper insulating layer TFL may include a plurality of thin films. As in this embodiment, the upper insulating layer TFL may include a capping layer CPL and a thin film encapsulation layer TFE. The thin film encapsulation layer TFE may include a first inorganic layer IOL1, an organic layer OL, and a second inorganic layer IOL2.

The capping layer CPL is disposed on the second electrode CE and contacts the second electrode CE. The capping layer CPL may include an organic material. The first inorganic layer IOL1 is disposed on the capping layer CPL and contacts the capping layer CPL. The organic layer OL is disposed on the first inorganic layer IOL1 and contacts the first inorganic layer IOL1. The second inorganic layer IOL2 is disposed on the organic layer OL and contacts the organic layer OL.

The capping layer CPL protects the second electrode CE from a subsequent process, such as a sputtering process, and improves light emission efficiency of the organic light emitting diode OLED. The capping layer CPL may have a larger refractive index than the first inorganic layer IOL1.

The first inorganic layer IOL1 and the second inorganic layer IOL2 protect the display element layer DP-OLED from moisture / oxygen, and the organic layer OL displays the display element layer DP-OLED from foreign substances such as dust particles. ). The first inorganic layer IOL1 and the second inorganic layer IOL2 may be any one of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer. In one embodiment, the first inorganic layer IOL1 and the second inorganic layer IOL2 may include a titanium oxide layer or an aluminum oxide layer. The organic layer OL may include an acrylic organic layer, but is not limited thereto.

In one embodiment of the present invention, an inorganic layer, such as a LiF layer, may be further disposed between the capping layer CPL and the first inorganic layer IOL1. The LiF layer may improve light emission efficiency of the light emitting device (OLED).

6A is a cross-sectional view of an input sensing layer (ISL) according to an embodiment of the present invention. 6B is a plan view of an input sensing layer (ISL) according to an embodiment of the present invention. 6C and 6D are partial cross-sectional views of an input sensing layer (ISL) according to an embodiment of the present invention. 6E is an enlarged plan view of area AA of FIG. 6B. 6A to 6E illustrate the input sensing layer (ISL) as an input sensing sensor.

As shown in FIG. 6A, the input sensing layer ISL includes a first insulating layer IS-IL1, a first conductive layer IS-CL1, a second insulating layer IS-IL2, and a second conductive layer ( IS-CL2), and a third insulating layer (IS-IL3). The first insulating layer IS-IL1 is directly disposed on the upper insulating layer TFL. In one embodiment of the present invention, the first insulating layer IS-IL1 may be omitted.

Each of the first conductive layer IS-CL1 and the second conductive layer IS-CL2 may have a single layer structure or a multilayer structure stacked along the third direction axis DR3. The multi-layered conductive layer may include at least two or more of transparent conductive layers and metal layers. The multi-layered conductive layer may include metal layers containing different metals. The transparent conductive layer may include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), PEDOT, metal nanowires, and graphene. The metal layer can include molybdenum, silver, titanium, copper, aluminum, and alloys thereof. For example, each of the first conductive layer IS-CL1 and the second conductive layer IS-CL2 may have a three-layer metal layer structure, for example, a titanium / aluminum / titanium three-layer structure.

Each of the first conductive layer IS-CL1 and the second conductive layer IS-CL2 includes a plurality of conductive patterns. Hereinafter, it is described that the first conductive layer IS-CL1 includes first conductive patterns, and the second conductive layer IS-CL2 includes second conductive patterns. Each of the first conductive patterns and the second conductive patterns may include sensing electrodes and signal lines connected thereto.

Each of the first insulating layer IS-IL1 to the third insulating layer IS-IL3 may include an inorganic material or an organic material. In this embodiment, the first insulating layer IS-IL1 and the second insulating layer IS-IL2 may be inorganic films containing inorganic materials. The inorganic film may include at least one of aluminum oxide, titanium oxide, silicon oxide silicon oxynitride, zirconium oxide, and hafnium oxide. The third insulating layer IS-IL3 may include an organic layer. The organic film may include at least one of acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, urethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin. It can contain.

In this embodiment, the second insulating layer IS-IL2 may cover the sensing area IS-DA, which will be described later. That is, the second insulating layer IS-IL2 may entirely overlap the sensing area IS-DA. Although not separately illustrated, in one embodiment of the present invention, the second insulating layer IS-IL2 may include a plurality of insulating patterns. The plurality of insulating patterns may be disposed for each crossing region of the sensing units SU to insulate the first sensing electrodes IE1-1 to IE1-10 and the second sensing electrodes IE2-1 to IE2-8. Can be.

As shown in FIG. 6B, the input sensing layer ISL includes a sensing area IS-DA and a wiring area corresponding to the display area DP-DA and the non-display area DP-NDA of the display panel DP. (IS-NDA). The sensing area IS-DA may be defined as an area in which the first electrode group EG1 and the second electrode group EG2, which will be described later, are disposed.

The input sensing layer ISL includes a first electrode group EG1, a second electrode group EG2, and signal line groups connected to the electrode groups EG1 and EG2. In this embodiment, an input sensing layer ISL including two signal line groups SG1 and SG2 is exemplarily illustrated. The first signal line group SG1 and the second signal line group SG2 are disposed in the wiring area IS-NDA.

In this embodiment, the input sensing layer (ISL) may be a capacitive touch sensor. One of the first electrode group EG1 and the second electrode group EG2 receives a driving signal, and the other is a power failure between the first electrode group EG1 and the second electrode group EG2 The amount of change in capacity is output as a sensing signal.

The first electrode group EG1 includes a plurality of first sensing electrodes IE1-1 to IE1-10. The first electrode group EG1 including ten first sensing electrodes IE1-1 to IE1-10 is exemplarily illustrated. The first sensing electrodes IE1-1 to IE1-10 have a shape extending in the second direction DR2. The first sensing electrodes IE1-1 to IE1-10 are arranged to move away from the pad regions PA1, PA2, and PA3 in the first direction DR1.

The second electrode group EG2 includes a plurality of second sensing electrodes IE2-1 to IE2-8. The second electrode group EG2 including eight second sensing electrodes IE2-1 to IE2-8 is exemplarily illustrated. The second sensing electrodes IE2-1 to IE2-8 have a shape extending in the first direction DR1. The second sensing electrodes IE2-1 to IE2-8 have a greater length than the first sensing electrodes IE1-1 to IE1-10.

The first signal line group SG1 may include the same number of first signal lines as the first sensing electrodes IE1-1 to IE1-10. The first signal lines are connected to only one end of both ends of the first sensing electrodes IE1-1 to IE1-10. The other end of both ends is electrically isolated without being connected to other conductive structures. Therefore, when the input sensing layer ISL operates, a current path flowing from one end to the other end of the first sensing electrodes IE1-1 to IE1-10 is not formed. The connection relationship between the signal line and the sensing electrode is called a single routing structure.

The second signal line group SG2 may include the same number of second signal lines as the second sensing electrodes IE2-1 to IE2-8. The second signal lines are connected to only one end of both ends of the second sensing electrodes IE2-1 to IE2-8. The second signal line group SG2 and the second sensing electrodes IE2-1 to IE2-8 have a single routing structure. In this embodiment, eight signal lines of the second signal line group SG2 are shown connected to the lower ends of the sensing electrodes IE2-1 to IE2-8, respectively.

In this embodiment, the first signal lines can be divided into two groups again. One group may be defined as one signal line group SG1-1 and the other may be defined as the other signal line group SG1-2. One signal line group SG1-1 is connected to some of the first sensing electrodes IE1-1 to IE1-10, and the other signal line group SG1-2 is the first sensing electrodes IE1-1 to IE1-10). The one signal line group SG1-1 and the other signal line group SG1-2 are spaced apart in the second direction DR2 with the sensing area IS-DA interposed therebetween. The width of the wiring area IS-NDA may be narrowed by disposing the first signal lines on both sides.

One signal line group SG1-1 may be electrically connected to odd-numbered sensing electrodes or even-numbered sensing electrodes among the first sensing electrodes IE1-1 to IE1-10. The other signal line group SG1-2 may be connected to sensing electrodes to which one signal line group SG1-1 is not connected. In this embodiment, the five signal lines of the one-side signal line group SG1-1 are shown to be connected to the right ends of the even-numbered first sensing electrodes, respectively.

The signal lines (hereinafter, first signal lines) of the first signal line group SG1 and the signal lines (hereinafter, second signal lines) of the second signal line group SG2 are pad units PD. And it may include a line portion (LP). The pad portion PD is a portion disposed in the pad regions PA1, PA2, and PA3 and is a portion connected to the circuit board. The circuit board connected to the pad regions PA1, PA2 and PA3 may be mounted on a sensing circuit or connected to a circuit board on which the sensing circuit is mounted.

The first sensing electrodes IE1-1 to IE1-10 and the second sensing electrodes IE2-1 to IE2-8 intersect with each other. Bridge patterns (hereinafter, first bridge patterns) are disposed in the crossing regions. In this embodiment, the first bridge patterns may constitute a part of the first sensing electrodes IE1-1 to IE1-10 having a relatively short length. Since the first bridge patterns are formed on the first sensing electrodes IE1-1 to IE1-10, the equivalent resistance of the input sensing layer ISL is reduced, which improves sensing sensitivity. Detailed description thereof will be described later.

Each of the first sensing electrodes IE1-1 to IE1-10 may include a plurality of first sensor parts SP1 and a plurality of first connection parts CP1. The first sensor parts SP1 are arranged along the second direction DR2. Each of the first connection parts CP1 connects two adjacent first sensor parts SP1 among the first sensor parts SP1.

Each of the second sensing electrodes IE2-1 to IE2-8 includes a plurality of second sensor parts SP2 and a plurality of second connection parts CP2. The second sensor parts SP2 are arranged along the first direction DR1. Each of the second connection parts CP2 connects two adjacent second sensor parts SP2 among the second sensor parts SP2.

6B shows an embodiment in which the first connection portion CP1 intersects with the second connection portion CP2. In this embodiment, the first connection part CP1 may correspond to the first bridge pattern.

6C, the plurality of first connection parts CP1 are formed from the first conductive layer IS-CL1, and the plurality of first sensor parts SP1 and the plurality of second sensor parts SP2. , And the plurality of second connection parts CP2 may be formed from the second conductive layer IS-CL2. The first sensor parts SP1 and the first connection part CP1 may be connected through the contact holes CNT-I passing through the second insulating layer IS-IL2.

In this embodiment, the plurality of first connecting portions CP1 and the plurality of second connecting portions CP2 are illustrated as crossing each other, but are not limited thereto. For example, each of the first connecting portions CP1 may be deformed into a curved line of “∧” and / or a curved line of “∨” so as not to overlap with the second connecting parts CP2. The first connection parts CP1 in the form of a curved line of “∧” and / or a curved line of “∨” may overlap the second sensor parts SP2 on a plane.

Referring to FIG. 6B, the sensing area IS-DA may be divided into a plurality of sensing units SU. According to the present embodiment, the entire sensing area IS-DA is divided into first sensing units S1 and second sensing units S2, but is not limited thereto.

The plurality of sensing units SU have the same area. Each of the plurality of sensing units SU includes a corresponding crossing area among crossing areas of the first sensing electrodes IE1-1 to IE1-10 and the second sensing electrodes IE2-1 to IE2-8. do. The crossing area is an area where the first bridge pattern is disposed. In this embodiment, the sensing area IS-DA may be divided into 8x10 matrix sensing units SU.

6D, two signal lines SG1-14 and SG1-15 of the first signal line group SG1 are shown. The signal lines of the first signal line group SG1 and the second signal line group SG2 include at least portions disposed on the same layer as the second sensing electrodes IE2-1 to IE2-8. The signal lines of the first signal line group SG1 and the second signal line group SG2 may be formed from the second conductive layer (IS-CL2, see FIG. 6A).

The signal lines of the first signal line group SG1 and the second signal line group SG2 may further include a portion formed from the first conductive layer IS-CL1 (see FIG. 6A). The portion formed from the second conductive layer IS-CL2 and the portion formed from the first conductive layer IS-CL1 may be connected through contact holes passing through the second insulating layer IS-IL2. The signal line of the two-layer structure may have low resistance.

The first sensing electrodes IE1-1 to IE1-10 and the second sensing electrodes IE2-1 to IE2-8 may have a mesh shape. 6E, the mesh-shaped first sensor part SP1 is exemplarily illustrated.

Three types of openings OP-MG, OP-MR, and OP-MB are defined in the first sensor unit SP1. The three types of openings OP-MG, OP-MR, and OP-MB correspond to three types of light-emitting openings OP-G, OP-R, and OP-B. The three types of light emission openings OP-G, OP-R, and OP-B are defined to be the same as the light emission opening OP of the pixel definition layer PDL illustrated in FIG. 5A.

The three types of light emitting openings OP-G, OP-R, and OP-B are divided according to an area, and the first type of opening OP-G, the second type of opening OP-R, and The area of the third type of opening OP-B is proportional to the light emitting area of the corresponding pixel.

7A is an enlarged plan view of a sensing unit SU according to an embodiment of the present invention. 7B is an enlarged plan view of a crossing area of a sensing unit SU according to an embodiment of the present invention. 7C is an equivalent circuit diagram of an input sensing sensor according to an embodiment of the present invention. 7D is a waveform diagram of a drive signal according to an embodiment of the present invention. 7E is a graph showing a characteristic of 1 db bandwidth according to the structure of the input sensor. Detailed description of the configuration described with reference to FIGS. 1 to 6E is omitted.

The sensing unit SU of FIG. 7A may correspond to the sensing unit SU of FIG. 6B. In the sensing unit SU, another half of the first sensor part SP1 is disposed between the first sensor part SP1 and the first connection part CP1. In the sensing unit SU, another half of the second sensor unit SP2 is disposed between the second sensor unit SP2 and the second connection unit CP2. As illustrated in FIG. 7A, two first connection parts CP1 may be disposed. Each of the two first connection parts CP1 may be a first bridge pattern.

Referring to FIG. 7B, the two first connection units CP1 connect the two first sensor units SP1 spaced apart. First to fourth connection areas CNT-A1 to CNT-A4 are formed between the two first connection parts CP1 and the two first sensor parts SP1.

Four contact holes CNT-I may be formed in each of the first to fourth connection regions CNT-A1 to CNT-A4. The first connection region CNT-A1 and the second connection region CNT-A2 are formed around the second emission region PXA-B, and the third connection region CNT-A3 and the fourth connection region ( CNT-A4) may be formed around the first emission region PXA-R. - Need to be confirmed

The first connection part CP1 intersects the mesh line of the second sensor part SP2. The first connection part CP1 may partially replace the mesh line of the second sensor part SP2 within the crossing area. The mesh line of the first connection portion CP1 and the mesh line of the second sensor portion SP2 may not overlap except for intersection points. The mesh lines of the first connection part CP21 and the mesh lines of the second sensor part SP2 complement each other, such that the first openings OP-MR, the second openings OP-MB, and the third openings ( OP-MG) can be defined as an opening.

7C shows an equivalent circuit of the input sensing sensor between the driving circuit 210 and the sensing circuit 220. FIG. 7C is based on a reference capacitance Cse formed in an intersection region of one first sensing electrode and one second sensing electrode. In addition, a driving signal Sdr is applied to the second sensing electrode through the second signal line in this embodiment. Although the pad portion PD2 of the second signal line and the pad portion PD1 of the first signal line are shown in FIG. 7C, they have no special meaning in an equivalent circuit.

The driving circuit 210 may sequentially provide a driving signal Sdr to the second sensing electrodes IE2-1 to IE2-8 (see FIG. 6B). The sensing signals Sse corresponding to the driving signal Sdr passing through the reference capacitance Cse are respectively output through the first sensing electrodes IE1-1 to IE1-10. The detection signal Sse is input to the detection circuit 220.

The sensing circuit 220 amplifies, converts, and processes the sensing signal Sse, and detects an external input according to the result. The sensing circuit 220 may include a sensing channel 222, an analog-to-digital converter 224 (ADC), and a processor 226. The sensing channel 222 may be formed for each of the first sensing electrodes IE1-1 to IE1-10. A plurality of sensing channels 222 may be connected to the same ADC 224.

In this embodiment, the sensing channel 222 may include an amplifier AMP1, such as an OP amplifier. The first input terminal IN1 of the amplifier AMP1, for example, the inverting input terminal of the OP amplifier may receive the detection signal Sse. In addition, the second input terminal IN2 of the amplifier AMP1, for example, the non-inverting input terminal of the OP amplifier is a reference potential terminal, and for example, may receive a reference voltage such as a ground (GND) voltage. A capacitor CC and a reset switch SW may be connected in parallel between the first input terminal IN1 and the output terminal OUT1 of the amplifier AMP1.

The ADC 224 converts an analog signal input from the sensing channel 222 into a digital signal. The processor 226 processes the converted signal (digital signal) from the ADC 224 and detects a touch input according to the signal processing result. For example, the processor 226 comprehensively analyzes a signal (amplified and converted detection signal Sse) input from the plurality of detection electrodes via each detection channel 222 and the ADC 224, and then inputs the external signal. It can detect whether or not and its location. The processor 226 may be implemented as a microprocessor (MPU). In this case, the sensing circuit 220 may further include a memory required for driving the processor 226. In one embodiment of the present invention, the processor 226 may be implemented as a microcontroller.

In this embodiment, the driving circuit 210 and the sensing circuit 220 are illustrated separately, but are not limited thereto. The driving circuit 210 and the sensing circuit 220 may be integrated in one chip.

Referring to FIG. 7C, the first resistor R-L2 and the second resistor R-E2 are connected in series between the pad portion PD2 of the second signal line and the reference capacitance Cse. The first resistor R-L2 is the equivalent resistance of the second signal line, and the second resistor R-E2 is the equivalent resistance of the second sensing electrode. The first parasitic capacitance C-L2 and the second parasitic capacitance C-E2 are connected between the pad portion PD2 of the second signal line and the capacitance Cse. The first parasitic capacitance C-L2 is the capacitance between the second signal line and the second electrode CE (see FIG. 5A), and the second parasitic capacitance C-E2 is the second sensing electrode and the second electrode CE ).

In addition, a third resistor R-L1 and a fourth resistor R-E1 are connected in series between the pad portion PD1 of the first signal line and the reference capacitance Cse. The third resistor R-L1 is the equivalent resistance of the first signal line, and the fourth resistor R-E1 is the equivalent resistance of the first sensing electrode. The third parasitic capacitance C-L1 and the fourth parasitic capacitance C-E1 are connected between the pad portion PD1 of the first signal line and the capacitance Cse. The third parasitic capacitance C-L1 is the capacitance between the first signal line and the second electrode CE, and the fourth parasitic capacitance C-E1 is the first sensing electrode and the second electrode CE, see FIG. 5A. ).

Cm)을 측정할 수 있다. 감지신호(Sse)의 전류 변화를 감지하여 커패시턴스 변화량(

Cm)을 측정할 수 있다.When a touch event occurs, a change occurs in the reference capacitance Cse of the corresponding point. When a touch event occurs, a touch capacitance connected in parallel with the reference capacitance Cse is formed. Processor 226 is the amount of change in capacitance that occurs between before and after the occurrence of the touch event from the detection signal (Sse) (

Cm) can be measured. Amount of change in capacitance by sensing the current change in the sensing signal (Sse)

Cm) can be measured.

7D shows a waveform of a sinusoidal signal as a drive signal. The first graph GP1 of FIG. 7E shows the 1 decibel bandwidth characteristic of the input sensing sensor according to the present embodiment, and the second graph GP2 shows the 1 decibel bandwidth characteristic of the input sensing sensor according to the comparative example. FIG. 7E measures 1 decibel bandwidth characteristics from the detection signal corresponding to the driving signal shown in FIG. 7D. The x-axis in FIG. 7e is shown on a log scale.

Eight sensing units (SU, see FIG. 6B) are arranged in the sensing unit row, and one decibel bandwidth characteristic is measured based on an input sensing sensor in which 17 sensing units are arranged in the sensing unit column. According to this embodiment, as illustrated in FIGS. 6B to 7B, the second sensing electrode has an integral shape, and first bridge patterns are disposed on the first sensing electrode. According to the comparative example, the first sensing electrode has an integral shape, and the first bridge patterns are disposed on the second sensing electrode.

Based on the equivalent circuit corresponding to FIG. 7C, according to this embodiment, eight first bridge patterns are included, and according to a comparative example, seventeen first bridge patterns are included. The combined resistance of the second resistor (R-E2) and the fourth resistor (R-E1) according to this embodiment was measured to be about 649 ohms, and the second resistor (R-E2) and the fourth resistor ( The synthetic resistance of R-E1) was measured to have about 692 ohms. The synthetic resistance is low in this embodiment compared to the comparative example because it includes less first bridge patterns with large contact resistance. In the comparative example to this embodiment, the first resistor (R-L2), the third resistor (R-L1), the first to fourth parasitic capacitances (C-L2, C-E2, C-L1, C- E1) is substantially the same.

The 1 decibel bandwidth of the first graph GP1 was measured at 340k, and the 1 decibel bandwidth of the second graph GP2 was measured at 290k. According to the present embodiment, since the synthetic resistance is relatively low compared to the comparative example, the 1 decibel bandwidth characteristic is good and has a wider AC signal bandwidth. As the bandwidth of the AC signal is widened, the sensing sensitivity of the input sensing sensor using a sinusoidal signal as a driving signal can be improved.

8A is a plan view of an input detection sensor IS according to an embodiment of the present invention. 8B is an enlarged plan view of a portion of FIG. 8A. 8C is an enlarged plan view of a crossing area according to an embodiment of the present invention. 8D is a plan view of an input detection sensor IS according to an embodiment of the present invention. Hereinafter, detailed descriptions of the same components as those described with reference to FIGS. 6A to 7E will be omitted.

As shown in FIG. 8A, the input sensing sensor IS is disposed inside the first sensor parts SP1, and the first dummy patterns FP1 and the second sensor are insulated from the first sensor parts SP1. The second dummy patterns FP2 may be further disposed on the inside of the portions SP2 and insulated from the second sensor portions SP2. The first dummy patterns FP1 and the second dummy patterns FP2 are parasitic capacitances between the input sensing sensor IS and the display panel (eg, see FIG. 6A), for example, the second parasitic capacitances C- of FIG. 7C. E2) and the fourth parasitic capacitance (C-E1). As the parasitic capacitance is reduced, the sensing sensitivity of the input sensing sensor IS can be improved.

The input detection sensor IS may further include bridge patterns BP (hereinafter, second bridge patterns) connecting the first dummy patterns FP1. The second bridge patterns BP may be formed from the first conductive layer CL1 illustrated in FIG. 6A. The second bridge patterns BP are disposed to correspond to the crossing area. The second bridge patterns BP may overlap the second sensor part SP2. The second bridge patterns BP may be disposed on the same layer as the first bridge patterns CP1 (see FIG. 7B).

As illustrated in FIG. 8A, the input detection sensor IS may further include a dummy signal line GSL. The dummy signal line GSL may receive a predetermined bias voltage, for example, a ground voltage. The dummy signal line GSL may be connected to the first dummy patterns FP1. The dummy signal line GSL may be formed from the second conductive layer CL2 illustrated in FIG. 6A.

In one embodiment of the present invention, the dummy signal line GSL may be connected to the sensing circuit 220 (see FIG. 7C). It may be electrically connected to the second input terminal IN2 of the amplifier AMP1 (see FIG. 7C). In this case, the first dummy patterns FP1 may have a function of noise detection. The sensing signal Sse may be processed by reflecting noise applied to the first dummy patterns FP1.

8B, a part of the four first sensing electrodes IE1-2 to IE1-5 and the rightmost second sensing electrode IE2-8 are enlarged. The dummy signal line GSL may be electrically connected to the first dummy patterns FP1 disposed inside the odd-numbered first sensing electrodes IE1-3 and IE1-5. The dummy signal line GSL may be directly connected to the first dummy pattern FP1 disposed on the outermost side of the first dummy patterns FP1 in the second direction DR2. In one embodiment, the dummy signal line GSL may be connected to the first dummy pattern FP1 through a bridge pattern.

As illustrated in FIG. 8B, at least one of the first dummy patterns FP1 includes extensions disposed on both sides of the central portion FP1-10 in the central portion FP1-10 and the second direction DR2. FP1-20, FP1-30). Each of the extension parts FP1-20 and FP1-30 is connected to a corresponding second bridge pattern BP. The first dummy patterns FP1 disposed at both ends in the second direction DR2 among the first dummy patterns FP1 may have a different shape from other first dummy patterns FP1. The first dummy patterns FP1 disposed at the aforementioned ends may include only a central portion and one extension portion disposed at one side of the central portion.

As illustrated in FIG. 8B, the input detection sensor IS may further include bridge patterns (BP-S, hereinafter, third bridge patterns) insulated from the dummy signal line GSL. The third bridge patterns BP-S may connect the first sensing electrodes IE1-3 and IE1-5 and the signal lines SG1-11 and SG1-12. The third bridge patterns BP-S may be formed from the first conductive layer IS-CL1 shown in FIG. 6A.

8C is an enlarged view of one crossing area according to an embodiment of the present invention. 8C shows the area corresponding to FIG. 7B. According to FIG. 8B, unlike the ones illustrated in FIGS. 8A and 8B, two second bridge patterns BP are disposed in the crossing area. The second bridge patterns BP may be disposed to correspond to the first bridge patterns CP1.

The two second bridge patterns BP may be disposed outside the two first bridge patterns CP1. The second bridge patterns BP have a greater length than the first bridge patterns CP1. Four connection regions may be formed between the two second bridge patterns BP and the two first dummy patterns FP1. Four contact holes CNT-I may be disposed in each of the four connection areas.

As illustrated in FIG. 8D, a plurality of dummy signal lines GSL may be provided. The same number of dummy signal lines GSL as the first sensing electrodes IE1-1 to IE1-10 may be disposed. Each of the dummy signal lines GSL may be connected to a first dummy pattern FP1 adjacent to the corresponding first sensing electrode. The dummy signal lines GSL may be connected to the sensing channels 222 corresponding to the first sensing electrodes IE1-1 to IE1-10 and the second input terminal IN2 of the amplifier AMP1.

9A is a plan view of an input sensing layer (ISL) according to an embodiment of the present invention. 9B is a partial cross-sectional view of an input sensing layer (ISL) according to an embodiment of the present invention. 7C is an equivalent circuit diagram of an input sensing layer (ISL) according to an embodiment of the present invention. Detailed description of the configuration described with reference to FIGS. 1 to 8D is omitted.

The input sensing layer ISL according to the present embodiment further includes a third signal line group SG3 compared to the input sensing layer ISL described with reference to FIG. 6B. In addition, the connection relationship of the first signal line group SG1 and the second signal line group SG2 to the first electrode group EG1 and the second electrode group EG2 is different.

In this embodiment, the right ends of the first sensing electrodes IE1-1 to IE1-10 are connected to the signal lines of the first signal line group SG1. The lower ends of the second sensing electrodes IE2-1 to IE2-8 are connected to the signal lines of the second signal line group SG2. The upper ends of the second sensing electrodes IE2-1 to IE2-8 are connected to the signal lines of the third signal line group SG3. Both ends of the second sensing electrodes IE2-1 to IE2-8 are connected to the signal line. The connection relationship between the signal line and the sensing electrode is called a double routing structure.

Further, according to the present embodiment, the first bridge pattern is applied to the second long sensing electrodes IE2-1 to IE2-8. That is, the second connection part CP2 may correspond to the first bridge pattern. Each of the first sensing electrodes IE1-1 to IE1-10 may have an integral shape.

As shown in FIG. 9B, the first sensor parts SP1 and the first connection part CP1 are disposed on the same layer and can form a single body. The first sensor parts SP1 and the first connection part CP1 are formed through the same process from the second conductive layer CL2 shown in FIG. 6A. Although not separately illustrated, the second connection part CP2 may connect the second sensor parts SP2 through the contact holes CNT-I penetrating the second insulating layer IS-IL2.

Referring to the equivalent circuit of FIG. 9C, the driving signal Sdr is provided to both ends of the second sensing electrode through the signal lines of the first signal line and the third signal line group SG3 (hereinafter, the third signal line). .

The second resistor R-E21 of the double lighting structure is smaller than the second resistor R-E2 of FIG. 7C. This is because the second resistor R-E21 is a resistor corresponding to a portion of the second sensing electrode. In comparison, the fifth resistor R-L3 and the sixth resistor R-E22 connected in parallel to the first resistor R-L2 and the second resistor R-E21 are further included. The fifth resistor R-L3 is the equivalent resistance of the third signal line. The sixth resistor R-E22 is a resistor corresponding to a portion of the second sensing electrode, and the combined resistance of the second resistor R-E21 and the sixth resistor R-E22 is the second resistor R- of FIG. 7C. E2).

In FIG. 9C, the fifth parasitic capacitance C-L3 is the capacitance between the third signal line and the second electrode CE (see FIG. 5A), and the sixth parasitic capacitance C-E22 is the second sensing electrode. It is the capacitance between the part and the second electrode CE. The second parasitic capacitance C-E21 is smaller than the second parasitic capacitance C-E2 of FIG. 7C because it is the capacitance between the other part of the second sensing electrode and the second electrode CE.

In FIG. 9C, the second resistor R-E21 and the sixth resistor R-E22 are relative in order to have a low combined resistance between the pad portion PD2 of the second signal line and the reference capacitance Cse. It is advantageous to have a large value. As illustrated in FIGS. 9A and 9B, the second resistor R-E21 and the sixth resistor R-E22 may be relatively increased by applying the first bridge pattern to the second connection portion CP2. In addition, since the first sensing electrode has an integral shape, the fourth resistor R-E1 can be lowered. As a result, it is possible to improve the bandwidth characteristics of the input sensing layer (ISL) having a double routing structure by lowering the overall synthesis resistance.

10A is a perspective view of a display module DM according to an embodiment of the present invention. 10B is a plan view of an input sensing layer (ISL) according to an embodiment of the present invention. 11A is a perspective view of a display module DM according to an embodiment of the present invention. 11B is a plan view of an input sensing layer (ISL) according to an embodiment of the present invention. Hereinafter, detailed descriptions of the same components as those described with reference to FIGS. 1 to 9C will be omitted.

As shown in FIG. 10A, the display module DM is defined with a notched area NTA concave inward on a plane. The notch area NTA is defined in each of the display panel DP and the input sensing layer ISL, but each notch area NTA is not necessarily the same. The notched region NTA may be defined in the central region in the second direction DR2. However, the notch area NTA is not limited to be arranged at the center.

10B, shapes of the first electrode group EG1 and the second electrode group EG2 may be modified by the notch region NTA. The arrangement and arrangement of the first signal line group SG1 and the second signal line group SG2 may be substantially the same as those of the input sensing layer ISL of FIG. 6B.

As shown in FIG. 10B, since the notched region NTA is formed, the tenth electrode IE1-10 may be divided into two parts. The two parts may be connected by a dummy connection line DSL. The fourth to sixth electrodes IE2-4 to IE2-6 of the second electrode group EG2 may have a smaller length than other electrodes.

As shown in FIG. 11A, the display module DM has a signal transmission area HA defined on a plane. A portion of each of the display panel DP and the input sensing layer ISL is partially or completely removed to define a signal transmission region HA. The signal transmission region HA may also be divided into a region having a first transmittance and a region having a second transmittance lower than the first transmittance. For example, in the region having the second transmittance, any one of the display panel DP and the input sensing layer ISL is removed, and in the region having the first transmittance, both the display panel DP and the input sensing layer ISL are removed. Can be. For example, in the region having the second transmittance, the light emitting element of the display panel DP may be partially removed, and in the region having the first transmittance, the light emitting element of the display panel DP may be completely removed.

The signal transmission area HA of the display panel DP and the input sensing layer ISL is not necessarily the same. The signal transmission area HA may be a movement path of the optical signal. A plurality of signal transmission areas HA may be defined in the display module DM.

The signal transmission area HA of the display panel DP includes a base layer BL, a circuit element layer DP-CL disposed on the base layer BL, a display element layer DP-OLED, and an upper insulating layer ( TFL) is formed by removing at least a portion. The signal transmission area HA of the input sensing layer ISL may be an area in which the sensor units SP1 and SP2 are removed.

11B, shapes of the first electrode group EG1 and the second electrode group EG2 may be modified by the signal transmission region HA. The arrangement and arrangement of the first signal line group SG1 and the second signal line group SG2 may be substantially the same as that of the input sensing layer ISL of FIG. 6B.

The signal transmission region HA of the input sensing layer ISL may be disposed at the crossing region of the first electrode group EG1 and the second electrode group EG2. In this case, a dummy connection line (not shown) may be disposed around the hole area HA of the input sensing layer ISL. For example, the dummy connection line may connect the electrodes of the first electrode group EG1 and the second electrode group EG2 that are disconnected by bypassing the signal transmission area HA.

Although described above with reference to the preferred embodiment of the present invention, those skilled in the art or those skilled in the art will depart from the spirit and technical scope of the invention described in the claims below. It will be understood that various modifications and changes can be made to the present invention without departing from the scope. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

FP1: first dummy pattern
FP2: Second dummy pattern
OP-MB: Second opening
OP-MG: 3rd opening
OP-MR: First opening
PXA-B: Second emission area
PXA-G: Third emission area
PXA-R: first emission region
SU: Sensing unit
EG: sensing electrode group
SG: Signal line group

Claims (20)

Display panel; And
An input sensing sensor disposed on the display panel and including a sensing area and a wiring area outside the sensing area,
The input detection sensor,
Signal line groups arranged in the wiring area; And
Arranged in the sensing region, one end of both ends includes first sensing electrodes and second sensing electrodes electrically connected to corresponding signal lines of the signal line groups,
The second sensing electrodes have a greater length than the first sensing electrodes,
The signal line groups include a first signal line group electrically connected to the first sensing electrodes and a second signal line group electrically connected to the second sensing electrodes,
Each of the first sensing electrodes overlaps the second sensing electrodes and includes first bridge patterns disposed on a different layer from the second sensing electrodes,
A display device for receiving a sinusoidal signal from electrodes of any one of the first sensing electrodes and the second sensing electrodes. According to claim 1,
A display device for providing a detection signal corresponding to the sinusoidal wave signal to the detection circuit, the other group of electrodes of the first detection electrode and the second detection electrode. According to claim 1,
Each of the second sensing electrodes has a display device having an integral shape. According to claim 1,
The display panel includes a display area corresponding to the sensing area and a non-display area corresponding to the wiring area,
The display area includes light emitting areas and a non-light emitting area,
Each of the first sensing electrodes is a display device in which openings corresponding to the emission regions are defined. According to claim 1,
The corresponding signal line of the signal line groups includes at least a portion disposed on the same layer as the second sensing electrodes. According to claim 1,
The input sensing sensor further includes an insulating layer disposed between the first bridge patterns and the second sensing electrodes,
The insulating layer is a display device covering the sensing area. According to claim 1,
The first signal line group,
Signal lines electrically connected to odd-numbered sensing electrodes among the first sensing electrodes; And
And other signal lines electrically connected to even-numbered sensing electrodes among the first sensing electrodes,
The one signal line and the other signal line are a display device spaced apart from the sensing area in the extending direction of the first sensing electrodes. According to claim 1,
The input detection sensor,
First dummy patterns disposed inside each of the first sensing electrodes; And
A display device further comprising second dummy patterns disposed inside each of the second sensing electrodes. The method of claim 8,
The input sensing sensor further includes second bridge patterns connecting the first dummy patterns. The method of claim 9,
At least one of the first dummy patterns,
center; And
In the extension direction of the first sensing electrodes, includes extensions arranged on both sides of the center,
Each of the extensions is a display device connected to a corresponding second bridge pattern among the second bridge patterns. The method of claim 9,
The display device in which the first bridge patterns and the second bridge patterns are disposed on the same layer. The method of claim 9,
The second bridge patterns are arranged to correspond to the first bridge patterns,
The second bridge patterns have a greater length than the corresponding first bridge pattern among the first bridge patterns. The method of claim 9,
The input sensing sensor further includes a dummy signal line connected to a first dummy pattern disposed on the outermost side of the first dummy patterns in the extending direction of the first sensing electrodes. The method of claim 13,
The input sensing sensor further includes third bridge patterns insulated from the dummy signal line,
The third bridge patterns are display devices connecting the first sensing electrodes to the signal lines of the first signal line group. According to claim 1,
A display device in which a notch area concave in a plane is defined on the display device. According to claim 1,
The display panel includes a base layer, a circuit element layer disposed on the base layer, a display element layer disposed on the circuit element layer, and an upper insulating layer disposed on the display element layer,
A display device in which a signal transmission region in which at least a portion of the base layer, the circuit element layer, the display element layer, and the upper insulating layer is removed is defined on the display panel. Display panel; And
It includes an input detection sensor disposed on the upper side of the display panel,
The input detection sensor,
A first sensing electrode; And
And a second sensing electrode crossing the first sensing electrode and longer than the first sensing electrode,
The first sensing electrode includes sensor parts disposed on the same layer as the second sensing electrode and bridge patterns disposed on a different layer from the second sensing electrode, and any one of the bridge patterns is a bridge pattern. Overlapping the second sensing electrode,
A display device for receiving a sinusoidal signal through one end of both ends of either one of the first sensing electrode and the second sensing electrode. Display panel; And
It includes an input detection sensor disposed on the upper side of the display panel,
The input detection sensor,
Insulating layer;
A first sensing electrode; And
A second sensing electrode having an integral shape longer than the first sensing electrode and crossing the first sensing electrode,
The first sensing electrode includes first portions disposed above the insulating layer and second portions disposed below the insulating layer and connected to the first portions through contact holes passing through the insulating layer,
A display device for receiving a sinusoidal signal through one end of both ends of either one of the first sensing electrode and the second sensing electrode. The method of claim 18,
The second sensing electrode is a display device having an integral shape on the insulating layer. The method of claim 18,
One end of the second sensing electrode is connected to a signal line, the other end is electrically isolated display device.

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