KR20200034821A - Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and mehtod for receiving broadcast signals - Google Patents

Abstract

In a method and apparatus for transmitting broadcast signals, the apparatus for transmitting broadcast signals according to an embodiment of the present invention includes a plurality of data pipes (DPs) for transmitting at least one input stream or at least one service or service component, respectively An input formatter for formatting DP data corresponding to, an encoder for encoding the DP data, a mapper for mapping the encoded DP data to constellations, a time interleaver for time interleaving the mapped DP data, and the time interleaved A frame builder for generating at least one signal frame including DP data, a modulator for modulating data in the generated at least one signal frame in an orthogonal frequency division multiplex (OFDM) method, and a broadcast signal including the modulated data It may include a transmission unit for transmitting the.

Description

Broadcast signal transmission device, broadcast signal reception device, broadcast signal transmission method and broadcast signal reception method {Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and mehtod for receiving broadcast signals}

The present invention relates to a broadcast signal transmitting apparatus for transmitting broadcast signals, a broadcast signal receiving apparatus for receiving broadcast signals, and a method for transmitting and receiving broadcast signals.

As the point of interruption of transmission of an analog broadcast signal approaches, various technologies for transmitting and receiving a digital broadcast signal have been developed. The digital broadcast signal may include a large amount of video / audio data compared to the analog broadcast signal, and may include various additional data in addition to the video / audio data.

That is, the digital broadcasting system for digital broadcasting can provide HD (High Definition) -class video, multi-channel sound, and various additional services. However, data transmission efficiency for high-capacity data transmission, robustness of a transmission / reception network, and flexibility of a network considering mobile reception equipment are still challenges to be improved.

Accordingly, an object of the present invention is a broadcast signal transmission device capable of transmitting and receiving broadcast signals for a next generation broadcast service, a broadcast signal receiving device, and a method for transmitting and receiving broadcast signals for a next generation broadcast service. To provide.

An object of the present invention is a broadcast signal transmission apparatus and a broadcast signal transmission method capable of multiplexing data of a broadcast transmission / reception system providing two or more different broadcast services in a time domain and transmitting it through the same RF signal bandwidth. It is to provide a corresponding broadcast signal receiving apparatus and a broadcast signal receiving method.

Another object of the present invention is to classify data corresponding to a service for each component and transmit data corresponding to each component through a separate data pipe (hereinafter referred to as DP), and receive and process the data. It is to provide a signal transmitting apparatus, a broadcast signal receiving apparatus, and a method of transmitting and receiving a broadcast signal.

Another object of the present invention is to provide a broadcast signal transmitting apparatus, a broadcast signal receiving apparatus, and a method of transmitting and receiving a broadcast signal, signaling signaling information necessary to service a broadcast signal.

A broadcast signal transmission method according to an embodiment of the present invention for achieving the above object is divided into at least one input stream into DP data having data packets, and the data according to a header compression mode (header compression mode) Formatting the at least one input stream into DP data corresponding to each of a plurality of data pipes (DPs) transmitting at least one service or service component, the method comprising compressing the header of each packet. Encoding DP data, mapping the encoded DP data to constellations, time interleaving the mapped DP data, and generating at least one signal frame including the time interleaved DP data Step, within the generated at least one signal frame Modulating the data to OFDM (Orthogonal Frequency Division Multiplex) scheme, and it may include the modulated data.

In the present invention, by processing data according to characteristics of a service in order to provide various broadcast services, QoS can be adjusted for each service or service component.

The present invention can ensure flexibility in transmission by transmitting various broadcast services through the same RF signal bandwidth.

The present invention can increase data transmission efficiency and increase robustness of broadcast signal transmission and reception by using a MIMO system.

Accordingly, according to the present invention, it is possible to provide a method and apparatus for transmitting and receiving a broadcast signal that can receive a digital broadcast signal without error even in a mobile reception device or indoor environment.

1 is a view showing the structure of a transmission device for a next generation broadcast service according to an embodiment of the present invention.
2 is a view showing an input formatting module according to an embodiment of the present invention.
3 is a view showing an input formatting module according to another embodiment of the present invention.
4 is a view showing an input formatting module according to another embodiment of the present invention.
5 is a diagram illustrating a coding and modulation module according to an embodiment of the present invention.
6 is a view showing a frame structure module according to an embodiment of the present invention.
7 is a view showing a waveform generation module according to an embodiment of the present invention.
8 is a diagram showing the structure of a receiving device for a next generation broadcast service according to an embodiment of the present invention.
9 is a view showing a synchronization and demodulation module according to an embodiment of the present invention.
10 is a view showing a frame parsing module according to an embodiment of the present invention.
11 is a diagram illustrating a demapping & decoding module according to an embodiment of the present invention.
12 is a view showing an output processor according to an embodiment of the present invention.
13 is a view showing an output processor according to another embodiment of the present invention.
14 is a diagram illustrating a coding and modulation module according to another embodiment of the present invention.
15 is a diagram illustrating a demapping & decoding module according to another embodiment of the present invention.
16 is a view showing a header compression block according to an embodiment of the present invention.
17 is a diagram illustrating a header decompression block according to an embodiment of the present invention.
18 is a flowchart illustrating a header compression process according to an embodiment of the present invention.
19 is a flowchart illustrating a header decompression process according to an embodiment of the present invention.
20 is a view showing a relationship between a compressed TS header and an original TS header before compression according to a sync byte delivery mode according to an embodiment of the present invention.
21 is a diagram illustrating a relationship between a compressed TS header according to a PID compression mode and a TS header before compression according to an embodiment of the present invention.
22 is a table showing PID-sub according to an embodiment of the present invention.
23 is a diagram illustrating a PID compression process according to an embodiment of the present invention.
24 is a diagram showing a relationship between a compressed TS header and a pre-compressed TS header according to a PID delivery mode according to an embodiment of the present invention.
25 is a view showing a PMT according to an embodiment of the present invention.
26 is a diagram illustrating a relationship between a compressed TS header and a pre-compressed TS header according to a PID compression mode according to another embodiment of the present invention.
27 is a diagram illustrating a table showing PID-Sub and a mapping table for CC (Continuity Counter) compression according to another embodiment of the present invention.
28 is a diagram illustrating a PID compression process according to another embodiment of the present invention.
29 is a diagram illustrating a null packet delivery block according to another embodiment of the present invention.
30 is a diagram illustrating a null packet insertion block according to another embodiment of the present invention.
31 shows a DNP extension method according to an embodiment of the present invention.
32 is a diagram showing a DNP offset according to an embodiment of the present invention.
33 is a flowchart of a method for transmitting broadcast signals according to an embodiment of the present invention.
34 is a flowchart of a method for receiving broadcast signals according to an embodiment of the present invention.

Hereinafter, exemplary embodiments of the present invention capable of specifically realizing the above object will be described with reference to the accompanying drawings. At this time, the configuration and operation of the present invention illustrated in the drawings and described by the present invention are described as at least one embodiment, and the technical idea of the present invention and its core configuration and operation are not limited thereby.

The terminology used in the present invention is a general terminology which is currently widely used while considering the functions in the present invention, but this may vary depending on the intention or custom of a person skilled in the art or the appearance of new technologies. Also, in certain cases, some terms are arbitrarily selected by the applicant, and in this case, their meanings will be described in detail in the description of the applicable invention. Therefore, the term used in the present invention is intended to reveal that the term should be defined based on the meaning of the term and the entire contents of the present invention, rather than the name of the term.

The present invention is to provide an apparatus and method capable of transmitting and receiving broadcast signals for next generation broadcast services. The next generation broadcasting service according to an embodiment of the present invention is a concept including a terrestrial broadcasting service, a mobile broadcasting service, and a UHDTV service. According to an embodiment of the present invention, the broadcast signal for the next-generation broadcast service may be processed using a non-MIMO (Multi Input Multi Output) method or a MIMO method. The non-MIMO method according to an embodiment of the present invention may include a Multi Input Single Output (MISO), Single Input Single Output (SISO) method, or the like.

Hereinafter, the multiple antennas of MISO or MIMO may be described as an example of two antennas for convenience of description, but the description of the present invention can be applied to a system using two or more antennas.

1 is a view showing the structure of a transmission device for a next generation broadcast service according to an embodiment of the present invention.

The transmission apparatus for the next generation broadcast service according to an embodiment of the present invention includes an input formatting module 1000, a coding & modulation module 1100, and a frame structure module 1200. , A waveform generation module 1300 and a signaling generation module 1400. Hereinafter, the operation of each module will be mainly described.

As illustrated in FIG. 1, a transmission apparatus for a next generation broadcast service according to an embodiment of the present invention may receive an MPEG-TS stream, an IP stream (v4 / v6) and a generic stream (GS) as input signals. . In addition, management information regarding the configuration of each stream constituting the input signal may be received, and a final physical layer signal may be generated by referring to the received additional information.

The input formatting module 1000 according to an embodiment of the present invention divides the input streams according to a criterion for performing coding and modulation or a service and service component criterion, and a plurality of logical DPs (Or DPs or DP data). DP is a logical channel of a physical layer stage, and may carry service data or related metadata, and may carry at least one service or at least one service component. Also, data transmitted through DP may be referred to as DP data.

In addition, the input formatting module 1000 according to an embodiment of the present invention divides each generated DP into block units required to perform coding and modulation, and performs a series of processes necessary to increase transmission efficiency or perform scheduling can do. Details will be described later.

The coding and modulation module 1100 according to an embodiment of the present invention performs forward error correction (FEC) encoding on each DP received from the input formatting module 1000 to receive errors that may occur in a transmission channel at a receiving end. So that it can be modified. In addition, the coding and modulation module 1100 according to an embodiment of the present invention may convert bit data of the FEC output into symbol data and perform interleaving to correct a burst error due to a channel. In addition, as illustrated in FIG. 1, in order to transmit through two or more Tx antennas, the coding and modulation module 1100 according to an embodiment of the present invention is a data path for outputting processed data to each antenna (Or antenna path) can be divided and output.

The frame structure module 1200 according to an embodiment of the present invention may map data output from the coding and modulation module 1100 to a signal frame (or frame). The frame structure module 1200 according to an embodiment of the present invention can perform mapping using the scheduling information output from the input formatting module 1000, and in the signal frame to obtain additional diversity gain Interleaving can be performed on data.

The waveform generation module 1300 according to an embodiment of the present invention may convert signal frames output from the frame structure module 1200 into signals that can be finally transmitted. In this case, the waveform generation module 1300 according to an embodiment of the present invention inserts a preamble signal (or preamble) in order to enable a receiver to acquire a signal frame of a transmission system, and estimates a transmission channel to correct distortion A reference signal can be inserted to compensate. In addition, the waveform generation module 1300 according to an embodiment of the present invention sets a guard interval to offset the effect of channel delay spread due to multi-path reception, and a specific sequence in a corresponding section. Can be inserted. In addition, the waveform generation module 1300 according to an embodiment of the present invention may additionally perform a process necessary for efficient transmission in consideration of signal characteristics such as peak-to-average power ratio (PAPR) of the output signal. .

The signaling generation module 1400 according to an embodiment of the present invention uses the information generated by the input additional information and the input formatting module 1000, the coding and modulation module 1100, and the frame structure module 1200. Signaling information (physical layer signaling information, hereinafter referred to as PLS information) is generated. Therefore, the reception device according to an embodiment of the present invention can decode the received signal by decoding the signaling information.

As described above, a transmission device for a next-generation broadcasting service according to an embodiment of the present invention may provide a terrestrial broadcasting service, a mobile broadcasting service, and a UHDTV service. Therefore, the transmission apparatus for the next-generation broadcast service according to an embodiment of the present invention can multiplex and transmit signals for different services in the time domain.

2 to 4 are views showing an embodiment of the input formatting module 1000 according to an embodiment of the present invention described with reference to FIG. 1. Each drawing will be described below.

2 is a view showing an input formatting module according to an embodiment of the present invention. 2 shows an input formatting module when the input signal is a single input stream.

As illustrated in FIG. 2, the input formatting module according to an embodiment of the present invention may include a mode adaptation module 2000 and a stream adaptation module 2100.

As shown in FIG. 2, the mode adaptation module 2000 includes an input interface block 2010, a CRC-8 encoder block 2020, and a BB header insertion block. It may include (2030). Hereinafter, each block will be briefly described.

The input interface block 2010 may divide and output the input single input stream in units of BB (baseband) frame length for performing FEC (BCH / LDPC).

The CRC-8 encoder block 2020 may perform CRC encoding on data of each BB frame to add redundancy data.

Thereafter, the BB header insertion block 2030 includes a mode adaptation type (TS / GS / IP), a user packet length, a data field length, and a user packet sync byte ( User Packet Sync Byte), start address of user packet sync byte in the data field, High Efficiency Mode Indicator, Input Stream Synchronization Field, and other information. Can be inserted into the BB frame.

As shown in FIG. 2, the stream adaptation module 2100 may include a padding insertion block 2110 and a BB scrambler block 2120. Hereinafter, each block will be briefly described.

When the data received from the mode adaptation module 2000 is smaller than the input data length required for FEC encoding, the padding insertion block 2110 may insert padding bits to output the required input data length.

The BB scrambler block 2120 may perform randomization by performing an XOR on an input bit stream using a pseudo random binary sequence (PRBS).

The above-mentioned blocks may be omitted or replaced by other blocks having similar or identical functions according to the designer's intention.

As shown in FIG. 2, the input formatting module may finally output DP to the coding and modulation module.

3 is a view showing an input formatting module according to another embodiment of the present invention. FIG. 3 is a diagram illustrating a mode adaptation module of an input formatting module when the input signal is multiple input streams.

The mode adaptation module of the input formatting module for processing multiple input streams can process each input stream independently.

As illustrated in FIG. 3, the mode adaptation module 3000 for processing multiple input streams respectively includes an input interface block, an input stream synchronizer block, and a compensating delay. A block, a null packet deletion block, a CRC-8 encoder block, and a BB header insertion block. Hereinafter, each block will be briefly described.

The operations of the input interface block, CRC-8 encoder block, and BB header insertion block are the same as described in FIG. 2, and thus are omitted.

The input stream synchronizer block 3100 may transmit input stream clock reference (ISCR) information to insert timing information necessary to restore a TS or GS stream at a receiving end.

The compensating delay block 3200 delays the input data so that the receiving device can synchronize with it when a delay occurs between DPs according to data processing of the transmitting device along with timing information generated by the input stream synchronizer block. can do.

The null packet reduction block 3300 may remove input null packets to be transmitted unnecessarily, and insert and transmit the number of null packets removed according to the removed position.

The above-mentioned blocks may be omitted or replaced by other blocks having similar or identical functions according to the designer's intention.

4 is a view showing an input formatting module according to another embodiment of the present invention.

Specifically, FIG. 4 is a diagram illustrating a stream adaptation module of the input formatting module when the input signal is a multiple input stream.

The stream adaptation module of the input formatting module in the case of multiple input streams according to an embodiment of the present invention includes a scheduler 4000, a 1-frame delay block 4100, In-band signaling or padding insertion (In-band signaling or padding insertion) block 4200, PLS generation (PLS, physical layer signaling, generation) block 4300 and BB scrambler (BB scrambler) block 4400 You can. Hereinafter, the operation of each block will be described.

The scheduler 4000 may perform scheduling for a MIMO system using multiple antennas including dual polarity. In addition, the scheduler 4000 is a signal for each antenna path, such as a bit to cell demux block, a cell interleaver block, and a time interleaver block in the coding and modulation module described in FIG. 1. It is possible to generate parameters to be used for processing blocks.

The 1-frame delay block 4100 may delay input data by one signal frame so that scheduling information for the next frame can be transmitted to the current frame for in-band signaling, etc. to be inserted into the DP.

The in-band signaling or padding insertion block 4200 may insert non-delayed PLS-dynamic signaling information into data delayed by one signal frame. In this case, the in-band signaling or padding insertion block 4200 may insert a padding bit when there is space for padding, or insert in-band signaling information into the padding space. In addition, the scheduler 4000 may output PLS-dynamic signaling information for a current frame separately from in-band signaling. Therefore, the cell mapper, which will be described later, can map input cells according to the scheduling information output from the scheduler 4000.

The PLS generation block 4300 may generate PLS data (or PLS) to be transmitted as a preamble symbol or a spread of a signal frame except for in-band signaling and transmitted to data symbols. In this case, PLS data according to an embodiment of the present invention may be referred to as signaling information. In addition, PLS data according to an embodiment of the present invention may be divided into PLS-free information and PLS-post information. The PLS-free information may include parameters necessary for the broadcast signal receiving apparatus to decode the PLS-post information and static PLS signaling information, and the PLS-post information is parameters required for the broadcast signal receiving apparatus to decode the DP. It may include. The parameters necessary for decoding the above-described DP may be further divided into static PLS signaling information and dynamic PLS signaling information. The static PLS signaling information is a parameter that can be commonly applied to all frames included in the super frame and can be changed in units of super frames. The dynamic PLS signaling information is a parameter that can be applied differently for each frame included in the super frame, and can be changed on a frame-by-frame basis. Therefore, the receiving device can decode the PLS-free information to obtain PLS-post information, and decode the PLS-post information to decode the desired DP.

The BB scrambler block 4400 may generate PRBS so that the PAPR value of the output signal of the waveform generation block is finally lowered and XORed with the input bit string to output it. Scrambling of the BB scrambler block 4400 as shown in FIG. 4 can be applied to both DP and PLS.

The above-mentioned blocks may be omitted or replaced by other blocks having similar or identical functions according to the designer's intention.

As shown in FIG. 4, the stream adaptation module may finally output data corresponding to each data pipe to the coding and modulation module.

5 is a diagram illustrating a coding and modulation module according to an embodiment of the present invention.

The coding and modulation module of FIG. 5 corresponds to an embodiment of the coding and modulation module 1100 described with reference to FIG. 1.

As described above, a transmission device for a next-generation broadcasting service according to an embodiment of the present invention may provide a terrestrial broadcasting service, a mobile broadcasting service, and a UHDTV service.

That is, since a quality of service (QoS) is different according to a characteristic of a service to be provided by a transmission apparatus for a next-generation broadcast service according to an embodiment of the present invention, a method of processing data corresponding to each service needs to be changed. Therefore, the coding and modulation module according to an embodiment of the present invention can independently apply and process SISO, MISO, and MIMO methods for each path of the input DPs. As a result, the transmission apparatus for the next-generation broadcast service according to an embodiment of the present invention can adjust QoS for each service or service component transmitted through each DP.

Accordingly, the coding and modulation module according to an embodiment of the present invention includes a first block 5000 for the SISO method, a second block 5100 for the MISO method, a third block 5200 for the MIMO method, and PLS-free / A fourth block 5300 for processing post information may be included. The coding and modulation module illustrated in FIG. 5 is only an embodiment, and according to a designer's intention, the coding and modulation module may include only the first block 5000 and the fourth block 5300, and the second block 5100 ) And the fourth block 5300 may be included, or only the third block 5200 and the fourth block 5300 may be included. That is, according to the designer's intention, the coding and modulation module may include blocks for processing each DP identically or differently.

Each block will be described below.

The first block 5000 is a block for SISO processing the input DP, an FEC encoder block 5010, a bit interleaver block 5020, and a bit to cell demux. A block 5030, a constellation mapper block 5040, a cell interleaver block 5050, and a time interleaver block 5060 may be included.

The FEC encoder block 5010 adds redundancy by performing BCH encoding and LDPC encoding on the input DP, and outputs an FEC block by correcting errors in a transmission channel at a receiving end.

The bit interleaver block 5020 may process a bit stream of FEC-encoded data by interleaving by an interleaving rule to have robustness against a burst error that may occur in a transport channel. So in QAM symbol? When deep fading or erasure is applied, since interleaved bits are mapped to each QAM symbol, it is possible to prevent an error from occurring in consecutive bits among all codeword bits.

The bit-to-cell demux block 5030 determines the order of the input bit stream so that each bit in the FEC block can be transmitted with proper robustness by considering both the order of the input bit stream and the constellation mapping rule. can do.

In addition, the bit interleaver 5020 is located between the FEC encoder block 5010 and the constellation mapper block 5040, and considering the LDPC decoding of the receiving end, the output bits of the LDPC encoding performed in the FEC encoder block 5010 are compared to each other of the constellation mapper block. It may play a role of linking with a bit position having different reliability and optimal values. Therefore, the bit-to-cell demux block 5030 can be replaced by other blocks having similar or identical functions.

The constellation mapper block 5040 may map the input bit word to one constellation. In this case, the constellation mapper block may additionally perform rotation & Q-delay. That is, the constellation mapper block divides the input constellations according to a rotation angle, and then divides them into an I (In-phase) component and a Q (Quadrature-phase) component, and then only the Q component to an arbitrary value. It can be delayed. Subsequently, the paired I and Q components can be used to remap to a new constellation.

In addition, the constellation mapper block 5040 may perform an operation of moving constellation points on a two-dimensional plane to find optimal constellation points. Through this process, the capacity of the coding and modulation module 1100 can be optimized. In addition, the constellation mapper block 5040 may perform the above-described operation using IQ-balanced constellation points and rotation. Also, the constellation mapper block 5040 can be replaced by other blocks with similar or identical functions.

The cell interleaver block 5050 randomly mixes and outputs cells corresponding to one FEC block, so that cells corresponding to each FEC block can be output in a different order for each FEC block.

The time interleaver block 5060 may mix and output cells belonging to several FEC blocks. Accordingly, cells of each FEC block are distributed and transmitted within a period of time interleaving depth, so that diversity gain can be obtained.

The second block 5100 is a block for MISO processing of the input DP. As shown in FIG. 5, the FEC encoder block, bit interleaver block, bit-to-cell demux block, and constellation are the same as the first block 5000. It may include a migration mapper block, a cell interleaver block, and a time interleaver block, but differs in that it further includes a MISO processing block 5110. Since the second block 5100 performs the same role process from the input to the time interleaver as the first block 5000, description of the same blocks is omitted.

The MISO processing block 5110 may perform encoding according to an MISO encoding matrix that provides transmit diversity for input series of cells, and output MISO-processed data through two paths. MISO processing according to an embodiment of the present invention may include orthogonal space time block coding (OSTBC) / orthogonal space frequency block coding (OSFBC), also known as Alamouti coding.

The third block 5200 is a block for MIMO processing the input DP. As shown in FIG. 5, the FEC encoder block, bit interleaver block, bit-to-cell demux block, and constellation are the same as the second block 5100. It may include a migration mapper block, a cell interleaver block, and a time interleaver block, but there is a difference in the data processing process in that it includes a MIMO processing block 5220.

That is, in the case of the third block 5200, the FEC encoder block and the bit interleaver block have different specific functions from the first and second blocks 5000 and 5100, but the basic roles are the same.

The bit-to-cell demux block 5210 may generate the same number of output bit strings as the number of inputs of MIMO processing and output the MIMO path for MIMO processing. In this case, the bit-to-cell demux block 5210 may be designed to optimize decoding performance of the receiving end in consideration of characteristics of LDPC and MIMO processing.

The constellation mapper block, the cell interleaver block, and the time interleaver block may also have different specific functions, but the basic roles are the same as described in the first and second blocks 5000 and 5100. In addition, as shown in FIG. 5, the constellation mapper block, the cell interleaver block, and the time interleaver block exist as many as the number of MIMO paths for MIMO processing in order to process the output bit stream output from the bit-to-cell demux block. You can. In this case, the constellation mapper block, the cell interleaver block, and the time interleaver block may operate identically or independently of data input through each path.

The MIMO processing block 5220 may perform MIMO processing on the input two input cells using the MIMO encoding matrix and output MIMO processed data through two paths. MIMO encoding matrix according to an embodiment of the present invention is SM matrix (spatial multiplexing), golden code (Golden code), full-rate full diversity code (Full-rate full diversity code), linear dispersion code (Linear dispersion code) ) And the like.

The fourth block 5300 is a block for processing PLS-free / post information, and may perform SISO or MISO processing.

The bit interleaver block, the bit-to-cell demux block, the constellation mapper block, the cell interleaver block, the time interleaver block, and the MISO processing block included in the fourth block 5300 are included in the second block 5100 described above. Blocks and specific functions may be different, but the basic roles are the same.

The FEC encoder (Shortened / punctured FEC encoder (LDPC / BCH)) block 5310 included in the fourth block 5300 is for a PLS path in case the length of input data is shorter than the length required to perform FEC encoding. PLS data can be processed using the FEC encoding method. Specifically, the FEC encoder block 5310 performs BCH encoding on the input bit string, and then performs zero padding for the length of the input bit string required for normal LDPC encoding, and performs padding zeros after LDPC encoding. By removing, the parity bit may be puncturing such that the effective code rate is equal to or lower than DP.

The blocks included in the above-described first block 5000 to fourth block 5300 may be omitted or replaced by other blocks having similar or identical functions according to a designer's intention.

As illustrated in FIG. 5, the coding and modulation module may finally output DP, PLS-free information, and PLS-post information processed for each path to the frame structure module.

6 is a view showing a frame structure module according to an embodiment of the present invention.

The frame structure module illustrated in FIG. 6 corresponds to an embodiment of the frame structure module 1200 illustrated in FIG. 1.

The frame structure block according to an embodiment of the present invention includes at least one or more pair-wise cell-mapper 6000, at least one delay compensation module 6100, and at least one block interleaver ((pair-wise) block interleaver) 6200. The number of the cell mapper 6000, the delay compensation module 6100, and the block interleaver 6200 can be changed according to the designer's intention. Hereinafter, the operation of each module will be mainly described.

The cell mapper 6000 includes cells corresponding to SISO or MISO or MIMO processed DP output from the coding and modulation module, cells corresponding to common data that can be commonly applied between DPs, and PLS-free / post information. Cells corresponding to may be allocated (or arranged) to a signal frame according to scheduling information. Common data refers to signaling information that can be commonly applied between all or some DPs, and can be transmitted through a specific DP. The DP that transmits common data may be referred to as a common DP, which can be changed according to the designer's intention.

When the transmitting apparatus according to an embodiment of the present invention uses two output antennas and uses Alamouti coding in the above-described MISO processing, orthogonality is maintained by Alamouti encoding. To do this, the cell mapper 6000 may perform pair-wise cell mapping. That is, the cell mapper 6000 may process two consecutive cells with respect to input cells as one unit and map the signal frame. Accordingly, paired cells in the input path corresponding to the output path of each antenna may be allocated to adjacent positions in the signal frame.

The delay compensation block 6100 may acquire PLS data corresponding to the current signal frame by delaying the input PLS data cell for the next signal frame by one signal frame. In this case, the PLS data of the current signal frame may be transmitted through the preamble area in the current signal frame, and the PLS data for the next signal frame may be transmitted through the preamble area in the current signal frame or through in-band signaling in each DP of the current signal frame. Can be sent. This can be changed according to the designer's intention.

The block interleaver 6200 may acquire additional diversity gain by interleaving cells in a transport block that is a unit of a signal frame. Also, when the pair-wise cell mapping described above is performed, the block interleaver 6200 may perform interleaving by processing two consecutive cells with respect to input cells as one unit. Therefore, cells output from the block interleaver 6200 may be two identical consecutive cells.

When pair-wise mapping and pair-wise interleaving are performed, at least one cell mapper and at least one block interleaver may operate identically or independently of data input through each path.

The above-mentioned blocks may be omitted or replaced by other blocks having similar or identical functions according to the designer's intention.

As shown in FIG. 6, the frame structure module may output at least one signal frame to the waveform generation module.

7 is a view showing a waveform generation module according to an embodiment of the present invention.

The waveform generation module illustrated in FIG. 7 corresponds to an embodiment of the waveform generation module 1300 described in FIG. 1.

The waveform generation module according to an embodiment of the present invention may modulate and transmit signal frames by the number of antennas for receiving and outputting signal frames output from the frame structure module described in FIG. 6.

Specifically, the waveform generation module illustrated in FIG. 7 is an embodiment of a waveform generation module of a transmission apparatus using m Tx antennas, and includes m processing blocks for modulating and outputting an input frame by m paths. can do. The m processing blocks can all perform the same processing process. Hereinafter, the operation of the first processing block 7000 among m processing blocks will be mainly described.

The first processing block 7000 is a reference signal insertion & PAPR reduction block 7100, an inverse waveform transform block 7200, PAPR reduction in time Block 7300, Guard sequence insertion block 7400, preamble insertion block 7500, waveform processing block 7600, other system insertion (other system) insertion (7700) and a DAC (Digital Analog Conveter) block 7800.

The reference signal insertion and PAPR reduction block 7100 may insert a reference signal at a predetermined position for each signal block and apply a PAPR reduction scheme to lower the PAPR value in the time domain. When the broadcast transmission / reception system according to an embodiment of the present invention is an OFDM system, the reference signal insertion and PAPR reduction block 7100 may use a method of preserving without using some of the active subcarriers. Also, the reference signal insertion and PAPR reduction block 7100 may not use the PAPR reduction scheme as an additional feature according to a broadcast transmission / reception system.

The inverse waveform transform block 7200 may output the output signal by stretching the input signal in a manner that improves transmission efficiency and flexibility in consideration of characteristics of a transmission channel and a system structure. When the broadcast transmission / reception system according to an embodiment of the present invention is an OFDM system, the inverse waveform transform block 7200 uses a method of converting a signal in the frequency domain into a time domain using an inverse FFT operation. You can. In addition, when the broadcast transmission / reception system according to an embodiment of the present invention is a single carrier system, the inverse waveform transform block may not be used in the waveform generation module.

The PAPR reduction block 7300 can apply a method for lowering the PAPR in the time domain for the input signal. When the broadcast transmission / reception system according to an embodiment of the present invention is an OFDM system, the PAPR reduction block 7300 may simply use a method of clipping a peak amplitude. In addition, the PAPR reduction block 7300 may not be used according to a broadcast transmission / reception system according to an embodiment of the present invention as an additional feature.

The guard sequence insertion block 7400 may place guard intervals between adjacent signal blocks to minimize the effect of delay spread of a transmission channel, and insert a specific sequence if necessary. Therefore, the receiving device can easily perform synchronization or channel estimation. When the broadcast transmission / reception system according to an embodiment of the present invention is an OFDM system, the guard sequence insertion block 7400 may insert a cyclic prefix in the guard interval interval of the OFDM symbol.

The preamble insertion block 7500 can insert a known type signal (a preamble or a preamble symbol) between a transmitting and receiving device into a transmission signal so that the receiving device can quickly and efficiently detect the targeted system signal. have. When the broadcast transmission / reception system according to an embodiment of the present invention is an OFDM system, the preamble insertion block 7500 may define a signal frame composed of several OFDM symbols and insert a preamble at the beginning of each signal frame. have. Thus, the preamble can carry basic PSL data and can be located at the beginning of each signal frame.

The waveform processing block 7600 may perform waveform processing on the input baseband signal to match the transmission characteristics of the channel. The waveform processing block 7600 uses, as an embodiment, a method of performing square-root-raised cosine filtering (SRRC) filtering to obtain a criterion for out-of-band emission of a transmission signal. It might be. In addition, when the broadcast transmission / reception system according to an embodiment of the present invention is a multi-carrier system, the waveform processing block 7600 may not be used.

The other system insertion block 7700 may multiplex signals of a plurality of broadcast transmission / reception systems in a time domain so that data of a broadcast transmission / reception system providing two or more different broadcast services can be simultaneously transmitted within the same RF signal bandwidth. In this case, two or more different systems mean systems that transmit different broadcast services. Different broadcast services may mean terrestrial broadcast services, mobile broadcast services, and the like. In addition, data related to each broadcast service may be transmitted through different frames.

The DAC block 7800 can convert an input digital signal to an analog signal and output the analog signal. The signal output from the DAC block 7800 can be transmitted through m output antennas. The transmission antenna according to an embodiment of the present invention may have vertical or horizontal polarity.

In addition, the above-described blocks may be omitted or replaced by other blocks having similar or identical functions according to the designer's intention.

8 is a diagram showing the structure of a receiving device for a next generation broadcast service according to an embodiment of the present invention.

The reception device for the next generation broadcast service according to an embodiment of the present invention may correspond to the transmission device for the next generation broadcast service described in FIG. 1. The receiving device for the next-generation broadcasting service according to an embodiment of the present invention includes a synchronization & demodulation module 8000, a frame parsing module 8100, and demapping & decoding. decoding) module 8200, an output processor 8300, and a signaling decoding module 8400. Hereinafter, the operation of each module will be mainly described.

The synchronization and demodulation module 8000, the block receives input signals through m receive antennas, detects and synchronizes signals to a system corresponding to the receiving device, and performs synchronization at the transmitting end. Demodulation corresponding to an inverse process of the method performed may be performed.

The frame parsing module 8100 may parse the input signal frame and extract data for transmitting a service selected by the user. The frame parsing module 8100 may perform deinterleaving as an inverse process when the interleaving is performed by the transmitting device. In this case, the positions of signals and data to be extracted can be obtained by decoding data output from the signaling decoding module 8400 and restoring scheduling information performed by the transmitting device.

The demapping & decoding module 8200 may perform a deinterleaving process when necessary after converting an input signal into bit domain data. The demapping & decoding module 8200 may perform demapping on the mapping applied for transmission efficiency, and perform error correction through decoding on errors generated during the transmission channel. In this case, the demapping and decoding module 8200 may decode data output from the signaling decoding module 8400 to obtain transmission parameters necessary for demapping and decoding.

The output processor 8300 may perform inverse processes of various compression / signal processing processes applied to increase transmission efficiency in the transmission device. In this case, the output processor 8300 can acquire necessary control information from data output from the signaling decoding module 8400. The final output of the output processor 8300 corresponds to a signal input to the transmitting device, and may be an MPEG-TS, an IP stream (v4 or v6), and a generic stream (GS).

The signaling decoding module 8400 can obtain PLS information from the demodulated signal. As described above, the frame parsing module 8100, the demapping & decoding module 8200, and the output processor 8300 can perform the function of the corresponding module using the data output from the signaling decoding module 8400.

9 is a view showing a synchronization and demodulation module according to an embodiment of the present invention.

The synchronization and demodulation module illustrated in FIG. 9 corresponds to an embodiment of the synchronization and demodulation module described in FIG. 8. In addition, the synchronization and demodulation module shown in FIG. 9 may perform the reverse operation of the waveform generation module described in FIG. 7.

9, the synchronization and demodulation module according to an embodiment of the present invention is an embodiment of the synchronization and demodulation module of a receiving device using m Rx antennas, and inputs m paths. It may include m processing blocks for demodulating the output signal and outputting it. The m processing blocks can all perform the same processing process. Hereinafter, the operation of the first processing block 9000 among m processing blocks will be mainly described.

The first processing block 9000 includes a tuner 9100, an ADC block 9200, a preamble dectector 9300, a guard sequence detector 9400, and a waveform transform. ) Block 9500, Time / freq sync Block 9600, Reference Signal Detector 9700, Channel Equalizer 9800 and Inverse Waveform Transform waveform transform) block 9900.

The tuner 9100 may select a desired frequency band and compensate the magnitude of the received signal to output it to the AD C block 9200.

The ADC block 9200 may convert a signal output from the tuner 9100 into a digital signal.

The preamble detector 9300 may detect a preamble (or preamble signal or preamble symbol) in order to check whether the digital signal is a signal of a system corresponding to a receiving device. In this case, the preamble detector 9300 can decode basic transmission parameters received through the preamble.

Guard sequence detector 9400 can detect a guard sequence in a digital signal. The time / frequency synchronization block 9600 can perform time / frequency synchronization using the detected guard sequence, and the channel equalizer 9800 receives / restores using the detected guard sequence. The channel can be estimated through the sequence.

The waveform transform block 9500 may perform an inverse transform process when an inverse waveform transform is performed at the transmitting side. When the broadcast transmission / reception system according to an embodiment of the present invention is a multi-carrier system, the waveform transform block 9500 may perform an FFT conversion process. In addition, when the broadcast transmission / reception system according to an embodiment of the present invention is a single carrier system, when a received time domain signal is used for processing in the frequency domain or is processed in the time domain, the waveform transform block 9500 ) May not be used.

The time / frequency sync block 9600 receives output data of the preamble detector 9300, the guard sequence detector 9400, and the reference signal detector 9700, and guard sequence detection, block for the detected signal. It is possible to perform time synchronization and carrier frequency synchronization including block window positioning. At this time, for frequency synchronization, the time / frequency sync block 9600 can use the feedback signal of the waveform transform block 9500.

The reference signal detector 9700 can detect the received reference signal. Therefore, the receiving device according to an embodiment of the present invention may perform synchronization or channel estimation.

The channel equalizer 9800 may estimate a transmission channel from each guard antenna to each receiving antenna from a guard sequence or a reference signal, and perform channel equalization for each received data using the estimated channel.

The inverse waveform transform block 9900 serves to restore the original received data domain back to the original received data domain when the waveform transform block 9300 performs the waveform transform in order to efficiently perform synchronization and channel estimation / compensation. You can do When the broadcast transmission / reception system according to an embodiment of the present invention is a single carrier system, the waveform transform block 9500 can perform FFT to perform synchronization / channel estimation / compensation in the frequency domain, and inverse waveform The transform block 9900 can reconstruct the transmitted data symbols by performing IFFT on the channel-compensated signal. When the broadcast transmission / reception system according to an embodiment of the present invention is a multi-carrier system, the inverse waveform transform block 9900 may not be used.

In addition, the above-described blocks may be omitted or replaced by other blocks having similar or identical functions according to the designer's intention.

10 is a view showing a frame parsing module according to an embodiment of the present invention.

The frame parsing module illustrated in FIG. 10 corresponds to an embodiment of the frame parsing module illustrated in FIG. 8. In addition, the frame parsing module illustrated in FIG. 10 may perform the reverse operation of the frame structure module illustrated in FIG. 6.

As shown in FIG. 10, the frame parsing module according to an embodiment of the present invention includes at least one block-interleaver (10000) and at least one cell demapper ((pair-wise)) cell demapper) 10100.

The block interleaver 10000 may deinterleave data for each signal block unit for data processed by the synchronization and demodulation module input to each data path of m reception antennas. In this case, as described in FIG. 8, when pair-wise interleaving is performed at the transmitting side, the block interleaver 10000 may process two consecutive data for each input path as one pair. Therefore, the block interleaver 10000 can output two consecutive output data even when deinterleaving is performed. In addition, the block interleaver 10000 may perform an inverse process of the interleaving process performed by the transmitting end and output the data in the original data order.

The cell demapper 10100 may extract cells corresponding to common data, cells corresponding to DP, and cells corresponding to PLS information from the received signal frame. If necessary, the cell demapper 10100 may output data as a single stream by merging the data transmitted by being divided into several parts. Also, as described with reference to FIG. 6, when the input data of two consecutive cells is mapped and mapped as one pair at the transmitting end, the cell demapper 10100 performs one of the two consecutive input cells in the reverse process. A pair-wise cell demapping process in units may be performed.

In addition, the cell demapper 10100 can extract and output both PLS signaling information received through the current frame as PLS-free information and PLS-post information, respectively.

The above-mentioned blocks may be omitted or replaced by other blocks having similar or identical functions according to the designer's intention.

11 is a diagram illustrating a demapping & decoding module according to an embodiment of the present invention.

The demapping & decoding module illustrated in FIG. 11 corresponds to an embodiment of the demapping & decoding module illustrated in FIG. 8. In addition, the demapping & decoding module illustrated in FIG. 11 may perform the reverse operation of the coding & modulation module illustrated in FIG. 5.

As described above, the coding and modulation module of the transmitting apparatus according to an embodiment of the present invention can independently apply and process SISO, MISO, and MIMO methods for each path of input data pipes. Accordingly, the demapping & decoding module illustrated in FIG. 11 may also include blocks for processing SISO, MISO, and MIMO data output from the frame parser, respectively, corresponding to the transmitting apparatus.

As shown in FIG. 11, the demapping and decoding module according to an embodiment of the present invention includes a first block 11000 for the SISO method, a second block 11100 for the MISO method, and a third for the MIMO method A block 11200 and a fourth block 11300 for processing PLS pre / post information may be included. The demapping & decoding module illustrated in FIG. 11 is only an embodiment, and according to a designer's intention, the demapping & decoding module may include only the first block 11000 and the fourth block 11300, and the second block It may include only the (11100) and the fourth block (11300), or may include only the third block (11200) and the fourth block (11300). That is, depending on the designer's intention, the demapping and decoding module may include blocks for processing each DP identically or differently.

Each block will be described below.

The first block 11000 is a block for SISO processing the input DP, a time de-interleaver block 11010, a cell de-interleaver block 11020, and a constellation demapper. (constellation demapper) block (11030), cell to bit mux (11040), bit de-interleaver (bit de-interleaver) block (11050) and FEC decoder (FEC decoder (LDPC / BCH)) block (11060).

The time interleaver block 11010 may perform an inverse process of the time interleaver block 5060 described in FIG. 5. That is, the time interleaver block 11010 may deinterleave the input symbols interleaved in the time domain to their original positions.

The cell deinterleaver block 11020 may perform the reverse process of the cell deinterleaver block 5050 described in FIG. 5. That is, the cell deinterleaver block 11020 may deinterleave the positions of cells spread in one FEC block to an original position.

The constellation demapper block 1110 may perform an inverse process of the constellation demapper block 5040 described in FIG. 5. That is, the constellation demapper block 11030 may demap the input signal of the symbol domain to the data of the bit domain. In addition, the constellation demapper block 11030 may perform a hard decision to output bit data according to the result of the hard decision, and may use a soft decision value or a stochastic value. The LLR (Log-likelihood ratio) value of each bit may be output. If the rotated constellation is applied to obtain additional diversity gain at the transmitting end, the constellation demapper block 11030 may perform 2-D (2-Dimensional) LLR demapping corresponding thereto. In this case, when the LLR is calculated, the constellation demapper block 11030 may perform calculation to compensate for the delay value performed on the I or Q component in the transmitting device.

The cell-to-bit mux block 11040 may perform an inverse process of the bit-to-cell demux block 5030 described in FIG. 5. That is, the cell-to-bit mux block 11040 may restore bit data mapped in the bit-to-cell demux block 5030 to an original bit stream form.

The bit deinterleaver block 11050 may perform an inverse process of the bit interleaver block 5020 described in FIG. 5. That is, the bit deinterleaver block 11050 may deinterleave the bit streams output from the cell-to-bit mux block 11040 in the original order.

The FEC decoder block 11060 may perform the inverse process of the FEC encoder block 5010 described in FIG. 5. That is, the FEC decoder block 11060 can correct errors generated on a transport channel by performing LDPC decoding and BCH decoding.

The second block 11100 is a block for MISO processing of the input DP, and as shown in FIG. 11, the time deinterleaver block, the cell deinterleaver block, and the constellation demapper block as in the first block 11000 , A cell-to-bit mux block, a bit deinterleaver block and an FEC decoder block, but differs in that it further includes a MISO decoding block 1110. Since the second block 11100 performs the same role process from the time deinterleaver to the output as the first block 11000, description of the same blocks will be omitted.

The MISO decoding block 1110 may perform an inverse process of the MISO processing block 5110 described in FIG. 5. When the broadcast transmission / reception system according to an embodiment of the present invention is a system using STBC, the MISO decoding block 1110 may perform Alamouti decoding.

The third block 11200 is a block for MIMO processing the input DP, and as shown in FIG. 11, the time deinterleaver block, the cell deinterleaver block, and the constellation demapper block as in the second block 11100 , A cell-to-bit mux block, a bit deinterleaver block, and an FEC decoder block may be included, but there is a difference in a data processing process in that it includes a MIMO decoding block 1110. The operations of the time deinterleaver, cell deinterleaver, constellation demapper, cell to bit mux, and bit deinterleaver blocks included in the third block 11200 correspond to those included in the first to second blocks 11000-11100 The operation and specific functions of blocks may be different, but the basic roles are the same.

The MIMO decoding block 1210 may receive output data of a cell deinterleaver as input to m receive antenna input signals and perform MIMO decoding as an inverse process of the MIMO processing block 5220 described in FIG. 5. The MIMO decoding block 1210 may perform maximum likelihood decoding or sphere decoding with reduced complexity in order to obtain the best decoding performance. Alternatively, the MIMO decoding block 1210 may obtain improved decoding performance by performing MMSE detection or combining iterative decoding together.

The fourth block 11300 is a block for processing PLS-free / post information, and may perform SISO or MISO decoding. The fourth block 11300 may perform an inverse process of the fourth block 5300 described in FIG. 5.

The operations of the time deinterleaver, cell deinterleaver, constellation demapper, cell to bit mux, and bit deinterleaver blocks included in the fourth block 11300 correspond to those included in the first to third blocks 11000-11200 The operation and specific functions of blocks may be different, but the basic roles are the same.

The FEC decoder (Shortened / Punctured FEC decoder (LDPC / BCH)) 1310 included in the fourth block 11300 performs an inverse process of the FEC encoder (Shortened / punctured FEC encoder) block 5310 illustrated in FIG. 5 You can. That is, the FEC decoder 1310 shortens / puncturing according to the length of the PLS data and performs de-shortening and de-puncturing on the received data, followed by FEC decoding. You can do In this case, since the FEC decoder used for DP can be used for PLS data in the same way, since there is no need for a separate FEC decoding hardware for PLS data, system design is easy and efficient coding is possible.

The above-mentioned blocks may be omitted or replaced by other blocks having similar or identical functions according to the designer's intention.

As a result, as shown in FIG. 11, the demapping & decoding module according to an embodiment of the present invention can output DP and PLS information processed for each path to an output processor.

12 to 13 are views showing an output processor according to an embodiment of the present invention.

12 is a view showing an output processor according to an embodiment of the present invention. The output processor illustrated in FIG. 12 corresponds to an embodiment of the output processor illustrated in FIG. 8. In addition, the output processor illustrated in FIG. 12 is configured to receive a DP output from the demapping & decoding module and output a single output stream, and may perform an inverse operation of the input formatting module illustrated in FIG. 2. .

The output processor illustrated in FIG. 12 includes a BB descrambler block 12000, a padding removal block 12100, a CRC-8 decoder block 12200, and a BB frame processor (BB frame processor) may include a block 12300.

The BB descrambler block 12000 may descramble the input bit stream by generating the same PRBS used by the transmitting end and XORing the bit stream.

The padding remove block 12100 may remove padding bits inserted as necessary at the transmitting end.

The CRC-8 decoder block 12200 may perform a CRC decoding on a bit stream received from the padding remove block 12100 to check block errors.

The BB frame processor block 12300 may decode information transmitted in the BB frame header and restore MPEG-TS, IP stream (v4 or v6), or GS (Generic Stream) using the decoded information.

The above-mentioned blocks may be omitted or replaced by other blocks having similar or identical functions according to the designer's intention.

13 is a view showing an output processor according to another embodiment of the present invention. The output processor illustrated in FIG. 13 corresponds to an embodiment of the output processor illustrated in FIG. 8. Also, the output processor illustrated in FIG. 13 corresponds to a case of receiving a plurality of DPs output from the demapping and decoding module. Decoding of a plurality of DPs is performed by merging and decoding common data that can be commonly applied to a plurality of DPs and the DPs associated therewith, or when a receiving device uses multiple services or service component (SVC, scalable video service). Decoding) at the same time.

The output processor shown in FIG. 13 may include a BB descrambler block, a padding remove block, a CRC-8 decoder block, and a BB frame processor block, as in the case of the output processor described in FIG. 12, each block in FIG. The operations of blocks described and the specific operations may be different, but the basic roles are the same.

De-jitter buffer (De-jitter buffer) block 13000 included in the output processor shown in Figure 13 to restore the randomly inserted delay at the transmitting end for the synchronization between a plurality of DPs to the restored time to output (TTO) parameter You can compensate accordingly.

In addition, the null packet insertion block 13100 may restore the null packet removed in the stream by referring to the restored deleted null packet (DNP) information, and may output common data.

The TS clock regeneration block 13200 may restore detailed time synchronization of an output packet based on ISCR (Input Stream Time Reference) information.

TS recombining (TS recombining) block 13300 is the original MPEG-TS, IP stream (v4 or v6) or GS (Generic) by recombining common data output from the null packet insertion block 13100 and related DPs. Stream). TTO, DNP, and ISCR information can all be obtained through the BB frame header.

The in-band signaling decoder block 13400 may restore and output in-band physical layer signaling information transmitted through padding bit fields in each FEC frame of DP.

The BB descrambler of the output processor shown in FIG. 13 BB descrambles PLS-free information and PLS-post information input according to the PLS-free path and the PLS-post path, respectively, and physical layer signaling decoder (Physical Layer Signaling decoder) ) Can decode the descrambled data to restore the original PLS data. The restored PLS data is transmitted to a system controller in the receiving device, and the system controller supplies parameters necessary for the synchronization and demodulation module, frame parsing module, demapping and decoding module, and output processor module of the receiving device. You can.

The above-mentioned blocks may be omitted or replaced by other blocks having similar or identical functions according to the designer's intention.

14 is a diagram illustrating a coding and modulation module according to another embodiment of the present invention.

The coding and modulation module illustrated in FIG. 14 corresponds to another embodiment of the coding and modulation module illustrated in FIGS. 1 and 5.

As illustrated in FIG. 5, the coding and modulation module illustrated in FIG. 14 is a first block 14000 for an SISO method and a MISO method for adjusting QoS for each service or service component transmitted through each DP. A second block 14100, a third block 14200 for the MIMO scheme, and a fourth block 14300 for processing the PLS-free / post information may be included. In addition, the coding and modulation module according to an embodiment of the present invention may include blocks for processing each DP identically or differently according to a designer's intention as described above. The first to fourth blocks 14000 to 14300 illustrated in FIG. 14 include blocks substantially the same as the first to fourth blocks 5000 to 5300 described with reference to FIG. 5.

However, the function of the constellation mapper block 14010 included in the first block to the third block (14000-14200) is a constellation mapper included in the first block to the third block (5000-5200) of FIG. 5. Different from the function of the block 5040, the rotation & I / Q interleaver block 1420 is included between the cell interleaver and the time interleaver of the first block to the fourth block 14000-14300 There is a difference in that the configuration of the third block 5200 for the MIMO scheme and the configuration of the third block 5200 for the MIMO scheme shown in FIG. 5 are different. Hereinafter, the description of the same blocks as in FIG. 5 will be omitted and the description will be made focusing on the above-described differences.

The constellation mapper block 14010 illustrated in FIG. 14 may map the input bit word to a complex symbol. However, unlike the constellation mapper block 5040 illustrated in FIG. 5, constellation rotation may not be performed. The constellation mapper block 14010 illustrated in FIG. 14 may be commonly applied to the first to third blocks 14000-14200 as described above.

The rotation and I / Q interleaver block 1420 independently interleaves the I (In-phase) component and the Q (Quadrature-phase) component of each complex symbol of the cell interleaved data output from the cell interleaver and outputs them in symbol units can do. The number of input data and output symbols of the rotation & I / Q interleaver block 1420 is two or more, and this can be changed according to the designer's intention. Also, the rotation & I / Q interleaver block 1420 may not perform interleaving on the I component.

The rotation & I / Q interleaver block 1420 may be commonly applied to the first to fourth blocks 14000-14300 as described above. In this case, whether the rotation & I / Q interleaver block 1420 is applied to the fourth block 14300 for processing PLS-pre / post information may be signaled through the above-described preamble.

The third block 14200 for the MIMO scheme may include a Q-block interleaver block 1410 and a complex symbol generator block 14220, as shown in FIG. 14. have.

The Q-block interleaver block 1410 can perform permutation on the parity part of the FEC block on which the FEC encoding received from the FEC encoder is performed. Through this, the parity part of the LDPC H matrix can be made into a cyclic structure in the same manner as the information part. The Q-block interleaver block 1410 orders the order of output bit blocks having the Q size of the LDPC H matrix. After permutation, row-column block interleaving may be performed to generate and output the final bit string.

The complex symbol generator block 14220 may receive bit strings output from the Q-block interleaver block 1410 and map them to a complex symbol for output. In this case, the complex symbol generator block 14220 may output symbols through at least two paths. This can be changed according to the designer's intention.

The above-mentioned blocks may be omitted or replaced by other blocks having similar or identical functions according to the designer's intention.

As a result, as illustrated in FIG. 14, the coding and modulation module according to another embodiment of the present invention can output DP, PLS-free information, and PLS-post information processed for each path to the frame structure module.

15 is a diagram illustrating a demapping & decoding module according to another embodiment of the present invention.

The demapping & decoding module illustrated in FIG. 15 corresponds to another embodiment of the demapping & decoding module illustrated in FIGS. 8 and 11. In addition, the demapping & decoding module illustrated in FIG. 15 may perform the reverse operation of the coding & modulation module illustrated in FIG. 14.

As shown in FIG. 15, the demapping and decoding module according to another embodiment of the present invention includes a first block 15000 for the SISO method, a second block 15100 for the MISO method, and a third for the MIMO method A block 15200 and a fourth block 15300 for processing PLS-free / post information may be included. In addition, the demapping and decoding module according to an embodiment of the present invention may include blocks for processing each DP identically or differently according to a designer's intention as described above. The first to fourth blocks 15000-15300 illustrated in FIG. 15 include blocks substantially the same as the first to fourth blocks 11000-11300 described with reference to FIG. 11.

However, the I / Q deinterleaver & derotation block 15010 is included between the time deinterleaver and the cell deinterleaver of the first block to the fourth block (15000-15300). The function of the constellation demapper block 15020 included in the first block to the third block (15000-15200) is a constellation demapper block included in the first to third blocks 11000-11200 of FIG. 11. There is a difference in that it is different from the function of 1110 and the configuration of the third block 15200 for the MIMO scheme is different from that of the third block 11200 for the MIMO scheme shown in FIG. 11. Hereinafter, the description of the same blocks as in FIG. 11 will be omitted and the description will be made focusing on the above-described differences.

The I / Q deinterleaver and derotation block 15010 may perform an inverse process of the rotation and I / Q interleaver block 1420 described in FIG. 14. That is, the I / Q deinterleaver and derotation block 15010 may perform deinterleaving on the transmitted I and Q components by I / Q interleaving at the transmitting end, respectively, and the complex symbol with the restored I / Q components Can be derotated again to print.

The I / Q deinterleaver and derotation block 15010 may be commonly applied to the first to fourth blocks 15000-15300 as described above. In this case, whether the I / Q deinterleaver and derotation block 15010 is applied to the fourth block 15300 for processing PLS-pre / post information may be signaled through the preamble described above.

The constellation demapper block 15020 may perform an inverse process of the constellation mapper block 14010 illustrated in FIG. 14. That is, the constellation demapper block 15020 may perform demapping on cell deinterleaved data without performing derotation.

The third block 15200 for the MIMO scheme includes a complex symbol parsing block 15210 and a Q-block deinterleaver block 15220, as shown in FIG. 15. You can.

The complex symbol parsing block 15210 may perform an inverse process of the complex symbol generator block 14220 described in FIG. 14. That is, the complex data symbol can be parsed and de-mapped as bit data to be output. In this case, the complex symbol parsing block 15210 may receive complex data symbols through at least two paths.

The Q-block deinterleaver block 15220 may perform an inverse process of the Q-block interleaver block 14210 described in FIG. 14. That is, the Q-block deinterleaver block 15220 restores Q size blocks by row-column deinterleaving, and then restores the order of each permutated block in the original order. , Through parity deinterleaving, the position of the parity bits can be restored and output.

The above-mentioned blocks may be omitted or replaced by other blocks having similar or identical functions according to the designer's intention.

As a result, as shown in FIG. 15, the demapping & decoding module according to another embodiment of the present invention can output DP and PLS information processed for each path to an output processor.

As described above, the apparatus and method for transmitting broadcast signals according to an embodiment of the present invention can multiplex signals of different broadcast transmission / reception systems in the same RF channel and transmit multiplexed signals. Also, the apparatus and method for receiving broadcast signals according to an embodiment of the present invention may process signals in response to a broadcast signal transmission operation. As a result, the present invention can provide a flexible broadcast transmission and reception system.

In the case of a conventional broadcast signal transmission apparatus, in order to input TS packets (or data packets) included in the input stream into a BB frame, the sync byte of the TS header is deleted and transmitted, so that the existing 4-byte header is converted into 3 bytes The transmission method is used, or when only a TS packet having one PID is transmitted in one DP, since the PID is continuously transmitted, a method of compressing the PID was used. In the case of the method of compressing the PID, since one byte is compressed and the same PID and TP values are always input as the BB-frame header, there is an advantage in that compression efficiency can be increased. However, if the sync byte is deleted, the compression rate may decrease. Even in the case of the method of compressing the PID, there is a disadvantage in that it has a limitation that the PID should always be the same.

Hereinafter, a header compression mode according to an embodiment of the present invention will be described.

The apparatus for transmitting broadcast signals according to an embodiment of the present invention may perform header compression to increase transmission efficiency for both TS or IP input streams. Since the receiver according to an embodiment of the present invention may have prior information for a specific part of the header, information already known from the receiver may be deleted at the transmitter side when transmitted to the receiver. have.

With respect to a transport stream, a receiver according to an embodiment of the present invention may have prior information on a sync byte configuration and packet length. If the input transport stream has one PID (for example, one service component-video, audio, etc.) or service sub-component (SVC base layer, SVC enhancement layer, MVC base view or MVC dependent view) When transmitting, TS packet header compression (compression) may be applied to the transport stream. Also, if the input transport stream has a plurality of video / audio PIDs in one PMT (Program Map Table) and one DP, TS packet header compression can be applied to the transport stream.

The header compression mode according to an embodiment of the present invention includes a sync byte deletion mode in which only sync bytes are deleted, a PID compression mode in which PIDs are compressed when configured with the same service, and a PID delay in which PIDs are deleted. Deletion mode may be included.

16 is a view showing a header compression block according to an embodiment of the present invention.

The upper part of FIG. 16 shows another embodiment of the mode adaptation module of the input formatting module of the present invention described with reference to FIG. 3, and the lower part of FIG. 16 shows specific blocks included in the header compression block 16000 included in the mode adaptation module It is a drawing.

As described above, the mode adaptation module of the input formatting module for processing a plurality of input streams can process each input stream independently.

As shown in FIG. 16, the mode adaptation module for processing each of a plurality of input streams includes a pre-processing block (a splitter), an input interface block, and an input stream synchronizer. synchronizer) block, compensating delay block, header compression block, null data reuse block, null packet deletion block, and BB header insertion (BB header insertion) block. Since the input interface block, the input stream synchronizer block, the compensating delay block, the null packet reduction block, and the BB header insertion block are the same as described in FIG. 3, detailed descriptions thereof will be omitted.

The pre-processing block may separate input TS, IP, and GS streams to generate a plurality of service or service component (audio, video, etc.) streams.

The header compression block 16000 shown at the bottom of FIG. 16 represents an operation of performing header compression on the TS input stream. Specifically, when receiving a TS input stream, the header compression block 16000 according to an embodiment of the present invention may compress a TS packet header corresponding to 4 bytes out of 188 bytes, and the sync byte according to the compression mode. You can delete and compress the PID.

The header compression block 16000 according to an embodiment of the present invention includes a sync byte deletion (16100), a PMT parser (16200), a PID compression (16300), and a PID converter (converter). ) (16400), TS header replacement (header replacement) (16500).

The header compression block 16000 according to an embodiment of the present invention may process the input signal differently according to the header compression mode. As described above, the header compression mode according to an embodiment of the present invention includes a sync byte reduction mode for deleting only sync bytes, a PID compression mode for compressing PID when configured with the same service, and a PID delay mode for deleting PID. can do. Hereinafter, the operation of the blocks included in the header compression block 16000 according to each mode will be described.

1) In the sync byte reduction mode, if the sync byte delay 16100 deletes the sync byte for the input signal, the TS header replacement 16500 may transmit the compressed TS header.

2) PID compression mode is a mode for processing a transport stream composed of the same service. That is, a transport stream may have one PMT packet PID value and one or more service packet (s) with different PID (s). In this case, the sync byte delay 16100 may delete the sync byte from the input signal, and the PMT parser 16200 parses the PMT section describing the PID of the same service from the data output from the sync byte delay 16100. By doing so, each elementary PID can be analyzed. Thereafter, the PID converter 16400 may convert the PID to PID-SUB (or SUB-PID, PID-sub) using the information output from the PMT parser 16200. PID-SUB means the index of the PMT syntax and the elemental PID of the section.

Thereafter, the PID compression 16300 may compress the PID using the PID-sub information, and the TS header replacement 16500 may transmit the compressed TS header.

3) The PID reduction mode can be applied to a single TS packet stream having one PID. In this case, if the sync byte is deleted in the sync byte delay 16100, the PID compression 16300 is common. PID information can be transmitted to the BB-frame header insertion block and the PID can be deleted. Thereafter, the TS header replacement 16500 may transmit the compressed TS header.

17 is a diagram illustrating a header decompression block according to an embodiment of the present invention.

The upper part of FIG. 17 shows another embodiment of the output processor of the present invention described with reference to FIG. 13, and the lower part of FIG. 17 is a diagram showing specific blocks included in the header decompression block 17000 included in the output processor.

The output processor illustrated in FIG. 17 may perform an inverse process of the mode adaptation module illustrated in FIG. 16.

As shown in FIG. 17, the output processor according to another embodiment of the present invention includes a BB frame header parser block, a null packet insertion block, and a null data regenerator. ) Block, header de-compression block, de-jitter buffer block, TS clock regeneration block, and TS recombining block. You can. Since the specific operation of each block corresponds to the reverse process of the blocks in FIG. 16, detailed descriptions are omitted.

The header decompression block 17000 shown at the bottom of FIG. 17 may perform the inverse process of the header compression block 16000 described above.

As shown in FIG. 17, the header decompression block 17000 includes a mode demux 17100, a PMT parser 17200, a PID converter 17300, and a PID generator. (PID regenerator) (17400), TS header regenerator (TS header re-generator) (17500) and sync byte insertion (sync byte insertion) (17600).

Similar to the header compression block 16000 described above, the header decompression block 17000 may be processed differently according to the header compression mode applied at the transmitting end. The header compression mode according to an embodiment of the present invention may include a sync byte reduction mode for deleting only sync bytes, a PID compression mode for compressing PID when configured with the same service, and a PID reduction mode for deleting PID. Hereinafter, the operation of the blocks included in the header decompression block 17000 according to each mode will be described.

1) In the case of the sync byte reduction mode, the sync byte insertion 17600 may recover the sync byte according to the header compression mode information output from the mode demux 17100.

2) In the case of the PID compression mode, the PMT parser 17200 receives the PMT according to the header compression mode information output from the mode demux 17100, and the elementary PID value included in the PMT to the PID converter 17300 Can deliver. The PID converter 17300 may recover the compressed PID using the PID converter 17300.

The PID generator 17400 may recover data and a section packet PID value using the received PID-sub value. Using this information, the TS header generator 17500 can recover the remaining TS headers such as the continuation counter (CC) value and the EI, and the sync byte insertion 17600 recovers the sync byte. can do.

3) In the case of the PID reduction mode, the PID generator 17400 can recover PID using the PID information of the BB-frame obtained from the PID converter 17300, and the TS header generator 17500 has a CC value. And the rest of the TS header, such as EI, and the sync byte can be recovered from the sync byte insertion 260.

18 is a flowchart illustrating a header compression process according to an embodiment of the present invention.

As described above, the header compression mode according to an embodiment of the present invention may include a sync byte delay mode for deleting only sync bytes, a PID compression mode for compressing PIDs, and a PID reduction mode for deleting PIDs. The header compression mode according to an embodiment of the present invention may be transmitted through signaling information (mode field) having a size of 2 bits, and may indicate each mode according to each bit value.

18, the header compression mode according to an embodiment of the present invention may be divided into a non-PID compression mode and a PID compression mode (S18000). The non-PID compression mode may include a mode that does not compress the header and a sync byte reduction mode, and the PID compression mode may include a PID compression mode that compresses the PID and a PID reduction mode that deletes the PID. You can.

In addition, the non-PID compression mode according to an embodiment of the present invention may include a case in which signaling information having a size of 2 bits described above is 00 and 01 (S18100). In addition, the PID compression mode according to an embodiment of the present invention may include a case in which signaling information having a size of 2 bits described above is 10 and 11 (S18200).

When the non-PID compression mode is a mode in which the header is not compressed, the header compression block according to an embodiment of the present invention does not compress the header. In this case, the mode field has a value of 00, and a header having a size of 4 bytes may be transmitted (S18110).

When in the non-PID compression mode and in the sync byte reduction mode, the header compression block according to an embodiment of the present invention may perform sync byte reduction (S18120). In this case, the mode field has a value of 01, and a header having a size of 3 bytes may be transmitted (S18121).

* In the case of the PID compression mode, in the case of the PID compression mode for compressing the PID, the header compression block according to an embodiment of the present invention may perform sink byte delay (S18210), and perform PID compression (S18211). . In this case, the mode field has a value of 10, and a header and PMT_PID having a size of 2 bytes may be transmitted (S18212).

In the case of the PID compression mode, as in the case of the PID compression mode, the header compression block according to an embodiment of the present invention may perform sink byte reduction (S18220) and perform PID reduction (S18221). In this case, the mode field has 11 values, and a header and PID having a size of 1 byte may be transmitted (S18222).

19 is a flowchart illustrating a header decompression process according to an embodiment of the present invention.

As described above, the header decompression process according to an embodiment of the present invention corresponds to the reverse process of the header compression described above. Therefore, the broadcast signal receiver according to an embodiment of the present invention may perform header decompression using information on the header compression mode processed by the transmitting end. As described above, the header compression mode according to an embodiment of the present invention may be transmitted through signaling information (mode field) having a size of 2 bits, and each mode may be indicated according to each bit value.

The broadcast signal receiver according to an embodiment of the present invention may perform header decompression according to received header decompression mode information.

As shown in FIG. 19, the header compression mode according to an embodiment of the present invention may be divided into a non-PID compression mode and a PID compression mode (S19000). The non-PID compression mode may include a header compression mode and a sync byte reduction mode, and the PID compression mode may include a PID compression mode for compressing PIDs and a PID deletion mode for deleting PIDs. have.

In addition, the non-PID compression mode according to an embodiment of the present invention may include a case in which signaling information having a size of 2 bits described above is 00 and 01 (S19100). In addition, the PID compression mode according to an embodiment of the present invention may include a case in which signaling information having a size of 2 bits described above is 10 and 11 (S19200).

When the non-PID compression mode is a mode in which headers are not compressed, the header decompression block according to an embodiment of the present invention does not perform header decompression.

In the case of the non-PID compression mode and the sync byte reduction mode, the header decompression block according to an embodiment of the present invention performs sync byte insertion as a reverse process of the sync byte reduction processed by the transmitting end. It can be done (S19110).

In the case of the PID compression mode, in the case of the PID compression mode for compressing the PID, the header decompression block according to an embodiment of the present invention performs a sync byte insertion as an inverse process of the sync byte delay (S19210), and the PID compression. PID decompression may be performed as an inverse process (S19211). Thereafter, the header decompression block according to an embodiment of the present invention may perform TS header regeneration (regeneration) (S19230).

In the case of the PID compression mode as the PID compression mode, the header decompression block according to an embodiment of the present invention performs a sync byte insertion as an inverse process of the sync byte depression (S19220), and the reverse of the PID depression. PID insertion may be performed as a process (S19221). Thereafter, the header decompression block according to an embodiment of the present invention may perform TS header regeneration (S19230).

20 is a view showing a relationship between a compressed TS header and an original TS header before compression according to a sync byte delivery mode according to an embodiment of the present invention.

20, (a) shows a TS header before compression, and (b) shows a TS header compressed according to a sync byte reduction mode according to an embodiment of the present invention.

As shown in (a), the TS header before compression has a sync byte of 1 byte, a transport error indicator (EI) of 1 bit, a payload unit start indicator (SI) of 1 bit, a transport priority (TP) of 1 bit, 13 It may include a PID of a bit, a scrambling control (SC) of 2 bits, an adaptation field control (APC) of 2 bits, and a Continuity Counter (CC) of 4 bits.

As shown in (b), the compressed TS header does not include sync bytes. In the sync byte reduction mode, the sync byte (0x47) is deleted and not transmitted. Therefore, the EI bit is replaced with the NI (Null Packet Indicator) bit. The NI bit corresponds to a bit for extending a deleted null-packet (DNP) value, which will be described later. Therefore, one byte can be deleted from the signal transmitted in this mode. Details will be described later.

21 is a diagram illustrating a relationship between a compressed TS header according to a PID compression mode and a TS header before compression according to an embodiment of the present invention.

21, (a) shows the TS header before compression, (b) shows the first embodiment of the TS header compressed according to the PID compression mode according to an embodiment of the present invention, and (c) shows A second embodiment of the compressed TS header according to the PID compression mode according to an embodiment of the present invention is shown.

(A) illustrated in FIG. 21 is the same as (a) described in FIG. 19, and thus detailed description thereof will be omitted.

As shown in (b) and (c) of FIG. 21, according to the PID compression mode, the header compression block according to an embodiment of the present invention may delete sync bytes and EI from the TS header before compression. The EI is an indicator indicating whether there is an error in the TS packet, but it is always assumed that there is no error, so the header compression block according to an embodiment of the present invention can delete the EI. In this case, the apparatus for receiving broadcast signals according to an embodiment of the present invention may perform an error check after decoding and re-enter EI in consideration of the presence or absence of an error.

In addition, the apparatus for transmitting broadcast signals according to an embodiment of the present invention can divide the 13-bit PID into PID-PMT and PID-sub and transmit only the PID-sub through the TS header. In this case, the PID-PMT may be transmitted through the BB-frame header. Since the PID-sub has a length of 5 bits, a total of 8 bits can be compressed for the entire PID, and the length of the PID-sub can be changed according to the designer's intention.

The first and second embodiments of the TS header compressed according to the PID compression mode shown in (b) and (c) of FIG. 21 differ according to whether the CC is compressed and the NI is expanded. In the first embodiment shown in (b) of FIG. 21, NI may have a size of 1 bit, and CC may be transmitted without compression. In this case, CC can be used for TS packet recombination or error estimation.

In the case of the second embodiment shown in (c) of FIG. 21, NI may have a size of 4 bits, and CC is compressed with 1 bit and transmitted, or CC sync flag of 1 bit instead of CC is transmitted. You can. Also, the positions of the SC and AFC can be changed. The extended NI can be used as an MSB of DNP, which will be described later, and thus has the advantage of displaying more null packets. In this case, the position of the NI can be changed according to the designer's intention.

22 is a table showing PID-sub according to an embodiment of the present invention.

Specifically, (a) shown in FIG. 22 is a table showing the configuration method of PID-sub, and (b) is a table showing a section when the PID-sub [4] value is 0.

As shown in (a) of FIG. 22, the PID-sub [4] value may indicate the section information and the PID index of the PMT.

Specifically, if the PID-sub [4] value is 0, it means that the PID-sub [3] to [0] values indicate the PID of the section packet. In this case, a total of 16 PIDs can be indicated. When PID-sub [4] is 1, data transfer mode. When PID-sub [3] is 0, PID-subB [2] to [0] values indicate the PID index value of the PMT. do. In this case, a total of 8 PID index values can be indicated. When the PID-sub [4] value is 1 and the PID-sub [3] value is 1, it indicates that it is a reserved area for transmitting information to be expanded later.

22B is a table showing specific table information corresponding to each value when the PID-sub [4] value is 0.

Field values shown in (a) and (b) of FIG. 22, but corresponding information may be changed according to a designer's intention.

23 is a diagram illustrating a PID compression process according to an embodiment of the present invention.

23 (a) shows a TS stream before compression, and (b) shows a TS stream that has undergone TS compression. (c) is a table showing the PID and index of components included in the TS stream before compression, and (d) is a table showing the configuration method of PID-sub.

As shown in FIG. 23, the TS stream may include one video stream and two audio streams.

The apparatus for transmitting broadcast signals according to an embodiment of the present invention may indicate sections such as a program association table (PAT) and a conditional access table (CAT) using 5-bit PID-sub instead of the existing 13-bit PID.

That is, as described in FIG. 22, since it is for indicating section information, the PID-sub [4] value becomes 0, and according to the table in FIG. 23 (d), PAT is represented by 0x00 and CAT is represented by 0x01. Can be. In addition, in the case of a video stream and an audio stream, the apparatus for transmitting broadcast signals according to an embodiment of the present invention transmits the PID information of the PMT through the BB-frame header, and indexes the elementary PIDs of the remaining components in the PID-sub. It can be compressed and transmitted. That is, when indicating the PID of components, PID-sub [4: 3] has a value of 10, and the remaining PID-sub [2: 0] may have 001 to 011 based on the PMT table. In addition, the apparatus for transmitting broadcast signals according to an embodiment of the present invention can compress by setting PID-sub [2: 0] of the PMT to 000.

24 is a diagram showing a relationship between a compressed TS header and a pre-compressed TS header according to a PID delivery mode according to an embodiment of the present invention.

24 (a) shows the TS header before compression, and (b) shows the TS header compressed according to the PID reduction mode according to an embodiment of the present invention.

The PID reduction mode can be applied to a single TS packet stream having one PID. In this mode, a 13-bit PID can be removed from the TS packet header. Like the PID compression mode, the sync byte (0x47) is deleted, and the EI bit can be replaced with an NI bit at the transmitting end. CC of 4 bits can be reduced to 1 bit. The deleted 13-bit PID value is transmitted in the signal frame.

25 is a view showing a PMT according to an embodiment of the present invention.

PMT according to an embodiment of the present invention, the table ID (table_id), section syntax indicator (section_syntax_indicator), section length field (section length field), program number field (program number field), version number field (version number field), Current-next indicator (current_next_indicator), section number field, last section number field, PCR_PID field, program info length field (program_info_length), first for loop and stream type field for descriptor, element A second for loop including a primary PID (elementary_PID) field, an ES info length (ES_info_length) field, and a CRC 32 may be included. Each field will be described below.

The table id field has a size of 8 bits and can indicate the type of the table.

The section syntax indicator may indicate the format of the table section.

The section length field has a size of 12 bits and may indicate the length of a table section located next to this field.

The program number field has a size of 16 bits and can identify each program service existing in the transport stream.

The version number field has a size of 5 bits and may indicate the version number of the table.

The current-next indicator can indicate whether the data is currently in effect or will be used in the future. The section number field is an index indicating which tables are in the sequence of related tables.

The last section number field indicates which table is the last table in the sequence of tables.

The PCR_PID field is an identifier of a packet including a program clock reference, and the program clock reference is obtained from a program time stamp and is used to increase the accuracy of random access to the timing of the stream.

The program info length field may indicate the number of bytes that follow for program descriptors.

The first for loop for the descriptor indicates the location of the descriptor, and may include individual descriptors corresponding to zero or more numbers.

The second for loop will be described below.

The stream type field may define a structure of data included in the elementary packet identifier.

The elementary PID field is an identifier of a packet including stream type data.

The ES info length field may indicate the number of bytes of the elementary stream descriptors.

CRC 32 represents the checksum of the entire table except the pointer field, pointer filler bytes, and trailing CRC32.

26 is a diagram illustrating a relationship between a compressed TS header and a pre-compressed TS header according to a PID compression mode according to another embodiment of the present invention.

26 (a) shows the TS header before compression, and (b) shows the TS header compressed according to the PID compression mode according to another embodiment of the present invention.

The compressed TS header shown in FIG. 26 is compressed in FIG. 21 in that the DNPMSB bit is input instead of the deleted EI bit and the 13-bit PID is compressed into 8-bit PID-Sub (or Sub-PID). It is different from the TS header.

In PID compression mode, one DP includes one TS packet stream, and one TS packet stream has one PMT packet PID value and one or more service packets with different PIDs. Should be applied.

In this case, the 13-bit PID value can be compressed into an 8-bit PID-Sub. The 8-bit PID-Sub MSB can indicate the type of the transmitted packet. 7 bits can indicate the address of transport packets.

26 shows the relationship between PID and PID-Sub before compression. According to the PID compression mode according to another embodiment of the present invention, the sync byte (0x47) is deleted, and the TS EI bit may be replaced with the DNPMSB bit. A 4-bit continuity counter (CC) can be compressed with a 1-bit CC sync flag.

27 is a diagram illustrating a table showing PID-Sub and a mapping table for CC (Continuity Counter) compression according to another embodiment of the present invention.

Specifically, (a) shown in FIG. 27 is a table showing a configuration method of PID-Sub (or sub-PID), and (b) is a mapping table for CC compression.

As shown in (a), when the Sub-PID [7] value is 0, the remaining Sub-PID [6: 0] values may indicate a predetermined PID. Specifically, specific values of Sub-PID [6: 0] may indicate PID or null packets for section packets such as PAT and CAT. When the Sub-PID [7] value is 1, the remaining Sub-PID [6: 0] values can indicate the index of the PID values of data or components, and the actual PID values are signaling information in the signal frame, that is, PLS information. And the like.

(b) is a mapping table for compressing the CC, and the value of the CC sync flag is set to 1 only when the value of CC is 0000, and the value of the CC sync flag can be set to 0 for the remaining values.

The field values shown in (a) and (b) of FIG. 27, but corresponding information can be changed according to a designer's intention.

28 is a diagram illustrating a PID compression process according to another embodiment of the present invention.

28 (a) shows a TS stream before compression, and (b) shows a TS stream that has undergone TS compression.

As shown in (a), various PIDs may be included in the TS packet or TS stream before compression. If the included packet is a section packet (CAT: 0x001, PAT: 0x000, etc.) or a null packet (0x1FF), the Sub-PID [7] value is set to 0, and the PID of the PAT Can be set to 0x00, the PID of the CAT is 0x01, and the PID of the null packet is 0x1F.

For data or components, PID can be composed of 0x010, 0x011, 0x014, this value is transmitted through PLS, Sub-PID [7] value is set to 1, and Sub-PID [6: 0] is PLS Only the index stored in can be transferred.

Correspondingly, the apparatus for receiving broadcast signals according to an embodiment of the present invention can recover the PID using the index value shown in the above table and the actual PID value transmitted through the PLS.

In the case of a conventional broadcast signal transmission apparatus, when receiving a TS stream as input data, the TS stream is divided into packets (or data packets) of a service or service component unit for efficient transmission. During this process, packets other than packets for the service or service component may be replaced with null packets. Null packets are required for CBR (Constant Bit Rate) transmission, but since they do not have any information, transmission efficiency can be improved by deleting and transmitting them when transmitting. In this case, the apparatus for transmitting broadcast signals may insert a DNP counter (or DNP) indicating the number of null packets deleted at the beginning of each TS packet so that null packets deleted at the receiving end can be recovered. The DNP counter has a size of 8 bits and can be sequentially increased by 1 according to the number of deleted null packets to have a value up to 255. However, in the next-generation broadcast service according to an embodiment of the present invention, when a signal having a low data rate is transmitted, or when several services are divided into small units, or when a large video signal such as UD is divided Therefore, there may be a larger number of consecutive null packets than a conventional broadcast service. If the DNP reaches the maximum allowable value of the DNP counter, and then a null packet is located again, the corresponding null packet is maintained as a usable packet and transmitted.

However, in this case, since a null packet is inserted, a problem that lowers the transmission efficiency of the TS stream may occur. In order to solve this problem, DNP can be extended to 2 bytes, but this method may also have a problem that TS stream transmission efficiency is low.

In the present invention, a DNP extension method for solving the above-described problems will be described. Specifically, the present invention proposes a method of transmitting a DNP extension (DNPE) in a compressed TS header as a DNP extension method. Details will be described later.

The receiver can accurately re-insert the deleted null packets by using the DNP counter inserted during transmission. Therefore, a constant bit rate can be guaranteed, and a separate time stamp (PCR) update is not required.

29 is a diagram illustrating a null packet delivery block according to another embodiment of the present invention.

The null packet reduction block 29000 illustrated in FIG. 29 is another embodiment of the null packet reduction block 3300 described with reference to FIG. 3.

The null packet delivery block can be used only in the case of a TS input stream case. Some TS input streams or separated TS streams may include a large number of null packets in order to provide variable bit-rate (VBR) services in a constant bit-rate (CBR) TS stream. The null packet delay block 29000 according to another embodiment of the present invention includes a null packet check block 29100, a null packet deletion block 29200, and a DNP insertion. Block 29300 and a null packet counter block 29400 may be included. Hereinafter, the operation of each block will be described.

The null packet check block 29100 may check whether the current packet is a null packet through the PID of the input TS packet.

If it is determined that the packet is a null packet, the null packet delivery block 29200 may delete the corresponding null packet. In this case, the DNP insertion block 29300 may count the number of deleted null packets and insert a DNP counter in front of the TS packets.

If the result of the determination is not a null packet, the null packet delivery block 29200 does not operate on the corresponding packet, and the null packet counter block 29400 may reset the number of null packets to zero. Thereafter, the DNP insertion block 29300 may insert a DNP before the next TS packet by using the null packet counter value calculated in the null packet counter block 29400.

When using the DNP offset method, the null packet counter block 29400 can extract the offset of the DNP value by the BB frame period and insert the DNP offset value in the BB-frame header. In this case, the DNP insertion block 29300 may insert a compressed DNP value before the TS packet. The DNP offset method will be described later.

30 is a diagram illustrating a null packet insertion block according to another embodiment of the present invention.

The null packet insertion block 30000 shown in FIG. 30 is another embodiment of the null packet delivery block 13100 described with reference to FIG. 13.

The null packet insertion block 30000 according to another embodiment of the present invention includes a DNP check block 30100, a null packet insertion block 30200, and a null packet generator block 30300. can do. Hereinafter, the operation of each block will be described.

The DNP check block 30100 may extract a DNP value and a DNP offset value from input data. Thereafter, the null packet insertion block 30200 may receive and insert a null packet generated in advance in the null packet generator block 30300.

31 shows a DNP extension method according to an embodiment of the present invention.

(a) shows a DNP extension method of inserting 1 or 4 bits of DNPE into a compressed TS header according to the PID compression mode according to an embodiment of the present invention.

(b) shows a DNP extension method of inserting 1 bit of DNPE into a compressed TS header according to a PID delivery mode according to an embodiment of the present invention.

As a case where null packet delay is used, after a data TS packet is transmitted, the DNP counter (or DNP) has a first reset value, and the value may increase for each deleted null packet. As described above, the DNP counter value may indicate the number of null packets deleted. The DNP according to an embodiment of the present invention can count up to 255 consecutive null packets. DNPE according to an embodiment of the present invention is used to extend the maximum value of the DNP described above, it may be used when the number of consecutive null packets exceeds 255.

The DNP according to an embodiment of the present invention is inserted at the beginning of the next data packet, and the DNPE according to an embodiment of the present invention may be located in the compressed TS packet header of the next data TS packet.

In the case of the compressed TS packet header shown at the top of (a), since 1 bit of DNPE is used, the maximum value of DNP is 9 bits plus 1 bit to the existing 8 bits. Therefore, the DNP counter can indicate the total number of 511 deleted null packets. In the case of the compressed TS header shown at the bottom of (a), since 4 bits of DNPE are used, the maximum value of DNP is 12 bits by adding 4 bits to the existing 8 bits. Therefore, the DNP counter can indicate the total number of 4095 deleted null packets.

The compressed TS header shown in (b) is a case where the PID is deleted, and a 1-bit DNPE can be inserted in the front part of the compressed TS header. In this case, the maximum value of DNP is 9 bits plus 1 bit in the existing 8 bits, and the DNP counter can indicate the total number of 511 deleted null packets.

The size and insertion position of the DNPE described above can be changed according to the designer's intention.

32 is a diagram showing a DNP offset according to an embodiment of the present invention.

(a) shows a process of splitting an input TS stream according to the prior art, and (b) shows a DNP offset for audio packets.

When the input TS stream is divided as shown in (a), a plurality of null packets may be generated. In particular, when a plurality of TS streams are combined, such as a big TS stream, or when one TS stream is divided at a component level or as a video packet or audio packet in a big TS stream such as a UD service, null packets are periodically transmitted. Can be inserted as In this case, the number of null packets to be inserted can be varied, but basically the number of null packets to be inserted can be preset.

The present invention proposes a method of transmitting the number of null packets that is basically inserted, that is, the basic value through a BB frame using DNP-offset.

TS input streams containing consecutive TS packets and deleted null packets or divided TS streams may be mapped to the payload of the BB frame as shown in (b). The BB frame may include a BB frame header and a payload, and the BB frame header may be inserted in the front portion of the payload.

DNP offset according to an embodiment of the present invention is the minimum number of DNPs belonging to the same BB frame. The DNP offset may be transmitted through the BB frame header. Through this, it is possible to reduce the number of DNPs inserted in front of TS packets and to implement efficient TS packet transmission, and to remove more null packets.

The DNP offset of the present invention can be used simultaneously with the DNP extension described above, and the size of the DNP offset can be changed according to the intention of the designer.

33 is a flowchart of a method for transmitting broadcast signals according to an embodiment of the present invention.

The apparatus for transmitting broadcast signals according to an embodiment of the present invention may format at least one input stream and output DP data corresponding to each of a plurality of DPs (S33000). As described above, a data pipe is a logical channel of a physical layer, and may transmit service data or related metadata, and may transmit one or more services or service components. Data transmitted through DP may be referred to as DP data. In addition, the apparatus for transmitting broadcast signals according to an embodiment of the present invention may divide at least one input stream into a plurality of DP data including data packets, and compress headers in each data packet according to a header compression mode. Details are as described in FIGS. 16 to 32.

The apparatus for transmitting broadcast signals according to an embodiment of the present invention may encode DP data (S33100). The specific encoding method is as described above.

Thereafter, the apparatus for transmitting broadcast signals according to an embodiment of the present invention may map the encoded DP data to the constellation (S33200). The specific mapping method is as described above.

Thereafter, the apparatus for transmitting broadcast signals according to an embodiment of the present invention may time-interleave the encoded DP data (S33300). Thereafter, the apparatus for transmitting broadcast signals according to an embodiment of the present invention may generate at least one signal frame including time-interleaved DP data (S33400). Details are as described above.

Thereafter, the apparatus for transmitting broadcast signals according to an embodiment of the present invention may modulate the generated at least one signal frame in an OFDM manner (S33500), and transmit a broadcast signal including the modulated at least one signal frame ( S33600).

34 is a flowchart of a method for receiving broadcast signals according to an embodiment of the present invention.

The flow chart shown in FIG. 34 corresponds to an inverse process of the broadcast signal transmission method described in FIG. 33.

The apparatus for receiving broadcast signals according to an embodiment of the present invention may receive at least one broadcast signal (S34000).

Thereafter, the apparatus for receiving broadcast signals according to an embodiment of the present invention may demodulate at least one of the received broadcast signals in an OFDM (Othogonal Frequency Division Multiplexing) scheme (S34100). The specific process is as described above.

Thereafter, the apparatus for receiving broadcast signals according to an embodiment of the present invention may obtain at least one signal frame from at least one demodulated broadcast signal (S34200). Details are as described above.

Thereafter, the apparatus for receiving broadcast signals according to an embodiment of the present invention may time deinterleave DP data included in at least one parsed signal frame (S34300). Details are as described above.

Thereafter, the apparatus for receiving broadcast signals according to an embodiment of the present invention may demap DP data (S34400) and decode the de-mapped DP data (S34500). As described above, each DP data can be individually processed through a corresponding DP path, and specific processing is as described above.

Thereafter, the apparatus for receiving broadcast signals according to an embodiment of the present invention may output-process the decoded DP data (S34600). More specifically, the apparatus for receiving broadcast signals according to an embodiment of the present invention may decompress the header of each data packet in the decoded DP data according to the header decompression mode. Details are as described in FIGS. 16 to 32.

Claims (8)

Formatting at least one input stream including at least one null packet and input packets into PLP (Physical Layer Pipe) data, wherein the formatting step comprises:
Removing sync bytes from each input packet;
Deleting the at least one null packet inserted before at least one input packet included in the input stream; And
And selectively compressing the input packets by deleting common information of the first headers of the input packets, wherein the common information is transmitted once in a data packet, and a second before the at least one input packet. A header is inserted, and the second header is the header of the data packet and includes information for the number of null packets deleted;
Encoding the PLP data;
Mapping the encoded PLP data to constellations;
Time interleaving the mapped PLP data;
Building at least one signal frame including the time interleaved PLP data;
Modulating data of the at least one signal frame with an orthogonal frequency division multiplexing (OFDM) scheme; And
Transmitting a broadcast signal including the modulated data; Containing
Broadcast signal transmission method. The method of claim 1, wherein the header of the data packet further includes type information for identifying a packet type of the input packets. An input formatter for formatting at least one input stream including at least one null packet and input packets into PLP (Physical Layer Pipe) data, wherein the input formatter
Remove sync bytes from each input packet,
Delete the at least one null packet inserted before at least one input packet included in the input stream,
The input packets are selectively compressed by deleting common information of the first headers of the input packets, the common information is transmitted once in a data packet, and a second header is inserted before the at least one input packet. , The second header is a header of the data packet and includes information for the number of null packets deleted;
An encoder that encodes the PLP data;
A mapper that maps the encoded PLP data to constellations;
A time interleaver for time interleaving the mapped PLP data;
A frame builder building at least one signal frame containing the time interleaved PLP data;
A modulator for modulating data of the at least one signal frame with an orthogonal frequency division multiplexing (OFDM) scheme; And
A transmission unit for transmitting a broadcast signal including the modulated data; Containing
Broadcast signal transmission device. The apparatus of claim 3, wherein the header of the data packet further includes type information for identifying a packet type of the input packets. Receiving a broadcast signal;
Demodulating the received broadcast signal by an orthogonal frequency division multiplexing (OFDM) scheme;
Parsing at least one signal frame from the demodulated broadcast signal and outputting PLP data;
Time deinterleaving the PLP data;
Demapping the time deinterleaved PLP data;
Decoding the demapped PLP data;
The output processing of the decoded PLP data (output processing), the output processing,
Parsing a data packet included in the decoded PLP data and outputting at least one output packet;
Selectively restoring first headers of the at least one output packet using information included in the data packet, the information being common to the headers of the at least one output packet; And
Re-creating at least one null packet before the at least one output packet, and a second header of the data packet indicates the number of null packets to be regenerated; And
Restoring a sync byte in each output packet; Containing
Method for receiving broadcast signals. The method of claim 5, wherein the header of the data packet further includes type information for identifying a packet type of the output packets. A receiver for receiving a broadcast signal;
A demodulator demodulating the received broadcast signal by an orthogonal frequency division multiplexing (OFDM) scheme;
A frame parser that parses at least one signal frame from the demodulated broadcast signal and outputs PLP data;
A time deinterleaver for time deinterleaving the PLP data;
A demapper to demap the time deinterleaved PLP data;
A decoder for decoding the demapped PLP data; And
An out processor for output processing the decoded PLP data (output processing), the out processor,
A first module for parsing a data packet included in the decoded PLP data and outputting at least one output packet;
A second module for selectively restoring first headers of the at least one output packet using the information included in the data packet, the information being common to the headers of the at least one output packet; Including,
Regenerating at least one null packet before the at least one output packet, the second header of the data packet indicates the number of null packets to be regenerated, and restoring sync bytes in each output packet; Containing
Broadcast signal receiving device. The apparatus of claim 7, wherein the header of the data packet further includes type information for identifying a packet type of the output packets.

Images