KR20190068069A - Tape for protecting semiconductor wafer - Google Patents

Abstract

The present invention relates to a tape for protecting a semiconductor wafer, which maintains the elastic modulus to an appropriate level when grinding the semiconductor wafer by introducing a polymer derived from a styrene-based or naphthalene-based aromatic compound having an aliphatic chain into a buffer layer, and thus facilitates the shock absorption at the time of grinding so that damage to a chip can be minimized.

Description

TAPE FOR PROTECTING SEMICONDUCTOR WAFER

An embodiment relates to a tape for protecting a semiconductor wafer.

As semiconductor wafers become thinner at a thickness of 50 to 100 탆 or 50 탆 or less due to the trend of thinning, semiconductor wafers are processed by grinding (grinding) wafers and then dicing after grinding ; DAG), and then turning to a dicing before grinding (DBG) method.

The DBG method is a method in which a wafer on which a bump and a circuit are formed is formed into a groove on a street (back surface) on a wafer by a half cutting dicer, a tape having adhesive force is attached to the groove- Grinding and separating into chips. At this time, the used tape is called DBG back grinding tape (back grinding tape), and it is different from the back grinding tape that was used in the prior art in which wires are used instead of bumps.

Specifically, the back grinding tape for DBG has a function of removing an unnecessary film on one surface of a wafer during a semiconductor manufacturing process, cutting off a thicker surface than necessary to reduce the resistance and improving thermal conductivity, and adhere to the other surface of the wafer, And bumps. In addition, it plays a role of maintaining individual chips uniformly arranged without damage even after semiconductor wafer grinding.

The back grinding tape for DBG used in semiconductor processing should be resistant to contamination and the adhesive component should not remain on the wafer. Accordingly, in the related art, it is known that a lot number (LOT NO.) Is indicated for each DBG back grinding tape product grade, there is no damage such as scratches on the outer surface of the tape and no defective and / or contamination such as a cut surface, use.

A high adhesive strength is required in a wafer grinding process in a typical semiconductor process, and a low adhesive strength is required in chip separation. Therefore, in the prior art, a tape having an ultraviolet ray-curable pressure-sensitive adhesive (layer) which is cured by ultraviolet rays is often used. The tape having the ultraviolet ray hardenable pressure sensitive adhesive layer has a high adhesive strength before being irradiated with ultraviolet rays, and is strongly bonded to the wafer and is excellent in wafer retention, and after being irradiated with ultraviolet rays, it hardens to lower the adhesive force, 9-298173). However, a tape requiring such adhesive property has a disadvantage in that after the peeling, the adhesive component is not completely removed from the chip and remains, thereby causing defective chip.

Further, in recent years, there is a tendency that a semiconductor wafer is thinned, so that it is necessary to protect a surface on which a bump and a circuit are formed even after the wafer is half-cut and ground. In particular, since thinned wafers can easily break even at small strengths, the tape must also serve to buffer the grinding shock during grinding.

Japanese Patent Application Laid-Open No. 9-298173

Therefore, the embodiment intends to provide a tape for protecting a semiconductor wafer, which has a wide range of adjustment of the modulus of elasticity by introducing a polymer derived from an aromatic monomer into the buffer layer, thereby facilitating chip protection in the grinding process.

An embodiment includes a substrate layer, a buffer layer formed on one surface of the substrate layer, and an adhesive layer formed on one surface of the buffer layer, wherein the buffer layer comprises a polymer derived from a styrene compound, a naphthalene compound, or both A semiconductor wafer protection tape is provided.

An embodiment provides a semiconductor wafer protection tape comprising a substrate layer, a buffer layer formed on one surface of the substrate layer, and an adhesive layer formed on one surface of the buffer layer, adhering the tape to one surface of the semiconductor wafer, And grinding the other surface of the semiconductor wafer,

Wherein the buffer layer comprises a polymer obtained by polymerizing a styrene compound, a naphthalene compound, or both thereof with at least one acrylic compound, wherein the styrene compound and the naphthalene compound include C _1-30 alkyl, C _1-10 alkoxy, C _6-10 aryl, and C < ₆ > ₁₀ aryloxy. &_{Lt; /} RTI >

By introducing a polymer derived from a styrene-based or naphthalene-based aromatic compound having an aliphatic chain into the buffer layer, the elasticity of the semiconductor wafer protective tape according to the embodiment can be maintained at an appropriate level during grinding of the semiconductor wafer, So that the damage of the chip can be minimized.

1 is a schematic view showing a method of manufacturing a semiconductor device according to an embodiment.
FIG. 2 is a photograph of the shape of a chip after the semiconductor wafer grinding process is performed using the semiconductor wafer protecting tape of Example 2 and Comparative Example 1. FIG.

An embodiment includes a substrate layer, a buffer layer formed on one surface of the substrate layer, and an adhesive layer formed on one surface of the buffer layer, wherein the buffer layer comprises a polymer derived from a styrene compound, a naphthalene compound, or both A semiconductor wafer protection tape is provided.

Specifically, the polymer contained in the buffer layer may be one derived from a styrene-based aromatic compound having an aliphatic chain as an aromatic monomer, a naphthalene-based aromatic compound, or both. The aromatic compound improves the heat resistance and elastic modulus of the polymer, thereby preventing the flowability of the wafer during the grinding process and minimizing the damage of the chip. In addition, the aromatic compound has an aliphatic chain, especially a dodecyl group, so that the improved solubility can be maintained and the molecular weight of the polymer can be controlled to an appropriate level. Aromatic compounds without substituents tend to have poor solubility and reactivity. Furthermore, the molecular weight of the polymer to be polymerized therefrom can be controlled by controlling the carbon number of the aliphatic chain of the aromatic compound.

The styrene compound and the naphthalene compound may have at least one substituent selected from the group consisting of C _1-30 alkyl, C _1-10 alkoxy, C _6-10 aryl, and C _6-10 aryloxy. Specifically, the styrene compound and the naphthalene compound may have at least one substituent selected from the group consisting of C _1-20 alkyl and C _6-10 aryl, and more specifically, the styrene compound and the naphthalene compound may have a substituent of C _5-15 alkyl .

 At this time, the substituents may be substituted at the ortho, meta, and para positions of the styrene-based or naphthalene-based compound, and the number of carbon atoms, positions of substituents, etc. are determined in consideration of electron density and the like . Specifically, when the substituent having 5 to 12 carbon atoms is substituted at the para position, the reactivity is more advantageous. More specifically, the styrene compound is at least one member selected from the group consisting of paradodecylstyrene, dimethylheptyloxy-styrene (vinylbenzene), and dimethyloxyloxy-methoxy-styrene (vinylbenzene) The compound may be at least one selected from the group consisting of paradodecylnaphthalene, and paradodecylnaphthalene acrylate.

The polymer used in the buffer layer may be derived from a styrene-based aromatic compound, a naphthalene-based aromatic compound, or both, as described above. The aromatic compound may be used in an amount of from 1 to 40% by weight, from 5 to 40% by weight, from 5 to 30% by weight, from 5 to 20% by weight, or from 5 to 15% by weight, based on the total weight of monomers constituting the polymer . When the content is within the above range, the uniformity of the polymer can be maintained at an appropriate level, and the polymer is more excellent in chemical resistance and heat resistance.

Further, the polymer may be obtained by polymerizing the styrene compound, the naphthalene compound, or both of them with a second monomer. At this time, the second monomer may be derived from an acrylic compound.

The second monomer may be at least one acrylic compound, and the acrylic compound may be selected from the group consisting of butyl acrylate, methyl methacrylate, 2-hydroxyethyl acrylate, acrylic acid, methacrylic acid, glycidyl methacrylate, 2- But are not limited to, hydroxyethyl methacrylate, 2-ethylhexyl acrylate, cyclohexyl methacrylate, and vinyl acetate.

The polymer contained in the buffer layer may be prepared by polymerizing an aromatic compound as described above with a second monomer, for example, one or more acrylic compounds. Specifically, after the second monomer is prepared, the aromatic compound is slowly added dropwise for 1 to 8 hours, 1 to 6 hours, or 2 to 4 hours, and then at 50 to 100 ° C or 60 to 90 ° C for 2 to 24 hours , 4 to 24 hours, 4 to 16 hours, or 4 to 12 hours. At this time, as the reaction time becomes longer, the molecular weight continues to increase. Therefore, in order to obtain a polymer having a desired weight average molecular weight, it is necessary to pay attention to the above time range.

The polymer contained in the buffer layer may have a weight average molecular weight of 100,000 to 500,000 g / mol, 100,000 to 300,000 g / mol, 100,000 to 250,000 g / mol, or 100,000 to 200,000 g / mol. Within this range, the buffer layer can maintain an appropriate level of elastic modulus. When the weight average molecular weight exceeds the above range and becomes excessively large, the buffer layer becomes hard and hard to function as a buffer.

The thickness of the buffer layer may be 10 to 400 탆, 50 to 300 탆, 50 to 200 탆, or 80 to 150 탆. Within this range, damage to the chip can be minimized.

As described above, by introducing a polymer derived from a styrene-based or naphthalene-based aromatic compound having an aliphatic chain into the buffer layer, the elastic modulus can be maintained at an appropriate level when the semiconductor wafer is ground, So that damage to the chip can be minimized. Specifically, the polymers derived from the aromatic compounds have excellent storage modulus at various temperature ranges. It is important to maintain the modulus of elasticity at a higher temperature. Specifically, it is important to maintain a desired modulus of elasticity at the temperature because the temperature rises to 60 deg. C on average during grinding during semiconductor processing.

The buffer layer may have a storage modulus of 1 MPa or less, 0.5 MPa or less, 0.3 MPa or less, 0.01 to 1 MPa, 0.01 to 0.5 MPa, 0.1 to 1 MPa, or 0.1 to 0.5 MPa at 25 캜 (room temperature). The buffer layer may have a storage elastic modulus at 60 占 폚 of 0.3 MPa or less, 0.2 MPa or less, 0.01 to 0.3 MPa, 0.1 to 0.3 MPa, or 0.1 to 0.2 MPa. The storage elastic modulus of the buffer layer may be reduced by a certain amount when the buffer layer is elevated from a room temperature to a high temperature. For example, when the temperature is increased from 25 ° C (room temperature) to 60 ° C, 5 to 20%, or 5 to 15% (see Test Example 1).

In addition, the semiconductor wafer protective tape according to the embodiment can prevent chip damage when the residual thickness of the semiconductor wafer is 150 탆 or less, 40-150 탆 or about 150 탆 in the back grinding process after the tape is attached to one surface of the semiconductor wafer The chip damage rate can be 3% or less, 2.5% or less, 2% or less, or 1% or less (see Test Example 2).

After attaching the semiconductor wafer protection tape according to the embodiment to one surface of a half-diced semiconductor wafer, the surface of the semiconductor wafer protective tape according to the embodiment is removed from the cutting start point to the polishing (grinding) depth end point by 30 占 퐉 or more, The chip damage ratio can be minimized even when a thickness of 60 占 퐉 or 30 占 퐉 to 50 占 퐉 is polished. For example, the chip damage ratio may be 2% or less, or 1% or less. At this time, the cutting start point of the chip means a half-cut dicing point of the wafer, and the polishing depth end point means a point where polishing is finished in the thickness direction from the other surface of the wafer.

The substrate layer of the semiconductor wafer protective tape may be a resin commonly used in the art. For example, the base layer may be formed of a resin such as a polyethylene terephthalate resin (PET resin), a polyethylene resin, a polypropylene resin, a polyurethane resin, A vinyl resin, an acrylic resin, and an amide resin, and may be specifically a PET resin, but the present invention is not limited thereto.

The thickness of the base layer may be 30 to 150 占 퐉, 50 to 120 占 퐉, 50 to 100 占 퐉, or 75 to 100 占 퐉. When the thickness is within the above range, the appropriate modulus of elasticity of the entire semiconductor wafer protective tape can be ensured, It is possible to improve the workability such as roll-up of the roll.

The adhesive layer of the semiconductor wafer protective tape may be at least one resin selected from the group consisting of an acrylic resin, an epoxy resin, a urethane resin, an ester resin, and a vinyl acetate resin, and may specifically be an acrylic resin or an ester resin.

The resin of the adhesive layer may have a weight average molecular weight of 50,000 to 2,000,000 g / mol, or 100,000 to 800,000 g / mol. If the weight average molecular weight of the resin constituting the adhesive layer is larger, the adhesive strength is improved. If the adhesive strength is lower than the above range, the adhesive strength is lowered. If the adhesive strength is larger than the above range, the adhesive component may remain on the wafer even after tape peeling.

The thickness of the pressure-sensitive adhesive layer may be 10 to 50 占 퐉, or 10 to 30 占 퐉. When the pressure-sensitive adhesive layer is within the above range, the occurrence of residue on the wafer can be reduced.

The tape for protecting a semiconductor wafer according to the embodiment can be manufactured by the following method.

Specifically, a base layer (or base film) made of a polyolefin resin such as polyethylene resin or polypropylene resin, a polyethylene terephthalate resin (PET), a polyurethane resin, a polyvinyl chloride resin, an acrylic resin, an amide resin, And then sequentially coating and drying the resin constituting the buffer layer and the adhesive layer as described above on one surface of the substrate layer. The kind, content, etc. of the resin or polymer constituting the substrate layer, the buffer layer and the adhesive layer are as described above.

The coating method can be used without limitation as long as it is well known in the art. For example, a comma coating, a spin-on coating, a slit coating, a bar coating or a spray coating may be used. And then passed through a drying chamber that is long connected.

The semiconductor wafer protective tape thus produced may have a thickness of 50 to 700 占 퐉, 50 to 500 占 퐉, 100 to 500 占 퐉, or 100 to 300 占 퐉.

The embodiment can provide a semiconductor device including the above-described semiconductor wafer protection tape and a manufacturing method thereof.

Specifically, the embodiment provides a semiconductor wafer protection tape comprising a substrate layer, a buffer layer formed on one surface of the substrate layer, and an adhesive layer formed on one surface of the buffer layer, Wherein the buffer layer comprises a polymer obtained by polymerizing a styrene compound, a naphthalene compound, or both, with an acrylic compound (second monomer) as described above, and the step of polishing the wafer Of the present invention.

Referring to FIG. 1, the embodiment performs a step of forming grooves between half-cutting dies on a street of a wafer. Generally, full cutting is performed in dicing, but in this manufacturing method, half-cutting is performed to chips formed on the wafer. At this time, the point where the half-cut dicing is performed is referred to as a cutting start point of the chip.

Next, a semiconductor wafer protection tape as described above is attached to one surface of the grooved wafer. Then, a step of back grinding the other surface of the wafer and grinding is carried out until the chip is separated. When the grinding proceeds and reaches the half-cut groove, the wafer can be separated into individual chips.

Then, in order to remove the tape from the separated wafer and obtain a chip, the separated wafer is transferred in-line to the DBG mounter for alignment, then mounted on the frame, and then the tape is removed .

Hereinafter, the present invention will be described in more detail with reference to the following examples. However, the following examples are intended to illustrate the present invention, but the scope of the present invention is not limited thereto.

Manufacturing example  One : Adhesive layer  Manufacture of resin

130 g of bifunctional urethane acrylate (trade name UX3301, weight average molecular weight 8,000 mg / mol, Nippon Kayaku) containing ester diol group as the main resin, 70 g of acryloylmorpholine (trade name ACMO, Gojin) Cyclohexyl-phenyl-ketone (trade name: Irgacure 184, manufactured by Ciba Specialty Chemicals) were mixed to prepare a liquid resin.

Manufacturing example 2: Polymer (buffer layer resin)  Produce

Step 1: A 1 L three-necked round flask was equipped with a thermometer, a condenser, a dropping funnel and a mechanical stirrer, and then immersed in a thermostat at 80 ° C. 300 g of ethyl acetate and 1.5 g of azobisisobutyronitrile (AIBN) as a radical polymerization initiator were added to the thermostatic chamber, and the mixture was stirred and rotated 100 times per minute using a mechanical stirrer. At this time, the temperature of the cooler was maintained at 10 占 폚.

Step 2: In another flask, 189 g of butyl acrylate, 27 g of methyl methacrylate, 27 g of 2-hydroxyethyl acrylate, 51 g of p-Dodecyl styrene, C ₂₀ H ₃₂ ), And the mixture was mixed with a mechanical stirrer for 30 minutes. Then, the mixture was slowly added to the flask of Step 1 using a dropping funnel.

Step 3: After completion of the addition, the temperature of the reactor was maintained at 80 캜. During the reaction, a sample was taken from the reaction mixture and the weight average molecular weight (MW) of the sample was measured. When the desired weight average molecular weight was reached, the reaction time was determined as the completion time, and the reaction was gradually cooled at room temperature to terminate the reaction.

The obtained compound (liquid resin) was measured by Gel Permeation Chromatography (GPC) and found to have a weight average molecular weight of 160,000 g / mol and a degree of dispersion of 3.9.

Manufacturing example  3: Polymer ( Buffer layer resin ) Produce

The liquid resin was collected in the same manner as in Preparation Example 2, except that the end point of the reaction was changed. The weight average molecular weight was 250,000 g / mol and the dispersion degree was 4.2 as measured by gel permeation chromatography.

Manufacturing example  4: Polymer ( Buffer layer resin ) Produce

A liquid resin was obtained in the same manner as in Production Example 2, except that 15 g of 5 parts by weight of para-dodecyl naphthalene acrylate was added instead of p-dodecylstyrene. The above compound was measured by gel permeation chromatography and found to have a weight average molecular weight of 120,000 g / mol and a degree of dispersion of 4.0.

Manufacturing example  5: Polymer ( Buffer layer resin ) Produce

A liquid resin was obtained in the same manner as in Production Example 4 except that the reaction termination time was different. The above compound was measured by gel permeation chromatography and found to have a weight average molecular weight of 170,000 g / mol and a degree of dispersion of 4.3.

Manufacturing example  6: polymer( Buffer layer resin ) Produce

Except that 15 g of 5 parts by weight of dimethylheptyloxystyrene (1 - ((6,6-dimethylheptyl) oxy) -4-vinylbenzene) was added in place of para-decodecylstyrene to prepare a liquid resin ≪ / RTI > The above compound was measured by gel permeation chromatography and found to have a weight average molecular weight of 130,000 g / mol and a degree of dispersion of 4.2.

Manufacturing example  7: polymer( Buffer layer resin ) Produce

Except that 15 g of 5 parts by weight of dimethyloctyloxymethoxystyrene (4 - [(3,7-Dimethyloctyl) oxy] -1-methoxy-2-vinylbenzene) To obtain a liquid resin. The compound was measured by gel permeation chromatography and found to have a weight average molecular weight of 120,000 g / mol and a degree of dispersion of 4.3.

Manufacturing example  8: Polymer ( Buffer layer resin ) Produce

In the same manner as in Production Example 2 except that 210 g of butyl acrylate, 210 g of methyl methacrylate, 30 g of 2-hydroxyethyl acrylate and 60 g of 2-hydroxyethyl acrylate were used in Step 2 of Production Example 2 To give the compound.

The obtained compound (liquid resin) was measured by gel permeation chromatography and found to have a weight average molecular weight of 200,000 g / mol and a dispersion degree of 4.1.

Manufacturing example  9 to 14: The adhesive layer  Manufacture of non-inclusive tapes

The polymers prepared in Production Examples 2 to 7 were coated with water on PET (polyethylene terephthalate) film having a thickness of 75 탆 by a comma coating method to have a thickness of 120 탆 and dried to form a resin layer to prepare a tape .

Manufacturing example  15: The adhesive layer  Manufacture of non-inclusive tapes

The polymer prepared in Preparation Example 8 was coated on polyethylene terephthalate (PET) film having a thickness of 75 탆 by water-shielding coating to have a thickness of 120 탆 by a comma coating method and dried to form a resin layer to prepare a tape.

Example  1 to 6: Fabrication of a semiconductor wafer protection tape

On one side of the buffer layer of the tapes prepared in Preparation Examples 9 to 14, the liquid adhesive layer resin prepared in Preparation Example 1 was water-shielded to a thickness of 30 占 퐉 by a comma coating method and dried to prepare a tape for protecting semiconductor wafers.

Comparative Example  1: Fabrication of semiconductor wafer protection tape

On the one side of the buffer layer of the tape prepared in Preparation Example 15, the liquid adhesive layer resin prepared in Preparation Example 1 was water-shielded to a thickness of 30 占 퐉 by a comma coating method and dried to prepare a tape for protecting a semiconductor wafer.

Test Example  1: Save Modulus of elasticity  evaluation

(Adhesive layer X) prepared in Production Examples 9 to 14 and the tape (pressure-sensitive adhesive layer X) prepared in Production Example 15 were evaluated in order to evaluate the elasticity of the buffer layer made of the polymer containing the styrene- or naphthalene- The storage modulus at 25 ° C (room temperature) and 60 ° C was measured using a rheometer and the reduction rate of the storage modulus was calculated by changing the temperature from 25 ° C to 60 ° C.

division Storage modulus (KPa) Change in storage modulus (%) 25 ℃ 60 ° C 25 ℃ -> 60 ℃ Production Example 9 150 130 13.3 Production Example 10 180 170 5.6 Production Example 11 160 140 12.5 Production Example 12 210 190 9.5 Production Example 13 170 155 8.8 Production Example 14 165 145 12.1 Production Example 15 120 90 25.0

As shown in Table 1, the tapes prepared in Production Examples 9 to 14 (including styrene type or naphthalene type aromatic compounds) had a higher temperature than room temperature (25 占 폚) and high temperature (60 占 폚), respectively. It can be seen that the storage elastic modulus was measured to be high. In addition, it can be seen that the tapes of Production Examples 9 to 14 maintain the elastic modulus more excellent when the temperature is changed from room temperature to high temperature than the tape of Production Example 15 because the reduction in storage elastic modulus is small.

Test Example  2: Check for wafer damage

Experiments were carried out in the following manner in order to confirm whether or not the wafer was damaged by the semiconductor wafer protecting tape including the buffer layer (including the styrene-based or naphthalene-based aromatic compound) according to the example.

250 chips having a depth of 200 μm and a size of 10 mm × 10 mm (width X length) were formed on an 8-inch wafer (thickness 730 μm), and then the semiconductor wafer protection tapes of Examples 1 to 6 and Comparative Example 1 were placed in a laminator (Dynatech, Model DT-ECS2030SL). Then, the back surface of the wafer was ground to a thickness of 150 mu m using a back grinder (DISCO Co., model name DGP8760), and then the wafer was observed using an optical microscope to determine whether chips were damaged (and / or the number of damaged chips) The damage rate was confirmed. The results are shown in Table 4 and FIG.

division Damaged or not
(And / or the number of damaged chips) Chip Damage Ratio (%) Example 1 2 0.8 Example 2 radish - Example 3 2 0.8 Example 4 One 0.4 Example 5 radish - Example 6 2 0.8 Comparative Example 1 7 2.8

   As shown in Table 2, the semiconductor wafer protective tapes (including styrene-based or naphthalene-based aromatic compounds) produced in Examples 1 to 6 had few or no damaged chips and a chip damage ratio of 1% Which is a very low level. 2, when the tape of Comparative Example 1 is used, it can be seen that the chip is broken, whereas when the tape for protecting a semiconductor wafer of Example 2 is used, it can be confirmed that the shape and appearance of the chip are excellent.

Claims (22)

A base layer;
A buffer layer formed on one surface of the substrate layer; And
And an adhesive layer formed on one surface of the buffer layer,
Wherein the buffer layer comprises a styrene-based compound, a naphthalene-based compound, or a polymer derived from both of them. The method according to claim 1,
Wherein the polymer is obtained by polymerizing the styrene compound, the naphthalene compound, or both of them with a second monomer. The method according to claim 1,
Wherein the styrene compound and the naphthalene compound have at least one substituent selected from the group consisting of C _1-30 alkyl, C _1-10 alkoxy, C _6-10 aryl, and C _6-10 aryloxy. . The method of claim 3,
Wherein the styrene compound and the naphthalene compound have at least one substituent selected from the group consisting of C _1-20 alkyl and C _6-10 aryl. The method of claim 3,
The styrene-based compound and the naphthalene-based compound have a substituent of C _5-15 alkyl. 6. The method of claim 5,
Wherein the styrene compound is at least one selected from the group consisting of paradodecylstyrene, dimethylheptyloxy-styrene (vinylbenzene), and dimethyloxyloxy-methoxy-styrene (vinylbenzene)
Wherein the naphthalene-based compound is at least one selected from the group consisting of paradodecylnaphthalene, and paradodecylnaphthalene acrylate. The method according to claim 1,
Wherein the styrene compound, the naphthalene compound, or both are used in an amount of 5 to 40% by weight based on the total weight of the monomers constituting the polymer. 3. The method of claim 2,
Wherein the second monomer is at least one acrylic compound. The method according to claim 1,
Wherein said polymer has a weight average molecular weight of 100,000 to 500,000 g / mol. The method according to claim 1,
Wherein the buffer layer has a thickness of 10 to 400 mu m. The method according to claim 1,
Wherein the buffer layer has a storage elastic modulus at 25 占 폚 of 1 MPa or less. The method according to claim 1,
Wherein the buffer layer has a storage elastic modulus at 60 占 폚 of 0.3 MPa or less. The method according to claim 1,
Wherein the buffer layer has a storage modulus change ratio of 1 to 20% when the temperature is changed from 25 占 폚 to 60 占 폚. The method according to claim 1,
Wherein the base layer comprises at least one resin selected from the group consisting of a polyethylene terephthalate resin, a polyethylene resin, a polypropylene resin, a polyurethane resin, a polyvinyl chloride resin, an acrylic resin and an amide resin. The method according to claim 1,
Wherein the base layer has a thickness of 50 to 100 占 퐉. The method according to claim 1,
Wherein the adhesive layer comprises at least one resin selected from the group consisting of an acrylic resin, an epoxy resin, a urethane resin, an ester resin, and a vinyl acetate resin. 17. The method of claim 16,
Wherein the resin of the adhesive layer has a weight average molecular weight of 50,000 to 2,000,000 g / mol. The method according to claim 1,
Wherein the thickness of the adhesive layer is 10 to 50 占 퐉. The method according to claim 1,
Wherein the semiconductor wafer protective tape has a chip damage ratio of 1% or less when the residual thickness of the semiconductor wafer is 40 to 150 탆 in a back grinding process after the tape is attached to one surface of the semiconductor wafer. The method according to claim 1,
When the semiconductor wafer protective tape is attached to one surface of a half-diced semiconductor wafer and polished so as to have a thickness of 30 to 60 탆 from the cutting start point to the polishing depth end point Wherein the chip damage ratio is 1% or less. A base layer; A buffer layer formed on one surface of the substrate layer; And a pressure-sensitive adhesive layer formed on one surface of the buffer layer;
Bonding the tape to one surface of a semiconductor wafer; And
Polishing the other surface of the semiconductor wafer,
Wherein the buffer layer comprises a polymer obtained by polymerizing a styrene compound, a naphthalene compound, or both of them with at least one acrylic compound,
Wherein the styrene compound and the naphthalene compound have at least one substituent selected from the group consisting of C _1-30 alkyl, C _1-10 alkoxy, C _6-10 aryl, and C _6-10 aryloxy. Way. 22. The method of claim 21,
Wherein one surface of the semiconductor wafer is formed with a plurality of grooves,
Wherein polishing is performed until reaching the groove at the other surface polishing of the semiconductor wafer.

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