KR20190010003A - Sensing chip, battery management system having the same, and operating method thereof - Google Patents

Abstract

A battery management system according to the present invention includes: a plurality of sensing chips connected in a daisy chain manner and performing cell balancing of each of battery cells; a transceiver performing data communication with any one of the sensing chips in accordance with a first communication protocol; and a controller performing data communication according to a second communication protocol with the transceiver, wherein each of the sensing chips can generate a failure signal in the form of a wake-up signal when failure is detected.

Description

TECHNICAL FIELD [0001] The present invention relates to a sensing chip, a battery management system including the sensing chip, and a method of operating the sensing chip.

The present invention relates to a sensing chip, a battery management system including the sensing chip, and a method of operating the same.

Generally, a vehicle battery management system (BMS) includes a MICOM (MICOM) and a plurality of cell sensing ICs (integrated circuits) for monitoring battery cells. The cell sensing ICs are connected in a daisy chain bus structure, and the total sensing value is transmitted to the MICOM through the final cell sensing IC. In general, the BMS controller during parking does not operate in a power off state. The sensing IC in the BMS controller switches to a sleep mode and a mode consumes minimal power.

Published Patent: 10-2013-0065351, published on June 19, 2013 Title: Daisy Chain Battery Management System. Registered Patent: 10-1526413, Registered: June 01, 2015 Title: Transceiver IC and its operation method. Registered Patent: 10-1362718, Registered: February 07, 2014 Title: Fault diagnosis method in electronic control device where continuous software reset occurs. US Published Patent: US 2016/0261127, Publication Date: September 08, 2016 Title: METHOD AND SYSTEM FOR BATTERY MANAGEMENT.

It is an object of the present invention to provide a sensing chip for detecting a failure even during parking, a battery management system including the same, and an operation method thereof.

A battery management system according to an embodiment of the present invention includes a plurality of sensing chips connected in a daisy chain manner and performing cell balancing of each of battery cells; A transceiver for performing data communication with any one of the plurality of sensing chips according to a first communication protocol; And a controller for performing data communication according to a second communication protocol with the transceiver, wherein each of the plurality of sensing chips can generate a failure signal in the form of a wake-up signal when a failure is detected.

In an embodiment, each of the plurality of sensing chips may include a timer that periodically generates a signal for entering a standby mode in a sleep mode

In an embodiment, each of the plurality of sensing chips may include a fault detector for detecting the fault by sensing overvoltage or undervoltage of the battery cells; And a fault signal generator for generating the fault signal in response to the detected fault in the standby mode.

In an embodiment, the fault signal has the same waveform as the wake-up signal and has a different period.

In an embodiment, the wake-up signal is an 8 periodic pulse of 50% duty cycle and the fault signal is a 24 periodic pulse of 50% duty cycle.

In an embodiment, at least one of the plurality of sensing chips may receive a failure signal in a neighboring sensing chip and may switch an operational mode from a sleep mode to a standby mode in response to the received failure signal.

In one embodiment, the one of the sensing chips receives a fault signal in a neighboring sensing chip, generates a new fault signal in response to the received fault signal, and transmits the new fault signal to the transceiver.

In an embodiment, the first communication protocol may comprise an asynchronous serial communication interface.

In an embodiment, the first communication protocol may comprise a differential universal asynchronous receiver / transmitter (UART) interface.

In an embodiment, the second communication protocol may be a UART, an inter integrated circuit (I2C) interface, a serial peripheral interface (SPI), RS-232, RS-422, RS- a flexible data rate, a local interconnect network (LIN), a FlexRay, a DeviceNet, a fieldbus, an IEEE 1394 (firewire), and a universal serial bus (USB).

In an embodiment, the transceiver may include an emergency fault detector for receiving a fault signal from the at least one sensing chip and generating an emergency fault signal.

In an embodiment, the controller receives an emergency fault signal from the transceiver according to the second communication protocol or receives the emergency fault signal via a communication line, and disconnects the battery power from the target device in response to the emergency fault signal .

The sensing chip connected to both ends of each of the battery cells according to the embodiment of the present invention performs cell balancing. The sensing chip measures the voltage at each end of each of the battery cells in the standby mode, and measures the voltage at the overvoltage or low voltage A fault detector for detecting a fault; And a failure signal generator for generating a failure signal in response to the detected failure in the standby mode, and after transmitting the failure signal to a neighboring sensing chip via a communication line, . ≪ / RTI >

In an embodiment, the apparatus further includes a timer periodically generating a signal, and the operation mode may be switched from a sleep mode to a standby mode in response to the periodically generated signal.

In one embodiment, the fault detector includes analog-to-digital converters coupled to both ends of each of the battery cells, each of the analog-to-digital converters generating a digital value corresponding to the voltage at both ends, The overvoltage or the undervoltage can be discriminated by comparing the reference value.

In an embodiment, the fault detector may further comprise a differential signal transceiver outputting a result of each of the analog-to-digital converters.

A method of operating a battery management system according to an embodiment of the present invention includes: switching an operation mode of a second sensing chip from a sleep mode to a standby mode in response to a first failure signal received from a first sensing chip; Generating a second fault signal in the form of a wake-up signal in the second sensing chip; Transmitting the second fault signal to a third sensing chip or a transceiver through a communication line; And switching the operation mode of the second sensing chip from the standby mode to the sleep mode.

In an embodiment, each of the first and second fault signals is a pulse having a 50% duty cycle.

The method of claim 1, further comprising: generating an emergency fault signal in response to the fault signal at the transceiver; And blocking the battery power supply to the target device in response to the emergency fault signal at the controller.

Determining whether a voltage between both ends of each of the corresponding battery cells in the first sensing chip is an overvoltage or a lower voltage; And generating the first failure signal when the both-end voltage is the over-voltage or the under-voltage.

A sensing chip according to an embodiment of the present invention, a battery management system including the same, and an operation method thereof detect a failure of a corresponding battery cell in each of sensing chips and output a failure signal in the form of a wake-up signal through a communication line So that the failure signal can be transmitted to the MICOM even in the sleep mode. Thus, the battery management system of the present invention can send a fault signal to the MICOM without additional isolation, thereby greatly reducing the manufacturing / design cost.

BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention. However, the technical features of the present embodiment are not limited to the specific drawings, and the features disclosed in the drawings may be combined with each other to constitute a new embodiment.
1 is a diagram illustrating an exemplary battery management system 10 according to an embodiment of the present invention.
2 is a view illustrating an exemplary sensing chip according to an embodiment of the present invention.
FIG. 3 is an exemplary illustration of an embodiment of the fault detector 120 shown in FIG.
4 is a diagram illustrating an example of a failure signal generated in the failure signal generator 130 according to an embodiment of the present invention.
5 is a diagram illustrating an exemplary battery management system of a distributed architecture according to an embodiment of the present invention.
6 is a flowchart illustrating an exemplary operation of a sensing chip according to an embodiment of the present invention.
FIG. 7 is a flowchart illustrating an emergency fault signal generating operation of the transceiver 500 according to an exemplary embodiment of the present invention.
FIG. 8 is a flowchart illustrating an exemplary operation of the MICOM 600 according to an embodiment of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features and advantages of the present invention will be more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which: FIG.

The present invention is capable of various modifications and various forms, and specific embodiments are illustrated in the drawings and described in detail in the text. It is to be understood, however, that the invention is not intended to be limited to the particular forms disclosed, but on the contrary, is intended to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention. The terms first, second, etc. may be used to describe various components, but the components should not be limited by the terms.

The terms may be used for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as a second component, and similarly, the second component may also be referred to as a first component. It is to be understood that when an element is referred to as being "connected" or "connected" to another element, it may be directly connected or connected to the other element, . On the other hand, when an element is referred to as being "directly connected" or "directly connected" to another element, it should be understood that there are no other elements in between.

Other expressions that describe the relationship between components, such as "between" and "between" or "neighboring to" and "directly adjacent to" should be interpreted as well. The terminology used in this application is used only to describe a specific embodiment and is not intended to limit the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise.

In this application, the terms "comprises" or "having" are intended to specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, wherein one or more other features, , Steps, operations, components, parts, or combinations thereof, as a matter of course. Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries should be construed as meaning consistent with meaning in the context of the relevant art and are not to be construed as ideal or overly formal in meaning unless expressly defined in the present application .

1 is a diagram illustrating an exemplary battery management system 10 according to an embodiment of the present invention. 1, a battery management system 10 may include a plurality of sensing chips 100, 200, 300, 400, a transceiver 500, and a controller (MICOM 600, hereinafter "MICOM" have.

The plurality of sensing chips 100, 200, 300, 400 may be insulated and connected through a capacitor and a transformer, or may be directly connected. For example, the sensing chips 100, 200, 300, and 400 may be connected in a daisy-chain fashion. In an embodiment, each of the sensing chips 100, 200, 300, 400 may be implemented to perform data communication by a first communication protocol. Wherein the first communication protocol may be an asynchronous serial communication. For example, the first communication protocol may be a differential universal asynchronous receiver / transmitter (UART) interface. However, it should be understood that the first communication protocol of the present invention is not limited thereto.

Each of the plurality of sensing chips 100, 200, 300, and 400 may be configured to perform cell balancing of a plurality of battery cells (not shown) connected in series. In an embodiment, each of the plurality of sensing chips 100, 200, 300, and 400 may be implemented as an integrated circuit (IC). Meanwhile, it should be understood that the number of sensing chips 100, 200, 300, 400 shown in FIG. 1 is four, but the number of sensing chips of the present invention is not limited thereto.

Each of the sensing chips 100, 200, 300, and 400 may also be implemented to include a timer 110/210/310/410 and a fault signal generator 130/230/330/430.

In addition, each of the sensing chips 100, 200, 300, and 400 may operate in the following three modes. The three modes may include a shutdown mode, a sleep mode, and a standby mode. In the shutdown mode, the power supply to the sensing chip is completely cut off. That is, it is electrically separated from the battery cells. Sleep mode is the state in which power is supplied to the standby low dropout (LDO) regulator inside the sensing chip. The sensing chip in the sleep mode can receive a wake-up signal (or pulse) received from the outside. In an embodiment, the wake-up signal may be received differentially via the two communication lines. In the standby mode, the sensing chip is awakened by the wake-up signal received from the outside, or the sensing chip is awakened by the internal timer 110/210/310/4010. At this time, the main LDO regulator in the sensing chip can operate. A failure can be detected in the sensing chip in the standby mode state, or data communication can be performed via the data line DL.

Meanwhile, each of the timers 110, 210, 310, and 410 may be used to periodically wake up the sensing chip in the sleep mode state. Here, the sleep mode state may be parked for a vehicle.

Further, each of the fault signal generators 130, 230, 330, and 430 may be configured to detect a fault in the standby mode and generate a fault signal to be transmitted to the outside.

In an embodiment, the fault signal can be transmitted over a certain period of a certain waveform through the CL line and the DL line. In an embodiment, the fault signal can be generated in the form of a wake-up signal. Here, the failure signal in the form of a wake-up signal can be transmitted to the other sensing chip in the sleep mode / standby mode or the transceiver 500 via the communication line CL.

The transceiver 500 may be coupled to the sensing chip 100 via a first communication protocol and to the MICOM 600 via a second communication protocol. In an embodiment, the second communication protocol may be a serial communication protocol different from the first communication protocol. For example, the second communication protocol may be an inter-integrated circuit (I2C) interface, a serial peripheral interface (SPI), RS-232, RS-422, RS-485, Ethernet, rate, LIN (local interconnect network), FlexRay, DeviceNet, Fieldbus, ieee1394 (firewire), USB (universal serial bus)

In addition, the transceiver 500 may include an emergency fault detector 510. The emergency fault detector 510 receives a fault signal from the sensing chip 100 and can generate an emergency fault signal. In an embodiment, the generated emergency fault signal may be transmitted to the MICOM 600 via at least one communication line. In another embodiment, the generated emergency fault signal may be transmitted to the MICOM 600 in accordance with a second communication protocol.

For example, the transmission process of the fault signal of the sensing chip is as follows. For convenience of explanation, it is assumed that a failure is detected in the sensing chip 300. The sensing chip 300 will enter the standby mode in the sleep mode simultaneously with the failure detection. The sensing chip 300 in the standby mode can generate and transmit a failure signal in the form of a wake-up signal to the sensing chip 200 in the neighboring sleep mode. Thereafter, the sensing chip 200 in the sleep mode receives the failure signal and can enter the standby mode in the sleep mode. Thereafter, the sensing chip 200 in the standby mode recognizes that it is a failure signal and transmits the failure signal to the sensing chip 100 in the neighboring sleep mode, or transmits a failure signal in the form of a new wake-up signal to the neighboring sleep mode To the sensing chip 100 of FIG. Thereafter, the sensing chip 100 in the sleep mode receives the failure signal and can enter the standby mode in the sleep mode. Thereafter, the sensing chip 100 in the standby mode recognizes that it is a failure signal, and transmits the failure signal as it is to the transceiver 500 as it is, or may transmit a failure signal in the form of a new wake-up signal to the transceiver 500. The emergency fault detector 510 of the transceiver 500 may generate an emergency fault signal in response to the received fault signal and may transmit it to the MICOM 600.

Meanwhile, the MICOM 600 may be implemented to control the sensing chips 100, 200, 300, and 400 and the transceiver 500. Here, MICOM 600 may be referred to as a BMS controller.

Generally, the MICOM 600 operates in a low voltage region, and the sensing chips 100, 200, 300, and 400 can operate in a high voltage region. Therefore, it is not easy for the MICOM 600 and the sensing chips 100, 200, 300, and 400 to directly communicate without the transceiver 500 because the operation voltage levels do not coincide with each other. However, it is not necessary to limit the battery management system 10 of the present invention to include the transceiver 500. It should be understood that the battery management system of the present invention can communicate directly between the MICOM and the sensing chips without a transceiver.

Generally, in the parking state, the sensing chips 100, 200, 300, and 400 of the battery management system 10 can enter the sleep mode. The BMS controller, that is, the MICOM 600, is in a state in which the entire power supply is interrupted. When a failure due to the periodic timer operation is detected in the sensing chip, power can be supplied to the MICOM 600 by using the generated failure signal as the activation signal of the low voltage regulator in the MICOM 600. Since the MICOM 600 must know that the low voltage regulator is activated due to the fault signal, the fault signal can be received via the input pin of the MICOM 600 by branching. Electrical interception can then be performed depending on the situation.

In general, the battery management system sets a timer on the sensing chips to diagnose a battery failure periodically during parking. However, since the timer is not synchronized with the elapse of time, a difference occurs in the wake-up time of each sensing chip, Due to the difference, failure information data between the sensing chips can not be exchanged. In order to solve this problem, a failure signal may be transmitted to the MICOM by directly outputting a failure signal to the MICOM in each sensing chip. However, in this case, additional isolation elements are needed to transfer the fault signal from the high voltage region to the low voltage region. There is a problem that the cost of the design increases accordingly.

On the other hand, the battery management system 10 according to the embodiment of the present invention detects a failure of a corresponding battery cell in each of the sensing chips 100, 200, 300, 400 and transmits a failure signal in the form of a wake- And transmits the failure signal to the MICOM 600 even in the sleep mode state by transmitting it to the outside via the line CL. This allows the battery management system 10 of the present invention to send fault signals to the MICOM 600 without additional isolation elements, thereby significantly reducing manufacturing / design costs.

2 is a view illustrating an exemplary sensing chip according to an embodiment of the present invention. Although FIG. 2 illustrates the first sensing chip 100, it should be understood that other sensing chips 200, 300, and 400 may be similarly implemented. The sensing chip 100 may include a first interface circuit 101, a second interface circuit 102, a timer 110, a fault detector 120, and a fault signal generator 130.

The first interface circuit 101 performs data communication between the sensing chip 100 and the transceiver 500 through the data line DL or the communication line CL according to the first communication interface, Signal can be transmitted.

The second interface circuit 102 performs data communication between the sensing chip 100 and the other sensing chip 200 through the data line DL or the communication line CL according to the first communication interface, For example, a wake-up signal, a fault signal, or the like.

The timer 110 counts in the sleep mode and may generate a signal for switching the sensing chip 100 from the sleep mode to the standby mode when the count value reaches a predetermined count value. That is, the timer 110 may generate a periodic signal to switch the sensing chip 100 in the sleep mode to the standby mode.

The fault detector 120 may be implemented to detect a fault condition of a group of battery cells connected in series in the standby mode.

The fault signal generator 130 may be implemented to generate a fault signal in the form of a wake-up signal in response to the detected fault.

FIG. 3 is an exemplary illustration of an embodiment of the fault detector 120 shown in FIG. 3, the fault detector 120 may include a plurality of ADCs 121, 122, 123 and 124, a differential signal receiver 125, and a differential signal transmitter 126.

Each of the ADCs 121, 122, 123 and 124 senses a voltage related to the voltage across the battery cell, converts the sensed voltage to digital, and compares the converted digital value with a reference voltage Ref, And may be configured to detect overvoltage or undervoltage of the battery cell. The result of the failure detection can be output to the outside through a differential signal transmitter 126. [ Or a fault detection result from the outside can be received via the differential signal receiver 125. [

On the other hand, the number of ADCs 121, 122, 123, 124 shown in FIG. 3 is 4, but it should be understood that the present invention is not limited thereto.

4 is a diagram illustrating an example of a failure signal generated in the failure signal generator 130 according to an embodiment of the present invention. Referring to FIG. 4, the wake-up signal may be a pulse signal of 50% duty cycle of 8 cycles, and the fault signal may be a signal of repeating this wake-up signal 3 times in succession.

In an embodiment, the pulse signal may be a 50 KHz signal. However, it should be understood that the frequency of the pulse signal of the present invention is not limited thereto.

For example, the fault signal may be a pulse signal of 50% duty cycle of 24 periods. However, it should be understood that the period of the fault signal of the present invention is not limited thereto. In addition, it should be understood that the duty cycle of the wake-up signal is not limited to 50%. It should be understood that the fault signal of the present invention can be implemented in various forms as a wake-up signal.

Meanwhile, the battery management system according to the embodiment of the present invention can be implemented in a distributed structure.

5 is a diagram illustrating an exemplary battery management system of a distributed architecture according to an embodiment of the present invention. Referring to FIG. 5, the distributed battery management system 1000 may include a plurality of chip groups 1110, 1120, 1130, and 1140 and a BMS controller 1200. On the other hand, it should be understood that although the number of chip groups 1110, 1120, 1130, and 1140 shown in FIG. 5 is four, the number of chip groups of the present invention is not limited thereto.

Each of the chip groups 1110, 1120, 1130, 1140 may include a plurality of sensing chips IC1, IC2, IC3, IC4 connected in a daisy chain manner. A plurality of sensing chips IC1, IC2, IC3, IC4 may be implemented to perform communication according to the first communication protocol as described in Fig. On the other hand, the number of the plurality of sensing chips IC1, IC2, IC3, IC4 shown in FIG. 5 is 4, but it should be understood that the number of sensing chips of the present invention is not limited thereto. Each of the plurality of sensing chips IC1, IC2, IC3, and IC4 may be implemented in the same manner as the sensing chips 100, 200, 300, and 400 shown in FIG. That is, each of the sensing chips IC1, IC2, IC3, and IC4 can enter the standby mode in the sleep mode in response to the failure signal in the form of a wake-up signal, And transmits the generated failure signal to the neighboring sensing chip.

The BMS controller 1200 may be implemented to control a plurality of chip groups 1110, 1120, 1130, and 1140. Although not shown, the BMS controller 1200 may include at least one MICOM or microcontroller to perform battery management comprehensively.

In addition, the BMS controller 1200 may include a plurality of transceivers 1210, 1220, 1230, 1240. Each of the transceivers 1210, 1220, 1230, 1240 may be coupled to a corresponding chip group. Each of the transceivers 1210, 1220, 1230, and 1240 converts a signal according to the first communication protocol transmitted from the corresponding chip group into a signal according to the second communication protocol, and transmits the converted signal to the BMS controller 1200 Of MICOM.

Further, each of the transceivers 1210, 1220, 1230, and 1240 may convert a signal according to the second communication protocol transmitted from the MICOM into a signal according to the first communication protocol, and transmit the converted signal from the corresponding chip group have.

Meanwhile, the transceivers 1210, 1220, 1230, and 1240 shown in FIG. 5 are disposed inside the BMS controller 1200. However, it should be understood that the arrangement of the transceivers of the present invention is not limited thereto. The transceivers of the present invention may be located outside the BMS controller. For example, a transceiver corresponding to the inside of the first sensing chip IC1 may exist.

6 is a flowchart illustrating an exemplary operation of a sensing chip according to an embodiment of the present invention. Referring to FIGS. 1 to 6, the operation of the sensing chip may be proceeded as follows. Here, for convenience of explanation, it is assumed that a failure is detected in the first sensing chip (for example, 300 in FIG. 1). That is, it is assumed that both terminals of each of the battery cells connected to the first sensing chip generate overvoltage or undervoltage.

The second sensing chip (e.g., 200 in FIG. 1) is in a sleep mode. A failure is detected in the first sensing chip and a first failure signal in the form of a wake-up signal can be received in the second sensing chip. At this time, the operation mode of the second sensing chip may be switched from the sleep mode to the standby mode in response to the first failure signal of the wake-up signal type (S110). That is, the second sensing chip is awakened from the sleep mode.

The second sensing chip may generate a second fault signal in the form of a wake-up signal to transmit the fault signal to the MICOM in the standby mode (S120). Thereafter, the second sensing 200 may transmit a second fault signal in the form of a wake-up signal to a neighboring third sensing chip (e.g., 100 of FIG. 1) (S130). Thereafter, the operation mode of the second sensing chip may be switched from the standby mode to the sleep mode (S140).

As described above, the process of transmitting a failure signal from one sensing chip to the other sensing chip has been described. Similarly, the failure signal of one sensing chip may be transmitted to the transceiver 500.

7 is a flowchart illustrating an emergency fault signal generating operation of the transceiver 500 according to an embodiment of the present invention. Referring to FIGS. 1 to 7, the emergency fault signal generating operation of the transceiver 500 may proceed as follows.

The transceiver 500 may receive a failure signal in the form of a wake-up signal from the first sensing chip 100 (S210). The emergency failure detector 510 of the transceiver 500 may receive a failure signal and generate an emergency failure signal (S220). The emergency fault signal can be transmitted to the MICOM 600.

FIG. 8 is a flowchart illustrating an exemplary operation of the MICOM 600 according to an embodiment of the present invention. 1 to 8, the MICOM 600 may operate as follows.

The MICOM 600 may receive the emergency fault signal from the transceiver 500 according to the second communication protocol or receive the emergency fault signal in a manner different from the second communication protocol (S310). The MICOM 600 may block the power supply of the battery to the target device (e.g., motor) in response to the emergency fault signal. Here, the interruption of the power supply may be all or a part.

The steps and / or operations in accordance with the present invention may occur in different orders, in parallel, or concurrently in other embodiments for other epochs or the like, as may be understood by one of ordinary skill in the art .

Depending on the embodiment, some or all of the steps and / or operations may be performed on one or more non-transitory computer-readable media, including instructions, programs, interactive data structures, At least some of which may be implemented or performed using one or more processors. The one or more non-transitory computer-readable media can be, by way of example, software, firmware, hardware, and / or any combination thereof. Further, the functions of the "module" discussed herein may be implemented in software, firmware, hardware, and / or any combination thereof.

One or more non-transitory computer-readable media and / or means for implementing / performing one or more operations / steps / modules of embodiments of the present invention may be implemented as application-specific integrated circuits (ASICs), standard integrated circuits, But are not limited to, controllers that perform appropriate instructions, including microcontrollers, and / or embedded controllers, field-programmable gate arrays (FPGAs), complex programmable logic devices (CPLDs) .

The battery management system according to the embodiment of the present invention can transmit a failure signal even if the sensing ICs are not synchronized with each other and the sensing ICs are awake at different times. As a result, the battery management system can be implemented at a lower cost by eliminating a separate insulating element as compared with the conventional battery.

In an embodiment, when the sensing IC senses a fault, each IC may output a signal of a particular waveform through a communication line instead of a signal through a fault pin. This particular waveform is slower than a communication signal and can be output as a repetitive signal to distinguish it from a normal communication signal. For example, a typical communication speed is about 1Mhz to 2Mhz, but a fault signal can be distinguished from a general communication signal by repeatedly outputting a square wave of 50% duty cycle at a speed of 1/10 of a normal communication speed.

The fault signal also generates the same waveform as the waveform for waking up the sensing IC, but the length of the waveform can be set to be longer than the wake-up signal. For example, the wake-up signal may be a waveform of 8 periods with a 50% duty cycle of 100 kHz, and the fault signal may be set to a 24 periodic waveform.

In an embodiment, when the wake-up signal is received, each of the sensing ICs senses the wake-up signal so that the wake-up sensing unit in each sensing IC can switch from the sleep mode to the standby mode. The sensing IC wakes up when the signal of eight cycles is firstly received, and if the same waveform continues to be detected after the wake-up, the sensing IC may be judged as a fault condition.

In the above-described method, if a failure is detected in the first sensing IC, the second sensing IC is switched to the standby mode even if the second sensing IC is in the sleep mode, and the second sensing IC can deliver the failure signal of the first sensing IC. In the manner described above, the fault signal can be communicated to the transceiver. can do. The transceiver can configure a circuit to sense a fault signal, generate an emergency fault signal when it detects it, and deliver the emergency fault signal to the MICOM.

When the failure signal detected by the sensing IC is transferred to the MICOM in the above-described manner, the battery management system can utilize the existing communication line to transmit the failure signal without the insulating element. Conventionally, there has been a requirement of the system to detect a fault only in the state where the BMS controller is powered (IG-ON). However, in the future, the BMS controller is required to detect the fault even in the state The specification is higher.

The battery management system according to the embodiment of the present invention can transmit a specific waveform through the communication pin for a predetermined period without transmitting the failure signal to the high / low signal of the I / O pin as described above.

When a general sensing IC is switched from power off (IG-OFF) to power on (IG-ON), a specific waveform must be received to switch the sensing IC from sleep mode to standby mode. The failure signal is also similar to this specific signal, and when a failure is detected, the sensing IC can be switched to the standby mode to transmit the detected failure in the surrounding sensing IC connected in a daisy-chain.

In the conventional battery management system, in order to detect a failure even in the power off (IG-OFF) state, an additional constant power source element and an insulating element are required, which is an inefficient circuit. The battery management system according to the embodiment of the present invention can transmit the failure signal even if the timer of the sensing IC is awake due to the unsynchronized time. It is natural that the sink does not fit. The battery management system of the present invention can transmit a failure signal even if there is a sensing IC in a sleep mode. In an embodiment, the fault signal has the same waveform as the wake-up signal, and may have a longer period.

The above-described contents of the present invention are only specific examples for carrying out the invention. The present invention will include not only concrete and practical means themselves, but also technical ideas which are abstract and conceptual ideas that can be utilized as future technologies.

10, 1000: Battery management system
120: BMS controller
100, 200, 300, 400: sensing chip
500: transceiver
600: Controller (MICOM)
110, 210, 310, 410: a timer
130, 230, 330, and 430: a failure signal generator
120, 220, 320, 420: failure detector

Claims (20)

A plurality of sensing chips connected in a daisy chain manner and performing cell balancing of each of the battery cells;
A transceiver for performing data communication with any one of the plurality of sensing chips according to a first communication protocol; And
And a controller for performing data communication according to the second communication protocol with the transceiver,
Wherein each of the plurality of sensing chips generates a failure signal in the form of a wake-up signal when a failure is detected. The method according to claim 1,
Wherein each of the plurality of sensing chips includes a timer periodically generating a signal for entering a standby mode in a sleep mode. The method according to claim 1,
Wherein each of the plurality of sensing chips comprises:
A fault detector for detecting the fault by sensing overvoltage or undervoltage of the battery cells; And
And a failure signal generator for generating the failure signal in response to the detected failure in standby mode. The method according to claim 1,
Wherein the failure signal has the same waveform as the wake-up signal and has a different period. 5. The method of claim 4,
The wake-up signal is an 8 periodic pulse of 50% duty cycle,
Wherein the fault signal is a 24 periodic pulse of 50% duty cycle. The method according to claim 1,
Wherein at least one of the plurality of sensing chips receives a fault signal in a neighboring sensing chip and switches an operation mode from a sleep mode to a standby mode in response to the received fault signal. The method according to claim 1,
Wherein the one of the sensing chips receives a fault signal in a neighboring sensing chip, generates a new fault signal in response to the received fault signal, and transmits the new fault signal to the transceiver. The method according to claim 1,
Wherein the first communication protocol comprises an asynchronous serial communication interface. The method according to claim 1,
Wherein the first communication protocol comprises a differential UART (universal asynchronous receiver / transmitter) interface. The method according to claim 1,
The second communication protocol may be a universal asynchronous receiver / transmitter (UART), an inter integrated circuit (I2C) interface, a serial peripheral interface (SPI), RS-232, RS-422, RS- A battery management system comprising at least one of a CAN (flexible data rate), a local interconnect network (LIN), a FlexRay, a DeviceNet, a Fieldbus, an IEEE 1394 (firewire), or a universal serial bus (USB). The method according to claim 1,
Wherein the transceiver includes an emergency fault detector for receiving a fault signal from the at least one sensing chip and generating an emergency fault signal. The method according to claim 1,
Wherein the controller receives an emergency fault signal from the transceiver according to the second communication protocol or receives the emergency fault signal via a communication line and disconnects the battery power from the target apparatus in response to the emergency fault signal. A sensing chip connected to both ends of each of the battery cells and performing cell balancing, the sensing chip comprising:
A failure detector for measuring a voltage across each of the battery cells in a standby mode and detecting a failure when the measured voltage is an overvoltage or a low voltage; And
And a failure signal generator for generating a failure signal in response to the detected failure in the standby mode,
Wherein the operation mode is switched from the standby mode to the sleep mode after transmitting the failure signal to a neighboring sensing chip via a communication line. 14. The method of claim 13,
Further comprising a timer that periodically generates a signal,
Wherein the operation mode is switched from the sleep mode to the standby mode in response to the periodically generated signal. 14. The method of claim 13,
The fault detector comprises:
And analog-to-digital converters coupled to both ends of each of the battery cells,
Wherein each of the analog-to-digital converters generates a digital value corresponding to the voltage at both ends, and discriminates the overvoltage or the undervoltage by comparing the digital value with a reference value. 16. The method of claim 15,
Wherein the fault detector further comprises a differential signal transceiver outputting a result of each of the analog-to-digital converters. A method of operating a battery management system comprising:
Switching an operation mode of the second sensing chip from the sleep mode to the standby mode in response to the first failure signal received from the first sensing chip;
Generating a second fault signal in the form of a wake-up signal in the second sensing chip;
Transmitting the second fault signal to a third sensing chip or a transceiver through a communication line; And
And switching the operation mode of the second sensing chip from the standby mode to the sleep mode. 18. The method of claim 17,
Wherein each of the first and second fault signals is a pulse having a 50% duty cycle. 18. The method of claim 17,
Generating an emergency fault signal in response to the fault signal at the transceiver; And
And disconnecting the battery power supply to the target device in response to the emergency fault signal at the controller. 18. The method of claim 17,
Determining whether a voltage between both ends of each of the corresponding battery cells in the first sensing chip is an overvoltage or a lower voltage; And
And generating the first fault signal when the both-end voltage is the over-voltage or the under-voltage.

Images