KR20180131501A - Backside illuminated image sensor with reduced noises, and preparing process of the same - Google Patents

Abstract

The present invention relates to a backside illuminated image sensor and a preparing process of the backside illuminated image sensor. The backside illuminated image sensor comprises a backside passivation layer on which SiGe or a p-type SiGe is grown without using an absorption layer on the backside of a semiconductor substrate.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a low-noise backside illuminated image sensor and a manufacturing process thereof. BACKGROUND OF THE INVENTION [0002]

The present invention relates to a backside illumination image sensor capable of reducing noise of an image sensor, and a manufacturing process of the backside illumination image sensor.

Semiconductor image sensors are used to sense radiation, such as light. Complementary metal-oxide-semiconductor (CMOS) CMOS image sensors (CIS) and charge-coupled device (CCD) sensors are widely used in digital still cameras, It is widely used in applications. These devices include an array of pixels (which may include photodiodes and transistors) of the substrate to absorb (i.e., sense) the radiation projected toward the substrate and convert the sensed radiation into electrical signals. .

In the image sensor process, a lot of noise is generated due to the defect of the silicon surface. In order to reduce this noise, the surface should be accumulated in the hole. In general, the p + layer is ion-implanted and then annealed. These processes result in many crystal defects during ion implantation, and heat treatment is performed to reduce defects. However, in the case of a process in which the heat treatment temperature has to be limitedly applied, for example, in the case of a backside illuminated image sensor, a high temperature annealing process can not be applied due to metal wiring since metal wiring has already been made . In this case, although laser annealing is used in an extremely short time, laser annealing is an expensive process and takes a long time.

In this regard, Korean Patent No. 10-1738248 discloses an improved image sensor and a method of manufacturing the same for capturing an image comprising an epitaxial layer, a plurality of plug structures, and an interconnect structure.

The present invention provides a backside illuminated image sensor capable of reducing noise of an image sensor and a manufacturing process of the backside illuminated image sensor.

However, the problems to be solved by the present invention are not limited to the above-mentioned problems, and other matters not mentioned can be clearly understood by those skilled in the art from the following description.

One aspect of the present invention is directed to a backside illuminated image sensor comprising a backside illuminated image sensor comprising a rear passivation layer grown of SiGe or p-type SiGe without using an absorbent layer on the backside of the semiconductor substrate, Lt; / RTI >

Another aspect of the present invention relates to a method of forming a back passivation layer by rearranging a semiconductor substrate having a front surface and a rear surface opposite to the front surface and then growing or vapor-depositing SiGe or p-type SiGe on the back surface of the substrate The present invention also provides a manufacturing process of a backside illuminated image sensor.

In embodiments of the present invention, in a backside illuminated image sensor, a material in which band offsets occur between silicon and the home bands such that holes are accumulated on the surface of a substrate such as silicon is grown to form a rear passivation layer a backside illuminated image sensor capable of suppressing the noise of the image sensor by accumulating holes in the passivation layer (passivation layer, protective film), and a manufacturing process thereof.

In embodiments of the present invention, the backside illuminated image sensor is to grow SiGe or p-type SiGe as the back passivation layer, directly forming a back passivation layer without using an absorbing layer on the backside of the semiconductor substrate.

By growing SiGe or p-type SiGe as the rear passivation layer, a layer capable of accumulating holes can be formed on the silicon surface, band offset of the valence band occurs due to band alignment of silicon and SiGe or p-type SiGe , And thus the effect of accumulating holes on the surface due to band offset of the valence band can occur. Since the band offset causes the holes (holes) to gather in the SiGe or p-type SiGe layer, the electrons generated at the interface between the surface silicon or SiGe and SiO ₂ recombine in the SiGe or p-type SiGe region and are not collected in the actual image sensor Noise can be suppressed because it does not.

In the case of the conventional ion implantation process, there is a problem that a subsequent heat treatment must be performed. However, the backside illuminated image sensor according to embodiments of the present invention is formed by growing the SiGe or p-type SiGe rear passivation layer at low temperature into an epitaxy It is not necessary to perform additional heat treatment or annealing, and holes can be accumulated by this growth alone to reduce noise. In embodiments herein, growing the SiGe or p-type SiGe rear passivation layer at low temperature into an epitaxy can be performed at a temperature of from about 300 캜 to about 800 캜, from about 300 캜 to about 600 캜, About 500 < 0 > C, or about 300 < 0 > C to about 400 < 0 > C.

In embodiments herein, only an epitaxial deposition of a SiGe or p-type SiGe layer is performed, and thus an annealing process is not required, and the SiGe or p-type SiGe layer can be uniformly thinly deposited, Therefore, it is possible to solve the problem of homogeneity of the concentration during ion implantation and uniformity of laser annealing.

In embodiments herein, after epitaxially growing the SiGe or p-type SiGe in the formation of the back passivation layer, thin capping Si is grown as a passivation layer on the SiGe or p-type SiGe layer So that noise can be further suppressed through a combination of materials such as Si, SiGe, or Ge.

1 is a schematic diagram of a backside illuminated image sensor device including an SiGe or p-type SiGe backside passivation layer in one embodiment of the invention.
Figure 2 illustrates, in one embodiment of the present application, (a) a device cross-section and (b) band diagram of a backside illuminated image sensor.
3 is a flow chart illustrating a method of manufacturing a backside illuminated image sensor in accordance with an embodiment of the present invention.
4A is a flow diagram illustrating a process for fabricating a backside illuminated image sensor, in one embodiment of the invention; FIG. 4B is a schematic diagram illustrating a manufacturing process of a backside illuminated image sensor in one embodiment of the present invention. FIG.
FIG. 5 is a schematic view illustrating the rear passivation layer in detail in FIG. 4B according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present invention. It should be understood, however, that the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In the drawings, the same reference numbers are used throughout the specification to refer to the same or like parts.

Throughout this specification, when a part is referred to as being "connected" to another part, it is not limited to a case where it is "directly connected" but also includes the case where it is "electrically connected" do.

Throughout this specification, when a member is " on " another member, it includes not only when the member is in contact with the other member, but also when there is another member between the two members.

Throughout this specification, when an element is referred to as " including " an element, it is understood that the element may include other elements as well, without departing from the other elements unless specifically stated otherwise. The terms " about ", " substantially ", etc. used to the extent that they are used throughout the specification are intended to be taken to mean the approximation of the manufacturing and material tolerances inherent in the stated sense, Accurate or absolute numbers are used to help prevent unauthorized exploitation by unauthorized intruders of the referenced disclosure.

The word " step (or step) " or " step " used to the extent that it is used throughout the specification does not mean " step for.

Throughout this specification, the term " combination (s) thereof " included in the expression of the machine form means a mixture or combination of one or more elements selected from the group consisting of the constituents described in the expression of the form of a marker, Quot; means at least one selected from the group consisting of the above-mentioned elements.

Throughout this specification, the description of "A and / or B" means "A or B, or A and B".

Throughout this specification, a "backside illuminated image sensor" is a type of image sensor device, which means an image sensor that detects light incident (sensed) from the back surface.

Hereinafter, embodiments and examples of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to these embodiments and examples and drawings.

A first aspect of the present application is directed to a backside illuminated image sensor comprising a backside illuminated image sensor comprising a rear passivation layer on which SiGe or p-type SiGe is grown, illuminated image sensor.

In one embodiment of the present invention, referring to FIG. 1, the backside illuminated image sensor may include, but is not limited to:

An oxide insulating layer (not shown) formed on the supporting substrate 300;

A metal wiring layer 302 formed on the oxide insulating layer;

A backside epi layer 304 formed on the metal wiring layer and including a photodiode PD;

A rear passivation layer 306 formed on the backside epilayer;

An antireflection layer (not shown) formed on the rear passivation layer; And

An image sensor layer (310) formed on the antireflection layer;

In one embodiment of the present invention, the backside epi layer may be a p-type doped Si layer, but is not limited thereto.

In one embodiment of the present invention, the image sensor layer may include, but is not limited to, a color filter 312 and a microlens 314 formed on the color filter. If necessary, the image sensor layer may further include a glass plate formed on the microlens, but the present invention is not limited thereto.

2 is a cross-sectional view of the device (a) and a band diagram (b) of the backside illuminated image sensor (when p-type Si is used as the substrate of the backside illuminated image sensor).

As shown in FIG. 2 (a), the backside of the silicon substrate of the image sensor may include a rear passivation layer (protective film) on which the SiGe or p-type SiGe is grown.

As shown in FIG. 2 (b), a band offset of silicon and an electric field band is generated so that holes are accumulated on the surface of a substrate such as silicon by the rear passivation layer on which SiGe or p-type SiGe is grown, The noise of the image sensor can be suppressed.

In one embodiment of the invention, the p-type SiGe layer may be doped with p-type impurities such as B, but is not limited thereto.

A second aspect of the present invention is a method of forming a rear passivation layer by rearranging a semiconductor substrate having a front surface and a rear surface opposite to the front surface and then growing or vapor-depositing SiGe or p-type SiGe on the rear surface of the substrate The present invention also provides a manufacturing process of a backside illuminated image sensor.

In one embodiment of the present invention, the manufacturing process of the backside illuminated image sensor may include but is not limited to:

Forming a rear epilayer formed on one side of the semiconductor substrate, the rear epilayer including a photodiode;

Forming a metal wiring layer on the rear epilayer;

Forming an oxide insulating layer on the metal wiring layer;

Attaching a supporting substrate on the insulating layer;

Rear side grinding the other side of the semiconductor substrate to expose a rear epilayer including the photodiode;

Forming a back passivation layer on the backside epilayer;

Forming an antireflective layer on the rear passivation layer;

Forming an image sensor layer on the antireflection layer;

Here, forming the back passivation layer includes epitaxially depositing a SiGe layer or a p-type doped SiGe layer with a thickness of 1 nm to 50 nm, but does not include an annealing process.

In one embodiment of the present invention, the thickness of the back passivation layer may be about 0.1 nm to about 50 nm. For example, the thickness of the back passivation layer may be from about 0.1 nm to about 50 nm, from about 0.1 nm to about 40 nm, from about 0.1 nm to about 30 nm, from about 0.1 nm to about 20 nm, from about 0.1 nm to about 18 nm From about 0.1 nm to about 5 nm, from about 0.1 nm to about 1 nm, from about 0.1 nm to about 16 nm, from about 0.1 nm to about 14 nm, from about 0.1 nm to about 12 nm, from about 0.1 nm to about 10 nm, From about 0.1 nm to about 0.5 nm, from about 0.1 nm to about 0.3 nm, from about 0.3 nm to about 20 nm, from about 0.5 nm to about 20 nm, from about 1 nm to about 20 nm, from about 5 nm to about 20 nm, From about 20 nm to about 20 nm, from about 12 nm to about 20 nm, from about 14 nm to about 20 nm, from about 16 nm to about 20 nm, or from about 18 nm to about 20 nm.

In one embodiment of the present invention, the backside illuminated image sensor is to grow SiGe or p-type SiGe as the back passivation layer, without directly forming an absorbing layer on the backside of the semiconductor substrate, but directly forming the back passivation layer. By growing SiGe or p-type SiGe as the rear passivation layer, a layer capable of accumulating holes can be formed on the silicon surface, band offset of the valence band occurs due to band alignment of silicon and SiGe, Therefore, the band offset of the valence band can cause the holes to accumulate on the surface. Since the holes offset into the SiGe layer due to the band offset, electrons generated at the interface between the surface silicon or SiGe and SiO ₂ are recombined in the SiGe region and are not captured by the actual image sensor, thereby suppressing noise.

In the case of the conventional ion implantation process, a subsequent heat treatment must be performed, but a backside irradiation image sensor according to an embodiment of the present invention performs additional heat treatment or annealing by epitaxially growing the rear passivation layer at a certain low temperature The holes may be accumulated by only the growth, and the noise of the image sensor may be reduced. In embodiments herein, epitaxial growth at said low temperature may be performed at a temperature of from about 300 캜 to about 800 캜, from about 300 캜 to about 600 캜, from about 300 캜 to about 500 캜, or from about 300 캜 to about 400 캜 .

In one embodiment of the present invention, noise can be further suppressed through a combination of materials such as Si, SiGe, or Ge by growing the back passivation layer and then growing thin capping Si on the surface.

The manufacturing process of the backside illuminated image sensor according to one embodiment of the present invention can be manufactured as shown in FIG. 3, and the rear passivation layer may be formed after the process of adjusting the thin film thickness in the manufacturing process. And then performing an anti-reflection film coating process after forming the passivation layer.

In one embodiment of the invention, the method includes growing or depositing a semiconductor on a silicon surface where a band offset of a valence band occurs during bonding with silicon in the backside illuminated image sensor manufacturing process, Lt; RTI ID = 0.0 > SiGe < / RTI > or p-type SiGe.

In one embodiment of the present invention, the backside illuminated image sensor directly forms a back passivation layer directly on the backside of the semiconductor substrate without using an absorbing layer, wherein the back passivation layer is formed by growing a SiGe or p-type SiGe layer will be. By growing SiGe or p-type SiGe as the rear passivation layer, a layer capable of accumulating holes can be formed on the silicon surface, band offset of the valence band occurs due to band alignment of silicon and SiGe, Therefore, the band offset of the valence band can cause the holes to accumulate on the surface. Since the holes offset into the SiGe layer due to the band offset, electrons generated at the interface between the surface silicon or SiGe and SiO ₂ are recombined in the SiGe region and are not captured by the actual image sensor, thereby suppressing noise.

In one embodiment of the invention, the substrate may comprise a material selected from the group consisting of silicon, semiconductor material, and combinations thereof.

For example, the silicon substrate may be doped with a silicon material (p-type substrate) doped with a p-type dopant such as boron or with an n-type dopant such as phosphorous, arsenic, (N-type substrate), although it is not limited thereto.

Also, for example, the semiconductor substrate may optionally include, but is not limited to, basic semiconductors such as germanium or diamond, or composite semiconductors and / or alloy semiconductors.

In one embodiment of the invention, growing the SiGe or p-type SiGe may be epitaxy growth.

In one embodiment of the invention, the epitaxial growth may be by using chemical vapor deposition (CVD) or molecular beam epitaxy (MBE). For example, the CVD may include, but is not limited to, UHV CVD (ultrahigh vacuum CVD) or LPCVD (low pressure CVD).

In one embodiment of the invention, it may further comprise growing the SiGe or p-type SiGe and then growing Si on the surface. The Si growth can lower the dangling bond at the interface with SiO ₂ . For example, the source of Si may include those selected from the group consisting of dichlorosilane, silane, disilane, trisilane, and combinations thereof.

In one embodiment of the present invention, the thickness of the back passivation layer may be about 0.1 nm to about 50 nm. For example, the thickness of the back passivation layer may be from about 0.1 nm to about 50 nm, from about 0.1 nm to about 40 nm, from about 0.1 nm to about 30 nm, from about 0.1 nm to about 20 nm, from about 0.1 nm to about 18 nm From about 0.1 nm to about 5 nm, from about 0.1 nm to about 1 nm, from about 0.1 nm to about 16 nm, from about 0.1 nm to about 14 nm, from about 0.1 nm to about 12 nm, from about 0.1 nm to about 10 nm, From about 0.1 nm to about 0.5 nm, from about 0.1 nm to about 0.3 nm, from about 0.3 nm to about 20 nm, from about 0.5 nm to about 20 nm, from about 1 nm to about 20 nm, from about 5 nm to about 20 nm, From about 20 nm to about 20 nm, from about 12 nm to about 20 nm, from about 14 nm to about 20 nm, from about 16 nm to about 20 nm, or from about 18 nm to about 20 nm.

In one embodiment of the invention, wherein it is of the back grow Ge with respect to the passivation layer _{formed, GeH 4 (germane), Ge} 2 H 8 (digermane), GeCl 4 (germanechloride) as the source for the Ge, and their And combinations thereof. However, the present invention is not limited thereto.

In one embodiment of the present invention, when the rear passivation layer is formed on Si, strain may be generated when SiGe or Ge having a crystal constant different from that of the Si is grown, That is, a thin film having a thickness less than the critical thickness must be grown. For example, as the Ge concentration increases, the critical thickness becomes smaller. Therefore, the thickness must be thinner than the critical thickness to prevent the occurrence of defects. The ratio of Si and Ge in the SiGe may vary depending on the application.

4A is a flow diagram illustrating a process for fabricating a backside illuminated image sensor, in one embodiment of the invention; FIG. 4B is a schematic diagram illustrating a manufacturing process of a backside illuminated image sensor in one embodiment of the present invention. FIG.

FIG. 5 is a schematic view illustrating the rear passivation layer in detail in FIG. 4B according to an embodiment of the present invention.

4 and 5, the manufacturing process of the backside illuminated image sensor is performed by first processing a wafer according to a general front illuminated image sensor process (FAB process), inverting the processed wafer and bonding it with another Si substrate (supporting substrate) (Wafer bonding). The backside epitaxial layer comprising the photodiode is then exposed by thinning the turn-over bonded wafer. SiGe or p-type SiGe is epitaxially grown on the surface of the exposed rear epitaxial layer to form a rear passivation layer (surface passivation). After forming the rear passivation layer, an anti-reflection film coating is deposited and a general image sensor process such as a color filter and a microlens is performed.

If there is no light between the antireflective coating layer and the p-layer when the process is completed and the antireflective coating layer is coated (when the passivation layer according to an embodiment of the present invention is not formed) after the absorption layer is exposed, The possibility of occurrence is increased, and this may enter the photodiode and noise may be generated.

In detail, the rear p-type epi layer 101 is entirely etched in the rear thinning process, and the p-type Si layer (or the p-type Si Epitaxial growth of the p-type SiGe rear passivation layer 201 is performed (see FIG. 5). At this time, the n-type Si layer photodiode (PD) 108 formed of the n-type implant should not be exposed. If the p-type epilayers 101 are extremely thin, the light is absorbed by the p-type epilayers 101 if the p-type epilayers 101 are left without etching the entire p-type epilayers 101 The sensitivity may be lowered.

In one embodiment of the present invention, the antireflection film coating layer is coated on the rear passivation layer (p-type SiGe layer). For example, the anti-reflective film coating layer may include, but is not limited to, a dielectric film (e.g., a high-k material).

It will be understood by those of ordinary skill in the art that the foregoing description of the embodiments is for illustrative purposes and that those skilled in the art can easily modify the invention without departing from the spirit or essential characteristics thereof. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive. For example, each component described as a single entity may be distributed and implemented, and components described as being distributed may also be implemented in a combined form.

The scope of the present invention is defined by the appended claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalents should be interpreted as being included in the scope of the present invention.

101: p-type epilayer
102: a p-type Si epi layer or a p-type Si layer
103: Epi layer
104: shallow trench isolation (STI)
105: gate oxide of the transfer gate
106: electrode of transfer gate
107: Transfer gate
108: photodiode
109: Side wall oxide of the transfer gate
110: floating diffusion
111: p + Si (p + Si for preventing dark current of photodiode)
201: p-type SiGe rear passivation layer
300: Support substrate
302: metal wiring layer
304: rear epilayer including photodiode
306: rear passivation layer
310: image sensor layer
312: Color filter
314: Microlens

Claims (6)

An oxide insulating layer formed on the support substrate;
A metal wiring layer formed on the oxide insulating layer;
A backside epi layer formed on the metal wiring layer and including a photodiode;
A rear passivation layer formed on the rear epilayer;
An antireflection layer formed on the rear passivation layer; And
The image sensor layer formed on the antireflection layer
A back side illumination image sensor,
Wherein the back passivation layer comprises a SiGe layer or a p-type doped SiGe layer having a thickness of 0.1 nm to 50 nm.
Back-illuminated image sensor.
The method according to claim 1,
Wherein the backside epilayer is a p-type doped Si layer.
The method according to claim 1,
Wherein the image sensor layer comprises a color filter, and a microlens formed on the color filter.
Forming a rear epilayer formed on one side of the semiconductor substrate, the rear epilayer including a photodiode;
Forming a metal wiring layer on the rear epilayer;
Forming an oxide insulating layer on the metal wiring layer;
Attaching a supporting substrate on the insulating layer;
Rear side grinding the other side of the semiconductor substrate to expose a rear epilayer including the photodiode;
Forming a back passivation layer on the backside epilayer;
Forming an antireflective layer on the rear passivation layer;
Forming an image sensor layer on the antireflection layer
The method comprising the steps of:
Wherein forming the back passivation layer comprises epitaxially depositing a SiGe layer or a p-type doped SiGe layer having a thickness of 0.1 nm to 50 nm, but not an annealing process.
Method of manufacturing a backside illuminated image sensor.
5. The method of claim 4,
Wherein the epitaxial deposition of the SiGe layer or the p-type doped SiGe layer is performed by chemical vapor deposition (CVD) or molecular beam epitaxy (MBE).
5. The method of claim 4,
Wherein the epitaxial deposition of the SiGe layer or the p-type doped SiGe layer is performed at a temperature in the range of about 300 < 0 > C to about 800 < 0 > C.

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