KR20180085623A - Ultra Capacitor Module Having Voltage Sensing Board - Google Patents

Abstract

The present invention relates to an ultra-capacitor module having a voltage sensing board, capable of precisely sensing a voltage of the ultra-capacitor. The ultra-capacitor module includes: n ultra-capacitors (212a~212n) having a first electrode and a second electrode; and a voltage sensing board (202) for sensing voltages across the first and second electrodes of the n ultra-capacitors (212a~212n). The voltage sensing board (202) includes: N comparators (220a~220n) connected to the n capacitors (212a~212n), respectively, to calculate the potential difference between the first and second electrodes of the ultra-capacitors (212a~212n) and output the calculated potential difference as a voltage level of each of the ultra-capacitors (212a~212n); n analog-digital converters (240a~240n) for converting the voltage levels output from the n comparators (220a~220n) into digital values; a control module (260) for outputting the voltage level converted into the digital value by the n analog-digital converters (240a~240n) to an external system; and n isolators (250a) disposed between output terminals of the n analog-digital converters (240a~240n) and an input terminal of the control module (260) to electrically isolate the n analog-digital converters (240a~240n) from the control module (260).

Description

[0001] The present invention relates to an Ultra Capacitor Module (Having Voltage Sensing Board) having a voltage sensing board,

The present invention relates to an ultracapacitor, and more particularly, to an ultracapacitor module composed of a plurality of ultracapacitors.

Ultra Capacitor (Ultra Capacitor) is a device with intermediate characteristics between electrolytic capacitor and secondary battery. It has high efficiency and semi-permanent lifetime characteristics. It can compensate short cycle and instantaneous high voltage problems which are weak points of secondary battery, Is gradually increasing.

Ultra capacitors have fast charging and discharging characteristics, and thus can be used not only as an auxiliary power source for mobile devices such as mobile phones, tablet PCs, or notebook computers, but also for electric vehicles, hybrid vehicles, solar cell power supplies, and uninterruptible power supplies Power Supply: UPS).

Since the voltage of one of the above-described ultracapacitors is only 3V or less, when an ultracapacitor is to be used in a high-voltage application, an ultracapacitor module formed by connecting a plurality of ultracapacitors in series is used.

An example of a typical ultracapacitor module is shown in Fig. As shown in FIG. 1, a general ultracapacitor module 140 is formed by electrically connecting a plurality of ultracapacitors 100. For example, the anode 132a of the first ultracapacitor 100a and the cathode 134b of the second ultracapacitor 100b adjacent to the first ultra capacitor 100a among the plurality of ultracapacitors 100 are connected to the bus bar 150 The first ultracapacitor 100a and the second ultracapacitor 100b are connected in series with each other.

At this time, the number of ultracapacitors 100 constituting the ultracapacitor module 140 is determined according to an operation voltage required in an application to which the ultracapacitor module 140 is applied.

For example, when the ultracapacitor module 140 is applied to a high voltage application requiring an operation voltage of 12 V, the ultracapacitor module 140 should be configured by connecting at least four ultracapacitors 100 in series.

In the case of the ultracapacitor module 140 in which the plurality of ultracapacitors 100 are connected in series, an initial voltage difference, a capacity deviation, a leakage current deviation, and the like between the ultracapacitors 100 during repeated charging and discharging of the ultracapacitor module 140, A variation in the voltage charged in each ultracapacitor may occur due to an internal resistance variation or the like. If the variation of the voltage continuously increases, the life or reliability of the ultracapacitor 100 and the ultracapacitor module 140 is affected .

In order to solve such a problem, a method of sensing the voltage of each ultracapacitor 100 constituting the ultracapacitor module 140 has been proposed. However, in the case of the ultracapacitor module 140, there is a problem that the charging / discharging operation using the large current causes a large change in charging / discharging current to generate EMC noise, and the voltage of the ultracapacitor can not be accurately sensed due to the EMC noise have.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and it is a technical feature of the present invention to provide an ultracapacitor module having a voltage sensing board capable of accurately sensing a voltage of an ultracapacitor.

It is another object of the present invention to provide an ultracapacitor module having a voltage sensing board capable of accurately correcting an offset of a comparator for voltage sensing of an ultracapacitor.

According to an aspect of the present invention, there is provided an ultracapacitor module having a voltage sensing board, comprising: n ultracapacitors (212a to 212n) having a first electrode and a second electrode; And a voltage sensing board 202 for sensing voltages across the first and second electrodes of the n ultracapacitors 212a to 212n and the voltage sensing board 202 is connected to the n ultracapacitors 212a to 212n to calculate the potential difference between the first electrode and the second electrode of each of the ultracapacitors 212a to 212n and output the calculated potential difference to the voltage level of each of the ultracapacitors 212a to 212n Comparators 220a through 220n; N analog-to-digital converters 240a through 240n for converting the voltage levels output from the n comparators 220a through 220n into digital values; A control module 260 for outputting a voltage level converted into a digital value by the n analog-to-digital converters 240a to 240n to an external system; And between the output of the n analog-to-digital converters 240a-240n and the input of the control module 260 to electrically connect the n analog-to-digital converters 240a-240n and the control module 260 And includes n isolators 250a that isolate the input signal.

In one embodiment, the n isolators 250a through 250n include: a light emitting device 252 that converts a voltage level output from the analog-to-digital converters 240a through 240n into an optical signal and outputs the optical signal; And a light receiving element 254 electrically separated from the light emitting element 252 and converting an optical signal output from the light emitting element 252 into the voltage level.

The light emitting device 252 may be a light emitting diode (LED), and the light receiving device 254 may be a photodiode or a phototransistor.

The light emitting element 252 and the light receiving element 254 may be implemented as an optocoupler in which the light emitting element 252 is disposed on the primary side and the light receiving element 254 is disposed on the secondary side.

In one embodiment, the ultracapacitor module having the voltage sensing board may further include n digital potentiometers 240a through 240n for correcting the offset of the n comparators 220a through 220n.

The ultracapacitor module having the voltage sensing board is connected to the output terminals of the n comparators 220a to 220n so that the voltage levels output from the n comparators 220a to 220n are linearly divided according to a predetermined scaling ratio. N < / RTI > At this time, the n analog-to-digital converters 240a to 240n are connected to the output terminals of the n scalers 270a to 270n, respectively, and change the voltage level changed by the corresponding scalers 270a to 270n to digital values.

The ultracapacitor module having the voltage sensing board is connected to each of the ultracapacitors 212a to 212n to perform voltage balancing between the ultracapacitors 212a to 212n so that the voltages of the ultracapacitors 212a to 212n are equalized and may further include n voltage balancing units 214a through 214n.

According to this embodiment, when the voltages of the ultracapacitors 212a to 212n to which the voltage balancing units 214a to 214n are connected exceed a predetermined reference voltage, the n voltage balancing units 214a to 214n are turned off, The voltage of the ultracapacitors 212a to 212n is discharged to a predetermined reference voltage by discharging the voltages of the capacitors 212a to 212n.

The control module 260 compares the voltage levels output from the n isolators 250a through 250n with a predetermined reference voltage level and when the voltage level is different from the reference voltage level, the control module 260 controls the corresponding ultracapacitors 212a through 212n Or a flag indicating occurrence of an error of the voltage balancing units 214a to 214n connected to the ultracapacitors 212a to 212n to the external system.

According to the present invention, since the voltage of the ultracapacitor sensed by the comparator is converted into an optical signal and transmitted to the control module, the influence of the EMC noise on the sensed voltage can be minimized and the voltage of the ultracapacitor can be more accurately sensed Can be effective.

According to the present invention, since the digital potentiometer is used for offset correction of the comparator, the resistance value for offset correction of the comparator is not changed even when the impact of the ultracapacitor module is shifted, so that the sensing accuracy of the ultracapacitor voltage using the comparator There is an effect that it can be improved.

1 is an exploded perspective view showing a configuration of a conventional ultracapacitor module.
2 is a block diagram illustrating a configuration of an ultracapacitor module having a voltage sensing board according to an embodiment of the present invention.
3 is an exploded perspective view of an ultracapacitor according to the present invention.
4A is a block diagram illustrating a configuration of a voltage balancing unit according to an embodiment of the present invention.
4B is a circuit diagram showing an exemplary circuit configuration of the voltage balancing unit shown in FIG. 4A.
FIG. 5 is a view showing an example of the isolator shown in FIG. 2. FIG.

The meaning of the terms described herein should be understood as follows.

The word " first, "" second," and the like, used to distinguish one element from another, are to be understood to include plural representations unless the context clearly dictates otherwise. The scope of the right should not be limited by these terms.

It should be understood that the terms "comprises" or "having" does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof.

It should be understood that the term "at least one" includes all possible combinations from one or more related items. For example, the meaning of "at least one of the first item, the second item and the third item" means not only the first item, the second item or the third item, but also the second item and the second item among the first item, Means any combination of items that can be presented from more than one.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a block diagram schematically illustrating a configuration of an ultracapacitor module having a voltage sensing board according to an embodiment of the present invention.

2, an ultracapacitor module 200 (hereinafter, referred to as 'ultracapacitor module') having a voltage sensing board according to an embodiment of the present invention includes at least one ultracapacitor 212a to 212n and at least one And a voltage sensing board 202 for sensing a voltage of one of the ultracapacitors 212a to 212n. The voltage sensing board 202 includes a comparator 220, a digital potentiometer 230, an analog-to-digital converter 240, an isolator 250, and a control module 260. The voltage sensing board 202 may further include a scaler 270.

In one embodiment, when the ultracapacitor module 200 includes a plurality of ultracapacitors 212a through 212n connected in series, the voltage sensing board 202 is connected to the output of each of the ultracapacitors 212a through 212n A plurality of analog potentiometers 230a to 230n connected to the plurality of comparators 220a to 220n and a plurality of analog-to-digital converters 220a to 220n connected to the output terminals of the plurality of comparators 220a to 220n, respectively, Digital converters 240a to 240n and a plurality of isolators 250a to 250n connected to output terminals of the plurality of analog-to-digital converters 240a to 240n, respectively.

Hereinafter, for convenience of explanation, one ultracapacitor (denoted by numeral 212), one comparator (denoted by numeral 220), one digital potentiometer (denoted by numeral 230) , One analog-to-digital converter (denoted by a drawing number of 240), and one isolator (denoted by a drawing number of 250) according to an embodiment of the present invention. .

The ultracapacitor 212 stores electrochemical energy or provides stored energy to an external device. In one embodiment, when the ultracapacitor module 200 includes n ultracapacitors 210a through 210n, each ultracapacitor 212a through 212n may be connected in series with one another through a bus bar (not shown) .

Hereinafter, a configuration of an ultracapacitor according to an embodiment of the present invention will be schematically described with reference to FIG.

3 is an exploded perspective view of an ultracapacitor according to an embodiment of the present invention. 3, the ultracapacitor 212 includes a bare cell 312, a first internal terminal 313, a second internal terminal 314, a first external terminal 315, a second external terminal 316 ), And a case 317.

The bare cell 312, which is called an electrode substrate, includes a first electrode (for example, an anode), a second electrode (for example, a cathode), and a separator disposed between the anode and the cathode for electrically separating the anode and the cathode. As shown in Fig.

In one embodiment, the bare cell 312 may be formed by winding the anode, the cathode, and the separator in a circular, elliptical, or rectangular shape.

The anode includes an active material layer (not shown) formed using activated carbon on a current collector (not shown) made of a metal and a cathode lead portion (not shown) connected to one side of the active material layer. At this time, the positive electrode lead portion is composed of a region in which the active material layer is not formed in the current collector.

The cathode includes a layer of active material (not shown) formed using activated carbon on a metal current collector (not shown) and a cathode lead portion (not shown) connected to one side thereof. At this time, the negative electrode lead portion is constituted of a region where the active material layer is not formed in the current collector.

In the above-described embodiment, the current collector constituting the positive electrode and the negative electrode may be constituted by using the metal foil Foil, and the active material layer may be coated on both sides of the current collector. The active material layer is a portion in which electric energy is stored, and the current collector serves as a path for transferring charge supplied or discharged from the active material layer.

In one embodiment, the positive electrode and the negative electrode are wound such that the positive electrode lead portion is located below the bare cell 312 and the negative electrode lead portion is located above the bare cell 312.

The first internal terminal 313 is formed to be able to cover at least a part of the positive electrode lead portion of the bare cell 312. Specifically, the first internal terminal 313 is formed so that a part of the positive electrode lead portion disposed under the bare cell 312 at the lower side of the bare cell 312 can be received. The first internal terminal 313 is electrically connected to the positive electrode lead portion.

In one embodiment, the first inner terminal 313 may be coupled to the cathode lead via laser or ultrasonic welding, and may be coupled to the upper edge of the first outer terminal 315 to be integral with the first outer terminal 315 Can be combined.

The second internal terminal 314 is formed in a shape that can cover at least a portion of the negative electrode lead portion of the bare cell 312. Specifically, the second internal terminal 314 is formed so that a part of the negative electrode lead portion disposed on the upper side of the bare cell 312 on the upper side of the bare cell 312 can be received. Whereby the second internal terminal 314 is electrically connected to the negative electrode lead portion.

In one embodiment, the second inner terminal 314 may be coupled to the cathode lead via laser or ultrasonic welding, and may be coupled to the lower edge of the second outer terminal 316 to be integral with the second outer terminal 316 Can be combined.

The first and second internal terminals 313 and 313 are each formed with one or more holes 318 and 319 as shown in FIG. 3 so that electrolyte can be impregnated into the bare cell 312. The electrolyte may be impregnated into the bare cell 312 through the one or more holes 318 and 319 and the gas inside the bare cell 312 may be discharged to the outside.

In one embodiment, the holes 318 and 319 formed in the first and second internal terminals 313 and 314 are formed in the first and second internal terminals 313 and 314 so that impregnation of the electrolyte solution is facilitated. And may be arranged to face each other with respect to the center of the first and second internal terminals 313 and 314.

The first and second internal terminals 313 and 314 may be formed of the same material (for example, aluminum) as the positive electrode lead portion and the negative electrode lead portion to increase the coupling force between the positive electrode lead portion and the negative electrode lead portion.

The first external terminal 315 is coupled to the first internal terminal 313 at the lower end of the case 317 to cap the lower end of the case 317 and to provide a current path. The first outer terminal 315 may have an outer peripheral surface having a shape corresponding to the shape of the case 317 and may be formed in a generally three-dimensional shape as a whole.

In one embodiment, a first electrode terminal 320a for fastening a bus bar is formed at the center of the first external terminal 315.

The second external terminal 316 is coupled to the second internal terminal 316 at the top of the case 317 to cap the top of the case 317 and to provide a current path for the current flow. The second outer terminal 316 may have an outer peripheral surface in a shape corresponding to the shape of the case 317 and may be formed in a generally three-dimensional shape as a whole.

In one embodiment, a second electrode terminal 330a for fastening the bus bar is formed at the center of the second external terminal 316.

Meanwhile, a hollow 332a extending in the thickness direction of the second external terminal 316 may be further formed on the second electrode terminal 330a of the second external terminal 316. The hollow 332a is used as a path for injecting an electrolyte and as an air vent for a vacuum operation.

The case 317 has a housing in which an inner space for accommodating the bare cell 312 is formed. At this time, the shape of the inner space of the case 317 may be determined according to the winding shape of the bare cell 312. For example, when the bare cell 312 is wound in a circular shape, the case 317 is formed to have a circular inner space. When the bare cell 312 is wound in an elliptical shape, the case 317 has an elliptical inner space And when the bare cell 312 is wound in a rectangular shape, the case 317 may be formed to have a rectangular internal space.

In one embodiment, the case 317 may be formed of aluminum.

The first internal terminal 313 and the first external terminal 315 are connected to the anode of the bare cell 312 at the lower end with respect to the longitudinal direction in the case of the case 317 being in the state of a three- The terminal 314 and the second external terminal 316 are connected to the cathode of the bare cell 312 and disposed.

Referring again to FIG. 2, when the ultracapacitor module 200 includes n ultracapacitors 212a through 212n, the ultracapacitor module 200 performs voltage balancing between the respective ultracapacitors 212a through 212n And may further include a plurality of voltage balancing units 214a to 214n.

In one embodiment, the plurality of voltage balancing units 214a to 214n may be configured such that when the voltage of the ultracapacitors 212a to 212n to which the voltage balancing units 214a to 214n are connected exceeds a predetermined reference voltage, 212a to 212n are discharged so that the voltage of each of the ultracapacitors 212a to 212n becomes a predetermined reference voltage.

In one embodiment, the voltage balancing portions 214a through 214n include a voltage detecting portion 410a, a switching element 420, a first resistor 432, a second resistor 434, And a reference setting resistor 440.

The voltage balancing units 214a to 214n turn on the switching device 420 and turn on the ultracapacitors 212a to 212n when the voltage of the ultracapacitors 212a to 212n detected by the voltage detector 410 exceeds a preset voltage. The voltage of the ultracapacitors 212a to 212n is discharged through the first resistor 432 and the second resistor 434 until the voltage of the ultracapacitors 212a to 212n becomes equal to or lower than the set voltage. When discharging is completed, the voltage balancing units 214a to 214n turn off the switching device 420. [ At this time, the preset voltage can be varied by adjusting the value of the reference setting resistor 440.

4B is a circuit diagram illustrating an exemplary configuration of the voltage balancing unit shown in FIG. 4A.

In the above-described embodiment, when the ultracapacitor module 200 includes a plurality of ultracapacitors 212a to 212n, the ultracapacitor module 200 may include a plurality of voltage balancing units 214a to 214n Respectively. However, in the modified embodiment, by selecting a plurality of ultracapacitors 212a to 212n as ultracapacitors having the same initial voltage (OCV) within a predetermined error range, each of the ultracapacitors 212a- The voltage balancing units 214a to 214n may be omitted for balancing the voltage between the power supply units 212a to 212n.

2, the comparator 220 calculates the potential difference between the positive and negative angles of the ultracapacitor 212, and outputs the calculated potential difference to the voltage level of the corresponding ultracapacitor 212. [

Specifically, the first input terminal IT1 of the comparator 220 is connected to the anode of the ultracapacitor 212, and the second input terminal IT2 of the comparator 220 is connected to the cathode of the ultracapacitor 212 .

The comparator 220 determines the potential difference calculated by calculating the potential difference between the first input terminal IT1 and the second input terminal IT2 as the voltage level of the ultracapacitor 212. [ The comparator 220 outputs the determined voltage level through the output terminal OP.

In one embodiment, the ultracapacitor module 200 according to the present invention may further include a digital potentiometer 230 for offset correction of the comparator 220. The digital potentiometer 230 performs the same function as the variable resistor, and the resistance value is changed according to a digital value transmitted from the control module 260 through SPI (Serial Peripheral Interface) communication or I2C (Inter Integrated Circuit) communication .

If a general variable resistor is used for offset correction of the comparator 220, the knob of the variable resistor may be rotated due to an impact generated when the ultracapacitor module 200 is moved, so that the resistance value may be undesirably changed, The offset of the comparator 220 can not be accurately corrected.

However, since the digital potentiometer 230 is used for the offset correction of the comparator 220, the resistance value is not changed even if an impact occurs when the ultracapacitor module 200 is moved. Therefore, the offset of the comparator 220 can be accurately The voltage sensing accuracy of the comparator 230 can be improved.

Next, the analog-to-digital converter 240 (ADC) converts the voltage level of the analog value sensed by the comparator 220 into a digital value. In one embodiment, the analog-to-digital converter 240 may be a 16-bit analog-to-digital converter 240.

The isolator 250 is connected between the output of the analog-to-digital converter 240 and the input of the control module 260 to electrically isolate the analog-to-digital converter 240 and the control module 260.

In one embodiment, the isolator 250 may comprise a light emitting element 252 and a light receiving element 254. The light emitting device 252 converts the voltage level of the digital value output from the analog-to-digital converter 240 into an optical signal and outputs the optical signal. In one embodiment, the light emitting device 252 may be implemented as an LED (Light Emitting Diode).

The light receiving element 254 is electrically separated from the light emitting element 252 and converts the optical signal output from the light emitting element 252 back to a voltage level of a digital value. For example, the light receiving element 254 may receive an optical signal output from the light emitting element 252 when the optical signal is output, and may output a voltage level according to the intensity of the received optical signal. In one embodiment, the light receiving element 254 may be implemented as a photodiode or a phototransistor.

As described above, according to the present invention, in transmitting the voltage level converted to the digital value by the analog-to-digital converter 240 to the control module 260, the voltage level having the digital value is emitted from the analog- The control module 260 receives the voltage level through the light receiving element 254 in the form of an optical signal and converts it into a voltage level having a digital value again to receive the voltage level Therefore, the influence of the EMC noise can be minimized when the voltage level is transmitted.

The light emitting element 252 and the light receiving element 254 are separated from each other in the above-described embodiment. However, in the modified embodiment, the light emitting element 252 and the light receiving element 254 are constituted in one package It might be.

According to this embodiment, the light emitting element 252 and the light receiving element 254 may be implemented using an optocoupler having a structure as shown in FIG. 5, the light emitting element 252 is disposed on the primary side and the light receiving element 254 is disposed on the secondary side so that the light emitting element 252 and the light receiving element 254 are electrically insulated from each other.

The control module 260 outputs the voltage level output from the light receiving element 254 to the external system. In one embodiment, the control module 260 may generate a flag indicating the operating state of the ultracapacitor 212 according to the voltage level of the ultracapacitor output from the light receiving element 254, and output the flag to the external system.

The control module 260 controls the voltage balancing unit 214 connected to the ultracapacitor 212 or the ultracapacitor 212 when the voltage level output from the light receiving element 254 differs from a predetermined reference voltage level. It generates a flag indicating occurrence of an error, and transmits the generated flag to the external system.

The control module 260 generates a digital value for adjusting the resistance value of the digital potentiometer 230 for offset correction of the comparator 230 according to a predetermined algorithm and outputs the digital value to the digital potentiometer 240.

2, the ultracapacitor module 200 according to the present invention includes a scaler 270 connected between the output of the comparator 220 and the input of the analog-to-digital converter 240, .

The scaler 270 according to the present invention linearly changes the voltage level output from the comparator 220 according to a predetermined scaling ratio. According to the scaler 270, the voltage level output from the comparator 220 can be up-scaled to a desired level or down-scaled to a desired level.

The ultracapacitor 212 as described above is accommodated in a module case (not shown), and the voltage sensing board 202 can be mounted outside the module case through a separate housing.

It will be understood by those skilled in the art that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof.

It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive. The scope of the present invention is defined by the appended claims rather than the detailed description and all changes or modifications derived from the meaning and scope of the claims and their equivalents are to be construed as being included within the scope of the present invention do.

200: ultracapacitor module 212: ultracapacitor
214: voltage balancing unit 220: comparator
230: Digital potentiometer 240: Analog-to-digital converter
250: Isolator 260: Control module

Claims (9)

N ultracapacitors having a first electrode and a second electrode; And
And a voltage sensing board for sensing voltages across the first and second electrodes of the n ultracapacitors,
The voltage sensing board includes:
N comparators each connected to the n ultracapacitors to calculate a potential difference between the first electrode and the second electrode of each ultracapacitor and output the calculated potential difference to the voltage level of each ultracapacitor;
N analog-to-digital converters for converting the voltage levels output from the n comparators into digital values;
A control module for outputting a voltage level converted into a digital value by the n analog-to-digital converters to an external system; And
And n isolators disposed between the output of the n analog-to-digital converters and the input of the control module to electrically isolate the n analog-to-digital converters and the control module. Ultra-Capacitor Module. The method according to claim 1,
The n <
A light emitting element for converting a voltage level output from the analog-to-digital converter into an optical signal and outputting the optical signal; And
And a light receiving element electrically separated from the light emitting element and converting an optical signal output from the light emitting element into the voltage level. The method according to claim 1,
Wherein the light emitting device is a light emitting diode (LED), and the light receiving device is a photodiode or a phototransistor. The method according to claim 1,
Wherein the light emitting element and the light receiving element are optocouplers in which the light emitting element is disposed on a primary side and the light receiving element is disposed on a secondary side. The method according to claim 1,
Further comprising n digital potentiometers for correcting the offset of the n comparators. ≪ RTI ID = 0.0 > 11. < / RTI > The method according to claim 1,
And n scalers connected respectively to the output terminals of the n comparators for linearly varying the voltage level output from the n comparators according to a predetermined scaling ratio,
Wherein the n analog-to-digital converters are connected to output terminals of the n scalers to change the voltage level changed by the corresponding scaler to a digital value. The method according to claim 1,
Further comprising n voltage balancing units for performing voltage balancing between the respective ultracapacitors so that the voltages of the respective ultracapacitors are connected to each other by the respective ultracapacitors. 8. The method of claim 7,
Wherein the n voltage balancing unit discharges the voltage of the ultracapacitor so that the voltage of the ultracapacitor becomes a predetermined reference voltage when the voltage of the ultracapacitor to which the voltage balancing unit is connected exceeds a predetermined reference voltage. Ultra-capacitor module with board. 8. The method of claim 7,
The control module includes:
And comparing a voltage level output from the n isolators with a predetermined reference voltage level, and when the voltage level is different from the reference voltage level, a flag indicating occurrence of an error in a voltage balancing unit connected to the ultracapacitor or the ultracapacitor, And a voltage sensing board connected to the voltage sensing board.

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