KR20180049820A - An organic luminescence emitting display and the manufacturing method thereof - Google Patents

Abstract

The present invention relates to an organic light emitting display device and a method of fabricating the same. The present invention provides the organic light emitting display device so as to reduce a parasitic capacity of an intersecting portion between the gate lines and data lines. The organic light emitting display device comprises: the gate lines formed on a substrate and extended in a first direction; the data lines formed on the substrate and extended in a second direction substantially perpendicular to the first direction, and overlapping with the gate lines on the intersecting portion; a first thin film transistor electrically connected to the gate lines and the data lines, sequentially including a gate electrode, an active layer including an oxide semiconductor, a source electrode and a drain electrode, wherein the first thin film transistor includes a gate insulating layer interposed between the gate electrode and the active layer; a capacitor electrically connected to the first thin film transistor and including a lower electrode formed in the same layer as the gate electrode, an upper electrode, and a first insulating layer formed in a single layer between the lower electrode and the upper electrode; a second thin film transistor electrically connected to the capacitor; and an organic light emitting element electrically connected to the second thin film transistor. The independent semiconductor island is installed on the intersecting portion and separated from the active layer. The semiconductor island includes an oxide semiconductor and is formed in the same layer as the active layer. The independent insulating island is installed between the gate lines and the semiconductor island on the intersecting portion and separated from the gate insulating layer. The insulating island is formed of the same material as the gate insulating layer.

Description

[0001] The present invention relates to an organic luminescence display and a manufacturing method thereof,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an organic light emitting display, and more particularly to an organic light emitting display including a bottom gate thin film transistor using an oxide semiconductor and a method of manufacturing the same. will be.

In an active matrix type organic light emitting display, a plurality of gate lines and data lines are arranged in a matrix to define each pixel. Each pixel includes a thin film transistor, a capacitor, and an organic light emitting element connected to the thin film transistor. The organic light emitting diode emits light by receiving an appropriate driving signal from the thin film transistor and the capacitor to realize a desired image.

Since the gate lines and the data lines are arranged in a matrix form, a certain portion is always overlapped. This overlapping portion has parasitic capacitance by the gate line and the data line. This parasitic capacitance causes difficulty in realizing a high resolution image, and thus an improvement is required.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an organic light emitting display device and a method of manufacturing the same that reduce a parasitic capacitance of a portion where a gate line and a data line are overlapped.

According to an embodiment of the present invention, there is provided a liquid crystal display comprising: a gate line formed on a substrate in a first direction; A data line formed on the substrate and extending in a second direction substantially perpendicular to the first direction, the data line overlapping the gate line at an intersection; And a gate insulating layer interposed between the gate electrode and the active layer, the gate insulating layer being electrically connected to the gate line and the data line and including a gate electrode, an active layer including an oxide semiconductor, a source electrode and a drain electrode sequentially A first thin film transistor; A capacitor electrically connected to the first thin film transistor and including a lower electrode formed on the same layer as the gate electrode, an upper electrode, and a first insulating layer interposed therebetween; A second thin film transistor electrically connected to the capacitor; And an organic light emitting diode electrically connected to the second thin film transistor; Wherein the semiconductor island is formed in the same layer as the active layer and the gate line and the semiconductor island are formed in the same layer as the active layer, Wherein the insulating island is formed of the same material as the gate insulating layer, and the insulating island is formed separately from the gate insulating layer, and the insulating island is formed of the same material as the gate insulating layer.

According to an aspect of the present invention, the gate electrode is protruded from the gate line, and the source electrode is protruded from the data line.

According to another aspect of the present invention, the gate electrode includes a first conductive layer including a transparent conductive material; And a second conductive layer formed on the first conductive layer and including a low-resistance conductive material.

According to another aspect of the present invention, the first insulating layer is also formed between the active layer and the source and drain electrodes to isolate the first and second insulating layers.

According to another aspect of the present invention, the first insulating layer is also formed between the semiconductor island of the intersection and the data line.

According to another aspect of the present invention, the semiconductor island and the insulated island have the same area.

According to another aspect of the present invention, the width of the semiconductor island in the first direction is equal to the width of the insulating island in the first direction, and the width of the semiconductor island in the second direction is larger than the width of the insulating island in the second direction .

According to another aspect of the present invention, the lower electrode is formed on the same layer as the gate electrode, and includes a first layer including a transparent conductive material; And a second layer formed on the first layer, the second layer comprising a low-resistance conductive material; .

According to another aspect of the present invention, the organic light emitting diode includes: a pixel electrode electrically connected to the second thin film transistor; An opposite electrode facing the pixel electrode; And an organic emission layer interposed between the pixel electrode and the counter electrode; .

According to another aspect of the present invention, the pixel electrode includes a first electrode layer directly connected to the organic light emitting layer and including a transparent conductive material; A second electrode layer directly connected to the second thin film transistor and including a low-resistance conductive material; .

According to an embodiment of the present invention, there is provided an organic light emitting display device including a gate line extending in a first direction and a data line extending in a second direction substantially perpendicular to the first direction, The method comprising: forming a gate electrode of a thin film transistor, a lower electrode of a capacitor, and the gate line in the same layer on a substrate; Forming a gate insulating layer on the gate electrode and forming an isolation island in the same layer separated from the gate insulating layer at the intersection of the gate lines; Forming an active layer including an oxide semiconductor on the gate insulating layer, forming an independent semiconductor island in the same layer on the insulating island, the active layer being separated from the active layer by the same material as the active layer; Forming a first insulating layer on the active layer, the lower electrode, and the semiconductor island; And forming a source electrode and a drain electrode on the first insulating layer corresponding to the active layer and forming an upper electrode on the first insulating layer corresponding to the lower electrode, Forming a data line in the same layer on the insulating layer; And a method of manufacturing the organic light emitting display device.

According to another aspect of the present invention, the semiconductor island and the insulating island are formed to have the same area.

According to another aspect of the present invention, the width of the semiconductor island in the first direction is equal to the width of the island in the first direction, and the width of the semiconductor island in the second direction is equal to the width of the island in the first direction. Are formed to have the same width as the two directions.

According to another aspect of the present invention, the organic light emitting diode display further includes an organic light emitting diode, and the pixel electrode of the organic light emitting diode is formed on the same layer of the same material at the same time as the gate electrode, the lower electrode, step; And forming the first insulating layer on the pixel electrode. .

According to another aspect of the present invention, the forming the gate electrode, the lower electrode, the pixel electrode, and the gate line includes: forming a transparent conductive layer including a transparent conductive material; And forming a low-resistance conductive layer including a low-resistance conductive material on the transparent conductive layer; .

Forming a first opening to expose the transparent conductive layer by removing the first insulating layer and the low-resistance conductive layer corresponding to the pixel electrode; .

Forming a pixel defining layer on the source electrode, the drain electrode, the upper electrode, the data line, and the pixel electrode according to another aspect of the present invention; .

According to another aspect of the present invention, there is provided a method of manufacturing a liquid crystal display device, including: forming a pixel defining layer corresponding to the pixel electrode; forming a second opening formed in the first opening; .

According to another aspect of the present invention, there is provided a method of manufacturing an organic light emitting display, comprising: forming an organic light emitting layer to directly contact the transparent conductive layer corresponding to the pixel electrode exposed through the second opening; .

According to another aspect of the present invention, there is provided a method of manufacturing a light emitting device, comprising: forming an opposite electrode on the organic light emitting layer; .

As described above, according to the embodiment of the present invention, the isolation islands and the semiconductor islands are formed at the intersections of the data lines, thereby reducing the parasitic capacitance and realizing a high-resolution image in the OLED display.

As described above, according to the embodiment of the present invention, the insulating island and the semiconductor island are formed at the same time when the thin film transistor is formed, so that no additional mask and processing steps are required, which is advantageous in terms of efficiency and economics.

1 is a schematic plan view of an OLED display according to an embodiment of the present invention.
2 is an enlarged detailed plan view of a portion of FIG.
3 is a sectional view taken along the line I-I 'in Fig.
4 is a cross-sectional view taken along line II-II of FIG.
5 is a cross-sectional view taken along line III-III 'of FIG.
6 to 12 are cross-sectional views illustrating a manufacturing process of the organic light emitting display shown in FIG.

BRIEF DESCRIPTION OF THE DRAWINGS The present invention is capable of various modifications and various embodiments, and specific embodiments are illustrated in the drawings and described in detail in the detailed description. It is to be understood, however, that the invention is not to be limited to the specific embodiments, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

The terms first, second, etc. may be used to describe various elements, but the elements should not be limited by terms. Terms are used only for the purpose of distinguishing one component from another.

The terminology used in this application is used only to describe a specific embodiment and is not intended to limit the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise. In the present application, the terms "comprises" or "having" and the like are used to specify that there is a feature, a number, a step, an operation, an element, a component or a combination thereof described in the specification, But do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a plan view schematically showing an organic light emitting display according to an embodiment of the present invention.

Referring to FIG. 1, the OLED display includes a gate line G extending in the x-axis direction and a data line D extending in the y-axis direction substantially perpendicular to the x-axis direction. In FIG. 1, the power supply line (V in FIG. 2) is omitted.

The pixel region P is defined by a gate line (G) data line (D). An area in a square formed when a plurality of gate lines G and data lines D intersect in a matrix form is a pixel area P. [

The pixel region P includes a light emitting region EA and a circuit region CA. The light emitting region EA is an area where the organic light emitting device OLED is disposed and generates light. The circuit region CA is electrically connected to the data line D and the gate line G, and includes at least one thin film transistor, at least one capacitor. The circuit region CA is an area for driving the organic light emitting element OLED.

The intersection X is a portion where the gate line G and the data line D are overlapped with each other. Each pixel region P includes at least one intersection X. According to an embodiment of the present invention, a semiconductor island 20 and an insulating island (13 in FIG. 4) formed separately from the circuit region CA are formed at the intersection X.

FIG. 2 is a plan view showing the pixel region P of FIG. 1 in detail. 3 is a sectional view taken along the line I-I 'in Fig. 4 is a cross-sectional view taken along the line II-II 'in FIG. 2, and FIG. 5 is a cross-sectional view taken along line III-III' in FIG.

2 to 5, the circuit area CA of the OLED display includes two transistors TR1 and TR2 and one capacitor Cst. However, this is merely an example, and the number of transistors and capacitors is not limited thereto.

2, 3, and 5 show a bottom gate type thin film transistor. However, this is merely exemplary and the form of the transistor is not limited thereto.

First, the first thin film transistor TR1 will be described with reference to FIG.

The first thin film transistor TR1 is electrically connected to the gate line G and the data line D to serve as a switching transistor. The first thin film transistor TR1 is turned on by the gate signal applied to the source terminal and outputs the data signal to the drain terminal.

The first thin film transistor TR1 includes a first gate electrode 110 sequentially formed on a substrate 100, a first active layer 120 including an oxide semiconductor, a first source electrode 131, and a first drain electrode 132).

The first gate electrode 110 protrudes from the gate line G. The first gate electrode 110 includes a first conductive layer 111 and a second conductive layer 112. Here, the first conductive layer 111 includes a transparent conductive material, and may include at least one of ITO, IZO, and ZnO, for example. The second conductive layer 112 includes a low-resistance conductive material and may include at least one of Mo, Al, Pt, Pd, Au, and Cu, for example.

According to the embodiment of the present invention, the first gate electrode 110 is formed of a plurality of layers as described above, so that the pixel electrode 410 and the gate electrode 110 can be formed on the same layer at the same time. From this, it is possible to reduce the number of masks used in manufacturing the OLED display, thereby reducing the number of process steps.

A first gate insulating layer 113 is formed on the first gate electrode 110. The first gate insulating layer 113 insulates the first gate electrode 110 from the first active layer 120. The first gate insulating layer 113 may comprise an inorganic or organic material such as SiO2 or SiNx.

The first gate insulating layer 113 is not formed on the entire surface of the substrate 100 but the first gate electrode 110 of the first thin film transistor TR1 and the first active layer 120 . A second gate insulating layer 213 is formed between the second gate electrode 210 and the second active layer 220 of the second thin film transistor TR2 so as to correspond to the first gate insulating layer 113. [ An insulating island 13 is formed between the gate line G of the intersection X and the semiconductor island 20 so as to correspond to the first gate insulating layer 113. However, an insulating layer corresponding to the first gate insulating layer 113 is not formed between the upper electrode 330 and the lower electrode 310 of the capacitor Cst. Therefore, the distance between the upper and lower electrodes 330 and 310 of the capacitor Cst is reduced, and the charging capacity can be increased. Further, at the intersection X, the distance between the data line D and the gate line G is increased by the insulating island 13, and the parasitic capacitance can be reduced.

A first active layer 120 is formed on the first gate insulating layer 113. The first active layer 120 includes an oxide semiconductor. For example, the first active layer 120 GIZO layer _{[a (In 2 O 3)} b (Ga 2 O 3) c (ZnO) layer] (a, b, c are each a≥0, b≥0, c > 0), or a Hf-In-Zn-O layer.

A first insulating layer 105 is formed on the first active layer 120 to isolate the first active layer 120 from the first source electrode 131 and the first drain electrode 132. The first insulating layer 105 may function as an etch stop layer (ESL) for protecting the lower first active layer 120 and may include an inorganic or organic material such as SiO 2 or SiN x. Unlike the first gate insulating layer 113, the first insulating layer 105 is formed on the entire surface of the substrate 100.

A first source electrode 131 and a first drain electrode 132 are formed on a portion of the first insulating layer 105 corresponding to the first active layer 120. Here, the first source electrode 131 is protruded from the data line D.

On the other hand, reference numeral 107 denotes a pixel defining layer.

Next, the intersection X will be described with reference to Fig.

The intersection X includes a gate line G, an insulating island 13, a semiconductor island 20 and a data line D. [

The gate line G is formed of the same material as the first gate electrode 110 in the same layer. This is because the first gate electrode 110 protrudes from the gate line G. [ Reference numeral 11 denotes a transparent conductive layer corresponding to the first conductive layer 111 of the first gate electrode 110 and reference numeral 12 denotes a conductive layer corresponding to the second conductive layer 112 of the first gate electrode 110 Resistance conductive layer.

The insulating island 13 is formed on the gate line G of the intersection X and is formed of the same material as the first gate insulating layer 113 at the same time. The insulating island 13 is formed separately from the first gate insulating layer 113 and only in the island type at the intersection X independently. The width of the insulated island 13 in the x-axis direction may be equal to or greater than the width of the data line D. The width of the insulating island 13 in the y-axis direction may be equal to or greater than the width of the gate line G. [ This is because, if the width of the insulating island 13 is smaller than the width of the data line D and the width of the gate line G, the parasitic capacitance can not be reduced as much as possible.

The semiconductor island 20 is formed on the insulating island 13 and is formed of the same material as the first active layer 120 at the same time. Therefore, the semiconductor island 20 may include an oxide semiconductor. The semiconductor island 20 is isolated from the first active layer 120 and is formed only at the intersection X independently of the island type. The semiconductor island 20 may have the same area as the insulating island 13. For example, the width of the semiconductor island 20 in the x-axis direction may be equal to the width of the insulating island 13 in the x-axis direction, and the width of the semiconductor island 20 in the y- Axis direction in the y-axis direction.

A first insulating layer 105 is formed on the semiconductor island 20. As described above, since the first insulating layer 105 is formed on the entire surface of the substrate 100, the first insulating layer 105 is also formed at the intersection X.

A data line D is formed on the first insulating layer 105 of the intersection X. The data line D is formed so as to extend substantially perpendicular to the gate line G. [ The data line D is formed of the same material as the first source electrode 131 and the first drain electrode 132 in the same layer. This is because the first source electrode 131 is protruded from the data line D in particular.

According to an embodiment of the present invention, the parasitic capacitance of the intersection X can be reduced by forming the insulating island 13 and the semiconductor island 20 at the intersection X. The charge capacity between both electrodes is determined by the following equation (1). In the equation (1), C represents the charging capacity,? Represents the dielectric constant, A represents the area of the electrode, and d represents the distance between the electrodes.

That is, since the gate line G and the data line D are overlapped at the intersection X, the charge capacity formed by the gate line G and the data line D becomes the gate line G and the data line D The dielectric constant epsilon of each of the first insulating layer 105, the semiconductor island 20 and the insulating island 13 between the gate line G and the data line D serving as both electrodes and the distance d between the data line D and the gate Is determined by the area A of the overlapped area of the line G and the data line D. [

Since the insulating island 13 and the semiconductor island 20 are formed between the gate line G and the data line D in this way, the distance d between the gate line G and the data line D can be increased, The capacity is reduced.

Next, the capacitor Cst will be described with reference to FIG.

The capacitor Cst is electrically connected to the first thin film transistor TR1 to charge the applied data signal.

The capacitor Cst includes a lower electrode 310, an upper electrode 330, and a first insulating layer 105 interposed therebetween in a single layer, which are sequentially formed on the substrate 100.

The lower electrode 310 is formed on the substrate 100 and is formed of the same material in the same layer at the same time as the first gate electrode 110. Thus, the lower electrode 310 also includes a first layer 311 and a second layer 312. The first layer 311 includes a transparent conductive material in the same manner as the first conductive layer 111. The second layer 312 includes a low resistance conductive material as the second conductive layer 112.

The upper electrode 330 is formed of the same material as the first source electrode 131 and the first drain electrode 132 in the same layer. V may be a power supply line, and the upper electrode 330 may be formed by protruding a power supply line (V). The power supply line V may be formed on the same layer at the same time with the same material as the data line D.

A first insulating layer 105 is interposed between the lower electrode 310 and the upper electrode 330 as a single film.

According to an embodiment of the present invention, since only the first insulating layer 105 is interposed between the lower electrode 310 and the upper electrode 330 as a single layer, the charging capacity of the capacitor Cst can be increased. Referring to Equation (1), since the charging capacity of the capacitor Cst is inversely proportional to the distance between the two electrodes, a larger charging capacity can be secured as the distance d between the two electrodes is reduced. In this structure, only the first insulating layer 105 is interposed between the lower electrode 310 and the upper electrode 330, which is very advantageous in securing a large charging capacity.

According to the embodiment of the present invention, there is an advantage that the parasitic capacitance at the intersection X can be reduced while the charging capacity of the capacitor Cst can be increased. If the first insulating layer 105 is thickened to reduce the parasitic capacitance of the intersection X or if the first gate insulating layer 113 is formed entirely on the substrate 100, The dose has the side effect of decreasing. However, according to the embodiment of the present invention, the above-described side effects can be prevented by forming the insulating island 13 and the semiconductor island 20 independent of the intersection X.

Next, the second thin film transistor TR2 and the organic light emitting diode OLED will be described with reference to FIG.

The second thin film transistor TR2 is electrically connected to the capacitor Cst to serve as a driving transistor. The organic light emitting device OLED is connected to the drain terminal of the second thin film transistor TR2 and the second thin film transistor TR2 is turned on to output the driving current to the organic light emitting device OLED.

The second thin film transistor TR2 includes a second gate electrode 210 sequentially formed on a substrate, a second active layer 220 including an oxide semiconductor, a second source electrode 231, and a second drain electrode 232 . A second gate insulating layer 213 is interposed between the second gate electrode 210 and the second active layer 220. The structure of the second thin film transistor TR2 corresponds to the structure described in the first thin film transistor TR1, and a duplicate description will be omitted.

Particularly, the second gate electrode 210 is connected to the first gate electrode 110, the second active layer 220 to the first active layer 120, the second source electrode 231 and the second drain electrode 232 Corresponds to the first source electrode 131 and the first drain electrode 132 and the second gate insulating layer 213 corresponds to the first gate insulating layer 113. [ Reference numeral 211 denotes a transparent conductive layer corresponding to the first conductive layer 111 of the first gate electrode 110 and 212 denotes a conductive layer corresponding to the second conductive layer 112 of the first gate electrode 110 Resistance conductive layer.

The second drain electrode 232 of the second thin film transistor TR2 is electrically connected to the organic light emitting diode OLED.

The organic light emitting diode OLED includes a pixel electrode 410, a counter electrode 430, and an organic light emitting layer 420 interposed therebetween.

The pixel electrode 410 is formed on the substrate 100 in the same layer as the first gate electrode 110 and is formed of the same material at the same time as the first gate electrode 110. The pixel electrode 410 includes a first electrode layer 411 and a second electrode layer 412 in the same manner as the first gate electrode 110. The first electrode layer 411 includes a transparent conductive material and is in direct contact with the organic light emitting layer 420. For this, the second electrode layer 412 is partially removed to expose the first electrode layer 411 including a transparent conductive material such as ITO, IZO, or ZnO having a high work function. The second electrode layer 412 includes a low-resistance conductive material and is in direct contact with the second drain electrode 232.

According to an embodiment of the present invention, since the pixel electrode 410, the gate electrodes 110 and 210, and the lower electrode 310 of the capacitor Cst can be simultaneously formed, the manufacturing process is simplified.

The counter electrode 430 may include a metal having a small work function such as Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, or Li. The pixel electrode 410 may function as an anode electrode, and the counter electrode 430 may function as a cathode electrode. Of course, the polarities of both electrodes may be reversed.

The organic light emitting layer 420 interposed between the pixel electrode 410 and the counter electrode 430 may include a hole injecting and transporting layer, a light emitting layer, and an electron injecting and transporting layer. However, the light emitting layer is essentially provided.

Although not shown in the drawing, a protective layer may be further formed on the counter electrode 430, and sealing with a glass or the like may be performed.

Reference numeral 107 denotes a pixel defining film 107. The pixel defining film 107 is formed over the transistors TR1 and TR2, the capacitor Cst and the pixel electrode 410 in a whole area. An opening is formed in the pixel defining layer 107 to expose the pixel electrode 410 and an organic light emitting layer 420 and a counter electrode 430 are formed on the first electrode layer 411 of the exposed pixel electrode 410 do.

A method of manufacturing an OLED display according to an embodiment of the present invention will be described with reference to FIGS. 6 to 12. FIG.

6 to 12, for convenience of explanation, the second thin film transistor TR2, the capacitor Cst, the organic light emitting element OLED, and the intersections of the elements of the pixel region P, which are included in FIGS. 4 and 5, Only the method of manufacturing the component of part (X) is shown. Since the first thin film transistor TR1 is manufactured by the same manufacturing method as the second thin film transistor TR2, a duplicate description will be omitted.

The OLED display according to an embodiment of the present invention is manufactured with five masks. First, FIG. 6 is prepared with the first mask, FIG. 7 is prepared with the second mask, FIG. 9 is made with the third mask, FIG. 10 is made with the fourth mask, and FIG. 11 is made with the fifth mask.

As described above, by forming the second gate electrode 210, the lower electrode 310, and the pixel electrode 410 in a multi-layered structure, it is possible to manufacture an organic light emitting display device with only five masks, There is an increasing effect.

6, the second gate electrode 210 of the second thin film transistor TR2, the lower electrode 310 of the capacitor Cst, and the gate line G are formed on the same layer on the substrate 100 At the same time.

Specifically, a transparent conductive layer including a transparent conductive material is formed over the entire surface of the substrate 100, and a low-resistance conductive layer containing a conductive material having a low resistance is formed on the transparent conductive layer. The second gate electrode 210, the lower electrode 310, the gate line G, and the pixel electrode 410 are patterned using a first mask.

Accordingly, the second gate electrode 210, the lower electrode 310, the gate line G, and the pixel electrode 410 all include a plurality of layers and can be formed at the same time. Although not shown in the drawing, a buffer layer may be formed on the substrate 100 first.

Referring to FIG. 7, a second gate insulating layer 213 is formed on the second gate electrode 210, a second gate insulating layer 213 is formed on the intersection X of the gate line G, And the separated isolated island 13 is simultaneously formed in the same layer.

Specifically, an insulating layer is formed over the entire structure of FIG. Then, the second gate insulating layer 213 is patterned on the second gate electrode 210 using the second mask, and the insulating island 13 is patterned so as to remain at the intersection X.

Therefore, the second gate insulating layer 213 and the insulating island 13 can be formed on the same layer at the same time with the same material. In addition, the insulating island 13 is separated from the second gate insulating layer 213 and can be formed independently.

7, a second active layer 220 including an oxide semiconductor is formed on a second gate insulating layer 213 and a second active layer 220 is formed on the insulating island 13 with the same material as the second active layer 220 The semiconductor island 20 is separated from the second active layer 220 to form the same semiconductor island 20.

Specifically, a layer including an oxide semiconductor is formed over the entire surface of the substrate 100, the second active layer 220 is patterned on the second gate insulating layer 213 using a second mask, X so that the semiconductor island 20 is left on the insulating island 13.

Accordingly, the second active layer 220 and the semiconductor island 20 can be formed on the same layer at the same time with the same material. In addition, the semiconductor island 20 is separated from the second active layer 220 and can be formed independently.

Although a process for forming and patterning an insulating layer and a process for forming and patterning a layer including an oxide semiconductor are described for convenience of description, a layer including an insulating layer and an oxide semiconductor on the entire surface of the substrate 100 The structure of FIG. 7 may be patterned all at once using the second mask after sequentially forming.

According to the embodiment of the present invention, in order to reduce the parasitic capacitance as much as possible, the semiconductor island 20 and the insulating island 13 may be formed to have the same area. For example, the width of the semiconductor island 20 in the x-axis direction may be equal to the width of the insulating island 13 in the x-axis direction, and the width of the semiconductor island 20 in the y- Axis direction in the y-axis direction.

Referring to FIG. 8, a first insulating layer 105 is formed over the entire structure of FIG. Therefore, the first insulating layer 105 is formed on the second active layer 220, the lower electrode 310, and the semiconductor island 20.

Referring to FIG. 9, a contact hole exposing the second active layer 220, an opening exposing the pixel electrode 410, and a contact hole are formed by using a third mask in the structure of FIG.

Accordingly, at least a part of the first insulating layer 105 on the pixel electrode 410 is removed, and the pixel electrode 410 is exposed through the opening.

10, the second source electrode 231 and the second drain electrode 232 are formed on the first insulating layer 105 corresponding to the second active layer 220, and the second source electrode 231 and the second drain electrode 232 correspond to the lower electrode 310 The upper electrode 330 is formed on the first insulating layer 105 and the data line D is simultaneously formed on the first insulating layer 105 corresponding to the semiconductor island 20 in the same layer.

Specifically, the second source electrode 231, the second drain electrode 232, the upper electrode 330, and the data line D are patterned by forming a metal layer all over the structure of FIG. 9 and using a fourth mask . The second source electrode 231 is connected to the second active layer 220 through the contact hole and the second drain electrode 232 is connected to the second active layer 220 and the pixel electrode 410 through the contact hole. And is connected to the second electrode layer 412.

10, a portion of the second electrode layer 412 of the pixel electrode 410 exposed through the opening of the first insulating layer 105 is etched to expose the first opening 1 exposed through the first electrode layer 411, .

Referring to FIG. 11, a pixel defining layer 107 is formed on the entire surface of the structure of FIG. Accordingly, the pixel defining layer 107 is covered on the second source electrode 231, the second drain electrode 232, the upper electrode 330, the data line D, and the pixel electrode 410. Then, the pixel defining layer 107 corresponding to the pixel electrode 410 is removed using the fifth mask to form the second opening 2.

At this time, the second opening portion 2 may be formed in the first opening portion 1. This is because it is possible to solve the shorting problem that may occur due to the second electrode layer 412 of the pixel electrode 410 surrounding the first opening 1. [

Referring to FIG. 12, the organic light emitting layer 420 is formed to directly contact the first electrode layer 411 of the pixel electrode 410 exposed through the second opening portion 2. Further, the counter electrode 430 is formed on the organic light emitting layer 420.

The insulating island 13 and the semiconductor island 20 can be formed at the intersection X together with the process of manufacturing the thin film transistors TR1 and TR2 without adding any other process. can confirm. The first insulating layer 105 is interposed between the upper electrode 330 and the lower electrode 310 of the capacitor Cst so that the charging capacity of the capacitor Cst can be increased without any additional process.

According to the embodiment of the present invention, the parasitic capacitance of the intersection X is reduced and the charging capacity of the capacitor Cst is increased, so that a high-resolution image can be realized. Further, it is economically advantageous to manufacture an organic light emitting display device without adding a process.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation and that those skilled in the art will recognize that various modifications and equivalent arrangements may be made therein. It will be possible. Accordingly, the true scope of protection of the present invention should be determined only by the appended claims.

P: pixel area EA: light emitting area
CA: Circuit area G: Gate line
D: Data line V: Power line
TR1: first thin film transistor 110: first gate electrode
111: first conductive layer 112: second conductive layer
113: first gate insulating layer 120: first active layer
131: first source electrode 132: first drain electrode
X: intersection 13: insulated island
20: semiconductor island TR2: second thin film transistor
210: second gate electrode 213: second gate insulating layer
220: second active layer 231: second source electrode
232: second drain electrode Cst: capacitor
310: lower electrode 311: first layer
312: second layer 330: upper electrode
OLED: organic light emitting diode 410: pixel electrode
411: first electrode layer 412: second electrode layer
420: organic light emitting layer 430: opposing electrode
105: first insulating layer 107: pixel defining film
1: first opening 2: second opening

Claims (20)

A gate line formed on the substrate and extending in a first direction;
A data line formed on the substrate and extending in a second direction intersecting the first direction, the data line overlapping the gate line at an intersection;
A first thin film transistor electrically connected to the gate line and the data line, the first thin film transistor including a gate electrode, an active layer, a source electrode, a drain electrode, and a gate insulating layer;
A capacitor electrically connected to the first thin film transistor and including a lower electrode, an upper electrode, and a first insulating layer interposed therebetween;
A second thin film transistor electrically connected to the capacitor; And
An organic light emitting diode electrically connected to the second thin film transistor;
/ RTI >
Wherein the semiconductor island is formed in the same layer as the active layer,
And an insulating island is formed between the gate line and the semiconductor island at the intersection so as to be separated from the gate insulating layer and separated from the gate insulating layer. The method of claim 1, wherein
The gate electrode is protruded from the gate line,
And the source electrode protrudes from the data line. The method of claim 1, wherein
The gate electrode
A first conductive layer comprising a transparent conductive material; And
A second conductive layer formed on the first conductive layer and including a low-resistance conductive material;
And an organic light emitting diode. The method of claim 1, wherein
Wherein the first insulating layer is also formed between the active layer and the source electrode and the drain electrode to insulate them. The method of claim 1, wherein
Wherein the first insulating layer is also formed between the semiconductor island of the intersection and the data line. The method of claim 1, wherein
Wherein the semiconductor island and the insulating island have the same area. The method of claim 1, wherein
Wherein the width of the semiconductor island in the first direction is the same as the width of the insulating island in the first direction and the width of the semiconductor island in the second direction is the same as the width of the insulating island in the second direction. Device. The method of claim 1, wherein
The lower electrode
A gate electrode formed on the same layer as the gate electrode,
A first layer comprising a transparent conductive material; And
A second layer formed on the first layer, the second layer comprising a low-resistance conductive material;
And an organic light emitting diode. The method of claim 1, wherein
The organic light-
A pixel electrode electrically connected to the second thin film transistor;
An opposite electrode facing the pixel electrode; And
An organic light emitting layer interposed between the pixel electrode and the counter electrode;
And an organic light emitting diode. The method of claim 9, wherein
The pixel electrode
A first electrode layer directly connected to the organic light emitting layer and including a transparent conductive material; And
A second electrode layer directly connected to the second thin film transistor and including a low-resistance conductive material;
And an organic light emitting diode. A method of manufacturing an organic light emitting display including a gate line extending in a first direction and a data line extending in a second direction intersecting the first direction and overlapping the gate line at an intersection,
Forming a gate electrode of the thin film transistor, a lower electrode of the capacitor, and the gate line on the substrate;
Forming a gate insulating layer on the gate electrode, forming an insulating island in the same layer at the intersection of the gate line, the gate insulating layer being isolated from the gate insulating layer and separated from the gate line;
Forming an active layer so as to be insulated from the gate electrode, and forming a separate semiconductor island on the insulating island from the active layer into the same layer;
Forming a first insulating layer on the active layer, the lower electrode, and the semiconductor island; And
A source electrode and a drain electrode are formed on the first insulating layer, an upper electrode is formed on the first insulating layer corresponding to the lower electrode, and a data line is formed in the same layer on the first insulating layer Wherein the organic light emitting display device comprises: 12. The method of claim 11,
Wherein the semiconductor island and the insulating island are formed to have the same area. The method of claim 11, wherein
The width of the semiconductor island in the first direction is equal to the width of the insulating island in the first direction and the width of the semiconductor island in the second direction is equal to the width of the insulating island in the second direction Wherein the organic light emitting display device comprises a light emitting diode. 12. The method of claim 11,
The OLED display may further include an organic light emitting diode,
Forming a pixel electrode of the organic light emitting diode on the same layer with the same material at the same time as the gate electrode, the lower electrode, and the gate line; And
Forming the first insulating layer on the pixel electrode;
Further comprising the steps of: 15. The method of claim 14,
The step of forming the gate electrode, the lower electrode, the pixel electrode, and the gate line
Forming a transparent conductive layer containing a transparent conductive material; And
Forming a low-resistance conductive layer including a low-resistance conductive material on the transparent conductive layer;
Wherein the organic light emitting display device further comprises: 16. The method of claim 15,
Forming a first opening to expose the transparent conductive layer by removing the first insulating layer and the low-resistance conductive layer corresponding to the pixel electrode;
Further comprising the steps of: 17. The method of claim 16,
Forming a pixel defining layer on the source electrode, the drain electrode, the upper electrode, the data line, and the pixel electrode;
Further comprising the steps of: The method of claim 17, wherein
Removing the pixel defining layer corresponding to the pixel electrode and forming a second opening formed in the first opening;
Further comprising the steps of: The method of claim 18, wherein
Forming an organic light emitting layer to directly contact the transparent conductive layer corresponding to the pixel electrode exposed through the second opening;
Further comprising the steps of: The method of claim 19, wherein
Forming an opposite electrode on the organic light emitting layer;
Further comprising the steps of:

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