KR20180022500A - Triple decoder and decoding how to handle - Google Patents

Abstract

The present invention relates to a triple decoder and a method for processing decoding to minimize image delay and an image loss. The triple decoder is composed to decode by utilizing a central processing unit (CPU) core (2) utilizing an Intel CPU (1) of a software decoder, to decode by utilizing a first graphic processing unit (GPU) core (3) utilizing an Intel GPU of a hardware decoding included in the Intel CPU (1), to decode by utilizing a second GPU core (11) utilizing a cuda GPU of the hardware decoding mounted on a nvida graphic card (10), and to decode by utilizing only one CPU core (2) depending on performance supported by one system or by utilizing at least one method of the first GPU core (3) utilizing the Intel GPU in addition to the CPU core (2) or the second GPU core (11) utilizing the cuda GPU.

Description

[0001] DESCRIPTION [0002] TRIPLE DECODER AND DECODING [

The present invention relates to a triple decoder and a decoding processing method, and more particularly, to an apparatus and a method for decoding a triple decoder and a decoding processing method by increasing the number of channels of an image that can be processed by one system, The present invention relates to a triple decoder and a decoding processing method capable of minimizing a video delay and a video loss by saving space and energy as well as improving a processing speed due to a distributed processing of resources .

Recently, as CCTV penetration has increased exponentially, the importance of integrated control has become more and more important.

In addition, cameras that have remained in the existing SD image quality and are not easy to identify through the screen are being replaced with high-resolution cameras such as HD, Full-HD and UHD, which makes the integration control more complicated.

Decoding technology is an essential technique for controlling many cameras simultaneously.

Recently, most of the cameras have been compressed into H.264, which means that there is a limitation on the number of cameras that can be seen simultaneously in one system because the receiving end uses a lot of resources for decoding and requires a lot of performance.

Especially, it is getting worse with high resolution (4K-Ultra HD), and considering the fact that CCTV is increasing in high resolution in recent years, the need for decoding technology becomes bigger.

Therefore, the patent registration No. 10-1325040 (integrated control system) of October 29, 2013 was proposed,

This includes a power monitoring unit that collects data such as voltage, current, and frequency input and output from a distribution board, a switchboard, and the like installed in a building,

An image information collecting unit for collecting image information from a CCTV camera installed in a building,

An EL monitor for monitoring an operation state of an electric motor for operating an elevator, a revolving door, an escalator and the like and an electric motor control panel,

A management unit including a fire detection unit for detecting a fire due to a temperature change of a use space inside the building,

A main server for providing information in a graphic form by data communication with the management unit and monitoring and controlling the status in real time,

A DVI image transmitting unit for dividing the image collected by the image information collecting unit and providing data to a large monitor installed in the control room,

A switcher for transmitting and receiving video signals photographed by a plurality of CCTV cameras to the main server and for monitoring and controlling the video of the camera through a control program provided by the main server;

And a database for storing and managing information collected and analyzed by the main server. A controller connected to the main server implements a GUI screen on a monitor, thereby selecting and monitoring each CCTV camera by operating a menu button through a touch screen It is possible to perform a variety of camera control functions so that a simple and efficient working environment can be achieved.

And 10-2016-0034638 (image processing method and apparatus for video surveillance) of Mar. 30, 2016,

This is a method for processing an image in an image processing apparatus for video surveillance,

An acquiring step of acquiring image data for a plurality of channels from one kernel;

A memory management step of performing channel frame synchronization on specific address information allocated to each channel of the image data;

A decoding process of decoding the image data and converting the image data into original image data;

Resetting the specific address information to the original image data, and transmitting the original image data to the one kernel; And

And outputting the original image data for each channel in the one kernel,

The acquiring process includes:

Allocating the specific address information for each of the plurality of channels in a central processing unit (CPU)

The image data for each pre-encoded channel is copied to a GPU memory of a graphics processing unit (GPU)

The memory management process includes:

Extracting the specific address information for the one kernel included in each of the image data, performing channel frame synchronization for each of the image data and the specific address information in the GPU memory of the graphics processing unit, Information is generated,

A memory management unit for acquiring image data for a plurality of channels from one kernel and performing channel frame synchronization for specific address information allocated to each channel of the image data;

A decoding unit decoding the image data and converting the image data into original image data;

A data management unit for resetting the specific address information to the original image data and transmitting the original image data to the one kernel;

And an original image output unit for outputting the original image data for each channel in the one kernel.

However, since the conventional integrated control system or the image processing method and apparatus for video surveillance as described above use a CPU and a GPU separately, they can not fully utilize system resources because they use only a single core, And the number of cameras that can be decoded in one system is limited, so that there is a disadvantage that one system must be added again in order to decode an image by a plurality of cameras.

SUMMARY OF THE INVENTION Accordingly, the present invention has been made keeping in mind the above problems occurring in the prior art, and it is an object of the present invention to provide an image processing apparatus, A triple decoder and a decoding processing method are provided so that image delay and image loss can be minimized by saving energy as well as saving space as the number of systems is reduced and processing speed can be improved due to the distributed processing of resources The purpose of that is to do.

According to another aspect of the present invention, there is provided a triple decoder and decoding method,

By using a single CPU and GPU simultaneously to decode, the number of cameras that can be decoded in one system is increased, thereby maximizing system resource efficiency so as to save space, energy, and cost at the same time,

First, the software decoder has a decoding method using the CPU core (2) using the Intel CPU.

It is usually difficult to decode many channels at the same time because it can decode about 16 channels of Full-HD (1920X1080) image based on Intel-i7 standard.

Next, there is a method of utilizing the first GPU core of the hardware decoding using the Intel GPU included in the Intel CPU.

It is possible to decode video using GPU core which is mainly used for graphic work. When using GPU of Intel I7 CPU, it is possible to decode 32 channels of full-HD image.

There is also a way to utilize the second GPU core of hardware decoding using Cuda GPU.

This is a decode technology using Cuda GPU installed in Nvida Graphic Card. It can be decoded independently from Intel CPU, and it depends on GPU performance and memory capacity of graphics card. However, when using GTX960 series, Full- HD video can be decoded up to 32 channels.

Therefore, it is possible to utilize only one CPU core utilizing Intel CPU according to the performance supported by one system, or to selectively utilize the first GPU core utilizing Intel GPU and the second GPU core utilizing Cuda GPU in addition to the CPU core It has the greatest effect in distributing resources and utilizing resources, which can double the number of decoding channels compared to existing technologies.

Of course, in order to utilize the first GPU core utilizing the Intel GPU or the second GPU core utilizing the Cuda GPU in addition to the CPU core, proper channel allocation is performed for each Core during each individual decoding The resources should be distributed.

Therefore, it is necessary to know which image decoding is supported by the Core.

First, since software decoding using CPU core supports decoding of all images, if the first GPU core using the Intel GPU and the first GPU core utilizing the cuda GPU do not support the decoding, the triple decoder controller controls the CPU core To be automatically decoded at the < RTI ID = 0.0 >

And it should be able to detect the resource saturation for each Core.

The decoding support by the GPU can be actually detected by performing decoding using the first GPU core utilizing the Intel GPU and the first GPU core utilizing the Intel GPU.

In the case of resource saturation, the CPU allows the triple decoder controller to determine CPU utilization,

In the case of the first GPU core and the second GPU core, the triple decoder controller can judge the GPU usage rate and the GPU memory usage, respectively.

For example, if the utilization rate of the second GPU core utilizing the Cuda GPU exceeds 80% or the memory used by the GPU exceeds 90%, it is determined that the resource of the second GPU core utilizing the Cuda GPU is saturated, It is configured to allocate channels to other core without any channel allocation.

According to the triple decoder and the decoding processing method of the present invention, the number of channels of an image that can be processed by one system can be increased, so that the cost can be saved as compared with the case of using a plurality of systems,

As the number of necessary systems decreases, space is saved, energy is saved, and processing speed is improved due to the distributed processing of resources, thereby minimizing image delay and image loss.

1 is a block diagram showing a main configuration of the present invention;
2 is a block diagram illustrating a configuration for monitoring of the present invention;
3 is a flowchart showing an operation procedure of the present invention.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

A triple decoder according to the present invention comprises:

The CPU core 2 utilizing the Intel CPU 1 of the software decoder is used for decoding.

In the case of the CPU core 2, 16 channels of Full-HD (1920 × 1080) video can be decoded based on Intel-i7 standard, so it is difficult to decode many channels simultaneously.

The first GPU core 3 utilizing the Intel GPU of the hardware decoding included in the Intel CPU 1 is used for decoding.

The first GPU core (3), which is mainly used for graphic work, enables image decoding. In general, when the GPU of the Intel I7 CPU is utilized, it is possible to decode up to 32 full HD video images.

The second GPU core 11 utilizing the Cuda GPU of the hardware decoding mounted on the NVIDIA Graphic Card 10 is used for decoding.

This is a decode technology using the Cuda GPU installed in the Nvida Graphic Card (10), which can be decoded independently of the Intel CPU (1). It differs depending on the GPU performance and memory capacity of the graphics card, but the GTX960 Series, it is possible to decode up to 32 full-HD video images.

Therefore, only one CPU core (2) may be utilized depending on the performance supported by one system, or a first GPU core (3) utilizing an Intel GPU or a second GPU core (11) utilizing a Cuda GPU in addition to the CPU core ), Thereby maximizing the effect of distributing the resources and utilizing the resources, thereby increasing the number of decoding channels by more than two times compared with the existing technology.

Of course, in order to utilize the first GPU core 3 utilizing the Intel GPU or the second GPU core 11 utilizing the Cuda GPU in addition to the CPU core 2, It is necessary to distribute resources by allowing the controller 20 to perform channel allocation appropriately for each Core.

Therefore, it is necessary to know which image decoding is supported by the Core (2) (11).

First, since software decoding using the CPU core (2) supports decoding of all images, if the first GPU core (3) using the Intel GPU and the second GPU core (11) utilizing the cuda GPU do not support decoding So that the triple decoder controller 20 automatically decodes the decoded picture in the CPU core 2,

And it should be able to detect the resource saturation for each Core.

Support for decoding by the GPU can be detected by performing decoding using the first GPU core (3) using the Intel GPU and the first GPU core (3) using the Intel GPU.

In the case of the resource usage saturation, the CPU core (1) enables the triple decoder controller (20) to determine the CPU utilization rate through the first resource monitoring unit (4)

In the case of the first GPU core (3), the triple decoder controller (20) can determine the GPU usage rate and the GPU memory usage amount through the second resource monitoring unit (5).

In the case of the second GPU core 11, the triple decoder controller 20 judges the usage rate of the Cuda GPU mounted on the Nvida Graphic Card 10 and the GPU memory usage amount through the third resource monitoring unit 12 .

For example, if the usage rate of the second GPU core 11 using the Cuda GPU exceeds 80% or the memory used by the GPU exceeds 90%, the resources of the second GPU core 11 utilizing the Cuda GPU It is determined that the first GPU core 3 is saturated and the channel is distributed to another first GPU core 3 without any channel allocation.

In the triple decoder and decoding method of the present invention configured as described above,

When images from many outside CCTVs are input to the triple decoder controller 20 as a stream (step 21)

The triple decoder controller 20 determines whether the triple decoder controller 20 can support the GPU core by sending it to the first GPU core 3 in step 22. If it is possible to support the first GPU core 3, core (3) (step 23).

The triple decoder controller 20 determines the saturation state (step 24) by using the GPU usage rate and the GPU memory usage amount through the second resource monitoring unit 5 in a state in which the triple decoder controller 20 transmits the decoding result in the first GPU core 3, If it is not saturated, the first GPU core 3 continues to decode it so that it is displayed on a monitor (not shown) (step 25).

If it can not be supported by the first GPU core 3 in step 22, the second GPU core 11 utilizing the Cuda GPU of hardware decoding installed in the Nvida Graphic Card 10 is used to decode the decoded data It is judged whether or not it is supportable (step 26).

If the second GPU core 11 can support it, the triple decoder controller 20 controls the third resource monitoring unit 12 to monitor the usage rate of the Cuda GPU mounted on the Nvida Graphic Card 10 and the GPU memory usage amount The saturation state of the second GPU core 11 is determined (step 27). If the saturation state is not satisfied, the second GPU core 11 is decoded using the second GPU core 11 so that the screen is displayed on a monitor (Step 28).

If it can not be supported in step 26 or is saturated in step 27, it is decoded by utilizing the CPU core 2 utilizing the Intel CPU 1 of the software decoder, so that it is displayed on a monitor (not shown) (Step 29).

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but many variations and modifications may be made without departing from the scope of the invention. It will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined by the appended claims.

1: Intel CPU 2: CPU core
3: first GPU core 4: first resource monitoring unit
5: Second resource monitoring unit 10: Nvida Graphic Card
11: second GPU core 12: third resource monitoring unit
20: Triple Decoder Controller

Claims (3)

The CPU core 2 utilizing the Intel CPU 1 of the software decoder is used for decoding,
The first GPU core 3 utilizing the Intel GPU of the hardware decoding included in the Intel CPU 1 is used for decoding,
The second GPU core 11 utilizing the Cuda GPU of hardware decoding mounted on the NVIDIA Graphic Card 10 is used for decoding,
It is possible to use only one of the CPU core 2 according to the performance supported by one system or to use the first GPU core 3 utilizing the Intel GPU or the Cuda GPU using the CPU core 2 2 GPU core (11) by using at least one method. The method according to claim 1,
The CPU allows the first resource monitoring unit 4 to determine the resource usage saturation based on the CPU usage rate,
In the case of the first GPU core 3, the resource usage saturation can be determined through the second resource monitoring unit 5 using the GPU usage rate and the GPU memory usage amount,
In the case of the second GPU core 11, the resource usage saturation can be determined using the usage rate of the Cuda GPU mounted on the Nvida Graphic Card 10 and the GPU memory usage amount through the third resource monitoring unit 12 Lt; / RTI > decoder. The triple decoder controller 20 determines whether the image can be supported by sending it to the first GPU core 3 so that it can be supported by the Intel CPU 1 ) Using the first GPU core (3) utilizing the Intel GPU of the hardware decoding included in the first GPU core (3)
The triple decoder controller 20 determines the saturation state using the GPU usage rate and the GPU memory usage amount through the second resource monitoring unit 5 in a state in which the triple decoder controller 20 transmits the decoding state in the first GPU core 3, Causing the first GPU core (3) to decode and display it on the monitor screen,
If it can not be supported by the first GPU core 3 in step 22, the second GPU core 11 utilizing the Cuda GPU of the hardware decoding mounted on the Nvida Graphic Card 10 is used to decode and transfer it to support Judging whether it is possible,
If the second GPU core 11 can support it, the triple decoder controller 20 controls the third resource monitoring unit 12 to monitor the usage rate of the Cuda GPU mounted on the Nvida Graphic Card 10 and the GPU memory usage amount Determining whether the second GPU core 11 is saturated with the second GPU core 11, if the second GPU core 11 is not saturated, decoding the second GPU core 11 so that the second GPU core 11 is displayed on the monitor,
(2) utilizing the Intel CPU (1) of the software decoder if it is not supportable in step 26 or is saturated in step 27, so that it is displayed on the monitor screen And a decoding processing method.

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